diff --git a/SMPDataFlowAnalysis.cpp b/SMPDataFlowAnalysis.cpp
index 0bfc719743d9805b1cfb6cb409fdd5ab40659150..35de7146fb89c424ccca2c8bc67fbc833a91fb6f 100644
--- a/SMPDataFlowAnalysis.cpp
+++ b/SMPDataFlowAnalysis.cpp
@@ -1314,6 +1314,7 @@ SMPUsesFlags[NN_aaa] = true;                 // ASCII adjust after addition
 SMPUsesFlags[NN_aas] = true;				 // ASCII adjust after subtraction
 #endif
 SMPUsesFlags[NN_adc] = true;                 // Add with Carry
+SMPUsesFlags[NN_cmps] = true;                // Compare Strings (uses DF direction flag)
 SMPUsesFlags[NN_into] = true;                // Call to Interrupt Procedure if Overflow Flag = 1
 SMPUsesFlags[NN_ja] = true;                  // Jump if Above (CF=0 & ZF=0)
 SMPUsesFlags[NN_jae] = true;                 // Jump if Above or Equal (CF=0)
@@ -1369,6 +1370,7 @@ SMPUsesFlags[NN_shl] = true;                 // Shift Logical Left
 SMPUsesFlags[NN_shr] = true;                 // Shift Logical Right
 #endif
 SMPUsesFlags[NN_sbb] = true;                 // Integer Subtraction with Borrow
+SMPUsesFlags[NN_scas] = true;                // Compare String (uses DF direction flag)
 SMPUsesFlags[NN_seta] = true;                // Set Byte if Above (CF=0 & ZF=0)
 SMPUsesFlags[NN_setae] = true;               // Set Byte if Above or Equal (CF=0)
 SMPUsesFlags[NN_setb] = true;                // Set Byte if Below (CF=1)
diff --git a/SMPInstr.cpp b/SMPInstr.cpp
index 5e006be9902492cf4c69e3af4eda2d6072093909..22301dead8078cbb71920685af67b3a78d1ff7f8 100644
--- a/SMPInstr.cpp
+++ b/SMPInstr.cpp
@@ -600,15 +600,21 @@ void SMPInstr::MDFixupDefUseLists(void) {
 		this->Defs.SetRef(BaseOpnd);
 		this->Uses.SetRef(BaseOpnd);
 	}
-	if (!this->DefsFlags && ((this->SMPcmd.itype == NN_cmps) || (this->SMPcmd.itype == NN_scas))) {
-		// REPE and REPNE define the flags in addition to ECX.
+	if ((this->SMPcmd.itype == NN_cmps) || (this->SMPcmd.itype == NN_scas)) {
+		// ESI and EDI are USEd and DEFed to point to source and dest strings for CMPS.
+		//  Only EDI is involved with SCAS.
 		op_t BaseOpnd;
 		BaseOpnd.type = o_reg; // Change type and reg fields
-		BaseOpnd.reg = X86_FLAGS_REG;
 		BaseOpnd.hasSIB = 0;
 		BaseOpnd.clr_showed();
+		if (this->SMPcmd.itype == NN_cmps) {
+			BaseOpnd.reg = R_si;
+			this->Defs.SetRef(BaseOpnd);
+			this->Uses.SetRef(BaseOpnd);
+		}
+		BaseOpnd.reg = R_di;
 		this->Defs.SetRef(BaseOpnd);
-		this->DefsFlags = true;
+		this->Uses.SetRef(BaseOpnd);
 	}
 
 	// Now, handle special instruction categories that have implicit operands.
@@ -629,6 +635,9 @@ void SMPInstr::MDFixupDefUseLists(void) {
 		this->MDAddRegDef(R_bp, false);
 		this->MDAddRegUse(R_bp, false);
 	}
+	else if (this->SMPcmd.itype == NN_maskmovq) {
+		this->MDAddRegUse(R_di, false);
+	}
 	else if (8 == this->GetOptType()) {
 		// This category implicitly writes to EDX:EAX.
 		this->MDAddRegDef(R_dx, false);
diff --git a/SMPStaticAnalyzer.cpp b/SMPStaticAnalyzer.cpp
index b06db8b9f04de2c92c0a1ab589c4854ff6b10574..a00935f622da2944f0eb9f098d5f571b1e14905a 100644
--- a/SMPStaticAnalyzer.cpp
+++ b/SMPStaticAnalyzer.cpp
@@ -1679,7 +1679,7 @@ OptCategory[NN_fild] = 1;                // Load Integer          ** Infer src i
 OptCategory[NN_fist] = 0;                // Store Integer
 OptCategory[NN_fistp] = 0;               // Store Integer and Pop
 OptCategory[NN_fbld] = 1;                // Load BCD
-OptCategory[NN_fbstp] = 1;               // Store BCD and Pop
+OptCategory[NN_fbstp] = 0;               // Store BCD and Pop
 OptCategory[NN_fadd] = 1;                // Add Real
 OptCategory[NN_faddp] = 1;               // Add Real and Pop
 OptCategory[NN_fiadd] = 1;               // Add Integer
@@ -2076,8 +2076,8 @@ OptCategory[NN_hsubpd] = 1;              // Sub horizontally packed DP FP number
 OptCategory[NN_hsubps] = 1;              // Sub horizontally packed SP FP numbers
 OptCategory[NN_monitor] = 1;             // Set up a linear address range to be monitored by hardware
 OptCategory[NN_mwait] = 1;               // Wait until write-back store performed within the range specified by the MONITOR instruction
-OptCategory[NN_fisttp] = 2;              // Store ST in intXX (chop) and pop
-OptCategory[NN_lddqu] = 0;               // Load unaligned integer 128-bit
+OptCategory[NN_fisttp] = 0;              // Store ST in intXX (chop) and pop
+OptCategory[NN_lddqu] = 1;               // Load unaligned integer 128-bit
 
 // SSSE3 instructions