From 474105b7bd5e1ff95e466ba37554ff57e1308ea4 Mon Sep 17 00:00:00 2001
From: clc5q <clc5q@git.zephyr-software.com>
Date: Thu, 30 Apr 2015 06:41:05 +0000
Subject: [PATCH] Reduce SMPStaticAnalyzer module to an IDA Pro driver; reduce
use of IDA Pro types in common modules.
Former-commit-id: d78319e21cb81dc6c03e956074ea12fb25ccc5e2
---
.gitattributes | 4 +
include/base/ProfilerInformation.h | 42 +-
include/base/SMPBasicBlock.h | 110 +-
include/base/SMPDataFlowAnalysis.h | 198 +-
include/base/SMPFunction.h | 136 +-
include/base/SMPInstr.h | 28 +-
include/base/SMPProgram.h | 4 +-
include/base/SMPStaticAnalyzer.h | 218 +-
include/interfaces/SMPDBInterface.h | 105 +-
include/interfaces/STARSTypes.h | 1457 ++++-
include/interfaces/abstract/STARSInterface.h | 24 +-
include/interfaces/abstract/STARSOp.h | 18 +-
include/interfaces/abstract/STARSProgram.h | 185 +
include/interfaces/abstract/all.h | 4 +-
include/interfaces/idapro/STARSInstruction.h | 2 +
include/interfaces/idapro/STARSOp.h | 9 +-
include/interfaces/idapro/STARSProgram.h | 48 +
include/interfaces/idapro/all.h | 1 +
src/base/ProfilerInformation.cpp | 108 +-
src/base/SMPBasicBlock.cpp | 379 +-
src/base/SMPDBInterface.cpp | 94 +-
src/base/SMPDataFlowAnalysis.cpp | 5788 ++++-------------
src/base/SMPFunction.cpp | 571 +-
src/base/SMPInstr.cpp | 3857 +++++------
src/base/SMPProgram.cpp | 61 +-
src/base/SMPStaticAnalyzer.cpp | 2466 +------
src/interfaces/abstract/Makefile.in | 2 +-
src/interfaces/abstract/STARSProgram.cpp | 5276 +++++++++++++++
src/interfaces/idapro/Makefile.in | 2 +-
src/interfaces/idapro/STARSFunction.cpp | 5 +-
src/interfaces/idapro/STARSIDAInstruction.cpp | 57 +-
src/interfaces/idapro/STARSIDAOp.cpp | 30 +-
src/interfaces/idapro/STARSIDAProgram.cpp | 136 +
src/interfaces/idapro/STARSInterface.cpp | 9 +-
34 files changed, 11484 insertions(+), 9950 deletions(-)
create mode 100644 include/interfaces/abstract/STARSProgram.h
create mode 100644 include/interfaces/idapro/STARSProgram.h
create mode 100644 src/interfaces/abstract/STARSProgram.cpp
create mode 100644 src/interfaces/idapro/STARSIDAProgram.cpp
diff --git a/.gitattributes b/.gitattributes
index 946e40eb..0b79954b 100644
--- a/.gitattributes
+++ b/.gitattributes
@@ -21,12 +21,14 @@ include/interfaces/abstract/STARSInstruction.h -text
include/interfaces/abstract/STARSInstructionID.h -text
include/interfaces/abstract/STARSInterface.h -text
include/interfaces/abstract/STARSOp.h -text
+include/interfaces/abstract/STARSProgram.h -text
include/interfaces/abstract/STARSSegment.h -text
include/interfaces/abstract/all.h -text
include/interfaces/idapro/STARSFunction.h -text
include/interfaces/idapro/STARSInstruction.h -text
include/interfaces/idapro/STARSInterface.h -text
include/interfaces/idapro/STARSOp.h -text
+include/interfaces/idapro/STARSProgram.h -text
include/interfaces/idapro/STARSSegment.h -text
include/interfaces/idapro/all.h -text
/install-sh -text
@@ -49,10 +51,12 @@ src/base/SMPStaticAnalyzer.cpp -text
src/interfaces/Makefile.in -text
src/interfaces/abstract/Makefile.in -text
src/interfaces/abstract/STARSInstruction.cpp -text
+src/interfaces/abstract/STARSProgram.cpp -text
src/interfaces/idapro/Makefile.in -text
src/interfaces/idapro/STARSFunction.cpp -text
src/interfaces/idapro/STARSIDAInstruction.cpp -text
src/interfaces/idapro/STARSIDAOp.cpp -text
+src/interfaces/idapro/STARSIDAProgram.cpp -text
src/interfaces/idapro/STARSInterface.cpp -text
src/interfaces/irdb/Makefile.in -text
tests/commit/busybox.psexe -text
diff --git a/include/base/ProfilerInformation.h b/include/base/ProfilerInformation.h
index 5d583563..4a532a06 100644
--- a/include/base/ProfilerInformation.h
+++ b/include/base/ProfilerInformation.h
@@ -37,7 +37,7 @@
#include <cstddef>
-// #include "interfaces/STARSTypes.h"
+#include "interfaces/STARSTypes.h"
#include "interfaces/SMPDBInterface.h"
class SMPProgram; // forward declaration so we can declare a pointer to an SMPProgram
@@ -70,33 +70,33 @@ class ProfilerInformation
ProfilerInformation(const char *, SMPProgram *);
virtual ~ProfilerInformation();
- inline InstructionInformation* GetInfo(ea_t addr) { return the_map[addr]; };
+ inline InstructionInformation* GetInfo(STARS_ea_t addr) { return the_map[addr]; };
- std::set<ea_t> GetIndirectCallTargets(ea_t addr) { return indirect_call_map[addr]; };
+ std::set<STARS_ea_t> GetIndirectCallTargets(STARS_ea_t addr) { return indirect_call_map[addr]; };
inline MemoryAccessInfo *GetMemoryAccessInfo(void) { return MemProfileInfo; };
inline long GetProfilerAnnotationCount(void) const { return ProfilerAnnotsRead; };
protected:
// add type information from profiler about loads
- void addProfileInformation(ea_t addr, long long nc, long long pc, long long oc);
+ void addProfileInformation(STARS_ea_t addr, long long nc, long long pc, long long oc);
// add pre-dec info from profiler
- void profileAddressingInformation ( ea_t addr, int size, char *type,
- char *scope, ea_t the_const, char* field, ea_t real_const);
+ void profileAddressingInformation ( STARS_ea_t addr, int size, char *type,
+ char *scope, STARS_ea_t the_const, char* field, STARS_ea_t real_const);
- inline void SetInfo(ea_t addr, InstructionInformation* ii) { the_map[addr] = ii; }
+ inline void SetInfo(STARS_ea_t addr, InstructionInformation* ii) { the_map[addr] = ii; }
private:
// annotations that are used for numeric type propagation.
- std::map<ea_t,InstructionInformation*> the_map;
+ std::map<STARS_ea_t,InstructionInformation*> the_map;
// annotations to spew back out verbatim.
std::list<std::string> constant_info;
std::string filename;
- std::map<ea_t, std::set<ea_t> > indirect_call_map;
+ std::map<STARS_ea_t, std::set<STARS_ea_t> > indirect_call_map;
MemoryAccessInfo *MemProfileInfo;
SMPProgram *MyProg;
@@ -123,10 +123,10 @@ enum SMPAccessType {
class SMPMemoryAccesses {
public:
// Constructors and destructors.
- SMPMemoryAccesses(ea_t addr);
+ SMPMemoryAccesses(STARS_ea_t addr);
// Get functions.
- inline ea_t GetAddr(void) const { return address; };
+ inline STARS_ea_t GetAddr(void) const { return address; };
inline size_t GetLimit(void) const { return ByteLimit; };
inline SMPAccessType GetAccessType(size_t index) const {
return ProfTypes.at(index);
@@ -152,7 +152,7 @@ public:
void MeetAccessType(size_t index, SMPAccessType TypeSeen);
private:
- ea_t address;
+ STARS_ea_t address;
size_t ByteLimit; // number of bytes in data object
int region;
std::vector<SMPAccessType> ProfTypes; // access types seen by profiler,
@@ -171,7 +171,7 @@ public:
// Analysis methods.
void ProcessMemoryAccessAnnotation(FILE *fin, int addr);
void InferDataGranularity(void);
- bool ComputeNonDirectAccessRegion(ea_t InstAddr, int &ChildOffset,
+ bool ComputeNonDirectAccessRegion(STARS_ea_t InstAddr, int &ChildOffset,
int &RegionSize); // If true is returned, InstAddr makes non-direct
// accesses to child object from ChildOffset to
// ChildOffset + RegionSize - 1 within parent object.
@@ -183,27 +183,27 @@ private:
// which implies that the instructions access multiple types (e.g. the
// copying or initializing instructions in memset(), memcpy(), and the
// customized routines that perform similar functions in an application).
- std::set<ea_t> MultipleAccessTypeSet;
+ std::set<STARS_ea_t> MultipleAccessTypeSet;
// Map of instruction addresses to the accesses performed by them.
- std::map<ea_t, SMPMemoryAccesses *> InstrAccessMap;
+ std::map<STARS_ea_t, SMPMemoryAccesses *> InstrAccessMap;
// Map of instruction addresses to the object allocation addresses for
// all objects accessed by that instruction.
// NOTE: For static data, the "allocation address" is the data address.
// For heap and stack data, the allocation address is truly the code
// address at which the data is allocated.
- std::map<ea_t, std::set<ea_t> > InstrObjectMap;
+ std::map<STARS_ea_t, std::set<STARS_ea_t> > InstrObjectMap;
// Inverse mapping: From object allocation addresses to all instruction
// addresses that access the object.
- std::map<ea_t, std::set<ea_t> > ObjectInstrMap;
+ std::map<STARS_ea_t, std::set<STARS_ea_t> > ObjectInstrMap;
// Map of memory access instruction addresses to the data type number
// for the data objects accessed by that code address.
- std::map<ea_t, size_t> InstrTypeMap;
+ std::map<STARS_ea_t, size_t> InstrTypeMap;
// Ditto for mapping object allocation addresses to data type ID #.
- std::map<ea_t, size_t> ObjectTypeMap;
+ std::map<STARS_ea_t, size_t> ObjectTypeMap;
// Meet of access types for each data object type, with outer index
// being the type number from InstrTypeMap and inner index being
@@ -212,8 +212,8 @@ private:
// Method to recursively associate a data type ID with all instruction
// addresses that access objects of that data type.
- void AssociateInstrWithType(ea_t InstAddr, size_t TypeID,
- std::map<ea_t, std::set<ea_t> >::iterator InstObjIter);
+ void AssociateInstrWithType(STARS_ea_t InstAddr, size_t TypeID,
+ std::map<STARS_ea_t, std::set<STARS_ea_t> >::iterator InstObjIter);
}; // end of class MemoryAccessInfo
#endif
diff --git a/include/base/SMPBasicBlock.h b/include/base/SMPBasicBlock.h
index de17171e..58197d55 100644
--- a/include/base/SMPBasicBlock.h
+++ b/include/base/SMPBasicBlock.h
@@ -101,8 +101,8 @@ public:
int operator==(const SMPBasicBlock &rhs) const;
// Get methods
- ea_t GetFirstAddr(void) const;
- ea_t GetLastAddr(void);
+ STARS_ea_t GetFirstAddr(void) const;
+ STARS_ea_t GetLastAddr(void);
inline int GetNumber(void) const { return BlockNum; };
inline SMPBasicBlock *GetThisBlock(void) { return this; };
inline SMPFunction *GetFunc(void) { return MyFunc; };
@@ -145,12 +145,12 @@ public:
std::set<STARSOpndTypePtr, LessOp>::iterator GetFirstUpExposed(void); // UpExposedSet.begin()
std::set<STARSOpndTypePtr, LessOp>::iterator GetLastUpExposed(void); // UpExposedSet.end()
inline size_t GetUpExposedSetSize(void) const { return UpExposedSet.size(); };
- inline std::set<std::pair<STARSOpndTypePtr, ea_t>, LessDefinition>::iterator GetFirstReachesIn(void) { return ReachesInSet.begin(); };
- inline std::set<std::pair<STARSOpndTypePtr, ea_t>, LessDefinition>::iterator GetLastReachesIn(void) { return ReachesInSet.end(); };
- inline std::set<std::pair<STARSOpndTypePtr, ea_t>, LessDefinition>::iterator GetFirstReachesOut(void) { return ReachesOutSet.begin(); };
- inline std::set<std::pair<STARSOpndTypePtr, ea_t>, LessDefinition>::iterator GetLastReachesOut(void) { return ReachesOutSet.end(); };
- inline std::set<std::pair<STARSOpndTypePtr, ea_t>, LessDefinition>::iterator GetFirstDownExposedDefn(void) { return DownExposedDefnSet.begin(); };
- inline std::set<std::pair<STARSOpndTypePtr, ea_t>, LessDefinition>::iterator GetLastDownExposedDefn(void) { return DownExposedDefnSet.end(); };
+ inline std::set<std::pair<STARSOpndTypePtr, STARS_ea_t>, LessDefinition>::iterator GetFirstReachesIn(void) { return ReachesInSet.begin(); };
+ inline std::set<std::pair<STARSOpndTypePtr, STARS_ea_t>, LessDefinition>::iterator GetLastReachesIn(void) { return ReachesInSet.end(); };
+ inline std::set<std::pair<STARSOpndTypePtr, STARS_ea_t>, LessDefinition>::iterator GetFirstReachesOut(void) { return ReachesOutSet.begin(); };
+ inline std::set<std::pair<STARSOpndTypePtr, STARS_ea_t>, LessDefinition>::iterator GetLastReachesOut(void) { return ReachesOutSet.end(); };
+ inline std::set<std::pair<STARSOpndTypePtr, STARS_ea_t>, LessDefinition>::iterator GetFirstDownExposedDefn(void) { return DownExposedDefnSet.begin(); };
+ inline std::set<std::pair<STARSOpndTypePtr, STARS_ea_t>, LessDefinition>::iterator GetLastDownExposedDefn(void) { return DownExposedDefnSet.end(); };
std::set<STARSOpndTypePtr, LessOp>::iterator GetFirstLocalName(void); // LocalNames.begin()
std::set<STARSOpndTypePtr, LessOp>::iterator GetLastLocalName(void); // LocalNames.end()
std::set<int>::iterator GetFirstDomFrontier(void); // DomFrontier.begin()
@@ -164,16 +164,16 @@ public:
inline std::map<int, struct STARS_SCCP_Const_Struct>::iterator GetLastLocalConstValueIter(void) { return ConstantLocalDefs.end(); };
#if 0
// Given a USE operand and the address of its instr, return DEF from DU chains or Phi func.
- std::set<DefOrUse, LessDefUse>::iterator GetDefFromOpAddr(STARSOpndTypePtr UseOp, ea_t InstAddr, int SSANum);
+ std::set<DefOrUse, LessDefUse>::iterator GetDefFromOpAddr(STARSOpndTypePtr UseOp, STARS_ea_t InstAddr, int SSANum);
#endif
- std::set<DefOrUse, LessDefUse>::iterator GetGlobalDefIterFromDefAddr(STARSOpndTypePtr DefOp, ea_t DefAddr);
- ea_t GetDefAddrFromUseAddr(STARSOpndTypePtr UseOp, ea_t InstAddr, int SSANum, bool LocalName); // return DefAddr, block # for Phi Defs, or UpExposed address.
- ea_t GetUltimateDefAddr(STARSOpndTypePtr UseOp, ea_t InstAddr, int SSANum, bool LocalName); // trace into predecessors if necessary
+ std::set<DefOrUse, LessDefUse>::iterator GetGlobalDefIterFromDefAddr(STARSOpndTypePtr DefOp, STARS_ea_t DefAddr);
+ STARS_ea_t GetDefAddrFromUseAddr(STARSOpndTypePtr UseOp, STARS_ea_t InstAddr, int SSANum, bool LocalName); // return DefAddr, block # for Phi Defs, or UpExposed address.
+ STARS_ea_t GetUltimateDefAddr(STARSOpndTypePtr UseOp, STARS_ea_t InstAddr, int SSANum, bool LocalName); // trace into predecessors if necessary
- SMPInstr *FindInstr(ea_t InstAddr);
- std::vector<SMPInstr *>::iterator GetInstIterFromAddr(ea_t InstAddr);
+ SMPInstr *FindInstr(STARS_ea_t InstAddr);
+ std::vector<SMPInstr *>::iterator GetInstIterFromAddr(STARS_ea_t InstAddr);
inline SMPInstr *GetInstFromIndex(size_t VecIndex) const { return InstVec.at(VecIndex); };
- size_t GetIndexFromInstAddr(ea_t InstAddr) const; // Get the InstVec index for the instruction at InstAddr. Assert if not found.
+ size_t GetIndexFromInstAddr(STARS_ea_t InstAddr) const; // Get the InstVec index for the instruction at InstAddr. Assert if not found.
inline sval_t GetOutgoingStackDelta(void) const { return OutgoingStackDelta; };
// Six methods to get values from the maps of local reg/SSA to FG info.
@@ -213,13 +213,13 @@ public:
inline void AddLiveOut(STARSOpndTypePtr LiveOp) { LiveOutSet.insert(LiveOp); };
inline void AddVarKill(STARSOpndTypePtr KillOp) { KillSet.insert(KillOp); };
inline void AddUpExposed(STARSOpndTypePtr UseOp) { UpExposedSet.insert(UseOp); };
- void AddReachesIn(std::pair<STARSOpndTypePtr, ea_t> ReachInDefn);
- void AddReachesOut(std::pair<STARSOpndTypePtr, ea_t> ReachOutDefn);
- inline void AddDownExposedDefn(std::pair<STARSOpndTypePtr, ea_t> DEDefn) { DownExposedDefnSet.insert(DEDefn); };
+ void AddReachesIn(std::pair<STARSOpndTypePtr, STARS_ea_t> ReachInDefn);
+ void AddReachesOut(std::pair<STARSOpndTypePtr, STARS_ea_t> ReachOutDefn);
+ inline void AddDownExposedDefn(std::pair<STARSOpndTypePtr, STARS_ea_t> DEDefn) { DownExposedDefnSet.insert(DEDefn); };
inline void ClearPhiFunctions(void) { PhiFunctions.clear(); };
bool ErasePhi(STARSOpndTypePtr OldOp); // erase() from phi function list
- void ErasePred(ea_t FirstBlockAddr); // erase() block starting at FirstBlockAddr from Preds list
- void EraseSucc(ea_t FirstBlockAddr); // erase() block starting at FirstBlockAddr from Successors list
+ void ErasePred(STARS_ea_t FirstBlockAddr); // erase() block starting at FirstBlockAddr from Preds list
+ void EraseSucc(STARS_ea_t FirstBlockAddr); // erase() block starting at FirstBlockAddr from Successors list
bool AddPhi(SMPPhiFunction NewPhi);
bool SetPhiDefSSA(STARSOpndTypePtr DefOp, int SSANum);
bool SetPhiUseSSA(STARSOpndTypePtr UseOp, size_t index, int SSANum);
@@ -271,19 +271,19 @@ public:
return (KillSet.end() != KillSet.find(CurrOp));
}
bool MDAlreadyKilled(STARSOpndTypePtr Opnd1) const; // Was STARSOpndTypePtr killed by something already in KillSet?
- inline bool IsReachesIn(std::pair<STARSOpndTypePtr, ea_t> CurrDefn) const {
+ inline bool IsReachesIn(std::pair<STARSOpndTypePtr, STARS_ea_t> CurrDefn) const {
return (ReachesInSet.end() != ReachesInSet.find(CurrDefn));
}
- inline bool IsReachesOut(std::pair<STARSOpndTypePtr, ea_t> CurrDefn) const {
+ inline bool IsReachesOut(std::pair<STARSOpndTypePtr, STARS_ea_t> CurrDefn) const {
return (ReachesOutSet.end() != ReachesOutSet.find(CurrDefn));
}
- inline bool IsDownExposedDefn(std::pair<STARSOpndTypePtr, ea_t> CurrDefn) const {
+ inline bool IsDownExposedDefn(std::pair<STARSOpndTypePtr, STARS_ea_t> CurrDefn) const {
return (DownExposedDefnSet.end() != DownExposedDefnSet.find(CurrDefn));
}
bool IsLocalName(STARSOpndTypePtr CurrOp) const;
bool HasIndirJumpInstruction(void); // true if indirect jump instruction is present
bool HasConditionalBranch(void); // true if (last) instruction is conditional branch
- bool IsOpDestTruncatedWrite(STARSOpndTypePtr DefOp, int DefSSANum, ea_t DefAddr); // Does DefOp get written out in truncated form (lower bits only)?
+ bool IsOpDestTruncatedWrite(STARSOpndTypePtr DefOp, int DefSSANum, STARS_ea_t DefAddr); // Does DefOp get written out in truncated form (lower bits only)?
// Printing methods
void Dump(void);
@@ -292,7 +292,7 @@ public:
bool AllPredecessorsNumbered(void);
bool AllPredecessorsProcessed(void);
void DepthFirstMark(void); // Depth-first traversal, mark as processed.
- ea_t GetUltimateOperandSource(ea_t UseAddr, STARSOpndTypePtr UseOp, int UseSSANum); // trace through move and Phi defs to some defining operation.
+ STARS_ea_t GetUltimateOperandSource(STARS_ea_t UseAddr, STARSOpndTypePtr UseOp, int UseSSANum); // trace through move and Phi defs to some defining operation.
void Analyze();
void InitKilledExposed(bool UseFP); // Initialize KilledSet and UpExposedSet
bool UpdateLiveOut(void); // Iterate once on updating LiveOutSet; return true if changed
@@ -301,39 +301,39 @@ public:
void SetLocalNames(void); // Fill the LocalNames member set
void SSALocalRenumber(void); // Renumber references to local names
bool FindLoopHeadsAndTails(void); // Determine if block is loop tail, also set loop header flag for dominating back-edge successor; return false otherwise
- bool DoesDefControlLoopFlow(STARSOpndTypePtr DefOp, int DefSSANum, ea_t DefAddr); // Does DefOp/DefSSANum control loop-back or loop-exit branches?
+ bool DoesDefControlLoopFlow(STARSOpndTypePtr DefOp, int DefSSANum, STARS_ea_t DefAddr); // Does DefOp/DefSSANum control loop-back or loop-exit branches?
void FreeReachingDefsMemory(void); // Free memory for reaching defs sets after they are no longer needed
void FreeSSAMemory(void); // After SSA #s are in DEFs and USEs, free SSA data structures.
void FreeUnusedMemory4(void); // After loop 4 (type inference) in SMPProgram::Analyze(), free memory
bool IsGlobalNameUsedLiveIn(STARSOpndTypePtr GlobalOp); // Is GlobalOp used as a LiveIn value anywhere in this block, including as a Phi USE?
- bool IsGlobalRegDead(ea_t InstAddr, STARSOpndTypePtr Operand, unsigned int RegIndex); // Is global reg dead at InstAddr?
- bool IsRegDead(ea_t InstAddr, uint16 RegNo); // Is local reg dead at InstAddr?
+ bool IsGlobalRegDead(STARS_ea_t InstAddr, STARSOpndTypePtr Operand, unsigned int RegIndex); // Is global reg dead at InstAddr?
+ bool IsRegDead(STARS_ea_t InstAddr, uint16 RegNo); // Is local reg dead at InstAddr?
void MarkDeadRegs(void); // Find dead registers for each mmStrata-instrumented instruction
- bool IsDefDead(ea_t DefAddr, STARSOpndTypePtr DefOp); // Does DefOp at DefAddr never get used?
- bool AreFlagsLiveAfterInst(ea_t InstAddr, std::set<int> &LiveFlagRegs); // Return true and produce set if any flags are live out of inst at InstAddr.
- bool IsDefInvolvedInAddition(ea_t DefAddr, STARSOpndTypePtr DefOp, ea_t &AdditionAddr); // true if DefOp at DefAddr is used in or redefined by addition; pass back AdditionAddr
- bool IsUseCopiedAndShiftedRight(STARSOpndTypePtr UseOp, ea_t UseAddr); // Does a copy of UseOp get shifted right in this block?
- bool DoesDefReachBlockEnd(ea_t DefAddr, STARSOpndTypePtr DefOp, int DefSSANum, std::set<int> &NonEscapingRegisterHashes); // Does value of DefOp/DefSSANum reach block end in any DEF at all?
- bool IsDefOnlyUsedAsAddressReg(ea_t DefAddr, STARSOpndTypePtr DefOp, size_t LoopNum, size_t &AddrUseCounter, SMPOperandType &MemType); // DefOp/DefSSANum is only used in LoopNum (outside of DefAddr) as address reg or Phi USE
- bool IsDefUsedInLoopCompareAndBranch(ea_t DefAddr, STARSOpndTypePtr DefOp, int DefSSANum, bool &Signed); // Is DefOp/DefAddr used in a loop back edge compare-and-branch?
- bool PropagateLocalDefType(STARSOpndTypePtr DefOp, SMPOperandType DefType, ea_t DefAddr, int SSANum, bool IsMemOp, bool PointerOverride = false); // to all uses
- bool InferLocalDefType(STARSOpndTypePtr DefOp, unsigned int LocIndex, ea_t DefAddr); // Can DEF type be inferred from all USEs?
- void InferGlobalDefType(STARSOpndTypePtr DefOp, int SSANum, ea_t DefAddr, bool &FoundNumeric, bool &FoundPointer,
+ bool IsDefDead(STARS_ea_t DefAddr, STARSOpndTypePtr DefOp); // Does DefOp at DefAddr never get used?
+ bool AreFlagsLiveAfterInst(STARS_ea_t InstAddr, std::set<int> &LiveFlagRegs); // Return true and produce set if any flags are live out of inst at InstAddr.
+ bool IsDefInvolvedInAddition(STARS_ea_t DefAddr, STARSOpndTypePtr DefOp, STARS_ea_t &AdditionAddr); // true if DefOp at DefAddr is used in or redefined by addition; pass back AdditionAddr
+ bool IsUseCopiedAndShiftedRight(STARSOpndTypePtr UseOp, STARS_ea_t UseAddr); // Does a copy of UseOp get shifted right in this block?
+ bool DoesDefReachBlockEnd(STARS_ea_t DefAddr, STARSOpndTypePtr DefOp, int DefSSANum, std::set<int> &NonEscapingRegisterHashes); // Does value of DefOp/DefSSANum reach block end in any DEF at all?
+ bool IsDefOnlyUsedAsAddressReg(STARS_ea_t DefAddr, STARSOpndTypePtr DefOp, size_t LoopNum, size_t &AddrUseCounter, SMPOperandType &MemType); // DefOp/DefSSANum is only used in LoopNum (outside of DefAddr) as address reg or Phi USE
+ bool IsDefUsedInLoopCompareAndBranch(STARS_ea_t DefAddr, STARSOpndTypePtr DefOp, int DefSSANum, bool &Signed); // Is DefOp/DefAddr used in a loop back edge compare-and-branch?
+ bool PropagateLocalDefType(STARSOpndTypePtr DefOp, SMPOperandType DefType, STARS_ea_t DefAddr, int SSANum, bool IsMemOp, bool PointerOverride = false); // to all uses
+ bool InferLocalDefType(STARSOpndTypePtr DefOp, unsigned int LocIndex, STARS_ea_t DefAddr); // Can DEF type be inferred from all USEs?
+ void InferGlobalDefType(STARSOpndTypePtr DefOp, int SSANum, STARS_ea_t DefAddr, bool &FoundNumeric, bool &FoundPointer,
bool &FoundUnknown, bool &FoundUninit, SMPOperandType &PtrType); // Can DEF type be inferred from all USEs? Recursive helper for SMPFunction::InferGlobal...
bool PropagateGlobalDefType(STARSOpndTypePtr DefOp, SMPOperandType DefType, int SSANum, bool IsMemOp, bool PointerOverride, bool FirstBlock = true); // to all uses
bool InferAllPhiDefTypes(void); // infer, propagate to all uses
- bool PropagateLocalMetadata(STARSOpndTypePtr UseOp, SMPMetadataType Status, int SSANum, ea_t UseAddr);
+ bool PropagateLocalMetadata(STARSOpndTypePtr UseOp, SMPMetadataType Status, int SSANum, STARS_ea_t UseAddr);
bool FindRedundantLocalMetadata(bool SafeFunc); // consecutive DEFs, same type => redundant
bool HasUseAfterIndWrite(STARSOpndTypePtr MemDefOp, std::vector<SMPInstr *>::iterator InstIter, bool &IndWriteSeen, bool &ReDef); // MemDefOp starting at InstIter has DU chain overlapping an indirect mem write
void MarkBranchSignedness(void); // If branch at block end is signed/unsigned, propagate to operands that set flags before it.
void PropagatePhiFGInfo(void); // Ensure that the Phi DEFs have all the fine grained info from all Phi USEs.
- void PropagateBranchSignedness(ea_t DefAddr, STARSOpndTypePtr SearchOp, unsigned short SignMask);
+ void PropagateBranchSignedness(STARS_ea_t DefAddr, STARSOpndTypePtr SearchOp, unsigned short SignMask);
bool PropagateDEFSignedness(void); // propagate DEF signedness to USE if USE has no signedness info.
- void MarkUnsignedArgs(ea_t CallAddr, unsigned int ArgPosBits); // backtrack from CallAddr and mark unsigned args based on bitset
- void MarkPointerArgs(ea_t CallAddr, unsigned int ArgPosBits); // backtrack from CallAddr and mark POINTER args based on bitset
+ void MarkUnsignedArgs(STARS_ea_t CallAddr, unsigned int ArgPosBits); // backtrack from CallAddr and mark unsigned args based on bitset
+ void MarkPointerArgs(STARS_ea_t CallAddr, unsigned int ArgPosBits); // backtrack from CallAddr and mark POINTER args based on bitset
bool ComputeReachesInSet(void); // return true if changes were made to the ReachesInSet
bool ComputeReachesOutSet(void); // return true if changes were made to the ReachesOutSet
- void UpdateDownExposedDefs(STARSOpndTypePtr DefOp, ea_t InstAddr); // Add DefOp, remove previous defs of DefOp that now do not reach the end of the block.
+ void UpdateDownExposedDefs(STARSOpndTypePtr DefOp, STARS_ea_t InstAddr); // Add DefOp, remove previous defs of DefOp that now do not reach the end of the block.
void SCCPEvaluateConstants(enum STARSBranchConst &BranchEval, std::list<std::pair<int, int> > &CFGWorkList, std::list<std::pair<int, int> > &SSAWorkList); // Evaluate constants for all instructions as part of SCCP algorithm at SMPFunction level.
void SCCPGlobalPropagationHelper(STARSOpndTypePtr GlobalOp, int DefSSANum, std::vector<STARSBitSet> ExecutedEdgeBitSet, std::list<std::pair<int, int> > &CFGWorkList, std::list<std::pair<int, int> > &SSAWorkList); // Propagate GlobalOp/DefSSANum const value
@@ -343,25 +343,25 @@ public:
// Find the stack target of a call to memset() and the size in bytes of the memset() region.
// If the memset() target is not on the stack, or the size is not a constant, return false.
- bool AnalyzeMemSet(ea_t MemSetAddr, STARSOpndTypePtr &MemSetTarget, size_t &MemSetSize, int &SignedOffset, bool &FPRelativeTarget);
+ bool AnalyzeMemSet(STARS_ea_t MemSetAddr, STARSOpndTypePtr &MemSetTarget, size_t &MemSetSize, int &SignedOffset, bool &FPRelativeTarget);
bool IsInfiniteSelfLoop(void); // return true if block loops infinitely to itself
bool IsBenignOverflowDEF(STARSOpndTypePtr DefOp, int DefSSANum, size_t DefAddr, bool UnderflowOpcode, int &IdiomCode); // Do we not care if DEF overflowed, due to how it is used?
- bool IsDEFWrittenWithTruncation(STARSOpndTypePtr DefOp, int DefSSANum, ea_t DefAddr, ea_t TruncAddr, bool PhiDEF); // Is subword of DefOp written later, before TruncAddr?
+ bool IsDEFWrittenWithTruncation(STARSOpndTypePtr DefOp, int DefSSANum, STARS_ea_t DefAddr, STARS_ea_t TruncAddr, bool PhiDEF); // Is subword of DefOp written later, before TruncAddr?
bool IsBenignTruncationDEF(STARSOpndTypePtr DefOp, int DefSSANum, size_t DefAddr, int &IdiomCode); // Do we not care if DEF overflowed, due to how it is used?
- bool IsDefMaskedOrShiftedRight(STARSOpndTypePtr DefOp, int DefSSANum, ea_t DefAddr); // Does DefOp+DefSSANum get subreg masked or right shifted before it gets re-DEFined?
+ bool IsDefMaskedOrShiftedRight(STARSOpndTypePtr DefOp, int DefSSANum, STARS_ea_t DefAddr); // Does DefOp+DefSSANum get subreg masked or right shifted before it gets re-DEFined?
bool IsCriticalSink(STARSOpndTypePtr DefOp, int DefSSANum, std::string &SinkString, bool &FoundAnyCall); // What is ultimate use of DEF that might have integer error?
- bool IsStackOpNextUsedWithSignedness(STARSOpndTypePtr StackDefOp, ea_t DefAddr, int SSANum); // Is next use of stack DEF a sign- or zero-extended load?
+ bool IsStackOpNextUsedWithSignedness(STARSOpndTypePtr StackDefOp, STARS_ea_t DefAddr, int SSANum); // Is next use of stack DEF a sign- or zero-extended load?
void SuppressAnnotOnSignChangingAddition(STARSOpndTypePtr DefOp, int DefSSANum, size_t DefAddr); // Find inc/add that makes small negative back into positive
void AnalyzePrepForNumericAnnotations(void); // Last-minute prep before emitting numeric annotations
// Is DefOp+DefSSANum (from WorkList head) at DefAddr used as address reg or as source operand in memory write?
- bool IsDefUsedInMemWrite(std::list<std::pair<std::pair<STARSOpndTypePtr, int>, ea_t> > &WorkList, STARSOpndTypePtr DefOp, int DefSSANum, ea_t DefAddr);
+ bool IsDefUsedInMemWrite(std::list<std::pair<std::pair<STARSOpndTypePtr, int>, STARS_ea_t> > &WorkList, STARSOpndTypePtr DefOp, int DefSSANum, STARS_ea_t DefAddr);
- sval_t ComputeStackAdjustmentAfterCall(ea_t CallAddr); // find stack pointer adjustment code after call, return stack delta or zero
+ sval_t ComputeStackAdjustmentAfterCall(STARS_ea_t CallAddr); // find stack pointer adjustment code after call, return stack delta or zero
private:
// Data
- ea_t FirstAddr;
+ STARS_ea_t FirstAddr;
int BlockNum; // Number for block ordering algorithms
int LoopHeaderNumber; // Number of block that is loop header for this block
SMPFunction *MyFunc; // function containing this block
@@ -389,7 +389,7 @@ private:
#endif
std::vector<SMPInstr *> InstVec; //NOTE: Copies of pointers from SMPFunction::Instrs.
- std::map<ea_t, size_t> AddrInstMap; // map InstAddr to InstVec index.
+ std::map<STARS_ea_t, size_t> AddrInstMap; // map InstAddr to InstVec index.
std::list<SMPBasicBlock *> Predecessors;
std::list<SMPBasicBlock *> Successors;
// Four sets used in live variable analysis
@@ -398,9 +398,9 @@ private:
std::set<STARSOpndTypePtr, LessOp> LiveOutSet; // Live-Out variables in this block
std::set<STARSOpndTypePtr, LessOp> LiveInSet; // contribution to predecessor's live-out iteration
// Three sets used in reaching definitions analysis
- std::set<std::pair<STARSOpndTypePtr, ea_t>, LessDefinition> ReachesInSet; // definitions live on entry to block
- std::set<std::pair<STARSOpndTypePtr, ea_t>, LessDefinition> ReachesOutSet; // definitions live on exit from block, either passing through or DEFed inside block
- std::set<std::pair<STARSOpndTypePtr, ea_t>, LessDefinition> DownExposedDefnSet; // definitions within block that are live on exit
+ std::set<std::pair<STARSOpndTypePtr, STARS_ea_t>, LessDefinition> ReachesInSet; // definitions live on entry to block
+ std::set<std::pair<STARSOpndTypePtr, STARS_ea_t>, LessDefinition> ReachesOutSet; // definitions live on exit from block, either passing through or DEFed inside block
+ std::set<std::pair<STARSOpndTypePtr, STARS_ea_t>, LessDefinition> DownExposedDefnSet; // definitions within block that are live on exit
// SSA data structures
std::set<int> DomFrontier; // Dominance frontier for block, as set of RPO block numbers
std::set<SMPPhiFunction, LessPhi> PhiFunctions; // SSA incoming edge phi functions
@@ -428,7 +428,7 @@ private:
std::set<SMPPhiFunction, LessPhi>::iterator InferPhiDefType(std::set<SMPPhiFunction, LessPhi>::iterator DefPhi, bool &changed); // infer, propagate to all uses
#if STARS_BUILD_DEF_USE_CHAINS
unsigned int GetLocalDUIndex(STARSOpndTypePtr DefOp, int SSANum);
- unsigned int GetGlobalDUIndex(STARSOpndTypePtr DefOp, ea_t DefAddr);
+ unsigned int GetGlobalDUIndex(STARSOpndTypePtr DefOp, STARS_ea_t DefAddr);
#endif
bool UseHasCriticalSink(STARSOpndTypePtr DefOp, int DefSSANum, STARSOpndTypePtr DefOp2, int DefSSANum2, std::string &SinkString, bool &FoundAnyCall); // DefOp or DefOp2 is passed as arg to critical system or lib call
bool IsBranchSignednessUnreliable(void); // Is branch signedness misleading due to odd code generation idiom or hand coding?
diff --git a/include/base/SMPDataFlowAnalysis.h b/include/base/SMPDataFlowAnalysis.h
index 883ed7e9..cdd60b73 100644
--- a/include/base/SMPDataFlowAnalysis.h
+++ b/include/base/SMPDataFlowAnalysis.h
@@ -19,7 +19,7 @@
* e-mail: jwd@virginia.com
* URL : http://www.cs.virginia.edu/
*
- * Additional copyrights 2010, 2011 by Zephyr Software LLC
+ * Additional copyrights 2010, 2011, 2012, 2013, 2014, 2015 by Zephyr Software LLC
* e-mail: {clc,jwd}@zephyr-software.com
* URL : http://www.zephyr-software.com/
*
@@ -43,9 +43,9 @@
#include <cstddef>
#include <cstdint>
-#include <pro.h>
-#include <ua.hpp>
-#include "intel.hpp"
+// #include <pro.h>
+// #include <ua.hpp>
+// #include <intel.hpp>
#include "interfaces/SMPDBInterface.h"
#include "interfaces/abstract/all.h"
@@ -73,9 +73,6 @@ class STARSBitSet;
// an indirect memory access or other potential alias in the DEF-USE chain?
#define SMP_PROPAGATE_MEM_TYPES 1
-// A maximum string length for use when SMP needs to use less space than
-// the IDA Pro MAXSTR, which is 1024 at present.
-#define MAXSMPSTR 256
// Instruction disassembly text.
#define MAXSMPDISASMSTR 192
// Global var names
@@ -88,6 +85,9 @@ class STARSBitSet;
// Value for an SSA subscript number before it is initialized by SSA renaming.
#define SMP_SSA_UNINIT (-1)
+// Bit masks for extracting bits from a STARSBitSet unsigned char.
+extern const unsigned char STARSBitMasks[8];
+
// Map register number to a string for printing or annotations.
extern const char *RegNames[];
const char *MDGetRegName(STARSOpndTypePtr RegOp); // Distinguishes subword regs from their parent regs
@@ -99,50 +99,50 @@ unsigned char GetRegSize(uint16_t RegNum);
// Define a machine-dependent constant for the EFLAGS register in the x86 architecture.
// IDA Pro distinguishes among four different flag bits; we aggregate them for most purposes,
// but separate them for SCCP (Sparse Conditional Constant Propagation).
-#define X86_FLAGS_REG R_efl
+#define X86_FLAGS_REG STARS_x86_R_efl
#define MD_FLAGS_REG X86_FLAGS_REG
// Define various important registers for machine-dependent use.
-#define X86_CARRY_FLAG R_cf
+#define X86_CARRY_FLAG STARS_x86_R_cf
#define MD_CARRY_FLAG X86_CARRY_FLAG
-#define X86_ZERO_FLAG R_zf
+#define X86_ZERO_FLAG STARS_x86_R_zf
#define MD_ZERO_FLAG X86_ZERO_FLAG
-#define X86_SIGN_FLAG R_sf
+#define X86_SIGN_FLAG STARS_x86_R_sf
#define MD_SIGN_FLAG X86_SIGN_FLAG
-#define X86_OVERFLOW_FLAG R_of
+#define X86_OVERFLOW_FLAG STARS_x86_R_of
#define MD_OVERFLOW_FLAG X86_OVERFLOW_FLAG
-#define X86_INSTRUCTION_POINTER_REG R_ip
+#define X86_INSTRUCTION_POINTER_REG STARS_x86_R_ip
#define MD_INSTRUCTION_POINTER_REG X86_INSTRUCTION_POINTER_REG
-#define X86_STACK_POINTER_REG R_sp
+#define X86_STACK_POINTER_REG STARS_x86_R_sp
#define MD_STACK_POINTER_REG X86_STACK_POINTER_REG
-#define X86_FRAME_POINTER_REG R_bp
+#define X86_FRAME_POINTER_REG STARS_x86_R_bp
#define MD_FRAME_POINTER_REG X86_FRAME_POINTER_REG
-#define X86_RETURN_VALUE_REG R_ax
+#define X86_RETURN_VALUE_REG STARS_x86_R_ax
#define MD_RETURN_VALUE_REG X86_RETURN_VALUE_REG
-#define FIRST_X86_SUBWORD_REG R_al
-#define LAST_X86_SUBWORD_REG R_dil
+#define FIRST_X86_SUBWORD_REG STARS_x86_R_al
+#define LAST_X86_SUBWORD_REG STARS_x86_R_dil
-#define X86_FIRST_FP_STACK_REG R_st0
+#define X86_FIRST_FP_STACK_REG STARS_x86_R_st0
#define MD_FIRST_FP_STACK_REG X86_FIRST_FP_STACK_REG
-#define X86_LAST_REG_NO R_last
+#define X86_LAST_REG_NO STARS_x86_R_last
#define MD_LAST_REG_NO X86_LAST_REG_NO
-#define X86_CALL_INSTRUCTION NN_call
+#define X86_CALL_INSTRUCTION STARS_NN_call
#define MD_CALL_INSTRUCTION X86_CALL_INSTRUCTION
-#define X86_MOVE_INSTRUCTION NN_mov
+#define X86_MOVE_INSTRUCTION STARS_NN_mov
#define MD_MOVE_INSTRUCTION X86_MOVE_INSTRUCTION
-#define X86_DEFAULT_RETURN_ADDRESS_SIZE STARS_ISA_Bytewidth
+#define X86_DEFAULT_RETURN_ADDRESS_SIZE global_STARS_program->GetSTARS_ISA_Bytewidth()
#define MD_DEFAULT_RETURN_ADDRESS_SIZE X86_DEFAULT_RETURN_ADDRESS_SIZE
#define X86_BINARY_NOP_INSTRUCTION 0x90
@@ -159,6 +159,15 @@ unsigned char GetRegSize(uint16_t RegNum);
const int STARS_VEXPR = 0x40; // IDA Pro vexpr() was true on inst containing current op_t
const int STARS_VSIB = 0x20; // IDA Pro is_vsib() was true on inst containing current op_t
+// Clone operands that will be changed (e.g. normalized) later. Subword regs will be normalized to full-word regs
+// in DEF and USE and dataflow analysis sets, and stack accesses will be normalized in these same sets to be relative
+// to the incoming stack pointer value. These normalizations are needed for proper SSA form, e.g. we need to know that
+// changes to a subword reg also change the full-word reg, and [stack_ptr+0] and [stack_ptr+8] could be the same stack
+// location in a procedure if stack_ptr changes value. The deep-copied clone can be changed without affecting the
+// original operand. If we are only canonicalizing subword regs to prepare for a USE or DEF search, we use
+// CloneIfSubwordReg(). If we are placing operands in dataflow sets and would also later need to normalize stack accesses
+// in addition to normalizing subword regs, we call CloneIfNecessary().
+
// If CurrOp would change when reg is canonicalized, then return CurrOp->clone(), else return CurrOp;
STARSOpndTypePtr CloneIfSubwordReg(STARSOpndTypePtr CurrOp);
@@ -169,7 +178,7 @@ STARSOpndTypePtr CloneIfNecessary(STARSOpndTypePtr CurrOp, bool UseFP);
void PrintDefUse(ulong feature, int OpNum);
void PrintSIB(STARSOpndTypePtr Opnd);
void AnnotPrintSIB(STARSOpndTypePtr Opnd, bool HasOffset, FILE *OutFile);
-void SPARKAnnotPrintSIB(STARSOpndTypePtr Opnd, bool HasOffset, FILE *OutFile, uint16 SegReg, bool UseFP);
+void SPARKAnnotPrintSIB(STARSOpndTypePtr Opnd, bool HasOffset, FILE *OutFile, uint16_t SegReg, bool UseFP);
void PrintOneOperand(STARSOpndTypePtr Opnd, uint32_t features, int OpNum);
void PrintListOperand(STARSOpndTypePtr Opnd, int SSANum = SMP_SSA_UNINIT);
void PrintOperand(STARSOpndTypePtr Opnd);
@@ -178,7 +187,7 @@ void PrintOperand(STARSOpndTypePtr Opnd);
void AnnotPrintOperand(STARSOpndTypePtr Opnd, FILE *OutFile);
// Print opcode string.
-void PrintOpcode(uint16 opcode, FILE *OutFile);
+void PrintOpcode(uint16_t opcode, FILE *OutFile);
// MACHINE DEPENDENT: Could operand be an indirect memory access?
bool MDIsIndirectMemoryOpnd(STARSOpndTypePtr CurrOp, bool UseFP);
@@ -187,7 +196,7 @@ bool MDIsIndirectMemoryOpnd(STARSOpndTypePtr CurrOp, bool UseFP);
int MD_STARS_sib_base(const STARSOpndTypePtr &x);
// MACHINE DEPENDENT: Extract index reg from SIB byte of operand.
-regnum_t MD_STARS_sib_index(const STARSOpndTypePtr &x);
+short MD_STARS_sib_index(const STARSOpndTypePtr &x);
// Is CurrOp a memory operand?
bool IsMemOperand(STARSOpndTypePtr CurrOp);
@@ -211,7 +220,7 @@ bool MDIsStackPtrReg(int RegNumber, bool UseFP);
bool MDIsCallerSavedReg(STARSOpndTypePtr CurrOp);
// MACHINE DEPENDENT: Get base and index registers and displacement/addr from operand.
-void MDExtractAddressFields(STARSOpndTypePtr MemOp, int &BaseReg, int &IndexReg, uint16_t &Scale, ea_t &Offset);
+void MDExtractAddressFields(STARSOpndTypePtr MemOp, int &BaseReg, int &IndexReg, uint16_t &Scale, STARS_ea_t &Offset);
// MACHINE DEPENDENT: Is operand type a known type that we want to analyze?
bool MDKnownOperandType(STARSOpndTypePtr TempOp);
@@ -249,7 +258,7 @@ bool IsEqOpIgnoreBitwidth(STARSOpndTypePtr Opnd1, STARSOpndTypePtr Opnd2);
// Comparison class to use in sorted containers of IDA Pro addresses (type ea_t).
class LessAddr {
public:
- bool operator()(const ea_t &Addr1, const ea_t &Addr2) const {
+ bool operator()(const STARS_ea_t &Addr1, const STARS_ea_t &Addr2) const {
return (Addr1 < Addr2);
}
};
@@ -260,7 +269,7 @@ public:
// the HashGlobalNameAndSSA() function.
class LessSearchOperand {
public:
- bool operator()(const std::pair<ea_t, int> &SearchPair1, const std::pair<ea_t, int> &SearchPair2) const {
+ bool operator()(const std::pair<STARS_ea_t, int> &SearchPair1, const std::pair<STARS_ea_t, int> &SearchPair2) const {
return ((SearchPair1.first < SearchPair2.first)
|| ((SearchPair1.first == SearchPair2.first) && (SearchPair1.second < SearchPair2.second)));
}
@@ -319,10 +328,10 @@ public:
typedef std::set<STARSOpndTypePtr, STARSLessOp> STARSOpndSet;
-// MACHINE DEPENDENT: comparison class to permit sorting of definitions, each of which is a std::pair<STARSOpndTypePtr, ea_t>.
+// MACHINE DEPENDENT: comparison class to permit sorting of definitions, each of which is a std::pair<STARSOpndTypePtr, STARS_ea_t>.
class LessDefinition {
public:
- bool operator()(const std::pair<STARSOpndTypePtr, ea_t> &Defn1, const std::pair<STARSOpndTypePtr, ea_t> &Defn2) const {
+ bool operator()(const std::pair<STARSOpndTypePtr, STARS_ea_t> &Defn1, const std::pair<STARSOpndTypePtr, STARS_ea_t> &Defn2) const {
STARSOpndTypePtr Opnd1 = Defn1.first;
STARSOpndTypePtr Opnd2 = Defn2.first;
if (IsEqOp(Opnd1, Opnd2)) {
@@ -371,10 +380,10 @@ public:
} // end operator
}; // end class LessDefinition
-// MACHINE DEPENDENT: comparison class to permit sorting of stack delta definitions, each of which is a std::pair<STARSOpndTypePtr, std::pair<ea_t, sval_t> >.
+// MACHINE DEPENDENT: comparison class to permit sorting of stack delta definitions, each of which is a std::pair<STARSOpndTypePtr, std::pair<STARS_ea_t, sval_t> >.
class LessStackDeltaCopy {
public:
- bool operator()(const std::pair<STARSOpndTypePtr, std::pair<ea_t, sval_t> > &DeltaCopy1, const std::pair<STARSOpndTypePtr, std::pair<ea_t, sval_t> > &DeltaCopy2) const {
+ bool operator()(const std::pair<STARSOpndTypePtr, std::pair<STARS_ea_t, STARS_sval_t> > &DeltaCopy1, const std::pair<STARSOpndTypePtr, std::pair<STARS_ea_t, sval_t> > &DeltaCopy2) const {
STARSOpndTypePtr Opnd1 = DeltaCopy1.first;
STARSOpndTypePtr Opnd2 = DeltaCopy2.first;
if (IsEqOp(Opnd1, Opnd2)) {
@@ -426,7 +435,7 @@ public:
std::size_t GetOpDataSize(STARSOpndTypePtr DataOp);
// Get the IDA Pro register size (dtyp) field
-char GetRegDtyp(uint16 RegNum, bool Has64BitOpnds);
+char GetRegDtyp(uint16_t RegNum, bool Has64BitOpnds);
// SMP will operate on a doubly linked list of instructions, which
// will be grouped into basic blocks. We will include info about each
@@ -582,10 +591,10 @@ struct FineGrainedInfo {
#define MD_NORMAL_BITWIDTH_MASK FG_MASK_BITWIDTH_32
// Return one of the bit width masks above for the current operand.
-unsigned short ComputeOperandBitWidthMask(STARSOpndTypePtr CurrOp, size_t DataSize);
+unsigned short ComputeOperandBitWidthMask(STARSOpndTypePtr CurrOp, std::size_t DataSize);
// Compute largest bit width from a SignMiscInfo bit mask.
-size_t LargestBitWidthFromMask(unsigned short WidthTypeInfo);
+std::size_t LargestBitWidthFromMask(unsigned short WidthTypeInfo);
// Map the two sign bits above into four strings for annotation output.
extern const char *SignednessStrings[4];
@@ -593,32 +602,20 @@ extern const char *SignednessStrings[4];
// that can overflow silently without setting any flags.
extern const char *LeaSignednessStrings[4];
-// We maintain a list of the caller-saved regs for the current binary's ABI.
-// This differs from 32-bit to 64-bit x86 binaries, as well as across other ISAs.
-void MDInitializeCallerSavedRegs(void);
-std::list<uint16>::iterator GetFirstCallerSavedReg(void);
-std::list<uint16>::iterator GetLastCallerSavedReg(void);
-
-// We maintain a list of the argument-passing regs for the current binary's ABI.
-// This differs from 32-bit to 64-bit x86 binaries, as well as across other ISAs.
-// The list is in order of argument position number. For x86-64, this means EDI,
-// ESI, EDX, ECX, R8, R9.
-void MDInitializeArgumentRegs(void);
-std::list<uint16>::iterator GetFirstArgumentReg(void);
-std::list<uint16>::iterator GetLastArgumentReg(void);
-
class DisAsmString {
public:
DisAsmString(void);
- char *GetDisAsm(ea_t InstAddr, bool MarkerInst = false);
- void SetMarkerInstText(ea_t InstAddr);
+ char *GetDisAsm(STARS_ea_t InstAddr, bool MarkerInst = false);
+ void SetMarkerInstText(STARS_ea_t InstAddr);
private:
- ea_t CurrAddr; // cached string corresponds to this instruction address
+ STARS_ea_t CurrAddr; // cached string corresponds to this instruction address
STARS_ssize_t StringLen; // string length returned by IDA Pro
char CachedDisAsm[MAXSMPDISASMSTR];
};
+extern DisAsmString DisAsmText;
+
// Masks to set bits to use as booleans1 in DefOrUse.
#define DEFORUSE_SET_INDIRECT_WRITE 0x01
#define DEFORUSE_SET_NO_TRUNCATION 0x02
@@ -705,7 +702,7 @@ public:
~DefOrUseSet();
// Get methods
- inline size_t GetSize(void) const { return (size_t) Refs.size(); };
+ inline std::size_t GetSize(void) const { return (std::size_t) Refs.size(); };
inline std::set<DefOrUse, LessDefUse>::iterator GetFirstRef(void) { return Refs.begin(); };
inline std::set<DefOrUse, LessDefUse>::iterator GetLastRef(void) { return Refs.end(); };
std::set<DefOrUse, LessDefUse>::iterator FindRef(STARSOpndTypePtr SearchOp);
@@ -746,18 +743,18 @@ public:
DefOrUseList(void);
// Get methods
- DefOrUse GetRef(size_t index) const;
- inline size_t GetSize(void) const { return (size_t) Refs.size(); };
- inline DefOrUse *GetRefNum(size_t index) { return &Refs[index]; };
+ DefOrUse GetRef(std::size_t index) const;
+ inline std::size_t GetSize(void) const { return (std::size_t) Refs.size(); };
+ inline DefOrUse *GetRefNum(std::size_t index) { return &Refs[index]; };
inline std::vector<DefOrUse>::iterator GetFirstRef(void) { return Refs.begin(); };
inline std::vector<DefOrUse>::iterator GetLastRef(void) { return Refs.end(); };
- inline int GetRefSSANum(size_t index) const { return Refs.at(index).GetSSANum(); };
- inline SMPOperandType GetRefType(size_t index) const { return Refs.at(index).GetType(); };
+ inline int GetRefSSANum(std::size_t index) const { return Refs.at(index).GetSSANum(); };
+ inline SMPOperandType GetRefType(std::size_t index) const { return Refs.at(index).GetType(); };
// Set methods
void SetRef(STARSOpndTypePtr Ref, SMPOperandType Type = UNINIT, int SSASub = SMP_SSA_UNINIT);
- void SetSSANum(size_t index, int NewSSASub);
- void SetType(size_t index, SMPOperandType Type, const SMPInstr* Instr);
+ void SetSSANum(std::size_t index, int NewSSASub);
+ void SetType(std::size_t index, SMPOperandType Type, const SMPInstr* Instr);
inline void clear(void) { Refs.clear(); return; };
// Printing methods
void Dump(void) const;
@@ -775,25 +772,25 @@ public:
// Get methods
inline int GetIndex(void) const { return index; };
- inline size_t GetPhiListSize(void) const { return this->SubscriptedOps.GetSize(); };
+ inline std::size_t GetPhiListSize(void) const { return this->SubscriptedOps.GetSize(); };
DefOrUse GetDefCopy(void) const;
- inline DefOrUse GetPhiRef(size_t i) const { return this->SubscriptedOps.GetRef(i); };
- inline DefOrUse *GetRefNum(size_t index) { return SubscriptedOps.GetRefNum(index); };
+ inline DefOrUse GetPhiRef(std::size_t i) const { return this->SubscriptedOps.GetRef(i); };
+ inline DefOrUse *GetRefNum(std::size_t index) { return SubscriptedOps.GetRefNum(index); };
inline std::vector<DefOrUse>::iterator GetFirstOp(void) { return SubscriptedOps.GetFirstRef(); };
inline std::vector<DefOrUse>::iterator GetLastOp(void) { return SubscriptedOps.GetLastRef(); };
inline STARSOpndTypePtr GetAnyOp(void) const { return DefName.GetOp(); };
inline int GetDefSSANum(void) const { return DefName.GetSSANum(); };
- inline int GetUseSSANum(size_t index) const { return SubscriptedOps.GetRefSSANum(index); };
+ inline int GetUseSSANum(std::size_t index) const { return SubscriptedOps.GetRefSSANum(index); };
inline SMPOperandType GetDefType(void) const { return DefName.GetType(); };
- inline SMPOperandType GetUseType(size_t index) const { return SubscriptedOps.GetRefType(index); };
+ inline SMPOperandType GetUseType(std::size_t index) const { return SubscriptedOps.GetRefType(index); };
inline SMPMetadataType GetDefMetadata(void) const { return DefName.GetMetadataStatus(); };
// Set methods
void PushBack(DefOrUse Ref); // add inputs to phi function
void SetSSADef(int NewSSASub);
- void SetSSARef(size_t index, int NewSSASub);
+ void SetSSARef(std::size_t index, int NewSSASub);
void SetDefType(SMPOperandType Type, const SMPInstr* instr);
- void SetRefType(size_t index, SMPOperandType Type, const SMPInstr* instr);
+ void SetRefType(std::size_t index, SMPOperandType Type, const SMPInstr* instr);
void SetDefMetadata(SMPMetadataType Status);
// Query methods
@@ -823,32 +820,32 @@ public:
// n, offb, and offo. This function extracts an unsigned int from these three 8-bit
// fields.
unsigned int ExtractGlobalIndex(STARSOpndTypePtr GlobalOp);
-void SetGlobalIndex(STARSOpndTypePtr TempOp, size_t index);
+void SetGlobalIndex(STARSOpndTypePtr TempOp, std::size_t index);
class SMPDefUseChain {
public:
// Constructors
SMPDefUseChain(void);
- SMPDefUseChain(STARSOpndTypePtr Name, ea_t Def = BADADDR);
+ SMPDefUseChain(STARSOpndTypePtr Name, STARS_ea_t Def = BADADDR);
// Get methods
inline STARSOpndTypePtr GetName(void) const { return SSAName; };
- inline ea_t GetDef(void) const { return (ea_t) RefInstrs.at(0); };
- inline ea_t GetUse(size_t index) const { return (ea_t) RefInstrs.at(index + 1); };
- inline ea_t GetLastUse(void) const {
+ inline STARS_ea_t GetDef(void) const { return (STARS_ea_t) RefInstrs.at(0); };
+ inline STARS_ea_t GetUse(std::size_t index) const { return (STARS_ea_t) RefInstrs.at(index + 1); };
+ inline STARS_ea_t GetLastUse(void) const {
if (RefInstrs.size() > 1)
- return (ea_t) RefInstrs.back();
+ return (STARS_ea_t) RefInstrs.back();
else
- return (ea_t) BADADDR;
+ return (STARS_ea_t) BADADDR;
};
- inline size_t GetNumUses(void) const { return RefInstrs.size() - 1; };
+ inline std::size_t GetNumUses(void) const { return RefInstrs.size() - 1; };
// Query methods.
inline bool HasIndirectWrite(void) const { return IndWrite; };
// Set methods
void SetName(STARSOpndTypePtr Name);
- void SetDef(ea_t Def);
- void PushUse(ea_t Use);
+ void SetDef(STARS_ea_t Def);
+ void PushUse(STARS_ea_t Use);
void SetIndWrite(bool IndMemWrite);
// Printing methods
void Dump(int SSANum = (-1)) const;
@@ -868,17 +865,17 @@ class SMPDUChainArray {
public:
// Constructor
SMPDUChainArray(void);
- SMPDUChainArray(STARSOpndTypePtr Name, ea_t FirstAddrMinusOne);
+ SMPDUChainArray(STARSOpndTypePtr Name, STARS_ea_t FirstAddrMinusOne);
// Get methods.
inline STARSOpndTypePtr GetName(void) const { return SSAName; };
- inline ea_t GetDef(int SSANum) const { return BaseAddr + DUChains.at(SSANum).GetDef(); };
- inline ea_t GetUse(int SSANum, size_t index) const { return BaseAddr + DUChains.at(SSANum).GetUse(index); };
- ea_t GetLastUse(int SSANum) const;
- inline size_t GetNumUses(int SSANum) const { return DUChains.at(SSANum).GetNumUses(); };
- inline size_t GetSize(void) const { return DUChains.size(); };
+ inline STARS_ea_t GetDef(int SSANum) const { return BaseAddr + DUChains.at(SSANum).GetDef(); };
+ inline STARS_ea_t GetUse(int SSANum, std::size_t index) const { return BaseAddr + DUChains.at(SSANum).GetUse(index); };
+ STARS_ea_t GetLastUse(int SSANum) const;
+ inline std::size_t GetNumUses(int SSANum) const { return DUChains.at(SSANum).GetNumUses(); };
+ inline std::size_t GetSize(void) const { return DUChains.size(); };
// Set methods.
- void SetName(STARSOpndTypePtr Name, ea_t FirstAddrMinusOne);
- inline void PushUse(int SSANum, ea_t UseAddr) { DUChains.at(SSANum).PushUse(UseAddr - BaseAddr); };
+ void SetName(STARSOpndTypePtr Name, STARS_ea_t FirstAddrMinusOne);
+ inline void PushUse(int SSANum, STARS_ea_t UseAddr) { DUChains.at(SSANum).PushUse(UseAddr - BaseAddr); };
inline void PushChain(SMPDefUseChain NewChain) { DUChains.push_back(NewChain); };
inline void SetIndWrite(int SSANum, bool NewFlag) { DUChains.at(SSANum).SetIndWrite(NewFlag); };
// Query methods
@@ -889,7 +886,7 @@ private:
// Data
std::vector<SMPDefUseChain> DUChains; // indexed by SSA number for local chains, by chain # for global chains
STARSOpndTypePtr SSAName; // What variable is used in all chains in the array?
- ea_t BaseAddr; // one less than first addr in basic block
+ STARS_ea_t BaseAddr; // one less than first addr in basic block
}; // end class SMPDUChainArray
class SMPCompleteDUChains {
@@ -907,43 +904,38 @@ public:
// Constructors
STARSBitSet();
// Get methods
- bool GetBit(size_t BitIndex) const;
+ bool GetBit(std::size_t BitIndex) const;
// Set methods
- void AllocateBits(size_t Size); // allocate Size bits, initialized to zero.
- void SetBit(size_t BitIndex);
- void ResetBit(size_t BitIndex);
+ void AllocateBits(std::size_t Size); // allocate Size bits, initialized to zero.
+ void SetBit(std::size_t BitIndex);
+ void ResetBit(std::size_t BitIndex);
// Query methods
bool IsAnyBitSet(void) const; // Returns false if all bits are zero, true otherwise.
private:
// Data members.
- size_t BitLimit; // number of bits
+ std::size_t BitLimit; // number of bits
std::vector<unsigned char> STARSBits;
// Methods
}; // end class STARSBitSet
// Initialization routine for DFA category.
-extern SMPitype DFACategory[];
-void InitDFACategory(void);
+extern SMPitype DFACategory[STARS_NN_last + 1];
// Initialization routine for Type category.
-extern int SMPTypeCategory[];
-void InitTypeCategory(void);
+extern int SMPTypeCategory[STARS_NN_last + 1];
// Initializations for CPU flags DEF/USE.
-extern bool SMPDefsFlags[];
-extern bool SMPUsesFlags[];
-void InitSMPDefsFlags(void);
-void InitSMPUsesFlags(void);
+extern bool SMPDefsFlags[STARS_NN_last + 1];
+extern bool SMPUsesFlags[STARS_NN_last + 1];
// Initialize the FG info for the return register from any library function
// whose name implies that we know certain return values (e.g. atoi() returns
// a signed integer, while strtoul() returns an unsigned long).
void GetLibFuncFGInfo(std::string FuncName, struct FineGrainedInfo &InitFGInfo);
-// Initialize the lookup maps that are used to define the FG info that can
-// be inferred from a library function name.
-void InitLibFuncFGInfoMaps(void);
+// Map system or library call name to FG info about its return value.
+extern std::map<std::string, struct FineGrainedInfo> ReturnRegisterTypeMap;
// Init map of system or library call name to the annotation substring that
// guides saturating arithmetic or other continuation policies in
diff --git a/include/base/SMPFunction.h b/include/base/SMPFunction.h
index 25eda502..1e6daed9 100644
--- a/include/base/SMPFunction.h
+++ b/include/base/SMPFunction.h
@@ -56,12 +56,12 @@ class STARS_IDA_Function_t;
// NOTE: When we start handling different calling conventions beyond
// the gcc model, we will have to make this a variable that gets
// initialized.
-#define CALLING_CONVENTION_DEFAULT_FUNCTION_STACK_DELTA STARS_ISA_Bytewidth
+#define CALLING_CONVENTION_DEFAULT_FUNCTION_STACK_DELTA global_STARS_program->GetSTARS_ISA_Bytewidth()
// What is the default stack delta from function entry to stack frame allocation?
// This would only be used in resolving phase-ordering problems, and should be
// eliminated if possible.
-#define CALLING_CONVENTION_DEFAULT_PREFRAMEALLOC_STACK_DELTA (-STARS_ISA_Bytewidth)
+#define CALLING_CONVENTION_DEFAULT_PREFRAMEALLOC_STACK_DELTA (-(global_STARS_program->GetSTARS_ISA_Bytewidth()))
// What default value should we assign to alloca stack frame allocations?
#define STARS_DEFAULT_ALLOCA_SIZE -32
@@ -164,8 +164,8 @@ public:
inline SMPProgram *GetProg(void) const { return Program; };
inline const char *GetFuncName(void) const { SMP_get_func_name(GetFirstFuncAddr(), StaticFuncName, MAXSMPSTR-1); return StaticFuncName; };
STARS_Function_t *GetFuncInfo(void) const;
- inline ea_t GetFirstFuncAddr(void) const { return FirstEA; };
- uint16_t GetJumpToFollowNodeCounter(ea_t InstAddr) const;
+ inline STARS_ea_t GetFirstFuncAddr(void) const { return FirstEA; };
+ uint16_t GetJumpToFollowNodeCounter(STARS_ea_t InstAddr) const;
inline long GetTypedDefs(void) const { return TypedDefs; };
inline long GetUntypedDefs(void) const { return UntypedDefs; };
inline long GetTypedPhiDefs(void) const { return TypedPhiDefs; };
@@ -178,7 +178,7 @@ public:
inline sval_t GetPreAllocationStackPtrDelta(void) const { return PreAllocStackDelta; };
inline sval_t GetFramePtrStackDelta(void) const { return FramePointerStackDelta; };
inline sval_t GetMaxDirectStackAccessDelta(void) const { return MaxDirectStackAccessDelta; };
- inline ea_t GetFirstFrameAllocInstAddr(void) const { return LocalVarsAllocInstr; };
+ inline STARS_ea_t GetFirstFrameAllocInstAddr(void) const { return LocalVarsAllocInstr; };
inline STARS_asize_t GetLocalVarsSize(void) const { return LocalVarsSize; };
inline std::set<STARSOpndTypePtr, LessOp>::iterator GetFirstGlobalName(void) { return GlobalNames.begin(); };
inline std::set<STARSOpndTypePtr, LessOp>::iterator GetLastGlobalName(void) { return GlobalNames.end(); };
@@ -195,31 +195,31 @@ public:
inline unsigned short GetFastReturnStatus(void) const { return FastReturnStatus; };
// exposing the start address of the function. Used in RecurseAndMark
- inline const ea_t GetStartAddr(void) const { return FuncInfo->get_startEA(); };
+ inline const STARS_ea_t GetStartAddr(void) const { return FuncInfo->get_startEA(); };
- inline const std::vector<ea_t> GetCallTargets(void) const { return AllCallTargets; };
+ inline const std::vector<STARS_ea_t> GetCallTargets(void) const { return AllCallTargets; };
inline std::size_t GetNumCallTargets(void) const { return AllCallTargets.size(); };
- inline ea_t GetCallTargetAddr(std::size_t index) const { return AllCallTargets.at(index); };
+ inline STARS_ea_t GetCallTargetAddr(std::size_t index) const { return AllCallTargets.at(index); };
bool GetIsSpeculative() { return IsSpeculative; }
inline std::size_t GetNumCallers(void) const { return AllCallSources.size(); };
- bool MDGetFGStackLocInfo(ea_t InstAddr, STARSOpndTypePtr TempOp, struct FineGrainedInfo &FGEntry);
+ bool MDGetFGStackLocInfo(STARS_ea_t InstAddr, STARSOpndTypePtr TempOp, struct FineGrainedInfo &FGEntry);
// Return fine grained stack entry for stack op TempOp from instruction at InstAddr
- ea_t GetGlobalDefAddr(STARSOpndTypePtr DefOp, int SSANum); // retrieve from GlobalDefAddrBySSA or return BADADDR
+ STARS_ea_t GetGlobalDefAddr(STARSOpndTypePtr DefOp, int SSANum); // retrieve from GlobalDefAddrBySSA or return BADADDR
int GetBlockNumForPhiDef(STARSOpndTypePtr DefOp, int SSANum);
- SMPBasicBlock *GetBlockFromInstAddr(ea_t InstAddr); // retrieve from InstBlockMap or assert
+ SMPBasicBlock *GetBlockFromInstAddr(STARS_ea_t InstAddr); // retrieve from InstBlockMap or assert
std::list<SMPBasicBlock *>::iterator GetBlockIter(SMPBasicBlock *FindBlock); // Find FindBlock in Blocks, return iterator.
inline SMPBasicBlock *GetBlockByNum(std::size_t BlockIndex) const { return RPOBlocks.at(BlockIndex); };
inline std::list<SMPBasicBlock *>::iterator GetLastBlock(void) { return Blocks.end(); };
- SMPInstr *GetInstFromAddr(ea_t InstAddr);
- ea_t GetFirstUnprocessedCallee(void); // first addr of first callee in AllCallTargets with Processed == false
+ SMPInstr *GetInstFromAddr(STARS_ea_t InstAddr);
+ STARS_ea_t GetFirstUnprocessedCallee(void); // first addr of first callee in AllCallTargets with Processed == false
inline std::size_t GetNumBlocks(void) const { return Blocks.size(); };
- STARSOpndTypePtr GetNormalizedOperand(ea_t InstAddr, STARSOpndTypePtr RTLop); // Return RTLop if not stack opnd; return normalized RTLop otherwise.
+ STARSOpndTypePtr GetNormalizedOperand(STARS_ea_t InstAddr, STARSOpndTypePtr RTLop); // Return RTLop if not stack opnd; return normalized RTLop otherwise.
inline int GetReturnRegType(uint16 RegNum) const { return ((RegNum < ReturnRegTypes.size()) ? (int) ReturnRegTypes[RegNum] : 0); };
inline struct FineGrainedInfo GetReturnRegFGInfo(uint16 RegNum) const { return ReturnRegFGInfo.at(RegNum); };
inline std::size_t GetReturnRegFGInfoSize(void) const { return ReturnRegFGInfo.size(); };
SMPOperandType GetIncomingRegType(uint16 RegNum); // Get reg type from all call sites.
- inline std::map<ea_t, STARSOpndTypePtr>::iterator FindLeaOperand(ea_t addr) { return LeaInstOpMap.find(addr); };
- inline std::map<ea_t, STARSOpndTypePtr>::iterator GetLastLeaOperand(void) { return LeaInstOpMap.end(); };
+ inline std::map<STARS_ea_t, STARSOpndTypePtr>::iterator FindLeaOperand(STARS_ea_t addr) { return LeaInstOpMap.find(addr); };
+ inline std::map<STARS_ea_t, STARSOpndTypePtr>::iterator GetLastLeaOperand(void) { return LeaInstOpMap.end(); };
inline std::map<int, struct STARS_SCCP_Const_Struct>::iterator FindConstValue(int DefHashValue) { return ConstantDefs.find(DefHashValue); };
inline std::map<int, struct STARS_SCCP_Const_Struct>::iterator GetLastConstValueIter(void) { return ConstantDefs.end(); };
inline int GetLoopType(std::size_t LoopNumber) const { return LoopTypesByLoopNum.at(LoopNumber); };
@@ -230,18 +230,18 @@ public:
// Eight methods to get values from the maps of global reg/SSA to FG info.
// For local names, see corresponding methods in SMPBasicBlock.
unsigned short GetDefSignMiscInfo(int DefHashValue);
- unsigned short GetStackDefSignMiscInfo(ea_t InstAddr);
+ unsigned short GetStackDefSignMiscInfo(STARS_ea_t InstAddr);
unsigned short GetUseSignMiscInfo(int UseHashValue);
- unsigned short GetStackUseSignMiscInfo(ea_t InstAddr);
+ unsigned short GetStackUseSignMiscInfo(STARS_ea_t InstAddr);
unsigned short GetDefWidthTypeInfo(int DefHashValue);
unsigned short GetUseWidthTypeInfo(int UseHashValue);
struct FineGrainedInfo GetDefFGInfo(int DefHashValue);
struct FineGrainedInfo GetUseFGInfo(int UseHashValue);
- ControlFlowType GetControlFlowType(ea_t InstAddr);
+ ControlFlowType GetControlFlowType(STARS_ea_t InstAddr);
// Set methods
- void ResetJumpToFollowNodeCounter(ea_t InstAddr); // Set counter to zero, or insert zero counter if none found
- void IncrementJumpToFollowNodeCounter(ea_t InstAddr); // Increment counter, or insert count of 1 if none found
+ void ResetJumpToFollowNodeCounter(STARS_ea_t InstAddr); // Set counter to zero, or insert zero counter if none found
+ void IncrementJumpToFollowNodeCounter(STARS_ea_t InstAddr); // Increment counter, or insert count of 1 if none found
inline void IncTypedPhiDefs(void) { ++TypedPhiDefs; return; };
inline void IncUntypedPhiDefs(void) { ++UntypedPhiDefs; return; };
inline void DecTypedPhiDefs(void) { --TypedPhiDefs; return; };
@@ -257,23 +257,23 @@ public:
inline void SetUnsafeForFastReturns(bool Status, UnsafeFastReturnReason Reason) { UnsafeForFastReturns = Status; FastReturnStatus |= (int) Reason; return; };
inline void SetIsSpeculative(bool IsS) { IsSpeculative = IsS; };
inline void SetHasHashingCode(bool Hashes) { HasHashingCode = Hashes; };
- void AddCallSource(ea_t addr); // Add a caller to the list of all callers of this function.
- bool AddDirectCallTarget(ea_t addr); // Add a direct call target; return true if new target, false if target already added
- bool RemoveDirectCallTarget(ea_t TargetAddr); // Remove TargetAddr from DirectCallTargets and AllCallTargets.
- bool RemoveIndirectCallTarget(ea_t TargetAddr); // Remove TargetAddr from IndirectCallTargets and AllCallTargets.
- void AddLeaOperand(ea_t addr, STARSOpndTypePtr LeaOperand); // add map entry to LeaInstOpMap
- void AddNormalizedStackOperand(STARSOpndTypePtr OldOp, ea_t InstAddr, STARSOpndTypePtr NormalizedOp); // add to map for RTL lookup later
+ void AddCallSource(STARS_ea_t addr); // Add a caller to the list of all callers of this function.
+ bool AddDirectCallTarget(STARS_ea_t addr); // Add a direct call target; return true if new target, false if target already added
+ bool RemoveDirectCallTarget(STARS_ea_t TargetAddr); // Remove TargetAddr from DirectCallTargets and AllCallTargets.
+ bool RemoveIndirectCallTarget(STARS_ea_t TargetAddr); // Remove TargetAddr from IndirectCallTargets and AllCallTargets.
+ void AddLeaOperand(STARS_ea_t addr, STARSOpndTypePtr LeaOperand); // add map entry to LeaInstOpMap
+ void AddNormalizedStackOperand(STARSOpndTypePtr OldOp, STARS_ea_t InstAddr, STARSOpndTypePtr NormalizedOp); // add to map for RTL lookup later
void UpdateMaxDirectStackAccessOffset(sval_t NewOffset); // Update MaxDirectStackAccessDelta
- void SetControlFlowType(ea_t InstAddr, ControlFlowType JumpTypeCode); // insert into ControlFlowMap
+ void SetControlFlowType(STARS_ea_t InstAddr, ControlFlowType JumpTypeCode); // insert into ControlFlowMap
std::map<int, struct STARS_SCCP_Const_Struct>::iterator InsertGlobalConstValue(int DefHashValue, struct STARS_SCCP_Const_Struct NewConstEntry);
// Insert SCCP value for global name; change if already found.
// Eight methods to set values into the maps of global reg/stack/SSA to FG info.
// For local names, see corresponding methods in SMPBasicBlock.
void UpdateDefSignMiscInfo(int DefHashValue, unsigned short NewInfo);
- void UpdateStackDefSignMiscInfo(ea_t InstAddr, unsigned short NewInfo);
+ void UpdateStackDefSignMiscInfo(STARS_ea_t InstAddr, unsigned short NewInfo);
void UpdateUseSignMiscInfo(int UseHashValue, unsigned short NewInfo);
- void UpdateStackUseSignMiscInfo(ea_t InstAddr, unsigned short NewInfo);
+ void UpdateStackUseSignMiscInfo(STARS_ea_t InstAddr, unsigned short NewInfo);
void UpdateDefWidthTypeInfo(int DefHashValue, unsigned short NewInfo);
void UpdateUseWidthTypeInfo(int UseHashValue, unsigned short NewInfo);
void UpdateDefFGInfo(int DefHashValue, struct FineGrainedInfo NewFG);
@@ -281,7 +281,7 @@ public:
void ClearDefSignedness(int DefHashValue);
- bool MDUpdateFGStackLocInfo(ea_t InstAddr, STARSOpndTypePtr TempOp, struct FineGrainedInfo NewFG);
+ bool MDUpdateFGStackLocInfo(STARS_ea_t InstAddr, STARSOpndTypePtr TempOp, struct FineGrainedInfo NewFG);
// Return true if we update fine grained stack entry for stack op TempOp from instruction at InstAddr
// Query methods
@@ -303,7 +303,7 @@ public:
inline bool HasGoodSSAForm(void) const { return HasGoodSSA; };
inline bool HasReducibleControlFlow(void) const { return HasReducibleCFG; };
inline bool HasPushAfterFrameAlloc(void) const { return PushAfterLocalVarAlloc; };
- inline bool IsAddrInFunc(ea_t addr) { return ((addr >= FuncInfo->get_startEA()) && (addr <= FuncInfo->get_endEA())); }
+ inline bool IsAddrInFunc(STARS_ea_t addr) { return ((addr >= FuncInfo->get_startEA()) && (addr <= FuncInfo->get_endEA())); }
inline bool IsLibFunc(void) const { return LibFunc; };
inline bool IsLeaf(void) const { return (!IndirectCalls && DirectCallTargets.empty()); };
inline bool IsSafe(void) const { return SafeFunc; }; // safe to follow stack access DEF-USE chains
@@ -330,7 +330,7 @@ public:
inline bool IsVarKill(STARSOpndTypePtr CurrOp) const {
return (KillSet.end() != KillSet.find(CurrOp));
}
- inline bool IsJumpFollowBlock(ea_t InstAddr) const { return (JumpFollowNodesSet.find(InstAddr) != JumpFollowNodesSet.end()); }
+ inline bool IsJumpFollowBlock(STARS_ea_t InstAddr) const { return (JumpFollowNodesSet.find(InstAddr) != JumpFollowNodesSet.end()); }
bool IsInStackPtrCopySet(STARSOpndTypePtr CurrOp);
inline bool DoesStackFrameExtendPastStackTop(void) const { return StackFrameExtendsPastStackTop; };
inline bool IsRegPreserved(std::size_t RegNum) const { return (PreservedRegsBitmap[RegNum] != 0); };
@@ -348,10 +348,10 @@ public:
void AnalyzeFunc(void); // Analyze all instructions in function
void AdvancedAnalysis(void); // Analyses that depend on whole program info but not SSA.
std::size_t UnprocessedCalleesCount(void); // Count of callees that have FuncProcessed == false
- sval_t GetStackAdjustmentForCallee(ea_t CallAddr); // Get stack pointer adjustment in basic block, after CallAddr
- sval_t GetStackDeltaForCallee(ea_t CallTargetAddr); // Get stack pointer delta for callee function, which starts at CallTargetAddr
+ sval_t GetStackAdjustmentForCallee(STARS_ea_t CallAddr); // Get stack pointer adjustment in basic block, after CallAddr
+ sval_t GetStackDeltaForCallee(STARS_ea_t CallTargetAddr); // Get stack pointer delta for callee function, which starts at CallTargetAddr
sval_t ComputeGlobalStackAdjustment(void); // Find consistent or smallest stack adjustment after all calls to this function, program-wide
- void ComputeTempReachingDefs(STARSOpndTypePtr TempOp, ea_t UseAddr); // Compute the TempReachingDefs set that reaches UseAddr for TempOp
+ void ComputeTempReachingDefs(STARSOpndTypePtr TempOp, STARS_ea_t UseAddr); // Compute the TempReachingDefs set that reaches UseAddr for TempOp
void ComputeTempStackDeltaReachesList(STARSOpndTypePtr TempOp); // Compute the TempStackDeltaReachesList for TempOp for all DefAddrs in TempReachingDefs
bool FindReachingStackDelta(sval_t &StackDelta); // Find maximum stack delta in TempStackDeltaReachesList; return true if one consistent delta is in the list
void GatherIncomingArgTypes(void); // Use the SSA marker inst to record incoming arg types in member InArgTypes.
@@ -368,19 +368,19 @@ public:
void InferTypes(bool FirstIter); // Determine NUMERIC, POINTER, etc. for all operands
bool InferInterproceduralTypes(void); // Pass types across procedure bounds, return true if types change.
void InferFGInfo(void); // determine signedness and width info for all operands
- SMPOperandType InferGlobalDefType(STARSOpndTypePtr DefOp, int SSANum, SMPBasicBlock *DefBlock, bool CallInst, ea_t DefAddr);
+ SMPOperandType InferGlobalDefType(STARSOpndTypePtr DefOp, int SSANum, SMPBasicBlock *DefBlock, bool CallInst, STARS_ea_t DefAddr);
// Can DEF type be inferred from all USEs?
void ApplyProfilerInformation(ProfilerInformation *pi);
void AnalyzeMetadataLiveness(void); // Is metadata live or dead for each inst
- bool PropagateGlobalMetadata(STARSOpndTypePtr UseOp, SMPMetadataType Status, int SSANum, ea_t UseAddr);
+ bool PropagateGlobalMetadata(STARSOpndTypePtr UseOp, SMPMetadataType Status, int SSANum, STARS_ea_t UseAddr);
void FindRedundantMetadata(void); // Do consecutive DEFs have same type?
void SparseConditionalConstantPropagation(void); // perform SCCP to find constant values for DEFs, store in this->ConstantDefs
void EvaluateAllPhiConstants(int BlockNum, std::vector<STARSBitSet> ExecutedEdgeBitSet, std::list<std::pair<int, int> > &SSAWorkList); // part of SCCP processing; propagate const DEFs into Phi USEs and Phi DEFs
bool IsBenignUnderflowDEF(STARSOpndTypePtr DefOp, int DefSSANum, std::size_t DefAddr, int &IdiomCode); // Do we not care if DEF underflowed, due to how it is used?
bool HasIntErrorCallSink(STARSOpndTypePtr DefOp, int DefSSANum, std::size_t DefAddr, std::string &SinkString, bool &FoundAnyCall); // DEF is passed to known system/lib call
- bool WritesAboveLocalFrame(STARSOpndTypePtr DestOp, bool OpNormalized, ea_t InstAddr); // Is DestOp direct stack access to caller's frame?
- bool AccessAboveLocalFrame(STARSOpndTypePtr StackOp, bool OpNormalized, ea_t InstAddr, bool WriteAccess); // Is StackOp direct stack access to caller's frame?
- bool IsDefUsedInMemWrite(STARSOpndTypePtr DefOp, int DefSSANum, ea_t DefAddr); // Is Defop+DefSSANum at DefAddr used as address reg or as source operand in memory write?
+ bool WritesAboveLocalFrame(STARSOpndTypePtr DestOp, bool OpNormalized, STARS_ea_t InstAddr); // Is DestOp direct stack access to caller's frame?
+ bool AccessAboveLocalFrame(STARSOpndTypePtr StackOp, bool OpNormalized, STARS_ea_t InstAddr, bool WriteAccess); // Is StackOp direct stack access to caller's frame?
+ bool IsDefUsedInMemWrite(STARSOpndTypePtr DefOp, int DefSSANum, STARS_ea_t DefAddr); // Is Defop+DefSSANum at DefAddr used as address reg or as source operand in memory write?
void MarkFunctionSafe(void); // Does analysis to see if the function can be marked safe
void FreeUnusedMemory2(void); // After loop 2 in SMPProgram::Analyze(), free memory
void FreeUnusedMemory3(void); // After loop 3 in SMPProgram::Analyze(), free memory
@@ -390,7 +390,7 @@ private:
// Data
SMPProgram* Program; // pointer to the program I'm part of
STARS_Function_t *FuncInfo;
- ea_t FirstEA; // address of first instruction in the function
+ STARS_ea_t FirstEA; // address of first instruction in the function
#if 0
char FuncName[MAXSMPSTR];
#endif
@@ -445,8 +445,8 @@ private:
STARS_asize_t IncomingArgsSize; // size of incoming args on stack
int RetAddrSize; // size of return address on stack (4 for most machines)
std::size_t OutgoingArgsSize; // portion of LocalVarsSize that is really outgoing args space
- ea_t LocalVarsAllocInstr; // address of instr that allocates stack frame
- ea_t LocalVarsDeallocInstr; // address of epilogue instr that deallocs frame
+ STARS_ea_t LocalVarsAllocInstr; // address of instr that allocates stack frame
+ STARS_ea_t LocalVarsDeallocInstr; // address of epilogue instr that deallocs frame
adiff_t AllocPointDelta; // IDA sp_delta AFTER stack frame allocation instruction
sval_t MinStackDelta; // smallest (negative) value that stack pointer reaches, relative
// to the value it has at the entry point of the function
@@ -471,13 +471,13 @@ private:
std::list<SMPInstr *> Instrs;
std::list<SMPBasicBlock *> Blocks;
- std::set<ea_t> DirectCallTargets; // addresses called directly
- std::set<ea_t> IndirectCallTargets; // addresses called by indirect calls
- std::vector<ea_t> AllCallTargets; // union of direct and indirect
- std::set<ea_t> AllCallSources; // functions that call this one
- std::set<ea_t> AllCallSites; // instructions that call this function
- std::set<ea_t> JumpFollowNodesSet; // addresses that are jumped to when exiting if-then-elsif-else structures
- std::map<ea_t, SMPBasicBlock *> InstBlockMap;
+ std::set<STARS_ea_t> DirectCallTargets; // addresses called directly
+ std::set<STARS_ea_t> IndirectCallTargets; // addresses called by indirect calls
+ std::vector<STARS_ea_t> AllCallTargets; // union of direct and indirect
+ std::set<STARS_ea_t> AllCallSources; // functions that call this one
+ std::set<STARS_ea_t> AllCallSites; // instructions that call this function
+ std::set<STARS_ea_t> JumpFollowNodesSet; // addresses that are jumped to when exiting if-then-elsif-else structures
+ std::map<STARS_ea_t, SMPBasicBlock *> InstBlockMap;
std::vector<SMPBasicBlock *> RPOBlocks;
std::vector<unsigned short> InArgTypes; // types of incoming arguments, starting with argument zero.
std::vector<int> IDom; // Immediate dominators, indexed and valued by block RPO numbers
@@ -497,8 +497,8 @@ private:
std::vector<int> LoopTypesByLoopNum; // indexed by loop number: top-testing, bottom-testing, middle-testing or infinite
std::vector<int> LoopTestBlocksByLoopNum; // indexed by loop number; block number of header block for top-testing or tail block for bottom-testing, -1 for middle-testing
std::vector<int> DFSMarkers; // vector indexed by block number, -1 => unvisited, 0 => visited but not all descendants visited, 1 => completed
- std::map<ea_t, uint16_t> JumpToFollowNodeCounterMap; // map addr of follow-block to count of jumps seen to it within if-then-[elsif-else] structure
- std::map<int, ea_t> GlobalDefAddrBySSA; // map hash of global name & SSANum to DEF inst addr
+ std::map<STARS_ea_t, uint16_t> JumpToFollowNodeCounterMap; // map addr of follow-block to count of jumps seen to it within if-then-[elsif-else] structure
+ std::map<int, STARS_ea_t> GlobalDefAddrBySSA; // map hash of global name & SSANum to DEF inst addr
// If global DEF for that SSA is found in a Phi function, we use block number instead of inst addr
// Instruction addresses should never overlap block #s, as block #s start at 0 and top out at a few hundred.
// NOTE: We are currently limiting this map to registers, not all global names.
@@ -509,10 +509,10 @@ private:
std::map<int, struct FineGrainedInfo> GlobalUseFGInfoBySSA; // map hash of global name & SSANum to USE FG info.
// NOTE: We are currently limiting this map to registers, not all global names.
- std::map<ea_t, struct FineGrainedInfo> StackDefFGInfo; // map stack FG info to instruction address of stack def; UNUSED
- std::map<ea_t, struct FineGrainedInfo> StackUseFGInfo; // map stack FG info to instruction address of stack use; UNUSED
- std::map<ea_t, STARSOpndTypePtr> LeaInstOpMap; // map original Lea instruction pseudo-memory operand to instruction address.
- std::map<ea_t, unsigned short> ControlFlowMap; // map InstAddr of each jump or branch to a type suitable for SPARK Ada translation.
+ std::map<STARS_ea_t, struct FineGrainedInfo> StackDefFGInfo; // map stack FG info to instruction address of stack def; UNUSED
+ std::map<STARS_ea_t, struct FineGrainedInfo> StackUseFGInfo; // map stack FG info to instruction address of stack use; UNUSED
+ std::map<STARS_ea_t, STARSOpndTypePtr> LeaInstOpMap; // map original Lea instruction pseudo-memory operand to instruction address.
+ std::map<STARS_ea_t, unsigned short> ControlFlowMap; // map InstAddr of each jump or branch to a type suitable for SPARK Ada translation.
std::map<int, struct STARS_SCCP_Const_Struct> ConstantDefs; // map hash of global name & SSANum to constant value from SCCP.
// NOTE: We are currently limiting this map to registers, not all global names. Flags are tracked separately (e.g.
// carry flag, zero flag) only in this SCCP data structure, whereas SSA form, DEFs, USEs and LVA sets have the flags
@@ -522,26 +522,26 @@ private:
std::set<STARSOpndTypePtr, LessOp> KillSet; // registers killed in this function
std::set<STARSOpndTypePtr, LessOp> LiveOutSet; // Live-Out registers in this function
// Tracking stack pointer and frame pointer saves, copies, and restores
- std::set<std::pair<STARSOpndTypePtr, std::pair<ea_t, sval_t> >, LessStackDeltaCopy> StackPtrCopySet; // triple: operand holding copy, InstAddr where copy is made, stack delta for copy
- std::list<std::pair<ea_t, sval_t> > TempStackDeltaReachesList; // Used for temporary lookups of particular op_t in StackPtrCopySet.
- std::set<ea_t, LessAddr> TempReachingDefs; // Temporary list of InstAddrs with defs of one op_t that reach a particular InstAddr.
- std::map<std::pair<STARSOpndTypePtr, ea_t>, STARSOpndTypePtr, LessDefinition> NormalizedStackOpsMap; // normalized stack operands, indexed by instruction address (for lookup from RTLs).
- std::map<std::pair<STARSOpndTypePtr, ea_t>, std::map<std::pair<STARSOpndTypePtr, ea_t>, STARSOpndTypePtr, LessDefinition>::iterator, LessDefinition> InverseNormalizedStackOpsMap; // index: normalized op,
+ std::set<std::pair<STARSOpndTypePtr, std::pair<STARS_ea_t, sval_t> >, LessStackDeltaCopy> StackPtrCopySet; // triple: operand holding copy, InstAddr where copy is made, stack delta for copy
+ std::list<std::pair<STARS_ea_t, sval_t> > TempStackDeltaReachesList; // Used for temporary lookups of particular op_t in StackPtrCopySet.
+ std::set<STARS_ea_t, LessAddr> TempReachingDefs; // Temporary list of InstAddrs with defs of one op_t that reach a particular InstAddr.
+ std::map<std::pair<STARSOpndTypePtr, STARS_ea_t>, STARSOpndTypePtr, LessDefinition> NormalizedStackOpsMap; // normalized stack operands, indexed by instruction address (for lookup from RTLs).
+ std::map<std::pair<STARSOpndTypePtr, STARS_ea_t>, std::map<std::pair<STARSOpndTypePtr, STARS_ea_t>, STARSOpndTypePtr, LessDefinition>::iterator, LessDefinition> InverseNormalizedStackOpsMap; // index: normalized op,
// mapped to: iterator into NormalizedStackOpsMap; only for use in functions that call alloca() and need to re-normalize stack ops repeatedly
std::bitset<1 + MD_LAST_REG_NO> PreservedRegsBitmap; // Registers that are saved on entry and restored before return from func, or never used, as a bitmap.
// Methods
- void EraseInstRange(ea_t FirstAddr, ea_t LastAddr);
+ void EraseInstRange(STARS_ea_t FirstAddr, STARS_ea_t LastAddr);
void SetLinks(void); // Link basic blocks and map instructions to blocks
- bool FindDistantCodeFragment(ea_t TargetAddr); // Is TargetAddr the start of a code fragment that belongs to this func, not a separate func?
+ bool FindDistantCodeFragment(STARS_ea_t TargetAddr); // Is TargetAddr the start of a code fragment that belongs to this func, not a separate func?
bool AnalyzeStackPointerDeltas(void); // Analyze changes in stack pointer for all instructions; return AnalyzedSP
bool UseIDAStackPointerDeltas(void); // Use IDA Pro values instead of doing our own analysis
- bool AddToStackPtrCopySet(STARSOpndTypePtr CopyOp, ea_t InstAddr, sval_t StackDelta); // return true if inserted, false if present already (update delta in that case)
+ bool AddToStackPtrCopySet(STARSOpndTypePtr CopyOp, STARS_ea_t InstAddr, sval_t StackDelta); // return true if inserted, false if present already (update delta in that case)
void FindPreservedRegs(void); // Determined which regs are not killed by func or its callees; set bits in PreservedRegsBitmap
void FindAllAllocsAndDeallocs(void); // Find all stack frame allocating and deallocating instructions and stack ptr offsets
void FindFramePointerDelta(void); // Compute FramePointerStackDelta
void SetStackFrameInfo(void); // Figure out the stack frame regions, and locate the alloc/dealloc frame instructions.
- ea_t FindAllocPoint(STARS_asize_t); // Deal with difficult to find stack frame allocations
+ STARS_ea_t FindAllocPoint(STARS_asize_t); // Deal with difficult to find stack frame allocations
bool MDFixFrameInfo(void); // Redefine stack regions for our needs
bool MDFixUseFP(void); // Fix IDA errors affecting UseFP
void BuildLocalVarTable(void); // Determine local variable boundaries on the stack
@@ -551,7 +551,7 @@ private:
void FindOutgoingArgsSize(void); // Find portion of local frame that is outgoing args
inline void SetStackFrameExtendsPastStackTop(void) { StackFrameExtendsPastStackTop = true; };
bool IndexedWritesAboveLocalFrame(STARSOpndTypePtr DestOp); // Is DestOp direct stack write to caller's frame?
- bool MDGetStackOffsetAndSize(SMPInstr *Instr, STARSOpndTypePtr TempOp, sval_t BaseValue, ea_t &offset, std::size_t &DataSize,
+ bool MDGetStackOffsetAndSize(SMPInstr *Instr, STARSOpndTypePtr TempOp, sval_t BaseValue, STARS_ea_t &offset, std::size_t &DataSize,
bool &FP, bool &Indexed, bool &Signed, bool &Unsigned); // Find any stack memory access in TempOp, return offset, size,
// whether the Frame Pointer was used and signedness (if sign-extended or zero-extended).
bool FindAlloca(void); // true if found evidence of alloca() allocations
@@ -580,7 +580,7 @@ private:
bool FindChainAliasHelper(std::list<SMPBasicBlock *>::iterator CurrBlock, STARSOpndTypePtr DefOp);
// recursive helper for global DefOp with DU-chain that traverses CFG
void FindCounterVariables(void); // Mark NUMERIC (and propagate) any DEF that starts at small immed. value and gets only small inc/dec operations.
- bool CounterVarHelper(STARSOpndTypePtr DefOp, int DefSSANum, int BlockNum, bool LocalName, std::list<std::pair<int, ea_t> > &CounterSSANums); // recursive helper for FindCounterVariables()
+ bool CounterVarHelper(STARSOpndTypePtr DefOp, int DefSSANum, int BlockNum, bool LocalName, std::list<std::pair<int, STARS_ea_t> > &CounterSSANums); // recursive helper for FindCounterVariables()
bool ConditionalTypePropagation(void); // Apply SCC algorithm to unresolved Phi DEFs
bool PropagateSignedness(void); // Propagate signedness FG info from DEFs to USEs whenever there is no USE sign info.
void MarkSpecialNumericErrorCases(void); // Detect and mark special cases before emitting numeric error annotations.
diff --git a/include/base/SMPInstr.h b/include/base/SMPInstr.h
index ca2071a7..10458d69 100644
--- a/include/base/SMPInstr.h
+++ b/include/base/SMPInstr.h
@@ -32,11 +32,11 @@
//
// This header defines the interfaces needed for analyzing instructions.
-#include <cstddef>
#include <string>
#include <bitset>
-#include <stdint.h>
+#include <cstddef>
+#include <cstdint>
#include "interfaces/STARSTypes.h"
#include "interfaces/SMPDBInterface.h"
@@ -482,9 +482,9 @@ public:
inline bool IsRecursiveCall(void) const { return (booleans1 & INSTR_SET_DIRECT_RECURSIVE_CALL); };
inline bool MDIsInterruptCall(void) const { return (booleans1 & INSTR_SET_INTERRUPT); };
inline bool IsNop(void) const { return (booleans2 & INSTR_SET_NOP); }; // instruction is simple or complex no-op
- inline bool IsFloatNop(void) const { return (GetIDAOpcode() == NN_fnop); };
+ inline bool IsFloatNop(void) const { return (GetIDAOpcode() == STARS_NN_fnop); };
bool IsMarkerInst(void) const;
- inline bool MDIsDecrement(void) const { return (GetIDAOpcode() == NN_dec); };
+ inline bool MDIsDecrement(void) const { return (GetIDAOpcode() == STARS_NN_dec); };
bool IsDecrementRTL(void) const;
bool IsSetToZero(void) const;
bool MDIsPushInstr(void) const;
@@ -495,12 +495,12 @@ public:
bool MDIsHaltInstr(void) const;
bool MDIsConditionalMoveInstr(void) const;
bool MDIsMoveInstr(void) const;
- bool MDIsLoadEffectiveAddressInstr(void) const { return ((GetIDAOpcode() == NN_lea) && (!IsNop()) && (!IsRegClearIdiom())); };
+ bool MDIsLoadEffectiveAddressInstr(void) const { return ((GetIDAOpcode() == STARS_NN_lea) && (!IsNop()) && (!IsRegClearIdiom())); };
bool MDIsStackPointerCopy(bool UseFP); // copies ESP or EBP to register
bool MDIsFrameAllocInstr(void);
bool MDIsFrameDeallocInstr(bool UseFP, STARS_asize_t LocSize);
bool MDUsesCalleeSavedReg(void);
- inline bool MDIsUnsignedArithmetic(void) const { return ((NN_mul == GetIDAOpcode()) || (NN_div == GetIDAOpcode())); };
+ inline bool MDIsUnsignedArithmetic(void) const { return ((STARS_NN_mul == GetIDAOpcode()) || (STARS_NN_div == GetIDAOpcode())); };
bool MDIsSignedArithmetic(void) const;
bool MDIsUnsignedBranch(void) const;
bool MDIsSignedBranch(void) const;
@@ -514,18 +514,18 @@ public:
bool MDIsCompareOrTest(void) const; // Opcode is compare or test
bool IsSubtractionOfConstant(STARSOpndTypePtr &NonConstOperand, STARS_uval_t &ConstValue) const;
bool MDIsSubregMaskInst(size_t &BytesMasked); // is AND operation that masks off lower BytesMasked bytes
- inline bool MDIsBitwiseNotOpcode(void) const { return (NN_not == GetIDAOpcode()); };
- inline bool MDIsBitwiseAndOpcode(void) const { return (NN_and == GetIDAOpcode()); };
- inline bool MDIsBitwiseOrOpcode(void) const { return (NN_or == GetIDAOpcode()); };
- inline bool MDIsSignBitFill(void) const { return ((NN_sar == GetIDAOpcode()) && ((MD_NORMAL_MACHINE_BITWIDTH - 1) == MDGetShiftCount())); };
+ inline bool MDIsBitwiseNotOpcode(void) const { return (STARS_NN_not == GetIDAOpcode()); };
+ inline bool MDIsBitwiseAndOpcode(void) const { return (STARS_NN_and == GetIDAOpcode()); };
+ inline bool MDIsBitwiseOrOpcode(void) const { return (STARS_NN_or == GetIDAOpcode()); };
+ inline bool MDIsSignBitFill(void) const { return ((STARS_NN_sar == GetIDAOpcode()) && ((MD_NORMAL_MACHINE_BITWIDTH - 1) == MDGetShiftCount())); };
inline bool MDDoublesWidth(void) const {
- return ((NN_cbw == GetIDAOpcode()) || (NN_cwde == GetIDAOpcode()) || (NN_cdqe == GetIDAOpcode()));
+ return ((STARS_NN_cbw == GetIDAOpcode()) || (STARS_NN_cwde == GetIDAOpcode()) || (STARS_NN_cdqe == GetIDAOpcode()));
}
inline bool MDPropagateUseUpFromBranch(void) const {
// Do we propagate branch signedness through the register USEs of this opcode to their DEFs?
- return ((NN_cmp == GetIDAOpcode()) || (NN_test == GetIDAOpcode()) || (NN_mov == GetIDAOpcode())
+ return ((STARS_NN_cmp == GetIDAOpcode()) || (STARS_NN_test == GetIDAOpcode()) || (STARS_NN_mov == GetIDAOpcode())
#if 0
- || ((NN_bt <= GetIDAOpcode()) && (NN_bts >= GetIDAOpcode()))
+ || ((STARS_NN_bt <= GetIDAOpcode()) && (STARS_NN_bts >= GetIDAOpcode()))
#endif
);
};
@@ -815,7 +815,7 @@ private:
bool MDFindPointerUse(STARSOpndTypePtr MemOp, bool UseFP); // Set base reg to POINTER
bool MDFindMallocCall(STARSOpndTypePtr TargetOp); // Set return reg from malloc() call to HEAPPTR
bool MDIsNop(void) const; // instruction is simple or complex no-op
- inline bool MDIsMultiply(void) const { return ((NN_mul == GetIDAOpcode()) || (NN_imul == GetIDAOpcode())); };
+ inline bool MDIsMultiply(void) const { return ((STARS_NN_mul == GetIDAOpcode()) || (STARS_NN_imul == GetIDAOpcode())); };
bool MDAlwaysUnsignedDEF(void) const; // Always produces an UNSIGNED DEF
bool MDAlwaysSignedDEF(void) const; // Always produces a SIGNED DEF
bool IsBenignTruncation(int &IdiomCode); // Is the instruction such that truncation is not an error?
diff --git a/include/base/SMPProgram.h b/include/base/SMPProgram.h
index 593dd0d1..118d0d1b 100644
--- a/include/base/SMPProgram.h
+++ b/include/base/SMPProgram.h
@@ -19,7 +19,7 @@
* e-mail: jwd@virginia.com
* URL : http://www.cs.virginia.edu/
*
- * Additional copyrights 2010, 2011 by Zephyr Software LLC
+ * Additional copyrights 2010, 2011, 2012, 2013, 2014, 2015 by Zephyr Software LLC
* e-mail: {clc,jwd}@zephyr-software.com
* URL : http://www.zephyr-software.com/
*
@@ -41,8 +41,6 @@
#include <cstddef>
-
-
#include "interfaces/STARSTypes.h"
#include "interfaces/SMPDBInterface.h"
#include "base/SMPDataFlowAnalysis.h"
diff --git a/include/base/SMPStaticAnalyzer.h b/include/base/SMPStaticAnalyzer.h
index e645ae5d..4d60a8dd 100644
--- a/include/base/SMPStaticAnalyzer.h
+++ b/include/base/SMPStaticAnalyzer.h
@@ -19,7 +19,7 @@
* e-mail: jwd@virginia.com
* URL : http://www.cs.virginia.edu/
*
- * Additional copyrights 2010, 2011 by Zephyr Software LLC
+ * Additional copyrights 2010, 2011, 2012, 2013, 2014, 2015 by Zephyr Software LLC
* e-mail: {clc,jwd}@zephyr-software.com
* URL : http://www.zephyr-software.com/
*
@@ -28,220 +28,10 @@
#ifndef SMPSTATICANALYZER_H
#define SMPSTATICANALYZER_H 1
-#include <string>
+// #include <string>
-// #include "allins.hpp"
+// #include <cstdio>
-#include "base/SMPDataFlowAnalysis.h"
-
-// Translate RTLs to SPARK-Ada?
-#define ZST_EMIT_SPARK_ADA_TRANSLATION 0
-
-#define LAST_OPT_CATEGORY 10
-#define LAST_TYPE_CATEGORY 15
-
-// Record optimization category by opcode.
-extern int OptCategory[NN_last + 1];
-
-// Limit on bytes of code for full analysis
-#define STARS_CODESIZE_FULL_ANALYSIS_LIMIT 8000000
-
-// Flag to force reduced analysis so we don't run out of virtual memory
-extern bool STARS_PerformReducedAnalysis;
-
-// Indentation level when emitting SPARK Ada translation of the RTLs.
-extern unsigned short STARS_SPARK_IndentCount;
-
-// Keep statistics on how many instructions we saw in each optimization
-// category, and how many optimizing annotations were emitted for
-// each category.
-extern int OptCount[LAST_OPT_CATEGORY + 1];
-extern int AnnotationCount[LAST_OPT_CATEGORY + 1];
-
-// Record which opcodes change the stack pointer, and by how many
-// bytes up (reduction in stack size for stacks that grow downward)
-// or down (increase in stack size for stacks that grow downward).
-extern sval_t StackAlteration[NN_last + 1];
-
-// Unique data referent number to use in data annotations.
-extern unsigned long DataReferentID;
-
-// Counters for analyzing memory use for allocated but unused capacity in vectors.
-extern unsigned long UnusedStructCount; // various structs
-extern unsigned long UnusedIntCount; // int, ea_t, ptr, other 4-byte objects
-
-// Counters for dead metadata analysis.
-extern unsigned long DeadMetadataCount;
-extern unsigned long LiveMetadataCount;
-
-// Counters for indirect jump resolution.
-extern unsigned long ResolvedIndirectJumpCount;
-extern unsigned long UnresolvedIndirectJumpCount;
-
-// Counters for measuring SCCP success in finding constant DEFs.
-extern unsigned long ConstantDEFCount;
-extern unsigned long AlwaysTakenBranchCount;
-extern unsigned long NeverTakenBranchCount;
-
-// Counters for accessing less than machine register width.
-extern unsigned long SubwordRegCount;
-extern unsigned long SubwordMemCount;
-extern unsigned long SubwordAddressRegCount;
-extern unsigned long SPARKOperandCount; // total operands printed
-
-// Counters for numeric error annotations cases.
-#define SMP_MEASURE_NUMERIC_ANNOTATIONS 0
-#if SMP_MEASURE_NUMERIC_ANNOTATIONS
-extern unsigned long NumericAnnotationsCount12; // cases 1 and 2
-extern unsigned long NumericAnnotationsCount3; // case 3
-extern unsigned long TruncationAnnotationsCount; // case 4
-extern unsigned long SignednessWithoutTruncationCount; // case 5
-extern unsigned long LeaInstOverflowCount; // case 6
-extern unsigned long WidthDoublingTruncationCount; // case 7
-extern unsigned long BenignOverflowInstCount;
-extern unsigned long BenignOverflowDefCount;
-extern unsigned long SuppressStackPtrOverflowCount;
-extern unsigned long SuppressLiveFlagsOverflowCount;
-extern unsigned long LiveMultiplyBitsCount;
-extern unsigned long BenignTruncationCount;
-extern unsigned long SuppressTruncationRegPiecesAllUsed;
-extern unsigned long SuppressSignednessOnTruncation;
-#endif
-
-#define SMP_COUNT_MEMORY_ALLOCATIONS 0
-#if SMP_COUNT_MEMORY_ALLOCATIONS
-// Counters for analyzing memory use for allocated and used objects.
-extern unsigned long SMPInstCount;
-extern unsigned long SMPBlockCount;
-extern unsigned long SMPDefUseChainCount;
-extern unsigned long SMPFuncCount;
-extern unsigned long SMPGlobalVarCount;
-extern unsigned long SMPLocalVarCount;
-extern unsigned long SMPInstBytes;
-extern unsigned long SMPDefUseChainBytes;
-#define SMP_DU_ADDR_SIZE sizeof(ea_t)
-#endif
-
-#define STARS_SCCP_GATHER_STATISTICS 1
-#if STARS_SCCP_GATHER_STATISTICS
-// Counters for analyzing Sparse Conditional Constant Propagation effectiveness.
-extern unsigned long SCCPFuncsWithArgWriteCount;
-extern unsigned long SCCPFuncsWithConstantArgWriteCount;
-extern unsigned long SCCPOutgoingArgWriteCount;
-extern unsigned long SCCPConstantOutgoingArgWriteCount;
-#endif
-
-// Counter for max # of basic blocks seen in one function.
-extern unsigned long STARS_MaxBlockCount;
-
-// Is the binary a 32-bit, 64-bit, etc. instruction set architecture
-extern std::size_t STARS_ISA_Bitwidth;
-extern std::size_t STARS_ISA_Bytewidth;
-extern char STARS_ISA_dtyp;
-extern int STARS_MD_LAST_SAVED_REG_NUM;
-
-
-// Use shrink to fit C++ STL idiom to reduce memory wastage?
-#define SMP_SHRINK_TO_FIT 1
-
-// Should we convert the x86 LOCK prefix byte to a no-op to avoid
-// IDA Pro problems with instructions that jump past the LOCK
-// prefix and look like they are jumping into the middle of an
-// instruction?
-#define STARS_REMOVE_LOCK_PREFIX 0
-
-// The types of data objects based on their first operand flags.
-extern const char *DataTypes[];
-
-// Filename (not including path) of executable being analyzed.
-extern char RootFileName[MAXSTR];
-
-// Initialized operand used to copy-initialize other operands.
-extern STARSOpndType InitOp;
-
-// File to print security alert messages to, e.g. foo.exe.alarms.
-extern FILE *ZST_AlarmFile;
-
-// Security policies for the Zephyr Security Toolkit.
-enum ZST_Policy {
- ZST_DISALLOW = 0,
- ZST_WHITELIST = 1,
- ZST_BLACKLIST = 2,
- ZST_ALLOWALL = 3
-};
-
-// What type of system call, for Zephyr Security Toolkit monitoring.
-enum ZST_SysCallType {
- ZST_UNMONITORED_CALL,
- ZST_HIGHPRIVILEGE_CALL,
- ZST_FILE_CALL,
- ZST_NETWORK_CALL
-};
-
-// Function start and end addresses (for function entry chunks only).
-// Kept here because IDA Pro 5.1 seems to have a memory overwriting
-// problem when iterating through all functions in the program. An existing
-// func_t *ChunkInfo data structure was getting overwritten by one of the
-// function func_t data structures, causing changes of startEA and endEA among
-// other things.
-struct SMP_bounds_t {
- STARS_ea_t startEA;
- STARS_ea_t endEA;
-};
-
-extern std::vector<SMP_bounds_t> FuncBounds;
-
-// Code addresses identified by a disassembler, such as objdump on
-// Linux. These can be used to improve the code vs. data identification
-// of IDA Pro.
-extern std::vector<STARS_ea_t> DisasmLocs;
-// Code addresses as identified by IDA Pro, to be compared to DisasmLocs.
-extern std::vector<STARS_ea_t> IDAProLocs;
-
-
-
-// File for code xref targets (helps ILR, makes IRDB more complete)
-extern FILE *STARS_XrefsFile;
-
-// File to provide details on fast returns, safe and unsafe return-address functions, etc.
-extern FILE *STARS_CallReturnFile;
-
-#if ZST_EMIT_SPARK_ADA_TRANSLATION
-// Files for SPARK Ada translation of program RTLs
-extern FILE *ZST_SPARKSourceFile;
-extern FILE *ZST_SPARKHeaderFile;
-#endif
-
-class DisAsmString;
-
-extern DisAsmString DisAsmText;
-
-// strings for printing ZST_SysCallType
-extern const char *CallTypeNames[4];
-
-// Bit masks for extracting bits from a STARSBitSet unsigned char.
-extern const unsigned char STARSBitMasks[8];
-
-// Given a function name, return its Zephyr Security Toolkit call type.
-ZST_SysCallType GetCallTypeFromFuncName(std::string SysCallName);
-
-// Get the user-specified security policy for the given call type.
-ZST_Policy GetPolicyFromCallType(ZST_SysCallType CallType);
-
-// Given a call type and called function name, is it on the location whitelist
-// for that call type?
-bool IsLocationWhitelisted(ZST_SysCallType CallType, std::string LocationName);
-
-// Given a call type and called function name, is it on the location blacklist
-// for that call type?
-bool IsLocationBlacklisted(ZST_SysCallType CallType, std::string LocationName);
-
-// Given a called function name, does it produce only benign numeric errors when
-// its returned values are used in arithmetic? (i.e. it is a trusted input)
-bool IsNumericSafeSystemCall(std::string CallName);
-
-// Utility functions to print code xrefs to STARS_XrefsFile
-void PrintCodeToCodeXref(ea_t FromAddr, ea_t ToAddr, size_t InstrSize);
-void PrintDataToCodeXref(ea_t FromDataAddr, ea_t ToCodeAddr, size_t InstrSize);
+// #include "interfaces/STARSTypes.h"
#endif
diff --git a/include/interfaces/SMPDBInterface.h b/include/interfaces/SMPDBInterface.h
index b938842d..2cabc164 100644
--- a/include/interfaces/SMPDBInterface.h
+++ b/include/interfaces/SMPDBInterface.h
@@ -44,14 +44,13 @@
#include <set>
#include <cstddef>
-#include <stdint.h>
+#include <cstdint>
-#include <pro.h>
+#if 0
#include <ida.hpp>
-#include <ua.hpp>
#include <funcs.hpp>
#include <frame.hpp>
-#include <xref.hpp>
+#endif
#ifndef STARS_IRDB_INTERFACE
#ifndef STARS_IDA_INTERFACE
@@ -72,6 +71,13 @@
#include "interfaces/STARSTypes.h"
+// A maximum string length for use when SMP needs to use less space than
+// the IDA Pro MAXSTR, which is 1024 at present.
+#define MAXSMPSTR 256
+
+// Use shrink to fit C++ STL idiom to reduce memory wastage?
+#define SMP_SHRINK_TO_FIT 1
+
// Pseudo-addresses that signify special cases in STARS, as opposed to actual addresses.
// By using the IDA Pro BADADDR constant, we can automatically adjust for 32/64-bit systems.
#define STARS_SSA_MARKER_PSEUDO_ID ((STARS_ea_t) BADADDR - 1)
@@ -87,7 +93,79 @@
#define STARS_IsBlockNumPseudoID(addr) ((STARS_PSEUDO_ID_MIN <= ((STARS_ea_t) addr)) && (STARS_PSEUDO_BLOCKNUM_MAX >= ((STARS_ea_t) addr)))
#define STARS_GetBlockNumFromPseudoID(addr) (((STARS_ea_t) addr) & STARS_BLOCKNUM_MASK)
-bool SMPGetCmd(STARS_ea_t InstAddr, insn_t &SMPcmd, uint32 &SMPfeatures);
+// Indentation level when emitting SPARK Ada translation of the RTLs.
+extern unsigned short STARS_SPARK_IndentCount;
+
+// Counters for analyzing memory use for allocated but unused capacity in vectors.
+extern unsigned long UnusedStructCount; // various structs
+extern unsigned long UnusedIntCount; // int, ea_t, ptr, other 4-byte objects
+
+// Counters for dead metadata analysis.
+extern unsigned long DeadMetadataCount;
+extern unsigned long LiveMetadataCount;
+
+// Counters for indirect jump resolution.
+extern unsigned long ResolvedIndirectJumpCount;
+extern unsigned long UnresolvedIndirectJumpCount;
+
+// Counters for measuring SCCP success in finding constant DEFs.
+extern unsigned long ConstantDEFCount;
+extern unsigned long AlwaysTakenBranchCount;
+extern unsigned long NeverTakenBranchCount;
+
+// Counters for accessing less than machine register width.
+extern unsigned long SubwordRegCount;
+extern unsigned long SubwordMemCount;
+extern unsigned long SubwordAddressRegCount;
+extern unsigned long SPARKOperandCount; // total operands printed
+
+// Counters for numeric error annotations cases.
+#define SMP_MEASURE_NUMERIC_ANNOTATIONS 0
+#if SMP_MEASURE_NUMERIC_ANNOTATIONS
+extern unsigned long NumericAnnotationsCount12; // cases 1 and 2
+extern unsigned long NumericAnnotationsCount3; // case 3
+extern unsigned long TruncationAnnotationsCount; // case 4
+extern unsigned long SignednessWithoutTruncationCount; // case 5
+extern unsigned long LeaInstOverflowCount; // case 6
+extern unsigned long WidthDoublingTruncationCount; // case 7
+extern unsigned long BenignOverflowInstCount;
+extern unsigned long BenignOverflowDefCount;
+extern unsigned long SuppressStackPtrOverflowCount;
+extern unsigned long SuppressLiveFlagsOverflowCount;
+extern unsigned long LiveMultiplyBitsCount;
+extern unsigned long BenignTruncationCount;
+extern unsigned long SuppressTruncationRegPiecesAllUsed;
+extern unsigned long SuppressSignednessOnTruncation;
+#endif
+
+#define SMP_COUNT_MEMORY_ALLOCATIONS 0
+#if SMP_COUNT_MEMORY_ALLOCATIONS
+// Counters for analyzing memory use for allocated and used objects.
+extern unsigned long SMPInstCount;
+extern unsigned long SMPBlockCount;
+extern unsigned long SMPDefUseChainCount;
+extern unsigned long SMPFuncCount;
+extern unsigned long SMPGlobalVarCount;
+extern unsigned long SMPLocalVarCount;
+extern unsigned long SMPInstBytes;
+extern unsigned long SMPDefUseChainBytes;
+#define SMP_DU_ADDR_SIZE sizeof(STARS_ea_t)
+#endif
+
+#define STARS_SCCP_GATHER_STATISTICS 1
+#if STARS_SCCP_GATHER_STATISTICS
+// Counters for analyzing Sparse Conditional Constant Propagation effectiveness.
+extern unsigned long SCCPFuncsWithArgWriteCount;
+extern unsigned long SCCPFuncsWithConstantArgWriteCount;
+extern unsigned long SCCPOutgoingArgWriteCount;
+extern unsigned long SCCPConstantOutgoingArgWriteCount;
+#endif
+
+// Counter for max # of basic blocks seen in one function.
+extern unsigned long STARS_MaxBlockCount;
+
+// strings for printing ZST_SysCallType
+extern const char *CallTypeNames[4];
// Need instruction xref info from IRDB
@@ -98,11 +176,18 @@ bool SMPGetCmd(STARS_ea_t InstAddr, insn_t &SMPcmd, uint32 &SMPfeatures);
#ifdef STARS_IDA_INTERFACE
-typedef op_t STARSOpndType;
-
+#include <pro.h>
+#include <ua.hpp>
+#include <fpro.h>
+#include <xref.hpp>
#include <interfaces/abstract/STARSInterface.h>
#include <interfaces/idapro/STARSFunction.h>
+// Translate RTLs to SPARK-Ada?
+#define ZST_EMIT_SPARK_ADA_TRANSLATION 0
+
+bool SMPGetCmd(STARS_ea_t InstAddr, insn_t &SMPcmd, uint32_t &SMPfeatures);
+
// Globals, typedefs and macros for STARS_IDA_INTERFACE only
#define SMP_getseg(addr) (global_stars_interface->getseg(addr))
#define SMP_getnseg(index) (global_stars_interface->getnseg(index))
@@ -141,8 +226,6 @@ typedef op_t STARSOpndType;
#define SMP_get_frame(ptr_to_func_t) get_frame((func_t*)*dynamic_cast<STARS_IDA_Function_t*>(ptr_to_func_t))
#endif
#define SMP_get_member_name(mid, buf, bufsize) get_member_name(mid, buf, bufsize)
-#define SMP_get_item_end(addr) get_item_end(addr)
-#define SMP_getFlags(addr) getFlags(addr)
#define SMP_isHead(flags) isHead(flags)
#define SMP_isCode(flags) isCode(flags)
#define SMP_add_cref(from, to, type) add_cref(from, to, type)
@@ -168,6 +251,10 @@ struct SMP_xref_t {
#else
// Globals, typedefs and macros for STARS_IRDB_INTERFACE only
+
+// Translate RTLs to SPARK-Ada?
+#define ZST_EMIT_SPARK_ADA_TRANSLATION 0
+
#define SMP_strncat(str1, str2, len) strncat(str1, str2, len)
#define SMP_strncpy(str1, str2, len) strncpy(str1, str2, len)
#define SMP_snprintf(...) snprintf(__VA_ARGS__)
diff --git a/include/interfaces/STARSTypes.h b/include/interfaces/STARSTypes.h
index cea290da..c0d94c99 100644
--- a/include/interfaces/STARSTypes.h
+++ b/include/interfaces/STARSTypes.h
@@ -30,8 +30,9 @@
// another disassembler, etc.
//
-#if 0
#include <memory>
+
+#if 0
#include <string>
#include <utility>
#include <list>
@@ -43,14 +44,24 @@
#include <cstddef>
#include <cstdint>
-#if 0
-#include <pro.h>
-#include <ida.hpp>
-#include <ua.hpp>
-#include <funcs.hpp>
-#include <frame.hpp>
-#include <xref.hpp>
-#endif
+// Mimic the MAXSTR constant from IDA Pro.
+#define STARS_MAXSTR 1024
+
+// Security policies for the Zephyr Security Toolkit.
+enum ZST_Policy {
+ ZST_DISALLOW = 0,
+ ZST_WHITELIST = 1,
+ ZST_BLACKLIST = 2,
+ ZST_ALLOWALL = 3
+};
+
+// What type of system call, for Zephyr Security Toolkit monitoring.
+enum ZST_SysCallType {
+ ZST_UNMONITORED_CALL,
+ ZST_HIGHPRIVILEGE_CALL,
+ ZST_FILE_CALL,
+ ZST_NETWORK_CALL
+};
#ifdef __EA64__
// We imitate IDA Pro typedefs exactly, rather than assuming that unsigned long long is the same as uint64_t, etc.
@@ -74,4 +85,1432 @@ typedef ptrdiff_t STARS_ssize_t;
class STARS_op_t;
typedef std::shared_ptr<class STARS_op_t> STARSOpndTypePtr;
+// Function start and end addresses (for function entry chunks only).
+// Tracked in STARS_Program_t because IDA Pro 5.1 seemed to have a memory overwriting
+// problem when iterating through all functions in the program. An existing
+// func_t *ChunkInfo data structure was getting overwritten by one of the
+// function func_t data structures, causing changes of startEA and endEA among
+// other things. Also helps identify chunked functions.
+struct SMP_bounds_t {
+ STARS_ea_t startEA;
+ STARS_ea_t endEA;
+};
+
+// The following enumeration exactly matches the IDA Pro Intel x86 register enumeration "RegNo"
+// found in <intel.hpp> with the prefix STARS_x86_ added to each value.
+enum STARS_RegNo
+{
+ STARS_x86_R_none = -1,
+ STARS_x86_R_ax = 0,
+ STARS_x86_R_cx = 1,
+ STARS_x86_R_dx = 2,
+ STARS_x86_R_bx = 3,
+ STARS_x86_R_sp = 4,
+ STARS_x86_R_bp = 5,
+ STARS_x86_R_si = 6,
+ STARS_x86_R_di = 7,
+ STARS_x86_R_r8 = 8,
+ STARS_x86_R_r9 = 9,
+ STARS_x86_R_r10 = 10,
+ STARS_x86_R_r11 = 11,
+ STARS_x86_R_r12 = 12,
+ STARS_x86_R_r13 = 13,
+ STARS_x86_R_r14 = 14,
+ STARS_x86_R_r15 = 15,
+
+ STARS_x86_R_al = 16,
+ STARS_x86_R_cl = 17,
+ STARS_x86_R_dl = 18,
+ STARS_x86_R_bl = 19,
+ STARS_x86_R_ah = 20,
+ STARS_x86_R_ch = 21,
+ STARS_x86_R_dh = 22,
+ STARS_x86_R_bh = 23,
+
+ STARS_x86_R_spl = 24,
+ STARS_x86_R_bpl = 25,
+ STARS_x86_R_sil = 26,
+ STARS_x86_R_dil = 27,
+
+ STARS_x86_R_ip = 28,
+
+ STARS_x86_R_es = 29, // 0
+ STARS_x86_R_cs = 30, // 1
+ STARS_x86_R_ss = 31, // 2
+ STARS_x86_R_ds = 32, // 3
+ STARS_x86_R_fs = 33,
+ STARS_x86_R_gs = 34,
+
+ STARS_x86_R_cf = 35, // main cc's
+ STARS_x86_R_zf = 36,
+ STARS_x86_R_sf = 37,
+ STARS_x86_R_of = 38,
+
+ STARS_x86_R_pf = 39, // additional cc's
+ STARS_x86_R_af = 40,
+ STARS_x86_R_tf = 41,
+ STARS_x86_R_if = 42,
+ STARS_x86_R_df = 43,
+
+ STARS_x86_R_efl = 44, // eflags
+
+ // the following registers will be used in the disassembly
+ // starting from ida v5.7
+
+ STARS_x86_R_st0 = 45, // floating point registers (not used in disassembly)
+ STARS_x86_R_st1 = 46,
+ STARS_x86_R_st2 = 47,
+ STARS_x86_R_st3 = 48,
+ STARS_x86_R_st4 = 49,
+ STARS_x86_R_st5 = 50,
+ STARS_x86_R_st6 = 51,
+ STARS_x86_R_st7 = 52,
+ STARS_x86_R_fpctrl = 53,// fpu control register
+ STARS_x86_R_fpstat = 54,// fpu status register
+ STARS_x86_R_fptags = 55,// fpu tags register
+
+ STARS_x86_R_mm0 = 56, // mmx registers
+ STARS_x86_R_mm1 = 57,
+ STARS_x86_R_mm2 = 58,
+ STARS_x86_R_mm3 = 59,
+ STARS_x86_R_mm4 = 60,
+ STARS_x86_R_mm5 = 61,
+ STARS_x86_R_mm6 = 62,
+ STARS_x86_R_mm7 = 63,
+
+ STARS_x86_R_xmm0 = 64, // xmm registers
+ STARS_x86_R_xmm1 = 65,
+ STARS_x86_R_xmm2 = 66,
+ STARS_x86_R_xmm3 = 67,
+ STARS_x86_R_xmm4 = 68,
+ STARS_x86_R_xmm5 = 69,
+ STARS_x86_R_xmm6 = 70,
+ STARS_x86_R_xmm7 = 71,
+ STARS_x86_R_xmm8 = 72,
+ STARS_x86_R_xmm9 = 73,
+ STARS_x86_R_xmm10 = 74,
+ STARS_x86_R_xmm11 = 75,
+ STARS_x86_R_xmm12 = 76,
+ STARS_x86_R_xmm13 = 77,
+ STARS_x86_R_xmm14 = 78,
+ STARS_x86_R_xmm15 = 79,
+ STARS_x86_R_mxcsr = 80,
+
+ STARS_x86_R_ymm0 = 81, // AVX 256-bit registers
+ STARS_x86_R_ymm1 = 82,
+ STARS_x86_R_ymm2 = 83,
+ STARS_x86_R_ymm3 = 84,
+ STARS_x86_R_ymm4 = 85,
+ STARS_x86_R_ymm5 = 86,
+ STARS_x86_R_ymm6 = 87,
+ STARS_x86_R_ymm7 = 88,
+ STARS_x86_R_ymm8 = 89,
+ STARS_x86_R_ymm9 = 90,
+ STARS_x86_R_ymm10 = 91,
+ STARS_x86_R_ymm11 = 92,
+ STARS_x86_R_ymm12 = 93,
+ STARS_x86_R_ymm13 = 94,
+ STARS_x86_R_ymm14 = 95,
+ STARS_x86_R_ymm15 = 96,
+
+ STARS_x86_R_last,
+};
+
+
+// The following enumeration exactly matches the IDA Pro Intel x86 instruction enumeration
+// found in <allins.hpp>. The prefix NN_ has been changed to STARS_NN_ for each value. With
+// each release of IDA Pro, the <allins.hpp> file must be inspected to see if new opcodes
+// have been added by the out-of-control maniacs at Intel. If so, copy, paste, and replace
+// the NN_ prefix with STARS_NN_ here.
+
+enum
+{
+ STARS_NN_null = 0, // Unknown Operation
+ STARS_NN_aaa, // ASCII Adjust after Addition
+ STARS_NN_aad, // ASCII Adjust AX before Division
+ STARS_NN_aam, // ASCII Adjust AX after Multiply
+ STARS_NN_aas, // ASCII Adjust AL after Subtraction
+ STARS_NN_adc, // Add with Carry
+ STARS_NN_add, // Add
+ STARS_NN_and, // Logical AND
+ STARS_NN_arpl, // Adjust RPL Field of Selector
+ STARS_NN_bound, // Check Array Index Against Bounds
+ STARS_NN_bsf, // Bit Scan Forward
+ STARS_NN_bsr, // Bit Scan Reverse
+ STARS_NN_bt, // Bit Test
+ STARS_NN_btc, // Bit Test and Complement
+ STARS_NN_btr, // Bit Test and Reset
+ STARS_NN_bts, // Bit Test and Set
+ STARS_NN_call, // Call Procedure
+ STARS_NN_callfi, // Indirect Call Far Procedure
+ STARS_NN_callni, // Indirect Call Near Procedure
+ STARS_NN_cbw, // AL -> AX (with sign)
+ STARS_NN_cwde, // AX -> EAX (with sign)
+ STARS_NN_cdqe, // EAX -> RAX (with sign)
+ STARS_NN_clc, // Clear Carry Flag
+ STARS_NN_cld, // Clear Direction Flag
+ STARS_NN_cli, // Clear Interrupt Flag
+ STARS_NN_clts, // Clear Task-Switched Flag in CR0
+ STARS_NN_cmc, // Complement Carry Flag
+ STARS_NN_cmp, // Compare Two Operands
+ STARS_NN_cmps, // Compare Strings
+ STARS_NN_cwd, // AX -> DX:AX (with sign)
+ STARS_NN_cdq, // EAX -> EDX:EAX (with sign)
+ STARS_NN_cqo, // RAX -> RDX:RAX (with sign)
+ STARS_NN_daa, // Decimal Adjust AL after Addition
+ STARS_NN_das, // Decimal Adjust AL after Subtraction
+ STARS_NN_dec, // Decrement by 1
+ STARS_NN_div, // Unsigned Divide
+ STARS_NN_enterw, // Make Stack Frame for Procedure Parameters
+ STARS_NN_enter, // Make Stack Frame for Procedure Parameters
+ STARS_NN_enterd, // Make Stack Frame for Procedure Parameters
+ STARS_NN_enterq, // Make Stack Frame for Procedure Parameters
+ STARS_NN_hlt, // Halt
+ STARS_NN_idiv, // Signed Divide
+ STARS_NN_imul, // Signed Multiply
+ STARS_NN_in, // Input from Port
+ STARS_NN_inc, // Increment by 1
+ STARS_NN_ins, // Input Byte(s) from Port to String
+ STARS_NN_int, // Call to Interrupt Procedure
+ STARS_NN_into, // Call to Interrupt Procedure if Overflow Flag = 1
+ STARS_NN_int3, // Trap to Debugger
+ STARS_NN_iretw, // Interrupt Return
+ STARS_NN_iret, // Interrupt Return
+ STARS_NN_iretd, // Interrupt Return (use32)
+ STARS_NN_iretq, // Interrupt Return (use64)
+ STARS_NN_ja, // Jump if Above (CF=0 & ZF=0)
+ STARS_NN_jae, // Jump if Above or Equal (CF=0)
+ STARS_NN_jb, // Jump if Below (CF=1)
+ STARS_NN_jbe, // Jump if Below or Equal (CF=1 | ZF=1)
+ STARS_NN_jc, // Jump if Carry (CF=1)
+ STARS_NN_jcxz, // Jump if CX is 0
+ STARS_NN_jecxz, // Jump if ECX is 0
+ STARS_NN_jrcxz, // Jump if RCX is 0
+ STARS_NN_je, // Jump if Equal (ZF=1)
+ STARS_NN_jg, // Jump if Greater (ZF=0 & SF=OF)
+ STARS_NN_jge, // Jump if Greater or Equal (SF=OF)
+ STARS_NN_jl, // Jump if Less (SF!=OF)
+ STARS_NN_jle, // Jump if Less or Equal (ZF=1 | SF!=OF)
+ STARS_NN_jna, // Jump if Not Above (CF=1 | ZF=1)
+ STARS_NN_jnae, // Jump if Not Above or Equal (CF=1)
+ STARS_NN_jnb, // Jump if Not Below (CF=0)
+ STARS_NN_jnbe, // Jump if Not Below or Equal (CF=0 & ZF=0)
+ STARS_NN_jnc, // Jump if Not Carry (CF=0)
+ STARS_NN_jne, // Jump if Not Equal (ZF=0)
+ STARS_NN_jng, // Jump if Not Greater (ZF=1 | SF!=OF)
+ STARS_NN_jnge, // Jump if Not Greater or Equal (ZF=1)
+ STARS_NN_jnl, // Jump if Not Less (SF=OF)
+ STARS_NN_jnle, // Jump if Not Less or Equal (ZF=0 & SF=OF)
+ STARS_NN_jno, // Jump if Not Overflow (OF=0)
+ STARS_NN_jnp, // Jump if Not Parity (PF=0)
+ STARS_NN_jns, // Jump if Not Sign (SF=0)
+ STARS_NN_jnz, // Jump if Not Zero (ZF=0)
+ STARS_NN_jo, // Jump if Overflow (OF=1)
+ STARS_NN_jp, // Jump if Parity (PF=1)
+ STARS_NN_jpe, // Jump if Parity Even (PF=1)
+ STARS_NN_jpo, // Jump if Parity Odd (PF=0)
+ STARS_NN_js, // Jump if Sign (SF=1)
+ STARS_NN_jz, // Jump if Zero (ZF=1)
+ STARS_NN_jmp, // Jump
+ STARS_NN_jmpfi, // Indirect Far Jump
+ STARS_NN_jmpni, // Indirect Near Jump
+ STARS_NN_jmpshort, // Jump Short (not used)
+ STARS_NN_lahf, // Load Flags into AH Register
+ STARS_NN_lar, // Load Access Right Byte
+ STARS_NN_lea, // Load Effective Address
+ STARS_NN_leavew, // High Level Procedure Exit
+ STARS_NN_leave, // High Level Procedure Exit
+ STARS_NN_leaved, // High Level Procedure Exit
+ STARS_NN_leaveq, // High Level Procedure Exit
+ STARS_NN_lgdt, // Load Global Descriptor Table Register
+ STARS_NN_lidt, // Load Interrupt Descriptor Table Register
+ STARS_NN_lgs, // Load Full Pointer to GS:xx
+ STARS_NN_lss, // Load Full Pointer to SS:xx
+ STARS_NN_lds, // Load Full Pointer to DS:xx
+ STARS_NN_les, // Load Full Pointer to ES:xx
+ STARS_NN_lfs, // Load Full Pointer to FS:xx
+ STARS_NN_lldt, // Load Local Descriptor Table Register
+ STARS_NN_lmsw, // Load Machine Status Word
+ STARS_NN_lock, // Assert LOCK# Signal Prefix
+ STARS_NN_lods, // Load String
+ STARS_NN_loopw, // Loop while ECX != 0
+ STARS_NN_loop, // Loop while CX != 0
+ STARS_NN_loopd, // Loop while ECX != 0
+ STARS_NN_loopq, // Loop while RCX != 0
+ STARS_NN_loopwe, // Loop while CX != 0 and ZF=1
+ STARS_NN_loope, // Loop while rCX != 0 and ZF=1
+ STARS_NN_loopde, // Loop while ECX != 0 and ZF=1
+ STARS_NN_loopqe, // Loop while RCX != 0 and ZF=1
+ STARS_NN_loopwne, // Loop while CX != 0 and ZF=0
+ STARS_NN_loopne, // Loop while rCX != 0 and ZF=0
+ STARS_NN_loopdne, // Loop while ECX != 0 and ZF=0
+ STARS_NN_loopqne, // Loop while RCX != 0 and ZF=0
+ STARS_NN_lsl, // Load Segment Limit
+ STARS_NN_ltr, // Load Task Register
+ STARS_NN_mov, // Move Data
+ STARS_NN_movsp, // Move to/from Special Registers
+ STARS_NN_movs, // Move Byte(s) from String to String
+ STARS_NN_movsx, // Move with Sign-Extend
+ STARS_NN_movzx, // Move with Zero-Extend
+ STARS_NN_mul, // Unsigned Multiplication of AL or AX
+ STARS_NN_neg, // Two's Complement Negation
+ STARS_NN_nop, // No Operation
+ STARS_NN_not, // One's Complement Negation
+ STARS_NN_or, // Logical Inclusive OR
+ STARS_NN_out, // Output to Port
+ STARS_NN_outs, // Output Byte(s) to Port
+ STARS_NN_pop, // Pop a word from the Stack
+ STARS_NN_popaw, // Pop all General Registers
+ STARS_NN_popa, // Pop all General Registers
+ STARS_NN_popad, // Pop all General Registers (use32)
+ STARS_NN_popaq, // Pop all General Registers (use64)
+ STARS_NN_popfw, // Pop Stack into Flags Register
+ STARS_NN_popf, // Pop Stack into Flags Register
+ STARS_NN_popfd, // Pop Stack into Eflags Register
+ STARS_NN_popfq, // Pop Stack into Rflags Register
+ STARS_NN_push, // Push Operand onto the Stack
+ STARS_NN_pushaw, // Push all General Registers
+ STARS_NN_pusha, // Push all General Registers
+ STARS_NN_pushad, // Push all General Registers (use32)
+ STARS_NN_pushaq, // Push all General Registers (use64)
+ STARS_NN_pushfw, // Push Flags Register onto the Stack
+ STARS_NN_pushf, // Push Flags Register onto the Stack
+ STARS_NN_pushfd, // Push Flags Register onto the Stack (use32)
+ STARS_NN_pushfq, // Push Flags Register onto the Stack (use64)
+ STARS_NN_rcl, // Rotate Through Carry Left
+ STARS_NN_rcr, // Rotate Through Carry Right
+ STARS_NN_rol, // Rotate Left
+ STARS_NN_ror, // Rotate Right
+ STARS_NN_rep, // Repeat String Operation
+ STARS_NN_repe, // Repeat String Operation while ZF=1
+ STARS_NN_repne, // Repeat String Operation while ZF=0
+ STARS_NN_retn, // Return Near from Procedure
+ STARS_NN_retf, // Return Far from Procedure
+ STARS_NN_sahf, // Store AH into Flags Register
+ STARS_NN_sal, // Shift Arithmetic Left
+ STARS_NN_sar, // Shift Arithmetic Right
+ STARS_NN_shl, // Shift Logical Left
+ STARS_NN_shr, // Shift Logical Right
+ STARS_NN_sbb, // Integer Subtraction with Borrow
+ STARS_NN_scas, // Compare String
+ STARS_NN_seta, // Set Byte if Above (CF=0 & ZF=0)
+ STARS_NN_setae, // Set Byte if Above or Equal (CF=0)
+ STARS_NN_setb, // Set Byte if Below (CF=1)
+ STARS_NN_setbe, // Set Byte if Below or Equal (CF=1 | ZF=1)
+ STARS_NN_setc, // Set Byte if Carry (CF=1)
+ STARS_NN_sete, // Set Byte if Equal (ZF=1)
+ STARS_NN_setg, // Set Byte if Greater (ZF=0 & SF=OF)
+ STARS_NN_setge, // Set Byte if Greater or Equal (SF=OF)
+ STARS_NN_setl, // Set Byte if Less (SF!=OF)
+ STARS_NN_setle, // Set Byte if Less or Equal (ZF=1 | SF!=OF)
+ STARS_NN_setna, // Set Byte if Not Above (CF=1 | ZF=1)
+ STARS_NN_setnae, // Set Byte if Not Above or Equal (CF=1)
+ STARS_NN_setnb, // Set Byte if Not Below (CF=0)
+ STARS_NN_setnbe, // Set Byte if Not Below or Equal (CF=0 & ZF=0)
+ STARS_NN_setnc, // Set Byte if Not Carry (CF=0)
+ STARS_NN_setne, // Set Byte if Not Equal (ZF=0)
+ STARS_NN_setng, // Set Byte if Not Greater (ZF=1 | SF!=OF)
+ STARS_NN_setnge, // Set Byte if Not Greater or Equal (ZF=1)
+ STARS_NN_setnl, // Set Byte if Not Less (SF=OF)
+ STARS_NN_setnle, // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
+ STARS_NN_setno, // Set Byte if Not Overflow (OF=0)
+ STARS_NN_setnp, // Set Byte if Not Parity (PF=0)
+ STARS_NN_setns, // Set Byte if Not Sign (SF=0)
+ STARS_NN_setnz, // Set Byte if Not Zero (ZF=0)
+ STARS_NN_seto, // Set Byte if Overflow (OF=1)
+ STARS_NN_setp, // Set Byte if Parity (PF=1)
+ STARS_NN_setpe, // Set Byte if Parity Even (PF=1)
+ STARS_NN_setpo, // Set Byte if Parity Odd (PF=0)
+ STARS_NN_sets, // Set Byte if Sign (SF=1)
+ STARS_NN_setz, // Set Byte if Zero (ZF=1)
+ STARS_NN_sgdt, // Store Global Descriptor Table Register
+ STARS_NN_sidt, // Store Interrupt Descriptor Table Register
+ STARS_NN_shld, // Double Precision Shift Left
+ STARS_NN_shrd, // Double Precision Shift Right
+ STARS_NN_sldt, // Store Local Descriptor Table Register
+ STARS_NN_smsw, // Store Machine Status Word
+ STARS_NN_stc, // Set Carry Flag
+ STARS_NN_std, // Set Direction Flag
+ STARS_NN_sti, // Set Interrupt Flag
+ STARS_NN_stos, // Store String
+ STARS_NN_str, // Store Task Register
+ STARS_NN_sub, // Integer Subtraction
+ STARS_NN_test, // Logical Compare
+ STARS_NN_verr, // Verify a Segment for Reading
+ STARS_NN_verw, // Verify a Segment for Writing
+ STARS_NN_wait, // Wait until BUSY# Pin is Inactive (HIGH)
+ STARS_NN_xchg, // Exchange Register/Memory with Register
+ STARS_NN_xlat, // Table Lookup Translation
+ STARS_NN_xor, // Logical Exclusive OR
+
+ //
+ // 486 instructions
+ //
+
+ STARS_NN_cmpxchg, // Compare and Exchange
+ STARS_NN_bswap, // Swap bits in EAX
+ STARS_NN_xadd, // t<-dest; dest<-src+dest; src<-t
+ STARS_NN_invd, // Invalidate Data Cache
+ STARS_NN_wbinvd, // Invalidate Data Cache (write changes)
+ STARS_NN_invlpg, // Invalidate TLB entry
+
+ //
+ // Pentium instructions
+ //
+
+ STARS_NN_rdmsr, // Read Machine Status Register
+ STARS_NN_wrmsr, // Write Machine Status Register
+ STARS_NN_cpuid, // Get CPU ID
+ STARS_NN_cmpxchg8b, // Compare and Exchange Eight Bytes
+ STARS_NN_rdtsc, // Read Time Stamp Counter
+ STARS_NN_rsm, // Resume from System Management Mode
+
+ //
+ // Pentium Pro instructions
+ //
+
+ STARS_NN_cmova, // Move if Above (CF=0 & ZF=0)
+ STARS_NN_cmovb, // Move if Below (CF=1)
+ STARS_NN_cmovbe, // Move if Below or Equal (CF=1 | ZF=1)
+ STARS_NN_cmovg, // Move if Greater (ZF=0 & SF=OF)
+ STARS_NN_cmovge, // Move if Greater or Equal (SF=OF)
+ STARS_NN_cmovl, // Move if Less (SF!=OF)
+ STARS_NN_cmovle, // Move if Less or Equal (ZF=1 | SF!=OF)
+ STARS_NN_cmovnb, // Move if Not Below (CF=0)
+ STARS_NN_cmovno, // Move if Not Overflow (OF=0)
+ STARS_NN_cmovnp, // Move if Not Parity (PF=0)
+ STARS_NN_cmovns, // Move if Not Sign (SF=0)
+ STARS_NN_cmovnz, // Move if Not Zero (ZF=0)
+ STARS_NN_cmovo, // Move if Overflow (OF=1)
+ STARS_NN_cmovp, // Move if Parity (PF=1)
+ STARS_NN_cmovs, // Move if Sign (SF=1)
+ STARS_NN_cmovz, // Move if Zero (ZF=1)
+ STARS_NN_fcmovb, // Floating Move if Below
+ STARS_NN_fcmove, // Floating Move if Equal
+ STARS_NN_fcmovbe, // Floating Move if Below or Equal
+ STARS_NN_fcmovu, // Floating Move if Unordered
+ STARS_NN_fcmovnb, // Floating Move if Not Below
+ STARS_NN_fcmovne, // Floating Move if Not Equal
+ STARS_NN_fcmovnbe, // Floating Move if Not Below or Equal
+ STARS_NN_fcmovnu, // Floating Move if Not Unordered
+ STARS_NN_fcomi, // FP Compare, result in EFLAGS
+ STARS_NN_fucomi, // FP Unordered Compare, result in EFLAGS
+ STARS_NN_fcomip, // FP Compare, result in EFLAGS, pop stack
+ STARS_NN_fucomip, // FP Unordered Compare, result in EFLAGS, pop stack
+ STARS_NN_rdpmc, // Read Performance Monitor Counter
+
+ //
+ // FPP instructuions
+ //
+
+ STARS_NN_fld, // Load Real
+ STARS_NN_fst, // Store Real
+ STARS_NN_fstp, // Store Real and Pop
+ STARS_NN_fxch, // Exchange Registers
+ STARS_NN_fild, // Load Integer
+ STARS_NN_fist, // Store Integer
+ STARS_NN_fistp, // Store Integer and Pop
+ STARS_NN_fbld, // Load BCD
+ STARS_NN_fbstp, // Store BCD and Pop
+ STARS_NN_fadd, // Add Real
+ STARS_NN_faddp, // Add Real and Pop
+ STARS_NN_fiadd, // Add Integer
+ STARS_NN_fsub, // Subtract Real
+ STARS_NN_fsubp, // Subtract Real and Pop
+ STARS_NN_fisub, // Subtract Integer
+ STARS_NN_fsubr, // Subtract Real Reversed
+ STARS_NN_fsubrp, // Subtract Real Reversed and Pop
+ STARS_NN_fisubr, // Subtract Integer Reversed
+ STARS_NN_fmul, // Multiply Real
+ STARS_NN_fmulp, // Multiply Real and Pop
+ STARS_NN_fimul, // Multiply Integer
+ STARS_NN_fdiv, // Divide Real
+ STARS_NN_fdivp, // Divide Real and Pop
+ STARS_NN_fidiv, // Divide Integer
+ STARS_NN_fdivr, // Divide Real Reversed
+ STARS_NN_fdivrp, // Divide Real Reversed and Pop
+ STARS_NN_fidivr, // Divide Integer Reversed
+ STARS_NN_fsqrt, // Square Root
+ STARS_NN_fscale, // Scale: st(0) <- st(0) * 2^st(1)
+ STARS_NN_fprem, // Partial Remainder
+ STARS_NN_frndint, // Round to Integer
+ STARS_NN_fxtract, // Extract exponent and significand
+ STARS_NN_fabs, // Absolute value
+ STARS_NN_fchs, // Change Sign
+ STARS_NN_fcom, // Compare Real
+ STARS_NN_fcomp, // Compare Real and Pop
+ STARS_NN_fcompp, // Compare Real and Pop Twice
+ STARS_NN_ficom, // Compare Integer
+ STARS_NN_ficomp, // Compare Integer and Pop
+ STARS_NN_ftst, // Test
+ STARS_NN_fxam, // Examine
+ STARS_NN_fptan, // Partial tangent
+ STARS_NN_fpatan, // Partial arctangent
+ STARS_NN_f2xm1, // 2^x - 1
+ STARS_NN_fyl2x, // Y * lg2(X)
+ STARS_NN_fyl2xp1, // Y * lg2(X+1)
+ STARS_NN_fldz, // Load +0.0
+ STARS_NN_fld1, // Load +1.0
+ STARS_NN_fldpi, // Load PI=3.14...
+ STARS_NN_fldl2t, // Load lg2(10)
+ STARS_NN_fldl2e, // Load lg2(e)
+ STARS_NN_fldlg2, // Load lg10(2)
+ STARS_NN_fldln2, // Load ln(2)
+ STARS_NN_finit, // Initialize Processor
+ STARS_NN_fninit, // Initialize Processor (no wait)
+ STARS_NN_fsetpm, // Set Protected Mode
+ STARS_NN_fldcw, // Load Control Word
+ STARS_NN_fstcw, // Store Control Word
+ STARS_NN_fnstcw, // Store Control Word (no wait)
+ STARS_NN_fstsw, // Store Status Word
+ STARS_NN_fnstsw, // Store Status Word (no wait)
+ STARS_NN_fclex, // Clear Exceptions
+ STARS_NN_fnclex, // Clear Exceptions (no wait)
+ STARS_NN_fstenv, // Store Environment
+ STARS_NN_fnstenv, // Store Environment (no wait)
+ STARS_NN_fldenv, // Load Environment
+ STARS_NN_fsave, // Save State
+ STARS_NN_fnsave, // Save State (no wait)
+ STARS_NN_frstor, // Restore State
+ STARS_NN_fincstp, // Increment Stack Pointer
+ STARS_NN_fdecstp, // Decrement Stack Pointer
+ STARS_NN_ffree, // Free Register
+ STARS_NN_fnop, // No Operation
+ STARS_NN_feni, // (8087 only)
+ STARS_NN_fneni, // (no wait) (8087 only)
+ STARS_NN_fdisi, // (8087 only)
+ STARS_NN_fndisi, // (no wait) (8087 only)
+
+ //
+ // 80387 instructions
+ //
+
+ STARS_NN_fprem1, // Partial Remainder ( < half )
+ STARS_NN_fsincos, // t<-cos(st); st<-sin(st); push t
+ STARS_NN_fsin, // Sine
+ STARS_NN_fcos, // Cosine
+ STARS_NN_fucom, // Compare Unordered Real
+ STARS_NN_fucomp, // Compare Unordered Real and Pop
+ STARS_NN_fucompp, // Compare Unordered Real and Pop Twice
+
+ //
+ // Instructions added 28.02.96
+ //
+
+ STARS_NN_setalc, // Set AL to Carry Flag
+ STARS_NN_svdc, // Save Register and Descriptor
+ STARS_NN_rsdc, // Restore Register and Descriptor
+ STARS_NN_svldt, // Save LDTR and Descriptor
+ STARS_NN_rsldt, // Restore LDTR and Descriptor
+ STARS_NN_svts, // Save TR and Descriptor
+ STARS_NN_rsts, // Restore TR and Descriptor
+ STARS_NN_icebp, // ICE Break Point
+ STARS_NN_loadall, // Load the entire CPU state from ES:EDI
+
+ //
+ // MMX instructions
+ //
+
+ STARS_NN_emms, // Empty MMX state
+ STARS_NN_movd, // Move 32 bits
+ STARS_NN_movq, // Move 64 bits
+ STARS_NN_packsswb, // Pack with Signed Saturation (Word->Byte)
+ STARS_NN_packssdw, // Pack with Signed Saturation (Dword->Word)
+ STARS_NN_packuswb, // Pack with Unsigned Saturation (Word->Byte)
+ STARS_NN_paddb, // Packed Add Byte
+ STARS_NN_paddw, // Packed Add Word
+ STARS_NN_paddd, // Packed Add Dword
+ STARS_NN_paddsb, // Packed Add with Saturation (Byte)
+ STARS_NN_paddsw, // Packed Add with Saturation (Word)
+ STARS_NN_paddusb, // Packed Add Unsigned with Saturation (Byte)
+ STARS_NN_paddusw, // Packed Add Unsigned with Saturation (Word)
+ STARS_NN_pand, // Bitwise Logical And
+ STARS_NN_pandn, // Bitwise Logical And Not
+ STARS_NN_pcmpeqb, // Packed Compare for Equal (Byte)
+ STARS_NN_pcmpeqw, // Packed Compare for Equal (Word)
+ STARS_NN_pcmpeqd, // Packed Compare for Equal (Dword)
+ STARS_NN_pcmpgtb, // Packed Compare for Greater Than (Byte)
+ STARS_NN_pcmpgtw, // Packed Compare for Greater Than (Word)
+ STARS_NN_pcmpgtd, // Packed Compare for Greater Than (Dword)
+ STARS_NN_pmaddwd, // Packed Multiply and Add
+ STARS_NN_pmulhw, // Packed Multiply High
+ STARS_NN_pmullw, // Packed Multiply Low
+ STARS_NN_por, // Bitwise Logical Or
+ STARS_NN_psllw, // Packed Shift Left Logical (Word)
+ STARS_NN_pslld, // Packed Shift Left Logical (Dword)
+ STARS_NN_psllq, // Packed Shift Left Logical (Qword)
+ STARS_NN_psraw, // Packed Shift Right Arithmetic (Word)
+ STARS_NN_psrad, // Packed Shift Right Arithmetic (Dword)
+ STARS_NN_psrlw, // Packed Shift Right Logical (Word)
+ STARS_NN_psrld, // Packed Shift Right Logical (Dword)
+ STARS_NN_psrlq, // Packed Shift Right Logical (Qword)
+ STARS_NN_psubb, // Packed Subtract Byte
+ STARS_NN_psubw, // Packed Subtract Word
+ STARS_NN_psubd, // Packed Subtract Dword
+ STARS_NN_psubsb, // Packed Subtract with Saturation (Byte)
+ STARS_NN_psubsw, // Packed Subtract with Saturation (Word)
+ STARS_NN_psubusb, // Packed Subtract Unsigned with Saturation (Byte)
+ STARS_NN_psubusw, // Packed Subtract Unsigned with Saturation (Word)
+ STARS_NN_punpckhbw, // Unpack High Packed Data (Byte->Word)
+ STARS_NN_punpckhwd, // Unpack High Packed Data (Word->Dword)
+ STARS_NN_punpckhdq, // Unpack High Packed Data (Dword->Qword)
+ STARS_NN_punpcklbw, // Unpack Low Packed Data (Byte->Word)
+ STARS_NN_punpcklwd, // Unpack Low Packed Data (Word->Dword)
+ STARS_NN_punpckldq, // Unpack Low Packed Data (Dword->Qword)
+ STARS_NN_pxor, // Bitwise Logical Exclusive Or
+
+ //
+ // Undocumented Deschutes processor instructions
+ //
+
+ STARS_NN_fxsave, // Fast save FP context
+ STARS_NN_fxrstor, // Fast restore FP context
+
+ // Pentium II instructions
+
+ STARS_NN_sysenter, // Fast Transition to System Call Entry Point
+ STARS_NN_sysexit, // Fast Transition from System Call Entry Point
+
+ // 3DNow! instructions
+
+ STARS_NN_pavgusb, // Packed 8-bit Unsigned Integer Averaging
+ STARS_NN_pfadd, // Packed Floating-Point Addition
+ STARS_NN_pfsub, // Packed Floating-Point Subtraction
+ STARS_NN_pfsubr, // Packed Floating-Point Reverse Subtraction
+ STARS_NN_pfacc, // Packed Floating-Point Accumulate
+ STARS_NN_pfcmpge, // Packed Floating-Point Comparison, Greater or Equal
+ STARS_NN_pfcmpgt, // Packed Floating-Point Comparison, Greater
+ STARS_NN_pfcmpeq, // Packed Floating-Point Comparison, Equal
+ STARS_NN_pfmin, // Packed Floating-Point Minimum
+ STARS_NN_pfmax, // Packed Floating-Point Maximum
+ STARS_NN_pi2fd, // Packed 32-bit Integer to Floating-Point
+ STARS_NN_pf2id, // Packed Floating-Point to 32-bit Integer
+ STARS_NN_pfrcp, // Packed Floating-Point Reciprocal Approximation
+ STARS_NN_pfrsqrt, // Packed Floating-Point Reciprocal Square Root Approximation
+ STARS_NN_pfmul, // Packed Floating-Point Multiplication
+ STARS_NN_pfrcpit1, // Packed Floating-Point Reciprocal First Iteration Step
+ STARS_NN_pfrsqit1, // Packed Floating-Point Reciprocal Square Root First Iteration Step
+ STARS_NN_pfrcpit2, // Packed Floating-Point Reciprocal Second Iteration Step
+ STARS_NN_pmulhrw, // Packed Floating-Point 16-bit Integer Multiply with rounding
+ STARS_NN_femms, // Faster entry/exit of the MMX or floating-point state
+ STARS_NN_prefetch, // Prefetch at least a 32-byte line into L1 data cache
+ STARS_NN_prefetchw, // Prefetch processor cache line into L1 data cache (mark as modified)
+
+
+ // Pentium III instructions
+
+ STARS_NN_addps, // Packed Single-FP Add
+ STARS_NN_addss, // Scalar Single-FP Add
+ STARS_NN_andnps, // Bitwise Logical And Not for Single-FP
+ STARS_NN_andps, // Bitwise Logical And for Single-FP
+ STARS_NN_cmpps, // Packed Single-FP Compare
+ STARS_NN_cmpss, // Scalar Single-FP Compare
+ STARS_NN_comiss, // Scalar Ordered Single-FP Compare and Set EFLAGS
+ STARS_NN_cvtpi2ps, // Packed signed INT32 to Packed Single-FP conversion
+ STARS_NN_cvtps2pi, // Packed Single-FP to Packed INT32 conversion
+ STARS_NN_cvtsi2ss, // Scalar signed INT32 to Single-FP conversion
+ STARS_NN_cvtss2si, // Scalar Single-FP to signed INT32 conversion
+ STARS_NN_cvttps2pi, // Packed Single-FP to Packed INT32 conversion (truncate)
+ STARS_NN_cvttss2si, // Scalar Single-FP to signed INT32 conversion (truncate)
+ STARS_NN_divps, // Packed Single-FP Divide
+ STARS_NN_divss, // Scalar Single-FP Divide
+ STARS_NN_ldmxcsr, // Load Streaming SIMD Extensions Technology Control/Status Register
+ STARS_NN_maxps, // Packed Single-FP Maximum
+ STARS_NN_maxss, // Scalar Single-FP Maximum
+ STARS_NN_minps, // Packed Single-FP Minimum
+ STARS_NN_minss, // Scalar Single-FP Minimum
+ STARS_NN_movaps, // Move Aligned Four Packed Single-FP
+ STARS_NN_movhlps, // Move High to Low Packed Single-FP
+ STARS_NN_movhps, // Move High Packed Single-FP
+ STARS_NN_movlhps, // Move Low to High Packed Single-FP
+ STARS_NN_movlps, // Move Low Packed Single-FP
+ STARS_NN_movmskps, // Move Mask to Register
+ STARS_NN_movss, // Move Scalar Single-FP
+ STARS_NN_movups, // Move Unaligned Four Packed Single-FP
+ STARS_NN_mulps, // Packed Single-FP Multiply
+ STARS_NN_mulss, // Scalar Single-FP Multiply
+ STARS_NN_orps, // Bitwise Logical OR for Single-FP Data
+ STARS_NN_rcpps, // Packed Single-FP Reciprocal
+ STARS_NN_rcpss, // Scalar Single-FP Reciprocal
+ STARS_NN_rsqrtps, // Packed Single-FP Square Root Reciprocal
+ STARS_NN_rsqrtss, // Scalar Single-FP Square Root Reciprocal
+ STARS_NN_shufps, // Shuffle Single-FP
+ STARS_NN_sqrtps, // Packed Single-FP Square Root
+ STARS_NN_sqrtss, // Scalar Single-FP Square Root
+ STARS_NN_stmxcsr, // Store Streaming SIMD Extensions Technology Control/Status Register
+ STARS_NN_subps, // Packed Single-FP Subtract
+ STARS_NN_subss, // Scalar Single-FP Subtract
+ STARS_NN_ucomiss, // Scalar Unordered Single-FP Compare and Set EFLAGS
+ STARS_NN_unpckhps, // Unpack High Packed Single-FP Data
+ STARS_NN_unpcklps, // Unpack Low Packed Single-FP Data
+ STARS_NN_xorps, // Bitwise Logical XOR for Single-FP Data
+ STARS_NN_pavgb, // Packed Average (Byte)
+ STARS_NN_pavgw, // Packed Average (Word)
+ STARS_NN_pextrw, // Extract Word
+ STARS_NN_pinsrw, // Insert Word
+ STARS_NN_pmaxsw, // Packed Signed Integer Word Maximum
+ STARS_NN_pmaxub, // Packed Unsigned Integer Byte Maximum
+ STARS_NN_pminsw, // Packed Signed Integer Word Minimum
+ STARS_NN_pminub, // Packed Unsigned Integer Byte Minimum
+ STARS_NN_pmovmskb, // Move Byte Mask to Integer
+ STARS_NN_pmulhuw, // Packed Multiply High Unsigned
+ STARS_NN_psadbw, // Packed Sum of Absolute Differences
+ STARS_NN_pshufw, // Packed Shuffle Word
+ STARS_NN_maskmovq, // Byte Mask write
+ STARS_NN_movntps, // Move Aligned Four Packed Single-FP Non Temporal
+ STARS_NN_movntq, // Move 64 Bits Non Temporal
+ STARS_NN_prefetcht0, // Prefetch to all cache levels
+ STARS_NN_prefetcht1, // Prefetch to all cache levels
+ STARS_NN_prefetcht2, // Prefetch to L2 cache
+ STARS_NN_prefetchnta, // Prefetch to L1 cache
+ STARS_NN_sfence, // Store Fence
+
+ // Pentium III Pseudo instructions
+
+ STARS_NN_cmpeqps, // Packed Single-FP Compare EQ
+ STARS_NN_cmpltps, // Packed Single-FP Compare LT
+ STARS_NN_cmpleps, // Packed Single-FP Compare LE
+ STARS_NN_cmpunordps, // Packed Single-FP Compare UNORD
+ STARS_NN_cmpneqps, // Packed Single-FP Compare NOT EQ
+ STARS_NN_cmpnltps, // Packed Single-FP Compare NOT LT
+ STARS_NN_cmpnleps, // Packed Single-FP Compare NOT LE
+ STARS_NN_cmpordps, // Packed Single-FP Compare ORDERED
+ STARS_NN_cmpeqss, // Scalar Single-FP Compare EQ
+ STARS_NN_cmpltss, // Scalar Single-FP Compare LT
+ STARS_NN_cmpless, // Scalar Single-FP Compare LE
+ STARS_NN_cmpunordss, // Scalar Single-FP Compare UNORD
+ STARS_NN_cmpneqss, // Scalar Single-FP Compare NOT EQ
+ STARS_NN_cmpnltss, // Scalar Single-FP Compare NOT LT
+ STARS_NN_cmpnless, // Scalar Single-FP Compare NOT LE
+ STARS_NN_cmpordss, // Scalar Single-FP Compare ORDERED
+
+ // AMD K7 instructions
+
+ STARS_NN_pf2iw, // Packed Floating-Point to Integer with Sign Extend
+ STARS_NN_pfnacc, // Packed Floating-Point Negative Accumulate
+ STARS_NN_pfpnacc, // Packed Floating-Point Mixed Positive-Negative Accumulate
+ STARS_NN_pi2fw, // Packed 16-bit Integer to Floating-Point
+ STARS_NN_pswapd, // Packed Swap Double Word
+
+ // Undocumented FP instructions (thanks to norbert.juffa@adm.com)
+
+ STARS_NN_fstp1, // Alias of Store Real and Pop
+ STARS_NN_fcom2, // Alias of Compare Real
+ STARS_NN_fcomp3, // Alias of Compare Real and Pop
+ STARS_NN_fxch4, // Alias of Exchange Registers
+ STARS_NN_fcomp5, // Alias of Compare Real and Pop
+ STARS_NN_ffreep, // Free Register and Pop
+ STARS_NN_fxch7, // Alias of Exchange Registers
+ STARS_NN_fstp8, // Alias of Store Real and Pop
+ STARS_NN_fstp9, // Alias of Store Real and Pop
+
+ // Pentium 4 instructions
+
+ STARS_NN_addpd, // Add Packed Double-Precision Floating-Point Values
+ STARS_NN_addsd, // Add Scalar Double-Precision Floating-Point Values
+ STARS_NN_andnpd, // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
+ STARS_NN_andpd, // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
+ STARS_NN_clflush, // Flush Cache Line
+ STARS_NN_cmppd, // Compare Packed Double-Precision Floating-Point Values
+ STARS_NN_cmpsd, // Compare Scalar Double-Precision Floating-Point Values
+ STARS_NN_comisd, // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ STARS_NN_cvtdq2pd, // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
+ STARS_NN_cvtdq2ps, // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
+ STARS_NN_cvtpd2dq, // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ STARS_NN_cvtpd2pi, // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ STARS_NN_cvtpd2ps, // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
+ STARS_NN_cvtpi2pd, // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
+ STARS_NN_cvtps2dq, // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ STARS_NN_cvtps2pd, // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
+ STARS_NN_cvtsd2si, // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ STARS_NN_cvtsd2ss, // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
+ STARS_NN_cvtsi2sd, // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
+ STARS_NN_cvtss2sd, // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
+ STARS_NN_cvttpd2dq, // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ STARS_NN_cvttpd2pi, // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ STARS_NN_cvttps2dq, // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ STARS_NN_cvttsd2si, // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ STARS_NN_divpd, // Divide Packed Double-Precision Floating-Point Values
+ STARS_NN_divsd, // Divide Scalar Double-Precision Floating-Point Values
+ STARS_NN_lfence, // Load Fence
+ STARS_NN_maskmovdqu, // Store Selected Bytes of Double Quadword
+ STARS_NN_maxpd, // Return Maximum Packed Double-Precision Floating-Point Values
+ STARS_NN_maxsd, // Return Maximum Scalar Double-Precision Floating-Point Value
+ STARS_NN_mfence, // Memory Fence
+ STARS_NN_minpd, // Return Minimum Packed Double-Precision Floating-Point Values
+ STARS_NN_minsd, // Return Minimum Scalar Double-Precision Floating-Point Value
+ STARS_NN_movapd, // Move Aligned Packed Double-Precision Floating-Point Values
+ STARS_NN_movdq2q, // Move Quadword from XMM to MMX Register
+ STARS_NN_movdqa, // Move Aligned Double Quadword
+ STARS_NN_movdqu, // Move Unaligned Double Quadword
+ STARS_NN_movhpd, // Move High Packed Double-Precision Floating-Point Values
+ STARS_NN_movlpd, // Move Low Packed Double-Precision Floating-Point Values
+ STARS_NN_movmskpd, // Extract Packed Double-Precision Floating-Point Sign Mask
+ STARS_NN_movntdq, // Store Double Quadword Using Non-Temporal Hint
+ STARS_NN_movnti, // Store Doubleword Using Non-Temporal Hint
+ STARS_NN_movntpd, // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
+ STARS_NN_movq2dq, // Move Quadword from MMX to XMM Register
+ STARS_NN_movsd, // Move Scalar Double-Precision Floating-Point Values
+ STARS_NN_movupd, // Move Unaligned Packed Double-Precision Floating-Point Values
+ STARS_NN_mulpd, // Multiply Packed Double-Precision Floating-Point Values
+ STARS_NN_mulsd, // Multiply Scalar Double-Precision Floating-Point Values
+ STARS_NN_orpd, // Bitwise Logical OR of Double-Precision Floating-Point Values
+ STARS_NN_paddq, // Add Packed Quadword Integers
+ STARS_NN_pause, // Spin Loop Hint
+ STARS_NN_pmuludq, // Multiply Packed Unsigned Doubleword Integers
+ STARS_NN_pshufd, // Shuffle Packed Doublewords
+ STARS_NN_pshufhw, // Shuffle Packed High Words
+ STARS_NN_pshuflw, // Shuffle Packed Low Words
+ STARS_NN_pslldq, // Shift Double Quadword Left Logical
+ STARS_NN_psrldq, // Shift Double Quadword Right Logical
+ STARS_NN_psubq, // Subtract Packed Quadword Integers
+ STARS_NN_punpckhqdq, // Unpack High Data
+ STARS_NN_punpcklqdq, // Unpack Low Data
+ STARS_NN_shufpd, // Shuffle Packed Double-Precision Floating-Point Values
+ STARS_NN_sqrtpd, // Compute Square Roots of Packed Double-Precision Floating-Point Values
+ STARS_NN_sqrtsd, // Compute Square Rootof Scalar Double-Precision Floating-Point Value
+ STARS_NN_subpd, // Subtract Packed Double-Precision Floating-Point Values
+ STARS_NN_subsd, // Subtract Scalar Double-Precision Floating-Point Values
+ STARS_NN_ucomisd, // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ STARS_NN_unpckhpd, // Unpack and Interleave High Packed Double-Precision Floating-Point Values
+ STARS_NN_unpcklpd, // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
+ STARS_NN_xorpd, // Bitwise Logical OR of Double-Precision Floating-Point Values
+
+ // AMD syscall/sysret instructions
+
+ STARS_NN_syscall, // Low latency system call
+ STARS_NN_sysret, // Return from system call
+
+ // AMD64 instructions
+
+ STARS_NN_swapgs, // Exchange GS base with KernelGSBase MSR
+
+ // New Pentium instructions (SSE3)
+
+ STARS_NN_movddup, // Move One Double-FP and Duplicate
+ STARS_NN_movshdup, // Move Packed Single-FP High and Duplicate
+ STARS_NN_movsldup, // Move Packed Single-FP Low and Duplicate
+
+ // Missing AMD64 instructions
+
+ STARS_NN_movsxd, // Move with Sign-Extend Doubleword
+ STARS_NN_cmpxchg16b, // Compare and Exchange 16 Bytes
+
+ // SSE3 instructions
+
+ STARS_NN_addsubpd, // Add /Sub packed DP FP numbers
+ STARS_NN_addsubps, // Add /Sub packed SP FP numbers
+ STARS_NN_haddpd, // Add horizontally packed DP FP numbers
+ STARS_NN_haddps, // Add horizontally packed SP FP numbers
+ STARS_NN_hsubpd, // Sub horizontally packed DP FP numbers
+ STARS_NN_hsubps, // Sub horizontally packed SP FP numbers
+ STARS_NN_monitor, // Set up a linear address range to be monitored by hardware
+ STARS_NN_mwait, // Wait until write-back store performed within the range specified by the MONITOR instruction
+ STARS_NN_fisttp, // Store ST in intXX (chop) and pop
+ STARS_NN_lddqu, // Load unaligned integer 128-bit
+
+ // SSSE3 instructions
+
+ STARS_NN_psignb, // Packed SIGN Byte
+ STARS_NN_psignw, // Packed SIGN Word
+ STARS_NN_psignd, // Packed SIGN Doubleword
+ STARS_NN_pshufb, // Packed Shuffle Bytes
+ STARS_NN_pmulhrsw, // Packed Multiply High with Round and Scale
+ STARS_NN_pmaddubsw, // Multiply and Add Packed Signed and Unsigned Bytes
+ STARS_NN_phsubsw, // Packed Horizontal Subtract and Saturate
+ STARS_NN_phaddsw, // Packed Horizontal Add and Saturate
+ STARS_NN_phaddw, // Packed Horizontal Add Word
+ STARS_NN_phaddd, // Packed Horizontal Add Doubleword
+ STARS_NN_phsubw, // Packed Horizontal Subtract Word
+ STARS_NN_phsubd, // Packed Horizontal Subtract Doubleword
+ STARS_NN_palignr, // Packed Align Right
+ STARS_NN_pabsb, // Packed Absolute Value Byte
+ STARS_NN_pabsw, // Packed Absolute Value Word
+ STARS_NN_pabsd, // Packed Absolute Value Doubleword
+
+ // VMX instructions
+
+ STARS_NN_vmcall, // Call to VM Monitor
+ STARS_NN_vmclear, // Clear Virtual Machine Control Structure
+ STARS_NN_vmlaunch, // Launch Virtual Machine
+ STARS_NN_vmresume, // Resume Virtual Machine
+ STARS_NN_vmptrld, // Load Pointer to Virtual Machine Control Structure
+ STARS_NN_vmptrst, // Store Pointer to Virtual Machine Control Structure
+ STARS_NN_vmread, // Read Field from Virtual Machine Control Structure
+ STARS_NN_vmwrite, // Write Field from Virtual Machine Control Structure
+ STARS_NN_vmxoff, // Leave VMX Operation
+ STARS_NN_vmxon, // Enter VMX Operation
+
+ // Undefined Instruction
+
+ STARS_NN_ud2, // Undefined Instruction
+
+ // Added with x86-64
+
+ STARS_NN_rdtscp, // Read Time-Stamp Counter and Processor ID
+
+ // Geode LX 3DNow! extensions
+
+ STARS_NN_pfrcpv, // Reciprocal Approximation for a Pair of 32-bit Floats
+ STARS_NN_pfrsqrtv, // Reciprocal Square Root Approximation for a Pair of 32-bit Floats
+
+ // SSE2 pseudoinstructions
+
+ STARS_NN_cmpeqpd, // Packed Double-FP Compare EQ
+ STARS_NN_cmpltpd, // Packed Double-FP Compare LT
+ STARS_NN_cmplepd, // Packed Double-FP Compare LE
+ STARS_NN_cmpunordpd, // Packed Double-FP Compare UNORD
+ STARS_NN_cmpneqpd, // Packed Double-FP Compare NOT EQ
+ STARS_NN_cmpnltpd, // Packed Double-FP Compare NOT LT
+ STARS_NN_cmpnlepd, // Packed Double-FP Compare NOT LE
+ STARS_NN_cmpordpd, // Packed Double-FP Compare ORDERED
+ STARS_NN_cmpeqsd, // Scalar Double-FP Compare EQ
+ STARS_NN_cmpltsd, // Scalar Double-FP Compare LT
+ STARS_NN_cmplesd, // Scalar Double-FP Compare LE
+ STARS_NN_cmpunordsd, // Scalar Double-FP Compare UNORD
+ STARS_NN_cmpneqsd, // Scalar Double-FP Compare NOT EQ
+ STARS_NN_cmpnltsd, // Scalar Double-FP Compare NOT LT
+ STARS_NN_cmpnlesd, // Scalar Double-FP Compare NOT LE
+ STARS_NN_cmpordsd, // Scalar Double-FP Compare ORDERED
+
+ // SSSE4.1 instructions
+
+ STARS_NN_blendpd, // Blend Packed Double Precision Floating-Point Values
+ STARS_NN_blendps, // Blend Packed Single Precision Floating-Point Values
+ STARS_NN_blendvpd, // Variable Blend Packed Double Precision Floating-Point Values
+ STARS_NN_blendvps, // Variable Blend Packed Single Precision Floating-Point Values
+ STARS_NN_dppd, // Dot Product of Packed Double Precision Floating-Point Values
+ STARS_NN_dpps, // Dot Product of Packed Single Precision Floating-Point Values
+ STARS_NN_extractps, // Extract Packed Single Precision Floating-Point Value
+ STARS_NN_insertps, // Insert Packed Single Precision Floating-Point Value
+ STARS_NN_movntdqa, // Load Double Quadword Non-Temporal Aligned Hint
+ STARS_NN_mpsadbw, // Compute Multiple Packed Sums of Absolute Difference
+ STARS_NN_packusdw, // Pack with Unsigned Saturation
+ STARS_NN_pblendvb, // Variable Blend Packed Bytes
+ STARS_NN_pblendw, // Blend Packed Words
+ STARS_NN_pcmpeqq, // Compare Packed Qword Data for Equal
+ STARS_NN_pextrb, // Extract Byte
+ STARS_NN_pextrd, // Extract Dword
+ STARS_NN_pextrq, // Extract Qword
+ STARS_NN_phminposuw, // Packed Horizontal Word Minimum
+ STARS_NN_pinsrb, // Insert Byte
+ STARS_NN_pinsrd, // Insert Dword
+ STARS_NN_pinsrq, // Insert Qword
+ STARS_NN_pmaxsb, // Maximum of Packed Signed Byte Integers
+ STARS_NN_pmaxsd, // Maximum of Packed Signed Dword Integers
+ STARS_NN_pmaxud, // Maximum of Packed Unsigned Dword Integers
+ STARS_NN_pmaxuw, // Maximum of Packed Word Integers
+ STARS_NN_pminsb, // Minimum of Packed Signed Byte Integers
+ STARS_NN_pminsd, // Minimum of Packed Signed Dword Integers
+ STARS_NN_pminud, // Minimum of Packed Unsigned Dword Integers
+ STARS_NN_pminuw, // Minimum of Packed Word Integers
+ STARS_NN_pmovsxbw, // Packed Move with Sign Extend
+ STARS_NN_pmovsxbd, // Packed Move with Sign Extend
+ STARS_NN_pmovsxbq, // Packed Move with Sign Extend
+ STARS_NN_pmovsxwd, // Packed Move with Sign Extend
+ STARS_NN_pmovsxwq, // Packed Move with Sign Extend
+ STARS_NN_pmovsxdq, // Packed Move with Sign Extend
+ STARS_NN_pmovzxbw, // Packed Move with Zero Extend
+ STARS_NN_pmovzxbd, // Packed Move with Zero Extend
+ STARS_NN_pmovzxbq, // Packed Move with Zero Extend
+ STARS_NN_pmovzxwd, // Packed Move with Zero Extend
+ STARS_NN_pmovzxwq, // Packed Move with Zero Extend
+ STARS_NN_pmovzxdq, // Packed Move with Zero Extend
+ STARS_NN_pmuldq, // Multiply Packed Signed Dword Integers
+ STARS_NN_pmulld, // Multiply Packed Signed Dword Integers and Store Low Result
+ STARS_NN_ptest, // Logical Compare
+ STARS_NN_roundpd, // Round Packed Double Precision Floating-Point Values
+ STARS_NN_roundps, // Round Packed Single Precision Floating-Point Values
+ STARS_NN_roundsd, // Round Scalar Double Precision Floating-Point Values
+ STARS_NN_roundss, // Round Scalar Single Precision Floating-Point Values
+
+ // SSSE4.2 instructions
+
+ STARS_NN_crc32, // Accumulate CRC32 Value
+ STARS_NN_pcmpestri, // Packed Compare Explicit Length Strings, Return Index
+ STARS_NN_pcmpestrm, // Packed Compare Explicit Length Strings, Return Mask
+ STARS_NN_pcmpistri, // Packed Compare Implicit Length Strings, Return Index
+ STARS_NN_pcmpistrm, // Packed Compare Implicit Length Strings, Return Mask
+ STARS_NN_pcmpgtq, // Compare Packed Data for Greater Than
+ STARS_NN_popcnt, // Return the Count of Number of Bits Set to 1
+
+ // AMD SSE4a instructions
+
+ STARS_NN_extrq, // Extract Field From Register
+ STARS_NN_insertq, // Insert Field
+ STARS_NN_movntsd, // Move Non-Temporal Scalar Double-Precision Floating-Point
+ STARS_NN_movntss, // Move Non-Temporal Scalar Single-Precision Floating-Point
+ STARS_NN_lzcnt, // Leading Zero Count
+
+ // xsave/xrstor instructions
+
+ STARS_NN_xgetbv, // Get Value of Extended Control Register
+ STARS_NN_xrstor, // Restore Processor Extended States
+ STARS_NN_xsave, // Save Processor Extended States
+ STARS_NN_xsetbv, // Set Value of Extended Control Register
+
+ // Intel Safer Mode Extensions (SMX)
+
+ STARS_NN_getsec, // Safer Mode Extensions (SMX) Instruction
+
+ // AMD-V Virtualization ISA Extension
+
+ STARS_NN_clgi, // Clear Global Interrupt Flag
+ STARS_NN_invlpga, // Invalidate TLB Entry in a Specified ASID
+ STARS_NN_skinit, // Secure Init and Jump with Attestation
+ STARS_NN_stgi, // Set Global Interrupt Flag
+ STARS_NN_vmexit, // Stop Executing Guest, Begin Executing Host
+ STARS_NN_vmload, // Load State from VMCB
+ STARS_NN_vmmcall, // Call VMM
+ STARS_NN_vmrun, // Run Virtual Machine
+ STARS_NN_vmsave, // Save State to VMCB
+
+ // VMX+ instructions
+
+ STARS_NN_invept, // Invalidate Translations Derived from EPT
+ STARS_NN_invvpid, // Invalidate Translations Based on VPID
+
+ // Intel Atom instructions
+
+ STARS_NN_movbe, // Move Data After Swapping Bytes
+
+ // Intel AES instructions
+
+ STARS_NN_aesenc, // Perform One Round of an AES Encryption Flow
+ STARS_NN_aesenclast, // Perform the Last Round of an AES Encryption Flow
+ STARS_NN_aesdec, // Perform One Round of an AES Decryption Flow
+ STARS_NN_aesdeclast, // Perform the Last Round of an AES Decryption Flow
+ STARS_NN_aesimc, // Perform the AES InvMixColumn Transformation
+ STARS_NN_aeskeygenassist, // AES Round Key Generation Assist
+
+ // Carryless multiplication
+
+ STARS_NN_pclmulqdq, // Carry-Less Multiplication Quadword
+
+ // Returns modifies by operand size prefixes
+
+ STARS_NN_retnw, // Return Near from Procedure (use16)
+ STARS_NN_retnd, // Return Near from Procedure (use32)
+ STARS_NN_retnq, // Return Near from Procedure (use64)
+ STARS_NN_retfw, // Return Far from Procedure (use16)
+ STARS_NN_retfd, // Return Far from Procedure (use32)
+ STARS_NN_retfq, // Return Far from Procedure (use64)
+
+ // RDRAND support
+
+ STARS_NN_rdrand, // Read Random Number
+
+ // new GPR instructions
+
+ STARS_NN_adcx, // Unsigned Integer Addition of Two Operands with Carry Flag
+ STARS_NN_adox, // Unsigned Integer Addition of Two Operands with Overflow Flag
+ STARS_NN_andn, // Logical AND NOT
+ STARS_NN_bextr, // Bit Field Extract
+ STARS_NN_blsi, // Extract Lowest Set Isolated Bit
+ STARS_NN_blsmsk, // Get Mask Up to Lowest Set Bit
+ STARS_NN_blsr, // Reset Lowest Set Bit
+ STARS_NN_bzhi, // Zero High Bits Starting with Specified Bit Position
+ STARS_NN_clac, // Clear AC Flag in EFLAGS Register
+ STARS_NN_mulx, // Unsigned Multiply Without Affecting Flags
+ STARS_NN_pdep, // Parallel Bits Deposit
+ STARS_NN_pext, // Parallel Bits Extract
+ STARS_NN_rorx, // Rotate Right Logical Without Affecting Flags
+ STARS_NN_sarx, // Shift Arithmetically Right Without Affecting Flags
+ STARS_NN_shlx, // Shift Logically Left Without Affecting Flags
+ STARS_NN_shrx, // Shift Logically Right Without Affecting Flags
+ STARS_NN_stac, // Set AC Flag in EFLAGS Register
+ STARS_NN_tzcnt, // Count the Number of Trailing Zero Bits
+ STARS_NN_xsaveopt, // Save Processor Extended States Optimized
+ STARS_NN_invpcid, // Invalidate Processor Context ID
+ STARS_NN_rdseed, // Read Random Seed
+ STARS_NN_rdfsbase, // Read FS Segment Base
+ STARS_NN_rdgsbase, // Read GS Segment Base
+ STARS_NN_wrfsbase, // Write FS Segment Base
+ STARS_NN_wrgsbase, // Write GS Segment Base
+
+ // new AVX instructions
+ STARS_NN_vaddpd, // Add Packed Double-Precision Floating-Point Values
+ STARS_NN_vaddps, // Packed Single-FP Add
+ STARS_NN_vaddsd, // Add Scalar Double-Precision Floating-Point Values
+ STARS_NN_vaddss, // Scalar Single-FP Add
+ STARS_NN_vaddsubpd, // Add /Sub packed DP FP numbers
+ STARS_NN_vaddsubps, // Add /Sub packed SP FP numbers
+ STARS_NN_vaesdec, // Perform One Round of an AES Decryption Flow
+ STARS_NN_vaesdeclast, // Perform the Last Round of an AES Decryption Flow
+ STARS_NN_vaesenc, // Perform One Round of an AES Encryption Flow
+ STARS_NN_vaesenclast, // Perform the Last Round of an AES Encryption Flow
+ STARS_NN_vaesimc, // Perform the AES InvMixColumn Transformation
+ STARS_NN_vaeskeygenassist, // AES Round Key Generation Assist
+ STARS_NN_vandnpd, // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
+ STARS_NN_vandnps, // Bitwise Logical And Not for Single-FP
+ STARS_NN_vandpd, // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
+ STARS_NN_vandps, // Bitwise Logical And for Single-FP
+ STARS_NN_vblendpd, // Blend Packed Double Precision Floating-Point Values
+ STARS_NN_vblendps, // Blend Packed Single Precision Floating-Point Values
+ STARS_NN_vblendvpd, // Variable Blend Packed Double Precision Floating-Point Values
+ STARS_NN_vblendvps, // Variable Blend Packed Single Precision Floating-Point Values
+ STARS_NN_vbroadcastf128, // Broadcast 128 Bits of Floating-Point Data
+ STARS_NN_vbroadcasti128, // Broadcast 128 Bits of Integer Data
+ STARS_NN_vbroadcastsd, // Broadcast Double-Precision Floating-Point Element
+ STARS_NN_vbroadcastss, // Broadcast Single-Precision Floating-Point Element
+ STARS_NN_vcmppd, // Compare Packed Double-Precision Floating-Point Values
+ STARS_NN_vcmpps, // Packed Single-FP Compare
+ STARS_NN_vcmpsd, // Compare Scalar Double-Precision Floating-Point Values
+ STARS_NN_vcmpss, // Scalar Single-FP Compare
+ STARS_NN_vcomisd, // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ STARS_NN_vcomiss, // Scalar Ordered Single-FP Compare and Set EFLAGS
+ STARS_NN_vcvtdq2pd, // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
+ STARS_NN_vcvtdq2ps, // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
+ STARS_NN_vcvtpd2dq, // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ STARS_NN_vcvtpd2ps, // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
+ STARS_NN_vcvtph2ps, // Convert 16-bit FP Values to Single-Precision FP Values
+ STARS_NN_vcvtps2dq, // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ STARS_NN_vcvtps2pd, // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
+ STARS_NN_vcvtps2ph, // Convert Single-Precision FP value to 16-bit FP value
+ STARS_NN_vcvtsd2si, // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ STARS_NN_vcvtsd2ss, // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
+ STARS_NN_vcvtsi2sd, // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
+ STARS_NN_vcvtsi2ss, // Scalar signed INT32 to Single-FP conversion
+ STARS_NN_vcvtss2sd, // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
+ STARS_NN_vcvtss2si, // Scalar Single-FP to signed INT32 conversion
+ STARS_NN_vcvttpd2dq, // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ STARS_NN_vcvttps2dq, // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ STARS_NN_vcvttsd2si, // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ STARS_NN_vcvttss2si, // Scalar Single-FP to signed INT32 conversion (truncate)
+ STARS_NN_vdivpd, // Divide Packed Double-Precision Floating-Point Values
+ STARS_NN_vdivps, // Packed Single-FP Divide
+ STARS_NN_vdivsd, // Divide Scalar Double-Precision Floating-Point Values
+ STARS_NN_vdivss, // Scalar Single-FP Divide
+ STARS_NN_vdppd, // Dot Product of Packed Double Precision Floating-Point Values
+ STARS_NN_vdpps, // Dot Product of Packed Single Precision Floating-Point Values
+ STARS_NN_vextractf128, // Extract Packed Floating-Point Values
+ STARS_NN_vextracti128, // Extract Packed Integer Values
+ STARS_NN_vextractps, // Extract Packed Floating-Point Values
+ STARS_NN_vfmadd132pd, // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
+ STARS_NN_vfmadd132ps, // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
+ STARS_NN_vfmadd132sd, // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
+ STARS_NN_vfmadd132ss, // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
+ STARS_NN_vfmadd213pd, // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
+ STARS_NN_vfmadd213ps, // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
+ STARS_NN_vfmadd213sd, // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
+ STARS_NN_vfmadd213ss, // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
+ STARS_NN_vfmadd231pd, // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
+ STARS_NN_vfmadd231ps, // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
+ STARS_NN_vfmadd231sd, // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
+ STARS_NN_vfmadd231ss, // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
+ STARS_NN_vfmaddsub132pd, // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
+ STARS_NN_vfmaddsub132ps, // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
+ STARS_NN_vfmaddsub213pd, // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
+ STARS_NN_vfmaddsub213ps, // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
+ STARS_NN_vfmaddsub231pd, // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
+ STARS_NN_vfmaddsub231ps, // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
+ STARS_NN_vfmsub132pd, // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ STARS_NN_vfmsub132ps, // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ STARS_NN_vfmsub132sd, // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ STARS_NN_vfmsub132ss, // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ STARS_NN_vfmsub213pd, // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ STARS_NN_vfmsub213ps, // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ STARS_NN_vfmsub213sd, // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ STARS_NN_vfmsub213ss, // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ STARS_NN_vfmsub231pd, // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ STARS_NN_vfmsub231ps, // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ STARS_NN_vfmsub231sd, // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ STARS_NN_vfmsub231ss, // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ STARS_NN_vfmsubadd132pd, // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
+ STARS_NN_vfmsubadd132ps, // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
+ STARS_NN_vfmsubadd213pd, // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
+ STARS_NN_vfmsubadd213ps, // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
+ STARS_NN_vfmsubadd231pd, // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
+ STARS_NN_vfmsubadd231ps, // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
+ STARS_NN_vfnmadd132pd, // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
+ STARS_NN_vfnmadd132ps, // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
+ STARS_NN_vfnmadd132sd, // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
+ STARS_NN_vfnmadd132ss, // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
+ STARS_NN_vfnmadd213pd, // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
+ STARS_NN_vfnmadd213ps, // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
+ STARS_NN_vfnmadd213sd, // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
+ STARS_NN_vfnmadd213ss, // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
+ STARS_NN_vfnmadd231pd, // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
+ STARS_NN_vfnmadd231ps, // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
+ STARS_NN_vfnmadd231sd, // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
+ STARS_NN_vfnmadd231ss, // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
+ STARS_NN_vfnmsub132pd, // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ STARS_NN_vfnmsub132ps, // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ STARS_NN_vfnmsub132sd, // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ STARS_NN_vfnmsub132ss, // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ STARS_NN_vfnmsub213pd, // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ STARS_NN_vfnmsub213ps, // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ STARS_NN_vfnmsub213sd, // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ STARS_NN_vfnmsub213ss, // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ STARS_NN_vfnmsub231pd, // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ STARS_NN_vfnmsub231ps, // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ STARS_NN_vfnmsub231sd, // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ STARS_NN_vfnmsub231ss, // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ STARS_NN_vgatherdps, // Gather Packed SP FP Values Using Signed Dword Indices
+ STARS_NN_vgatherdpd, // Gather Packed DP FP Values Using Signed Dword Indices
+ STARS_NN_vgatherqps, // Gather Packed SP FP Values Using Signed Qword Indices
+ STARS_NN_vgatherqpd, // Gather Packed DP FP Values Using Signed Qword Indices
+ STARS_NN_vhaddpd, // Add horizontally packed DP FP numbers
+ STARS_NN_vhaddps, // Add horizontally packed SP FP numbers
+ STARS_NN_vhsubpd, // Sub horizontally packed DP FP numbers
+ STARS_NN_vhsubps, // Sub horizontally packed SP FP numbers
+ STARS_NN_vinsertf128, // Insert Packed Floating-Point Values
+ STARS_NN_vinserti128, // Insert Packed Integer Values
+ STARS_NN_vinsertps, // Insert Packed Single Precision Floating-Point Value
+ STARS_NN_vlddqu, // Load Unaligned Packed Integer Values
+ STARS_NN_vldmxcsr, // Load Streaming SIMD Extensions Technology Control/Status Register
+ STARS_NN_vmaskmovdqu, // Store Selected Bytes of Double Quadword with NT Hint
+ STARS_NN_vmaskmovpd, // Conditionally Load Packed Double-Precision Floating-Point Values
+ STARS_NN_vmaskmovps, // Conditionally Load Packed Single-Precision Floating-Point Values
+ STARS_NN_vmaxpd, // Return Maximum Packed Double-Precision Floating-Point Values
+ STARS_NN_vmaxps, // Packed Single-FP Maximum
+ STARS_NN_vmaxsd, // Return Maximum Scalar Double-Precision Floating-Point Value
+ STARS_NN_vmaxss, // Scalar Single-FP Maximum
+ STARS_NN_vminpd, // Return Minimum Packed Double-Precision Floating-Point Values
+ STARS_NN_vminps, // Packed Single-FP Minimum
+ STARS_NN_vminsd, // Return Minimum Scalar Double-Precision Floating-Point Value
+ STARS_NN_vminss, // Scalar Single-FP Minimum
+ STARS_NN_vmovapd, // Move Aligned Packed Double-Precision Floating-Point Values
+ STARS_NN_vmovaps, // Move Aligned Four Packed Single-FP
+ STARS_NN_vmovd, // Move 32 bits
+ STARS_NN_vmovddup, // Move One Double-FP and Duplicate
+ STARS_NN_vmovdqa, // Move Aligned Double Quadword
+ STARS_NN_vmovdqu, // Move Unaligned Double Quadword
+ STARS_NN_vmovhlps, // Move High to Low Packed Single-FP
+ STARS_NN_vmovhpd, // Move High Packed Double-Precision Floating-Point Values
+ STARS_NN_vmovhps, // Move High Packed Single-FP
+ STARS_NN_vmovlhps, // Move Low to High Packed Single-FP
+ STARS_NN_vmovlpd, // Move Low Packed Double-Precision Floating-Point Values
+ STARS_NN_vmovlps, // Move Low Packed Single-FP
+ STARS_NN_vmovmskpd, // Extract Packed Double-Precision Floating-Point Sign Mask
+ STARS_NN_vmovmskps, // Move Mask to Register
+ STARS_NN_vmovntdq, // Store Double Quadword Using Non-Temporal Hint
+ STARS_NN_vmovntdqa, // Load Double Quadword Non-Temporal Aligned Hint
+ STARS_NN_vmovntpd, // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
+ STARS_NN_vmovntps, // Move Aligned Four Packed Single-FP Non Temporal
+ STARS_NN_vmovntsd, // Move Non-Temporal Scalar Double-Precision Floating-Point
+ STARS_NN_vmovntss, // Move Non-Temporal Scalar Single-Precision Floating-Point
+ STARS_NN_vmovq, // Move 64 bits
+ STARS_NN_vmovsd, // Move Scalar Double-Precision Floating-Point Values
+ STARS_NN_vmovshdup, // Move Packed Single-FP High and Duplicate
+ STARS_NN_vmovsldup, // Move Packed Single-FP Low and Duplicate
+ STARS_NN_vmovss, // Move Scalar Single-FP
+ STARS_NN_vmovupd, // Move Unaligned Packed Double-Precision Floating-Point Values
+ STARS_NN_vmovups, // Move Unaligned Four Packed Single-FP
+ STARS_NN_vmpsadbw, // Compute Multiple Packed Sums of Absolute Difference
+ STARS_NN_vmulpd, // Multiply Packed Double-Precision Floating-Point Values
+ STARS_NN_vmulps, // Packed Single-FP Multiply
+ STARS_NN_vmulsd, // Multiply Scalar Double-Precision Floating-Point Values
+ STARS_NN_vmulss, // Scalar Single-FP Multiply
+ STARS_NN_vorpd, // Bitwise Logical OR of Double-Precision Floating-Point Values
+ STARS_NN_vorps, // Bitwise Logical OR for Single-FP Data
+ STARS_NN_vpabsb, // Packed Absolute Value Byte
+ STARS_NN_vpabsd, // Packed Absolute Value Doubleword
+ STARS_NN_vpabsw, // Packed Absolute Value Word
+ STARS_NN_vpackssdw, // Pack with Signed Saturation (Dword->Word)
+ STARS_NN_vpacksswb, // Pack with Signed Saturation (Word->Byte)
+ STARS_NN_vpackusdw, // Pack with Unsigned Saturation
+ STARS_NN_vpackuswb, // Pack with Unsigned Saturation (Word->Byte)
+ STARS_NN_vpaddb, // Packed Add Byte
+ STARS_NN_vpaddd, // Packed Add Dword
+ STARS_NN_vpaddq, // Add Packed Quadword Integers
+ STARS_NN_vpaddsb, // Packed Add with Saturation (Byte)
+ STARS_NN_vpaddsw, // Packed Add with Saturation (Word)
+ STARS_NN_vpaddusb, // Packed Add Unsigned with Saturation (Byte)
+ STARS_NN_vpaddusw, // Packed Add Unsigned with Saturation (Word)
+ STARS_NN_vpaddw, // Packed Add Word
+ STARS_NN_vpalignr, // Packed Align Right
+ STARS_NN_vpand, // Bitwise Logical And
+ STARS_NN_vpandn, // Bitwise Logical And Not
+ STARS_NN_vpavgb, // Packed Average (Byte)
+ STARS_NN_vpavgw, // Packed Average (Word)
+ STARS_NN_vpblendd, // Blend Packed Dwords
+ STARS_NN_vpblendvb, // Variable Blend Packed Bytes
+ STARS_NN_vpblendw, // Blend Packed Words
+ STARS_NN_vpbroadcastb, // Broadcast a Byte Integer
+ STARS_NN_vpbroadcastd, // Broadcast a Dword Integer
+ STARS_NN_vpbroadcastq, // Broadcast a Qword Integer
+ STARS_NN_vpbroadcastw, // Broadcast a Word Integer
+ STARS_NN_vpclmulqdq, // Carry-Less Multiplication Quadword
+ STARS_NN_vpcmpeqb, // Packed Compare for Equal (Byte)
+ STARS_NN_vpcmpeqd, // Packed Compare for Equal (Dword)
+ STARS_NN_vpcmpeqq, // Compare Packed Qword Data for Equal
+ STARS_NN_vpcmpeqw, // Packed Compare for Equal (Word)
+ STARS_NN_vpcmpestri, // Packed Compare Explicit Length Strings, Return Index
+ STARS_NN_vpcmpestrm, // Packed Compare Explicit Length Strings, Return Mask
+ STARS_NN_vpcmpgtb, // Packed Compare for Greater Than (Byte)
+ STARS_NN_vpcmpgtd, // Packed Compare for Greater Than (Dword)
+ STARS_NN_vpcmpgtq, // Compare Packed Data for Greater Than
+ STARS_NN_vpcmpgtw, // Packed Compare for Greater Than (Word)
+ STARS_NN_vpcmpistri, // Packed Compare Implicit Length Strings, Return Index
+ STARS_NN_vpcmpistrm, // Packed Compare Implicit Length Strings, Return Mask
+ STARS_NN_vperm2f128, // Permute Floating-Point Values
+ STARS_NN_vperm2i128, // Permute Integer Values
+ STARS_NN_vpermd, // Full Doublewords Element Permutation
+ STARS_NN_vpermilpd, // Permute Double-Precision Floating-Point Values
+ STARS_NN_vpermilps, // Permute Single-Precision Floating-Point Values
+ STARS_NN_vpermpd, // Permute Double-Precision Floating-Point Elements
+ STARS_NN_vpermps, // Permute Single-Precision Floating-Point Elements
+ STARS_NN_vpermq, // Qwords Element Permutation
+ STARS_NN_vpextrb, // Extract Byte
+ STARS_NN_vpextrd, // Extract Dword
+ STARS_NN_vpextrq, // Extract Qword
+ STARS_NN_vpextrw, // Extract Word
+ STARS_NN_vpgatherdd, // Gather Packed Dword Values Using Signed Dword Indices
+ STARS_NN_vpgatherdq, // Gather Packed Qword Values Using Signed Dword Indices
+ STARS_NN_vpgatherqd, // Gather Packed Dword Values Using Signed Qword Indices
+ STARS_NN_vpgatherqq, // Gather Packed Qword Values Using Signed Qword Indices
+ STARS_NN_vphaddd, // Packed Horizontal Add Doubleword
+ STARS_NN_vphaddsw, // Packed Horizontal Add and Saturate
+ STARS_NN_vphaddw, // Packed Horizontal Add Word
+ STARS_NN_vphminposuw, // Packed Horizontal Word Minimum
+ STARS_NN_vphsubd, // Packed Horizontal Subtract Doubleword
+ STARS_NN_vphsubsw, // Packed Horizontal Subtract and Saturate
+ STARS_NN_vphsubw, // Packed Horizontal Subtract Word
+ STARS_NN_vpinsrb, // Insert Byte
+ STARS_NN_vpinsrd, // Insert Dword
+ STARS_NN_vpinsrq, // Insert Qword
+ STARS_NN_vpinsrw, // Insert Word
+ STARS_NN_vpmaddubsw, // Multiply and Add Packed Signed and Unsigned Bytes
+ STARS_NN_vpmaddwd, // Packed Multiply and Add
+ STARS_NN_vpmaskmovd, // Conditionally Store Dword Values Using Mask
+ STARS_NN_vpmaskmovq, // Conditionally Store Qword Values Using Mask
+ STARS_NN_vpmaxsb, // Maximum of Packed Signed Byte Integers
+ STARS_NN_vpmaxsd, // Maximum of Packed Signed Dword Integers
+ STARS_NN_vpmaxsw, // Packed Signed Integer Word Maximum
+ STARS_NN_vpmaxub, // Packed Unsigned Integer Byte Maximum
+ STARS_NN_vpmaxud, // Maximum of Packed Unsigned Dword Integers
+ STARS_NN_vpmaxuw, // Maximum of Packed Word Integers
+ STARS_NN_vpminsb, // Minimum of Packed Signed Byte Integers
+ STARS_NN_vpminsd, // Minimum of Packed Signed Dword Integers
+ STARS_NN_vpminsw, // Packed Signed Integer Word Minimum
+ STARS_NN_vpminub, // Packed Unsigned Integer Byte Minimum
+ STARS_NN_vpminud, // Minimum of Packed Unsigned Dword Integers
+ STARS_NN_vpminuw, // Minimum of Packed Word Integers
+ STARS_NN_vpmovmskb, // Move Byte Mask to Integer
+ STARS_NN_vpmovsxbd, // Packed Move with Sign Extend
+ STARS_NN_vpmovsxbq, // Packed Move with Sign Extend
+ STARS_NN_vpmovsxbw, // Packed Move with Sign Extend
+ STARS_NN_vpmovsxdq, // Packed Move with Sign Extend
+ STARS_NN_vpmovsxwd, // Packed Move with Sign Extend
+ STARS_NN_vpmovsxwq, // Packed Move with Sign Extend
+ STARS_NN_vpmovzxbd, // Packed Move with Zero Extend
+ STARS_NN_vpmovzxbq, // Packed Move with Zero Extend
+ STARS_NN_vpmovzxbw, // Packed Move with Zero Extend
+ STARS_NN_vpmovzxdq, // Packed Move with Zero Extend
+ STARS_NN_vpmovzxwd, // Packed Move with Zero Extend
+ STARS_NN_vpmovzxwq, // Packed Move with Zero Extend
+ STARS_NN_vpmuldq, // Multiply Packed Signed Dword Integers
+ STARS_NN_vpmulhrsw, // Packed Multiply High with Round and Scale
+ STARS_NN_vpmulhuw, // Packed Multiply High Unsigned
+ STARS_NN_vpmulhw, // Packed Multiply High
+ STARS_NN_vpmulld, // Multiply Packed Signed Dword Integers and Store Low Result
+ STARS_NN_vpmullw, // Packed Multiply Low
+ STARS_NN_vpmuludq, // Multiply Packed Unsigned Doubleword Integers
+ STARS_NN_vpor, // Bitwise Logical Or
+ STARS_NN_vpsadbw, // Packed Sum of Absolute Differences
+ STARS_NN_vpshufb, // Packed Shuffle Bytes
+ STARS_NN_vpshufd, // Shuffle Packed Doublewords
+ STARS_NN_vpshufhw, // Shuffle Packed High Words
+ STARS_NN_vpshuflw, // Shuffle Packed Low Words
+ STARS_NN_vpsignb, // Packed SIGN Byte
+ STARS_NN_vpsignd, // Packed SIGN Doubleword
+ STARS_NN_vpsignw, // Packed SIGN Word
+ STARS_NN_vpslld, // Packed Shift Left Logical (Dword)
+ STARS_NN_vpslldq, // Shift Double Quadword Left Logical
+ STARS_NN_vpsllq, // Packed Shift Left Logical (Qword)
+ STARS_NN_vpsllvd, // Variable Bit Shift Left Logical (Dword)
+ STARS_NN_vpsllvq, // Variable Bit Shift Left Logical (Qword)
+ STARS_NN_vpsllw, // Packed Shift Left Logical (Word)
+ STARS_NN_vpsrad, // Packed Shift Right Arithmetic (Dword)
+ STARS_NN_vpsravd, // Variable Bit Shift Right Arithmetic
+ STARS_NN_vpsraw, // Packed Shift Right Arithmetic (Word)
+ STARS_NN_vpsrld, // Packed Shift Right Logical (Dword)
+ STARS_NN_vpsrldq, // Shift Double Quadword Right Logical (Qword)
+ STARS_NN_vpsrlq, // Packed Shift Right Logical (Qword)
+ STARS_NN_vpsrlvd, // Variable Bit Shift Right Logical (Dword)
+ STARS_NN_vpsrlvq, // Variable Bit Shift Right Logical (Qword)
+ STARS_NN_vpsrlw, // Packed Shift Right Logical (Word)
+ STARS_NN_vpsubb, // Packed Subtract Byte
+ STARS_NN_vpsubd, // Packed Subtract Dword
+ STARS_NN_vpsubq, // Subtract Packed Quadword Integers
+ STARS_NN_vpsubsb, // Packed Subtract with Saturation (Byte)
+ STARS_NN_vpsubsw, // Packed Subtract with Saturation (Word)
+ STARS_NN_vpsubusb, // Packed Subtract Unsigned with Saturation (Byte)
+ STARS_NN_vpsubusw, // Packed Subtract Unsigned with Saturation (Word)
+ STARS_NN_vpsubw, // Packed Subtract Word
+ STARS_NN_vptest, // Logical Compare
+ STARS_NN_vpunpckhbw, // Unpack High Packed Data (Byte->Word)
+ STARS_NN_vpunpckhdq, // Unpack High Packed Data (Dword->Qword)
+ STARS_NN_vpunpckhqdq, // Unpack High Packed Data (Qword->Xmmword)
+ STARS_NN_vpunpckhwd, // Unpack High Packed Data (Word->Dword)
+ STARS_NN_vpunpcklbw, // Unpack Low Packed Data (Byte->Word)
+ STARS_NN_vpunpckldq, // Unpack Low Packed Data (Dword->Qword)
+ STARS_NN_vpunpcklqdq, // Unpack Low Packed Data (Qword->Xmmword)
+ STARS_NN_vpunpcklwd, // Unpack Low Packed Data (Word->Dword)
+ STARS_NN_vpxor, // Bitwise Logical Exclusive Or
+ STARS_NN_vrcpps, // Packed Single-FP Reciprocal
+ STARS_NN_vrcpss, // Scalar Single-FP Reciprocal
+ STARS_NN_vroundpd, // Round Packed Double Precision Floating-Point Values
+ STARS_NN_vroundps, // Round Packed Single Precision Floating-Point Values
+ STARS_NN_vroundsd, // Round Scalar Double Precision Floating-Point Values
+ STARS_NN_vroundss, // Round Scalar Single Precision Floating-Point Values
+ STARS_NN_vrsqrtps, // Packed Single-FP Square Root Reciprocal
+ STARS_NN_vrsqrtss, // Scalar Single-FP Square Root Reciprocal
+ STARS_NN_vshufpd, // Shuffle Packed Double-Precision Floating-Point Values
+ STARS_NN_vshufps, // Shuffle Single-FP
+ STARS_NN_vsqrtpd, // Compute Square Roots of Packed Double-Precision Floating-Point Values
+ STARS_NN_vsqrtps, // Packed Single-FP Square Root
+ STARS_NN_vsqrtsd, // Compute Square Rootof Scalar Double-Precision Floating-Point Value
+ STARS_NN_vsqrtss, // Scalar Single-FP Square Root
+ STARS_NN_vstmxcsr, // Store Streaming SIMD Extensions Technology Control/Status Register
+ STARS_NN_vsubpd, // Subtract Packed Double-Precision Floating-Point Values
+ STARS_NN_vsubps, // Packed Single-FP Subtract
+ STARS_NN_vsubsd, // Subtract Scalar Double-Precision Floating-Point Values
+ STARS_NN_vsubss, // Scalar Single-FP Subtract
+ STARS_NN_vtestpd, // Packed Double-Precision Floating-Point Bit Test
+ STARS_NN_vtestps, // Packed Single-Precision Floating-Point Bit Test
+ STARS_NN_vucomisd, // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ STARS_NN_vucomiss, // Scalar Unordered Single-FP Compare and Set EFLAGS
+ STARS_NN_vunpckhpd, // Unpack and Interleave High Packed Double-Precision Floating-Point Values
+ STARS_NN_vunpckhps, // Unpack High Packed Single-FP Data
+ STARS_NN_vunpcklpd, // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
+ STARS_NN_vunpcklps, // Unpack Low Packed Single-FP Data
+ STARS_NN_vxorpd, // Bitwise Logical OR of Double-Precision Floating-Point Values
+ STARS_NN_vxorps, // Bitwise Logical XOR for Single-FP Data
+ STARS_NN_vzeroall, // Zero All YMM Registers
+ STARS_NN_vzeroupper, // Zero Upper Bits of YMM Registers
+
+ // Transactional Synchronization Extensions
+
+ STARS_NN_xabort, // Transaction Abort
+ STARS_NN_xbegin, // Transaction Begin
+ STARS_NN_xend, // Transaction End
+ STARS_NN_xtest, // Test If In Transactional Execution
+
+ // Virtual PC synthetic instructions
+
+ STARS_NN_vmgetinfo, // Virtual PC - Get VM Information
+ STARS_NN_vmsetinfo, // Virtual PC - Set VM Information
+ STARS_NN_vmdxdsbl, // Virtual PC - Disable Direct Execution
+ STARS_NN_vmdxenbl, // Virtual PC - Enable Direct Execution
+ STARS_NN_vmcpuid, // Virtual PC - Virtualized CPU Information
+ STARS_NN_vmhlt, // Virtual PC - Halt
+ STARS_NN_vmsplaf, // Virtual PC - Spin Lock Acquisition Failed
+ STARS_NN_vmpushfd, // Virtual PC - Push virtualized flags register
+ STARS_NN_vmpopfd, // Virtual PC - Pop virtualized flags register
+ STARS_NN_vmcli, // Virtual PC - Clear Interrupt Flag
+ STARS_NN_vmsti, // Virtual PC - Set Interrupt Flag
+ STARS_NN_vmiretd, // Virtual PC - Return From Interrupt
+ STARS_NN_vmsgdt, // Virtual PC - Store Global Descriptor Table
+ STARS_NN_vmsidt, // Virtual PC - Store Interrupt Descriptor Table
+ STARS_NN_vmsldt, // Virtual PC - Store Local Descriptor Table
+ STARS_NN_vmstr, // Virtual PC - Store Task Register
+ STARS_NN_vmsdte, // Virtual PC - Store to Descriptor Table Entry
+ STARS_NN_vpcext, // Virtual PC - ISA extension
+
+ STARS_NN_last,
+
+};
+
#endif
diff --git a/include/interfaces/abstract/STARSInterface.h b/include/interfaces/abstract/STARSInterface.h
index bad5528d..ceaece33 100644
--- a/include/interfaces/abstract/STARSInterface.h
+++ b/include/interfaces/abstract/STARSInterface.h
@@ -4,6 +4,7 @@
#include "interfaces/STARSTypes.h"
#include <interfaces/abstract/STARSSegment.h>
#include <interfaces/abstract/STARSFunction.h>
+#include <interfaces/abstract/STARSProgram.h>
class STARS_Interface_t
{
@@ -14,44 +15,45 @@ class STARS_Interface_t
*/
/* return segment for virtual addr */
- virtual STARS_Segment_t *getseg(const STARS_ea_t &addr) =0;
+ virtual STARS_Segment_t *getseg(const STARS_ea_t &addr) = 0;
/* Return segment at index "index" */
- virtual STARS_Segment_t *getnseg(const int &index) =0;
+ virtual STARS_Segment_t *getnseg(const int &index) = 0;
/* return number of segments */
- virtual size_t get_segm_qty() =0;
+ virtual std::size_t get_segm_qty() = 0;
- virtual STARS_Segment_t *get_next_seg(const STARS_ea_t &addr) =0;
+ virtual STARS_Segment_t *get_next_seg(const STARS_ea_t &addr) = 0;
/*
* Function methods
*/
/* find out how many functions there is */
- virtual size_t get_func_qty()=0;
+ virtual std::size_t get_func_qty() = 0;
/* get the index-th function */
- virtual STARS_Function_t *getn_func(int index) =0;
+ virtual STARS_Function_t *getn_func(int index) = 0;
/* get the function at the given address */
- virtual STARS_Function_t *get_func(STARS_ea_t index) =0;
+ virtual STARS_Function_t *get_func(STARS_ea_t index) = 0;
/* get the function's paternal grandmother's maiden name. */
- virtual void get_func_name(const STARS_ea_t &ea, char* name, const size_t &len) =0;
+ virtual void get_func_name(const STARS_ea_t &ea, char* name, const std::size_t &len) = 0;
/*
* Misc. Funcs.
*/
- /* ida-only auditing */
- virtual void AuditTailChunkOwnership(void) =0;
- virtual void AuditCodeTargets(void)=0;
+ /* IDA-only auditing */
+ virtual void AuditTailChunkOwnership(void) = 0;
+ virtual void AuditCodeTargets(void) = 0;
};
extern STARS_Interface_t* global_stars_interface;
+extern STARS_Program_t *global_STARS_program;
#endif
diff --git a/include/interfaces/abstract/STARSOp.h b/include/interfaces/abstract/STARSOp.h
index d32a03fb..af98c36e 100644
--- a/include/interfaces/abstract/STARSOp.h
+++ b/include/interfaces/abstract/STARSOp.h
@@ -16,18 +16,6 @@ class STARS_op_t
// Clone method (deep copy).
virtual STARSOpndTypePtr clone(void) const = 0;
- // Clone operands that will be changed (e.g. normalized) later. Subword regs will be normalized to full-word regs
- // in DEF and USE and dataflow analysis sets, and stack accesses will be normalized in these same sets to be relative
- // to the incoming stack pointer value. These normalizations are needed for proper SSA form, e.g. we need to know that
- // changes to a subword reg also change the full-word reg, and [stack_ptr+0] and [stack_ptr+8] could be the same stack
- // location in a procedure if stack_ptr changes value. The deep-copied clone can be changed without affecting the
- // original operand. If we are only canonicalizing subword regs to prepare for a USE or DEF search, we use
- // CloneIfSubwordReg(). If we are placing operands in dataflow sets and would also later need to normalize stack accesses
- // in addition to normalizing subword regs, we call CloneIfNecessary().
-#if 0
- virtual STARSOpndTypePtr CloneIfSubwordReg(void) const = 0;
- virtual STARSOpndTypePtr CloneIfNecessary(bool UseFP) const = 0;
-#endif
// Operators
virtual bool operator<(const STARS_op_t &rOp) const = 0; // Less-than operator for use in STL ordered containers, e.g. sets.
@@ -48,7 +36,7 @@ class STARS_op_t
// Set methods
virtual void SetByteWidth(uint16_t ByteWidth) = 0; // Change default byte width of opnd
virtual void DoubleRegWidth(void) = 0; // Double the width of opnd if it is a subword register
- virtual void SetOpGlobalIndex(size_t index) = 0; // Set STARS SSA name index.
+ virtual void SetOpGlobalIndex(std::size_t index) = 0; // Set STARS SSA name index.
virtual void SetReg(uint16_t NewReg) = 0;
virtual void SetAddr(STARS_ea_t NewAddr) = 0;
virtual void SetSIB(char value) = 0;
@@ -66,6 +54,7 @@ class STARS_op_t
virtual bool IsStaticMemOp(void) const = 0;
virtual bool IsMemNoDisplacementOp(void) const = 0;
virtual bool IsMemOp(void) const = 0; // any of the previous three types
+ virtual bool HasSIBByte(void) const = 0;
virtual bool IsFloatingPointRegOp(void) const = 0;
virtual bool IsMMXRegOp(void) const = 0;
virtual bool IsXMMRegOp(void) const = 0;
@@ -73,7 +62,8 @@ class STARS_op_t
virtual bool IsTestRegOp(void) const = 0;
virtual bool IsDebugRegOp(void) const = 0;
virtual bool IsControlRegOp(void) const = 0;
- virtual bool HasSIBByte(void) const = 0;
+ virtual bool MDIsKnownOpType(void) const = 0;
+ virtual bool MDIsSpecialRegOpType(void) const = 0; // special debug reg, control or task reg, MMX/XMM/YMM registers
virtual bool MatchesReg(uint16_t RegNum) const = 0;
virtual bool IsNearPointer(void) const = 0;
virtual bool IsFarPointer(void) const = 0;
diff --git a/include/interfaces/abstract/STARSProgram.h b/include/interfaces/abstract/STARSProgram.h
new file mode 100644
index 00000000..9ebcc244
--- /dev/null
+++ b/include/interfaces/abstract/STARSProgram.h
@@ -0,0 +1,185 @@
+#ifndef STARSProgram_h
+#define STARSProgram_h
+
+#include <list>
+#include <map>
+#include <set>
+#include <string>
+
+#include <cstdint>
+#include <cstdio>
+
+#include "interfaces/STARSTypes.h"
+#include "interfaces/SMPDBInterface.h"
+
+// Optimizing annotation categories
+#define LAST_OPT_CATEGORY 10
+
+class STARS_Program_t
+{
+ public:
+ // Data initialization
+ virtual void InitData(void);
+ virtual void DetermineRootFileName(void) = 0;
+ virtual bool OpenFiles(void);
+ virtual void CloseFiles(void);
+ void ZST_InitPolicies(void);
+
+ // Get (accessor) methods
+ std::size_t GetSTARS_ISA_Bitwidth(void) const { return STARS_ISA_Bitwidth; };
+ std::size_t GetSTARS_ISA_Bytewidth(void) const { return STARS_ISA_Bytewidth; };
+ virtual char GetSTARS_ISA_dtyp(void) const = 0;
+ virtual int GetSTARS_MD_LAST_SAVED_REG_NUM(void) const = 0;
+ int GetOptCategory(uint16_t IDAOpcodeEnum) const { return OptCategory[IDAOpcodeEnum]; };
+ STARS_sval_t GetStackAlteration(uint16_t IDAOpcodeEnum) const { return StackAlteration[IDAOpcodeEnum]; };
+ int GetOptCount(std::size_t CategoryIndex) const { return OptCount[CategoryIndex]; };
+ int GetAnnotationCount(std::size_t CategoryIndex) const { return AnnotationCount[CategoryIndex]; };
+ unsigned long GetDataReferentID(void) const { return DataReferentID; }; // Unique ID for data annotations
+ std::string GetRootFileName(void) const { return RootFileName; }; // e.g. "foo" when analyzing file "foo.exe"
+ FILE *GetAlarmFile(void) const { return ZST_AlarmFile; };
+ FILE *GetXrefsFile(void) const { return STARS_XrefsFile; };
+ FILE *GetCallReturnFile(void) const { return STARS_CallReturnFile; };
+ FILE *GetSPARKHeaderFile(void) const { return ZST_SPARKHeaderFile; };
+ FILE *GetSPARKSourceFile(void) const { return ZST_SPARKSourceFile; };
+ std::list<uint16_t>::iterator GetFirstCallerSavedReg(void) { return STARS_MDCallerSavedRegs.begin(); };
+ std::list<uint16_t>::iterator GetLastCallerSavedReg(void) { return STARS_MDCallerSavedRegs.end(); };
+ std::list<uint16_t>::iterator GetFirstArgumentReg(void) { return STARS_MDArgumentRegs.begin(); };
+ std::list<uint16_t>::iterator GetLastArgumentReg(void) { return STARS_MDArgumentRegs.end(); };
+ ZST_SysCallType GetCallTypeFromFuncName(std::string SysCallName) const;
+ ZST_Policy GetPolicyFromCallType(ZST_SysCallType CallType) const;
+ SMP_bounds_t GetFuncBounds(std::size_t FuncIndex) const { return FuncBounds.at(FuncIndex); };
+ std::size_t GetFuncBoundsSize(void) const { return FuncBounds.size(); };
+
+ // Set (mutator) methods
+ virtual void Set32BitBinary(void) = 0; // Set internal state to handle a 32-bit binary
+ virtual void Set64BitBinary(void) = 0; // Set internal state to handle a 64-bit binary
+ void IncrementOptCount(std::size_t OptCategory) { ++OptCount[OptCategory]; }; // increment optimizing annotation count
+ void IncrementAnnotationCount(std::size_t OptCategory) { ++AnnotationCount[OptCategory]; }; // increment total annotation count
+ void IncrementDataReferentID(void) { ++DataReferentID; }; // increment unique data annotations referent ID
+
+ // Query methods
+ bool ShouldSTARSPerformReducedAnalysis(void) const { return STARS_PerformReducedAnalysis; }; // Is program too big for full analysis?
+ bool IsLocationWhitelisted(ZST_SysCallType CallType, std::string LocationName) const;
+ bool IsLocationBlacklisted(ZST_SysCallType CallType, std::string LocationName) const;
+ // Given a called function name, does it produce only benign numeric errors when
+ // its returned values are used in arithmetic? (i.e. it is a trusted input)
+ bool IsNumericSafeSystemCall(std::string CallName) const;
+
+ // Printing methods
+
+ // Utility functions to print code xrefs to STARS_XrefsFile
+ void PrintCodeToCodeXref(STARS_ea_t FromAddr, STARS_ea_t ToAddr, std::size_t InstrSize);
+ void PrintDataToCodeXref(STARS_ea_t FromDataAddr, STARS_ea_t ToCodeAddr, std::size_t InstrSize);
+
+ // Analysis methods
+ virtual void ReportTotalCodeSize(unsigned long long TotalCodeSize) = 0; // Set flags, take actions based on code size.
+
+ protected:
+ // We maintain a list of the caller-saved regs for the current binary's ABI.
+ // This differs from 32-bit to 64-bit x86 binaries, as well as across other ISAs.
+ std::list<uint16_t> STARS_MDCallerSavedRegs;
+
+ // We maintain a list of the argument-passing regs for the current binary's ABI.
+ // This differs from 32-bit to 64-bit x86 binaries, as well as across other ISAs.
+ // The list is in order of argument position number. For x86-64, this means EDI,
+ // ESI, EDX, ECX, R8, R9.
+ std::list<uint16_t> STARS_MDArgumentRegs;
+
+ // Function address bounds for each func, by IDA Pro index.
+ std::vector<SMP_bounds_t> FuncBounds;
+
+ // Mutators
+ void SetBitwidth32(void) { STARS_ISA_Bytewidth = 4; STARS_ISA_Bitwidth = 32; };
+ void SetBitwidth64(void) { STARS_ISA_Bytewidth = 8; STARS_ISA_Bitwidth = 64; };
+ void SetTotalCodeSize(unsigned long long TotalSize) { STARS_TotalCodeSize = TotalSize; };
+ void SetReducedProcessingFlag(bool FlagValue) { STARS_PerformReducedAnalysis = FlagValue; };
+ void SetRootFileName(std::string NewName) { RootFileName = NewName; };
+
+ // Analysis methods
+
+ // Convert a call type string from the policy file, such as "FILECALLS", to the
+ // corresponding ZST_SysCallType, such as ZST_FILE_CALL.
+ ZST_SysCallType ConvertStringToCallType(char *Str2);
+ // Convert a policy string from the policy file, such as "DISALLOW", to
+ // the corresponding ZST_Policy value, such as ZST_DISALLOW.
+ ZST_Policy ConvertStringToPolicy(char *Str3);
+
+ private:
+ // Data members.
+ std::size_t STARS_ISA_Bitwidth;
+ std::size_t STARS_ISA_Bytewidth;
+
+ // Unique data referent number to use in data annotations.
+ unsigned long DataReferentID;
+
+ bool STARS_PerformReducedAnalysis; // true means program is too big for full analysis
+
+ // Total code size for the program in bytes.
+ unsigned long long STARS_TotalCodeSize;
+
+ // Filename (not including path) of executable being analyzed.
+ std::string RootFileName;
+
+ // File to print security alert messages to, e.g. foo.exe.alarms.
+ FILE *ZST_AlarmFile;
+
+ // File for code xref targets (helps ILR, makes IRDB more complete)
+ FILE *STARS_XrefsFile;
+
+ // File to provide details on fast returns, safe and unsafe return-address functions, etc.
+ FILE *STARS_CallReturnFile;
+
+ // Files for SPARK Ada translation of program RTLs
+ FILE *ZST_SPARKSourceFile;
+ FILE *ZST_SPARKHeaderFile;
+
+ // Keep statistics on how many instructions we saw in each optimization
+ // category, and how many optimizing annotations were emitted for
+ // each category.
+ int AnnotationCount[LAST_OPT_CATEGORY + 1];
+ int OptCount[LAST_OPT_CATEGORY + 1];
+
+ // Define optimization categories for instructions.
+ int OptCategory[STARS_NN_last + 1];
+
+ // Record which opcodes change the stack pointer, and by how many
+ // bytes up (reduction in stack size for stacks that grow downward)
+ // or down (increase in stack size for stacks that grow downward).
+ STARS_sval_t StackAlteration[STARS_NN_last + 1];
+
+ // Map library function names to their system call type.
+ std::map<std::string, ZST_SysCallType> ZST_FuncTypeMap;
+
+ // Map system call types to their Zephyr Security Toolkit security policy.
+ std::map<ZST_SysCallType, ZST_Policy> ZST_TypePolicyMap;
+
+ // Set of whitelisted file locations.
+ std::set<std::string> ZST_FileLocWhitelist;
+
+ // Set of whitelisted network locations.
+ std::set<std::string> ZST_NetworkLocWhitelist;
+
+ // Set of blacklisted file locations.
+ std::set<std::string> ZST_FileLocBlacklist;
+
+ // Set of blacklisted network locations.
+ std::set<std::string> ZST_NetworkLocBlacklist;
+
+ // Set of system call names whose returned values should be trusted to have only benign numeric errors.
+ std::set<std::string> ZST_SystemCallNumericWhitelist;
+
+ // Methods
+
+ // Initialize the OptCategory[] array.
+ void InitOptCategory(void);
+ // Initialize the StackAlteration[] array.
+ void InitStackAlteration(void);
+ void InitLibFuncFGInfoMaps(void);
+ void InitDFACategory(void);
+ void InitSMPDefsFlags(void);
+ void InitSMPUsesFlags(void);
+ void InitTypeCategory(void);
+
+};
+
+#endif
diff --git a/include/interfaces/abstract/all.h b/include/interfaces/abstract/all.h
index 92b69437..b3765e40 100644
--- a/include/interfaces/abstract/all.h
+++ b/include/interfaces/abstract/all.h
@@ -1,8 +1,10 @@
-#include <stdint.h>
+#include <cstdint>
+
#include <interfaces/abstract/STARSInterface.h>
#include <interfaces/abstract/STARSSegment.h>
+#include <interfaces/abstract/STARSProgram.h>
#include <interfaces/abstract/STARSFunction.h>
#include <interfaces/abstract/STARSInstructionID.h>
#include <interfaces/abstract/STARSInstruction.h>
diff --git a/include/interfaces/idapro/STARSInstruction.h b/include/interfaces/idapro/STARSInstruction.h
index 1b4cf871..59464e9b 100644
--- a/include/interfaces/idapro/STARSInstruction.h
+++ b/include/interfaces/idapro/STARSInstruction.h
@@ -144,6 +144,8 @@ class STARS_IDA_Instruction_t : public STARS_Instruction_t
struct STARS_IDA_insn_t STARScmd;
uint32_t STARSfeatures;
+ private:
+ void InitOperand(op_t &InitOp) const;
};
#endif
diff --git a/include/interfaces/idapro/STARSOp.h b/include/interfaces/idapro/STARSOp.h
index 161dfe05..f9732ad7 100644
--- a/include/interfaces/idapro/STARSOp.h
+++ b/include/interfaces/idapro/STARSOp.h
@@ -19,10 +19,7 @@ class STARS_IDA_op_t : public STARS_op_t
// Clone method (deep copy).
STARSOpndTypePtr clone(void) const;
-#if 0
- STARSOpndTypePtr CloneIfSubwordReg(void) const; // Clone only if subword register.
- STARSOpndTypePtr CloneIfNecessary(bool UseFP) const; // Clone operands that will be changed (e.g. normalized) later
-#endif
+
// Operators
bool operator<(const STARS_op_t &rOp) const; // Less-than operator for use in STL ordered containers, e.g. sets.
@@ -42,7 +39,7 @@ class STARS_IDA_op_t : public STARS_op_t
// Set methods
void SetByteWidth(uint16_t ByteWidth); // Change default byte width of opnd
void DoubleRegWidth(void); // Double the width of opnd if it is a subword register
- void SetOpGlobalIndex(size_t index); // Set STARS SSA name index.
+ void SetOpGlobalIndex(std::size_t index); // Set STARS SSA name index.
void SetReg(uint16_t NewReg); // Change the register field of the operand.
void SetAddr(STARS_ea_t NewAddr) { m_Opnd.addr = NewAddr; };
void SetSIB(char value) { m_Opnd.sib = value; };
@@ -72,6 +69,8 @@ class STARS_IDA_op_t : public STARS_op_t
bool IsTestRegOp(void) const { return (m_Opnd.type == o_trreg); };
bool IsDebugRegOp(void) const { return (m_Opnd.type == o_dbreg); };
bool IsControlRegOp(void) const { return (m_Opnd.type == o_crreg); };
+ bool MDIsKnownOpType(void) const { return ((m_Opnd.type >= o_reg) && (m_Opnd.type <= o_ymmreg)); };
+ bool MDIsSpecialRegOpType(void) const { return ((m_Opnd.type >= o_trreg) && (m_Opnd.type <= o_ymmreg)); };
bool HasSegReg(void) const { return is_segreg(GetSegReg()); }; // Has a segment register
protected:
diff --git a/include/interfaces/idapro/STARSProgram.h b/include/interfaces/idapro/STARSProgram.h
new file mode 100644
index 00000000..b8174b6e
--- /dev/null
+++ b/include/interfaces/idapro/STARSProgram.h
@@ -0,0 +1,48 @@
+#ifndef STARSIDAProgram_h
+#define STARSIDAProgram_h
+
+// #include <map>
+// #include <set>
+// #include <string>
+
+// #include <cstdint>
+// #include <cstdio>
+
+// #include <intel.hpp> // indirectly includes the unguarded allins.hpp header
+
+// #include "interfaces/STARSTypes.h"
+#include "interfaces/abstract/STARSProgram.h"
+
+class STARS_IDA_Program_t : public STARS_Program_t {
+public:
+ // Data initialization
+ virtual void InitData(void);
+ void DetermineRootFileName(void);
+ bool OpenFiles(void);
+ void CloseFiles(void);
+
+ // Get (accessor) methods
+ char GetSTARS_ISA_dtyp(void) const { return STARS_ISA_dtyp; };
+ int GetSTARS_MD_LAST_SAVED_REG_NUM(void) const { return STARS_MD_LAST_SAVED_REG_NUM; };
+
+ // Set (mutator) methods
+ void Set32BitBinary(void); // Set internal state to handle a 32-bit binary
+ void Set64BitBinary(void); // Set internal state to handle a 64-bit binary
+
+ // Query methods
+
+ // Analysis methods
+ void ReportTotalCodeSize(unsigned long long TotalCodeSize);
+
+private:
+ // Data
+
+ char STARS_ISA_dtyp;
+ int STARS_MD_LAST_SAVED_REG_NUM;
+
+ // Methods
+ void MDInitializeCallerSavedRegs(void);
+ void MDInitializeArgumentRegs(void);
+};
+
+#endif
diff --git a/include/interfaces/idapro/all.h b/include/interfaces/idapro/all.h
index 1ff16a1e..64baaee4 100644
--- a/include/interfaces/idapro/all.h
+++ b/include/interfaces/idapro/all.h
@@ -18,6 +18,7 @@
#include <interfaces/abstract/all.h>
#include <interfaces/idapro/STARSSegment.h>
+#include <interfaces/idapro/STARSProgram.h>
#include <interfaces/idapro/STARSFunction.h>
#include <interfaces/idapro/STARSInterface.h>
#include <interfaces/idapro/STARSInstruction.h>
diff --git a/src/base/ProfilerInformation.cpp b/src/base/ProfilerInformation.cpp
index a8cf5357..6fab15bd 100644
--- a/src/base/ProfilerInformation.cpp
+++ b/src/base/ProfilerInformation.cpp
@@ -286,12 +286,12 @@ ProfilerInformation::~ProfilerInformation() {
SMP_fprintf(fout, "%s", (*iter).c_str());
}
- for (std::map<ea_t,InstructionInformation*>::iterator iter = the_map.begin();
+ for (std::map<STARS_ea_t,InstructionInformation*>::iterator iter = the_map.begin();
iter != the_map.end();
++iter
)
{
- ea_t addr=(*iter).first;
+ STARS_ea_t addr=(*iter).first;
InstructionInformation *ii=(*iter).second;
if (ii)
{
@@ -315,18 +315,18 @@ ProfilerInformation::~ProfilerInformation() {
}
}
- for (std::map<ea_t, set<ea_t> >::iterator iter = indirect_call_map.begin();
+ for (std::map<STARS_ea_t, set<STARS_ea_t> >::iterator iter = indirect_call_map.begin();
iter != indirect_call_map.end();
++iter
)
{
- for (std::set<ea_t>::iterator iter2 = (*iter).second.begin();
+ for (std::set<STARS_ea_t>::iterator iter2 = (*iter).second.begin();
iter2 != (*iter).second.end();
++iter2
)
{
- ea_t source=iter->first;
- ea_t target=*iter2;
+ STARS_ea_t source=iter->first;
+ STARS_ea_t target=*iter2;
SMP_fprintf(fout, "%lx 0 INSTR INDIRECTCALL %lu Profiler generated, idal summarized\n", (unsigned long) source, (unsigned long) target);
}
}
@@ -335,7 +335,7 @@ ProfilerInformation::~ProfilerInformation() {
this->constant_info.clear();
}
-void ProfilerInformation::addProfileInformation(ea_t addr, long long nc, long long pc, long long oc) {
+void ProfilerInformation::addProfileInformation(STARS_ea_t addr, long long nc, long long pc, long long oc) {
InstructionInformation *ii = GetInfo(addr);
if (!ii) {
@@ -360,13 +360,13 @@ void ProfilerInformation::addProfileInformation(ea_t addr, long long nc, long lo
void ProfilerInformation::profileAddressingInformation
(
- ea_t addr,
+ STARS_ea_t addr,
int size,
char *type,
char *scope,
- ea_t the_const,
+ STARS_ea_t the_const,
char* field,
- ea_t real_const
+ STARS_ea_t real_const
)
{
char buffer[1000];
@@ -380,7 +380,7 @@ void ProfilerInformation::profileAddressingInformation
// ******************************************************
// Constructor.
-SMPMemoryAccesses::SMPMemoryAccesses(ea_t addr) {
+SMPMemoryAccesses::SMPMemoryAccesses(STARS_ea_t addr) {
address = addr;
ByteLimit = 0;
region = SMP_NO_REGION;
@@ -449,7 +449,7 @@ MemoryAccessInfo::~MemoryAccessInfo() {
void MemoryAccessInfo::Dump(void) {
SMP_msg("Debug dump of MemoryAccessInfo:\n");
- set<ea_t>::iterator MultiIter;
+ set<STARS_ea_t>::iterator MultiIter;
SMP_msg("\nMultiAccess set: ");
int count = 0;
for (MultiIter = this->MultipleAccessTypeSet.begin();
@@ -463,7 +463,7 @@ void MemoryAccessInfo::Dump(void) {
}
SMP_msg("\n");
- map<ea_t, size_t>::iterator InstType;
+ map<STARS_ea_t, size_t>::iterator InstType;
SMP_msg("\nInst to Type map: ");
count = 0;
for (InstType = this->InstrTypeMap.begin(); InstType != this->InstrTypeMap.end(); ++InstType) {
@@ -474,7 +474,7 @@ void MemoryAccessInfo::Dump(void) {
}
SMP_msg("\n");
- map<ea_t, size_t>::iterator ObjType;
+ map<STARS_ea_t, size_t>::iterator ObjType;
SMP_msg("\nObject to Type map: ");
count = 0;
for (ObjType = this->ObjectTypeMap.begin(); ObjType != this->ObjectTypeMap.end(); ++ObjType) {
@@ -524,8 +524,8 @@ void MemoryAccessInfo::ProcessMemoryAccessAnnotation(FILE *fin, int addr) {
// Extract the remaining fields of the annotation.
char NameAddrsSize[MAXSTR];
char ObjectName[MAXSTR];
- ea_t AllocationAddress; // == 0 for static; code address otherwise
- ea_t InstructionAddress; // redundant; == addr
+ STARS_ea_t AllocationAddress; // == 0 for static; code address otherwise
+ STARS_ea_t InstructionAddress; // redundant; == addr
size_t ObjectSize; // in bytes
int ProcessID; // of Profiler process that gathered data
size_t RedundantObjectSize; // == ObjectSize
@@ -546,9 +546,9 @@ void MemoryAccessInfo::ProcessMemoryAccessAnnotation(FILE *fin, int addr) {
char *NamePtr = strtok(NameAddrsSize, ":");
SMP_strncpy(ObjectName, NamePtr, MAXSTR-1);
char *TempStr = strtok(NULL, ":");
- AllocationAddress = (ea_t) strtol(TempStr, &EndPtr, 16);
+ AllocationAddress = (STARS_ea_t) strtol(TempStr, &EndPtr, 16);
TempStr = strtok(NULL, ":");
- InstructionAddress = (ea_t) strtol(TempStr, &EndPtr, 16);
+ InstructionAddress = (STARS_ea_t) strtol(TempStr, &EndPtr, 16);
TempStr = strtok(NULL, " ");
signed long SignedObjectSize = strtol(TempStr, &EndPtr, 10);
assert(addr == ((int) InstructionAddress));
@@ -591,7 +591,7 @@ void MemoryAccessInfo::ProcessMemoryAccessAnnotation(FILE *fin, int addr) {
}
else if (0 == AllocationAddress) {
// static global data is not allocated at an instruction
- map<string, ea_t>::iterator NameMapIter;
+ map<string, STARS_ea_t>::iterator NameMapIter;
NameMapIter = this->MyProg->FindGlobalName(ObjectString);
if (NameMapIter == this->MyProg->GetLastGlobalName()) {
SMP_msg("WARNING: Cannot find global name %s ; discarding memory access annotation.\n",
@@ -606,13 +606,13 @@ void MemoryAccessInfo::ProcessMemoryAccessAnnotation(FILE *fin, int addr) {
}
// Add to ObjectInstrMap.
- map<ea_t, set<ea_t> >::iterator ObjInstIter;
+ map<STARS_ea_t, set<STARS_ea_t> >::iterator ObjInstIter;
ObjInstIter = this->ObjectInstrMap.find(AllocationAddress);
if (ObjInstIter == this->ObjectInstrMap.end()) {
// Not already in map; create map entry.
- pair<map<ea_t, set<ea_t> >::iterator, bool> ObjPairIB;
- set<ea_t> EmptyInstrs;
- pair<ea_t, set<ea_t> > TempObjPair(AllocationAddress, EmptyInstrs);
+ pair<map<STARS_ea_t, set<STARS_ea_t> >::iterator, bool> ObjPairIB;
+ set<STARS_ea_t> EmptyInstrs;
+ pair<STARS_ea_t, set<STARS_ea_t> > TempObjPair(AllocationAddress, EmptyInstrs);
ObjPairIB = this->ObjectInstrMap.insert(TempObjPair);
assert(true == ObjPairIB.second);
ObjInstIter = ObjPairIB.first;
@@ -620,13 +620,13 @@ void MemoryAccessInfo::ProcessMemoryAccessAnnotation(FILE *fin, int addr) {
ObjInstIter->second.insert(InstructionAddress);
// Add to InstrObjectMap.
- map<ea_t, set<ea_t> >::iterator InstObjIter;
+ map<STARS_ea_t, set<STARS_ea_t> >::iterator InstObjIter;
InstObjIter = this->InstrObjectMap.find(InstructionAddress);
if (InstObjIter == this->InstrObjectMap.end()) {
// Not already in map; create map entry.
- pair<map<ea_t, set<ea_t> >::iterator, bool> InstPairIB;
- set<ea_t> EmptyObjs;
- pair<ea_t, set<ea_t> > TempInstPair(InstructionAddress, EmptyObjs);
+ pair<map<STARS_ea_t, set<STARS_ea_t> >::iterator, bool> InstPairIB;
+ set<STARS_ea_t> EmptyObjs;
+ pair<STARS_ea_t, set<STARS_ea_t> > TempInstPair(InstructionAddress, EmptyObjs);
InstPairIB = this->InstrObjectMap.insert(TempInstPair);
assert(true == InstPairIB.second);
InstObjIter = InstPairIB.first;
@@ -641,7 +641,7 @@ void MemoryAccessInfo::ProcessMemoryAccessAnnotation(FILE *fin, int addr) {
// annotation.
// Else (no size conflict) use the meet function to update the
// memory access map for this instruction address.
- map<ea_t, SMPMemoryAccesses *>::iterator InstrAccessIter;
+ map<STARS_ea_t, SMPMemoryAccesses *>::iterator InstrAccessIter;
InstrAccessIter = this->InstrAccessMap.find(InstructionAddress);
if (InstrAccessIter != this->InstrAccessMap.end()) {
// Already have seen this instruction address.
@@ -670,8 +670,8 @@ void MemoryAccessInfo::ProcessMemoryAccessAnnotation(FILE *fin, int addr) {
else {
// First time we have seen this instruction address.
SMPMemoryAccesses *TempMemoryAccess = new SMPMemoryAccesses(InstructionAddress);
- pair<ea_t, SMPMemoryAccesses *> TempPair(InstructionAddress, TempMemoryAccess);
- pair<map<ea_t, SMPMemoryAccesses *>::iterator, bool> PairIB;
+ pair<STARS_ea_t, SMPMemoryAccesses *> TempPair(InstructionAddress, TempMemoryAccess);
+ pair<map<STARS_ea_t, SMPMemoryAccesses *>::iterator, bool> PairIB;
PairIB = this->InstrAccessMap.insert(TempPair);
assert(true == PairIB.second);
InstrAccessIter = PairIB.first;
@@ -761,10 +761,10 @@ void MemoryAccessInfo::ProcessMemoryAccessAnnotation(FILE *fin, int addr) {
void MemoryAccessInfo::InferDataGranularity(void) {
// For each entry in MultipleAccessSet, remove all its information
// from all other maps.
- set<ea_t>::iterator MultiIter;
- map<ea_t, set<ea_t> >::iterator InstObjIter;
- set<ea_t>::iterator ObjIter;
- map<ea_t, set<ea_t> >::iterator ObjInstIter;
+ set<STARS_ea_t>::iterator MultiIter;
+ map<STARS_ea_t, set<STARS_ea_t> >::iterator InstObjIter;
+ set<STARS_ea_t>::iterator ObjIter;
+ map<STARS_ea_t, set<STARS_ea_t> >::iterator ObjInstIter;
#if SMP_GRANULARITY_STATISTICS
SMP_msg("MultiAccess instructions: %zu\n", this->MultipleAccessTypeSet.size());
@@ -825,15 +825,15 @@ void MemoryAccessInfo::InferDataGranularity(void) {
// See if the instruction address has already been associated
// with a type number. If not, associate it with a new type #.
- ea_t InstAddr = InstObjIter->first;
+ STARS_ea_t InstAddr = InstObjIter->first;
size_t CurrTypeIndex;
- map<ea_t, SMPMemoryAccesses*>::iterator InstAccessIter;
+ map<STARS_ea_t, SMPMemoryAccesses*>::iterator InstAccessIter;
InstAccessIter = this->InstrAccessMap.find(InstAddr);
assert(InstAccessIter != this->InstrAccessMap.end());
size_t ObjectSize = InstAccessIter->second->GetLimit();
size_t TypeSize;
assert(0 < ObjectSize);
- map<ea_t, size_t>::iterator InstTypeIter;
+ map<STARS_ea_t, size_t>::iterator InstTypeIter;
InstTypeIter = this->InstrTypeMap.find(InstAddr);
if (InstTypeIter != this->InstrTypeMap.end()) {
// Already associated with a type ID.
@@ -874,16 +874,16 @@ void MemoryAccessInfo::InferDataGranularity(void) {
// Associate instruction and data allocation addresses with the data TypeID
// for the common data type they all reference.
-void MemoryAccessInfo::AssociateInstrWithType(ea_t InstAddr, size_t TypeID,
- map<ea_t, set<ea_t> >::iterator InstObjIter) {
- pair<ea_t, size_t> InstPair(InstAddr, TypeID);
+void MemoryAccessInfo::AssociateInstrWithType(STARS_ea_t InstAddr, size_t TypeID,
+ map<STARS_ea_t, set<STARS_ea_t> >::iterator InstObjIter) {
+ pair<STARS_ea_t, size_t> InstPair(InstAddr, TypeID);
this->InstrTypeMap.insert(InstPair);
- set<ea_t>::iterator ObjIter = InstObjIter->second.begin();
+ set<STARS_ea_t>::iterator ObjIter = InstObjIter->second.begin();
while (ObjIter != InstObjIter->second.end()) {
// For each data object, if it is not already associated with the
// TypeID, associate it and recurse through all unassociated
// instruction addresses that access the data object.
- map<ea_t, size_t>::iterator ObjTypeIter;
+ map<STARS_ea_t, size_t>::iterator ObjTypeIter;
ObjTypeIter = this->ObjectTypeMap.find(*ObjIter);
if (ObjTypeIter != this->ObjectTypeMap.end()) {
// Already associated with a type ID #.
@@ -891,23 +891,23 @@ void MemoryAccessInfo::AssociateInstrWithType(ea_t InstAddr, size_t TypeID,
}
else {
// Not yet associated with TypeID.
- pair<ea_t, size_t> ObjPair(*ObjIter, TypeID);
+ pair<STARS_ea_t, size_t> ObjPair(*ObjIter, TypeID);
this->ObjectTypeMap.insert(ObjPair);
// Find all inst addresses that access this object.
- map<ea_t, set<ea_t> >::iterator ObjInstIter;
+ map<STARS_ea_t, set<STARS_ea_t> >::iterator ObjInstIter;
ObjInstIter = this->ObjectInstrMap.find(*ObjIter);
assert(ObjInstIter != this->ObjectInstrMap.end());
- set<ea_t>::iterator InstIter = ObjInstIter->second.begin();
+ set<STARS_ea_t>::iterator InstIter = ObjInstIter->second.begin();
while (InstIter != ObjInstIter->second.end()) {
// Is this inst address not yet associated with TypeID?
- map<ea_t, size_t>::iterator InstTypeIter;
+ map<STARS_ea_t, size_t>::iterator InstTypeIter;
InstTypeIter = this->InstrTypeMap.find(*InstIter);
if (InstTypeIter == this->InstrTypeMap.end()) {
// Not yet in InstrTypeMap
- pair<ea_t, size_t> InstPair2(*InstIter, TypeID);
+ pair<STARS_ea_t, size_t> InstPair2(*InstIter, TypeID);
this->InstrTypeMap.insert(InstPair2);
// Recurse on new inst address.
- map<ea_t, set<ea_t> >::iterator InstObjIter2;
+ map<STARS_ea_t, set<STARS_ea_t> >::iterator InstObjIter2;
InstObjIter2 = this->InstrObjectMap.find(*InstIter);
assert(InstObjIter2 != this->InstrObjectMap.end());
this->AssociateInstrWithType(*InstIter, TypeID, InstObjIter2);
@@ -929,12 +929,12 @@ void MemoryAccessInfo::AssociateInstrWithType(ea_t InstAddr, size_t TypeID,
// address.
// Return true if there are non-direct accesses through this instruction,
// and set ChildOffset/RegionSize to mark the non-direct child region.
-bool MemoryAccessInfo::ComputeNonDirectAccessRegion(ea_t InstAddr, int &ChildOffset, int &RegionSize) {
+bool MemoryAccessInfo::ComputeNonDirectAccessRegion(STARS_ea_t InstAddr, int &ChildOffset, int &RegionSize) {
bool NonDirect = false;
bool Scaled = false;
size_t TypeID;
- map<ea_t, size_t>::iterator InstTypeIter;
+ map<STARS_ea_t, size_t>::iterator InstTypeIter;
InstTypeIter = this->InstrTypeMap.find(InstAddr);
if (InstTypeIter == this->InstrTypeMap.end()) {
// InstAddr was not hit in the profiling run.
@@ -947,7 +947,7 @@ bool MemoryAccessInfo::ComputeNonDirectAccessRegion(ea_t InstAddr, int &ChildOff
TypeID = InstTypeIter->second;
}
- map<ea_t, SMPMemoryAccesses *>::iterator InstAccessIter;
+ map<STARS_ea_t, SMPMemoryAccesses *>::iterator InstAccessIter;
InstAccessIter = this->InstrAccessMap.find(InstAddr);
assert(InstAccessIter != this->InstrAccessMap.end());
@@ -980,7 +980,7 @@ bool MemoryAccessInfo::ComputeNonDirectAccessRegion(ea_t InstAddr, int &ChildOff
if (SMP_STACK & InstAccessIter->second->GetRegion()) {
// Inst accessed a stack frame. Now, see if it accessed more
// than one object.
- map<ea_t, set<ea_t> >::iterator InstObjIter;
+ map<STARS_ea_t, set<STARS_ea_t> >::iterator InstObjIter;
InstObjIter = this->InstrObjectMap.find(InstAddr);
assert(InstObjIter != this->InstrObjectMap.end());
if (1 < InstObjIter->second.size()) {
@@ -1001,12 +1001,12 @@ bool MemoryAccessInfo::ComputeNonDirectAccessRegion(ea_t InstAddr, int &ChildOff
// a caller's stack frame, and there is more than one potential
// caller to the present instruction's function, then we
// have the incomplete profiling situation detailed above.
- ea_t InstFirstEA, InstLastEA;
+ STARS_ea_t InstFirstEA, InstLastEA;
STARS_Function_t *InstFunc = SMP_get_func(InstAccessIter->first);
assert(NULL != InstFunc);
InstFirstEA = InstFunc->get_startEA();
InstLastEA = InstFunc->get_endEA();
- ea_t AllocationAddr = *(InstObjIter->second.begin());
+ STARS_ea_t AllocationAddr = *(InstObjIter->second.begin());
bool AccessedCallerFrame =
((InstFirstEA > AllocationAddr) || (InstLastEA < AllocationAddr));
if (AccessedCallerFrame) {
diff --git a/src/base/SMPBasicBlock.cpp b/src/base/SMPBasicBlock.cpp
index a136c647..95ea3c9b 100644
--- a/src/base/SMPBasicBlock.cpp
+++ b/src/base/SMPBasicBlock.cpp
@@ -50,7 +50,6 @@
#include <intel.hpp>
#include "SMPDBInterface.h"
-#include "SMPStaticAnalyzer.h"
#include "SMPDataFlowAnalysis.h"
#include "SMPBasicBlock.h"
#include "SMPInstr.h"
@@ -115,7 +114,7 @@ SMPBasicBlock::SMPBasicBlock(SMPFunction *Func, list<SMPInstr *>::iterator First
this->PhiFunctions.clear();
this->LocalNames.clear();
- ea_t InstAddr;
+ STARS_ea_t InstAddr;
list<SMPInstr *>::iterator InstIter = First;
SMPInstr *CurrInst;
@@ -125,7 +124,7 @@ SMPBasicBlock::SMPBasicBlock(SMPFunction *Func, list<SMPInstr *>::iterator First
this->InstVec.push_back(CurrInst);
VecIndex = this->InstVec.size() - 1;
InstAddr = CurrInst->GetAddr();
- pair<ea_t, size_t> MapItem(InstAddr, VecIndex);
+ pair<STARS_ea_t, size_t> MapItem(InstAddr, VecIndex);
this->AddrInstMap.insert(MapItem);
++InstIter;
}
@@ -135,7 +134,7 @@ SMPBasicBlock::SMPBasicBlock(SMPFunction *Func, list<SMPInstr *>::iterator First
this->InstVec.push_back(CurrInst); // Add last instruction
InstAddr = CurrInst->GetAddr();
VecIndex = this->InstVec.size() - 1;
- pair<ea_t, size_t> MapItem2(InstAddr, VecIndex);
+ pair<STARS_ea_t, size_t> MapItem2(InstAddr, VecIndex);
this->AddrInstMap.insert(MapItem2);
CurrInst->SetTerminatesBlock();
@@ -151,12 +150,12 @@ SMPBasicBlock::SMPBasicBlock(SMPFunction *Func, list<SMPInstr *>::iterator First
}
// Get address of first instruction in the block.
-ea_t SMPBasicBlock::GetFirstAddr(void) const {
+STARS_ea_t SMPBasicBlock::GetFirstAddr(void) const {
return this->FirstAddr;
}
// Get address of last instruction in the block.
-ea_t SMPBasicBlock::GetLastAddr(void) {
+STARS_ea_t SMPBasicBlock::GetLastAddr(void) {
vector<SMPInstr *>::reverse_iterator LastInstIter = this->GetRevInstBegin();
return (*LastInstIter)->GetAddr();
}
@@ -262,7 +261,7 @@ void SMPBasicBlock::LinkToSucc(SMPBasicBlock *Successor) {
// We will keep successors sorted in address order.
for (list<SMPBasicBlock *>::iterator SuccIter = this->GetFirstSucc(); SuccIter != this->GetLastSucc(); ++SuccIter) {
SMPBasicBlock *SuccBlock = (*SuccIter);
- ea_t SuccStartAddr = SuccBlock->GetFirstAddr();
+ STARS_ea_t SuccStartAddr = SuccBlock->GetFirstAddr();
if (SuccStartAddr > Successor->GetFirstAddr()) {
SuccIter = this->Successors.insert(SuccIter, Successor);
inserted = true;
@@ -440,7 +439,7 @@ list<SMPBasicBlock *>::iterator SMPBasicBlock::GetFallThroughSucc(void) {
list<SMPBasicBlock *>::iterator SuccIter;
vector<SMPInstr *>::reverse_iterator LastInstIter = this->GetRevInstBegin();
SMPInstr *LastInst = (*LastInstIter);
- ea_t LastAddr = LastInst->GetAddr(), AddrDiff = 1000, FirstSuccAddr;
+ STARS_ea_t LastAddr = LastInst->GetAddr(), AddrDiff = 1000, FirstSuccAddr;
SMPitype LastDataFlow = LastInst->GetDataFlowType();
if ((JUMP != LastDataFlow) && (RETURN != LastDataFlow) && (HALT != LastDataFlow)) {
@@ -448,7 +447,7 @@ list<SMPBasicBlock *>::iterator SMPBasicBlock::GetFallThroughSucc(void) {
for (SuccIter = this->GetFirstSucc(); SuccIter != this->GetLastSucc(); ++SuccIter) {
FirstSuccAddr = (*SuccIter)->GetFirstAddr();
if (FirstSuccAddr > LastAddr) { // block comes after this block; candidate for fall-through
- ea_t NewAddrDiff = FirstSuccAddr - LastAddr;
+ STARS_ea_t NewAddrDiff = FirstSuccAddr - LastAddr;
#if 1
if (NewAddrDiff == LastInst->GetSize()) {
FallThroughSuccIter = SuccIter;
@@ -496,71 +495,51 @@ bool SMPBasicBlock::MDAlreadyKilled(STARSOpndTypePtr Opnd1) const {
// address appears in a definition, for example. We will do that if it proves
// to be necessary.
bool FoundInKillSet = this->IsVarKill(Opnd1);
- bool DirectAccess = false;
- bool StackAccess = false;
+ if (!(Opnd1->IsMemDisplacementOp() || Opnd1->IsMemNoDisplacementOp()))
+ // Look in KillSet. These simple types should be found there with
+ // no complicated comparisons needed.
+ return FoundInKillSet;
+
+ // If found directly in KillSet, return true. Otherwise, see if any registers
+ // used in the memory addressing expression were killed.
+ if (FoundInKillSet)
+ return true;
+
bool UseFP = this->MyFunc->UsesFramePointer();
+ bool StackAccess = MDIsStackAccessOpnd(Opnd1, UseFP);
+ bool DirectAccess = false;
- switch (Opnd1->GetOpType()) {
- // Some types are simple to test for equality.
- case o_void:
- case o_reg:
- case o_mem:
- case o_imm:
- case o_far:
- case o_near:
- case o_trreg:
- case o_dbreg:
- case o_crreg:
- case o_fpreg:
- case o_mmxreg:
- case o_xmmreg:
- // Look in KillSet. These simple types should be found there with
- // no complicated comparisons needed.
- return FoundInKillSet;
-
- case o_phrase:
- case o_displ:
- StackAccess = MDIsStackAccessOpnd(Opnd1, UseFP);
- if (StackAccess) {
- DirectAccess = !MDIsIndirectMemoryOpnd(Opnd1, UseFP);
- }
- // If found directly in KillSet, return true. Otherwise, see if any registers
- // used in the memory addressing expression were killed.
- if (FoundInKillSet)
- return true;
- else if (!(DirectAccess && StackAccess)) {
+
+ if (StackAccess) {
+ DirectAccess = !MDIsIndirectMemoryOpnd(Opnd1, UseFP);
+ }
+ else if (!(DirectAccess && StackAccess)) {
#if 1
- // We only keep registers and direct stack accesses in the data flow sets.
- // Commented-out code has const-ness compiler problems, anyway.
- return false;
+ // We only keep registers and direct stack accesses in the data flow sets.
+ // Commented-out code has const-ness compiler problems, anyway.
+ return false;
#else
- // Should we add Opnd1 to the KillSet every time we return true below? **!!**
- int BaseReg;
- int IndexReg;
- uint16_t ScaleFactor;
- ea_t displacement;
-
- MDExtractAddressFields(Opnd1, BaseReg, IndexReg, ScaleFactor, displacement);
-
- vector<SMPInstr *>::const_iterator FirstInst = this->GetFirstInst();
- if (R_none != BaseReg) {
- STARSOpndTypePtr TempOp = (*FirstInst)->MakeRegOpnd(BaseReg);
- if (this->KillSet.end() != this->KillSet.find(TempOp))
- return true;
- }
- if (R_none != IndexReg) { // Cannot have ESP index reg in SIB
- STARSOpndTypePtr TempOp = (*FirstInst)->MakeRegOpnd(IndexReg);
- if (this->KillSet.end() != this->KillSet.find(TempOp))
- return true;
- }
+ // Should we add Opnd1 to the KillSet every time we return true below? **!!**
+ int BaseReg;
+ int IndexReg;
+ uint16_t ScaleFactor;
+ STARS_ea_t displacement;
+
+ MDExtractAddressFields(Opnd1, BaseReg, IndexReg, ScaleFactor, displacement);
+
+ vector<SMPInstr *>::const_iterator FirstInst = this->GetFirstInst();
+ if (STARS_x86_R_none != BaseReg) {
+ STARSOpndTypePtr TempOp = (*FirstInst)->MakeRegOpnd(BaseReg);
+ if (this->KillSet.end() != this->KillSet.find(TempOp))
+ return true;
+ }
+ if (STARS_x86_R_none != IndexReg) { // Cannot have ESP index reg in SIB
+ STARSOpndTypePtr TempOp = (*FirstInst)->MakeRegOpnd(IndexReg);
+ if (this->KillSet.end() != this->KillSet.find(TempOp))
+ return true;
+ }
#endif
- } // end if (FoundInKillSet) ... else ...
- break;
-
- default:
- SMP_msg("Unknown operand type %d in MDAlreadyKilled, block %d\n", Opnd1->GetOpType(), this->GetNumber());
- } // end of switch on Opnd1.type
-
+ }
return false;
} // end of SMPBasicBlock::MDAlreadyKilled()
@@ -724,9 +703,9 @@ set<SMPPhiFunction, LessPhi>::iterator SMPBasicBlock::FindPhi(STARSOpndTypePtr F
// Get a pointer to the instruction at address InstAddr.
// Will assert if it does not find the instruction.
-SMPInstr *SMPBasicBlock::FindInstr(ea_t InstAddr) {
+SMPInstr *SMPBasicBlock::FindInstr(STARS_ea_t InstAddr) {
SMPInstr *CurrInst;
- map<ea_t, size_t>::iterator MapEntry;
+ map<STARS_ea_t, size_t>::iterator MapEntry;
MapEntry = this->AddrInstMap.find(InstAddr);
if (MapEntry == this->AddrInstMap.end()) {
@@ -742,7 +721,7 @@ SMPInstr *SMPBasicBlock::FindInstr(ea_t InstAddr) {
// Get an iterator to the instruction at address InstAddr.
// Will assert if it does not find the instruction.
-vector<SMPInstr *>::iterator SMPBasicBlock::GetInstIterFromAddr(ea_t InstAddr) {
+vector<SMPInstr *>::iterator SMPBasicBlock::GetInstIterFromAddr(STARS_ea_t InstAddr) {
#if 1
size_t VecIndex = this->GetIndexFromInstAddr(InstAddr);
vector<SMPInstr *>::iterator InstIter(this->InstVec.begin() + VecIndex);
@@ -765,9 +744,9 @@ vector<SMPInstr *>::iterator SMPBasicBlock::GetInstIterFromAddr(ea_t InstAddr) {
} // end of SMPBasicBlock::GetInstIterFromAddr()
// Get the InstVec index for the instruction at InstAddr. Assert if not found.
-size_t SMPBasicBlock::GetIndexFromInstAddr(ea_t InstAddr) const {
+size_t SMPBasicBlock::GetIndexFromInstAddr(STARS_ea_t InstAddr) const {
SMPInstr *CurrInst;
- ea_t CurrAddr;
+ STARS_ea_t CurrAddr;
size_t VecIndex;
size_t UpperLimit = this->InstVec.size();
if (STARS_IsSSAMarkerPseudoID(InstAddr)) {
@@ -824,8 +803,8 @@ int SMPBasicBlock::GetPredPosition(int BlockNum) {
}
// Set the DEF iterator from the DefAddr and DefOp. Assert if not found.
-set<DefOrUse, LessDefUse>::iterator SMPBasicBlock::GetGlobalDefIterFromDefAddr(STARSOpndTypePtr DefOp, ea_t DefAddr) {
- map<ea_t, size_t>::iterator MapIter = this->AddrInstMap.find(DefAddr);
+set<DefOrUse, LessDefUse>::iterator SMPBasicBlock::GetGlobalDefIterFromDefAddr(STARSOpndTypePtr DefOp, STARS_ea_t DefAddr) {
+ map<STARS_ea_t, size_t>::iterator MapIter = this->AddrInstMap.find(DefAddr);
assert(MapIter != this->AddrInstMap.end());
SMPInstr *DefInst = this->GetInstFromIndex(MapIter->second);
set<DefOrUse, LessDefUse>::iterator DefIter = DefInst->FindDef(DefOp);
@@ -836,8 +815,8 @@ set<DefOrUse, LessDefUse>::iterator SMPBasicBlock::GetGlobalDefIterFromDefAddr(S
// Given a USE operand and the address of its instr, return DEF addr using SSA chains or Phi func.
// If DEF is in a Phi function, we return the block number, which (hopefully) never conflicts with instruction
// addresses.
-ea_t SMPBasicBlock::GetDefAddrFromUseAddr(STARSOpndTypePtr UseOp, ea_t InstAddr, int SSANum, bool LocalName) {
- ea_t DefAddr = BADADDR;
+STARS_ea_t SMPBasicBlock::GetDefAddrFromUseAddr(STARSOpndTypePtr UseOp, STARS_ea_t InstAddr, int SSANum, bool LocalName) {
+ STARS_ea_t DefAddr = BADADDR;
bool RegisterOp = (UseOp->IsRegOp());
bool PhiUse = (STARS_IsBlockNumPseudoID(InstAddr));
@@ -858,7 +837,7 @@ ea_t SMPBasicBlock::GetDefAddrFromUseAddr(STARSOpndTypePtr UseOp, ea_t InstAddr,
DefAddr = this->GetFunc()->GetGlobalDefAddr(UseOp, SSANum);
if (BADADDR == DefAddr) { // Need to search Phi functions.
// Rare case in which a Phi USE was traced only to a Phi DEF in an earlier block.
- DefAddr = (ea_t) this->GetFunc()->GetBlockNumForPhiDef(UseOp, SSANum);
+ DefAddr = (STARS_ea_t) this->GetFunc()->GetBlockNumForPhiDef(UseOp, SSANum);
assert(BADADDR != DefAddr);
DefAddr += STARS_PSEUDO_ID_MIN;
}
@@ -900,8 +879,8 @@ ea_t SMPBasicBlock::GetDefAddrFromUseAddr(STARSOpndTypePtr UseOp, ea_t InstAddr,
return DefAddr;
} // end of SMPBasicBlock::GetDefAddrFromUseAddr()
-ea_t SMPBasicBlock::GetUltimateDefAddr(STARSOpndTypePtr UseOp, ea_t InstAddr, int SSANum, bool LocalName) {
- ea_t DefAddr = BADADDR;
+STARS_ea_t SMPBasicBlock::GetUltimateDefAddr(STARSOpndTypePtr UseOp, STARS_ea_t InstAddr, int SSANum, bool LocalName) {
+ STARS_ea_t DefAddr = BADADDR;
DefAddr = this->GetDefAddrFromUseAddr(UseOp, InstAddr, SSANum, LocalName);
bool LiveInAddr = STARS_IsLiveInPseudoID(DefAddr);
if (LiveInAddr && this->IsLiveIn(UseOp)) { // UpExposed or pass-through case
@@ -933,7 +912,7 @@ ea_t SMPBasicBlock::GetUltimateDefAddr(STARSOpndTypePtr UseOp, ea_t InstAddr, in
set<SMPPhiFunction, LessPhi>::iterator PhiIter = CurrBlock->FindPhi(UseOp);
if (PhiIter != CurrBlock->GetLastPhi()) {
if (SSANum == PhiIter->GetDefSSANum()) {
- DefAddr = (ea_t) BlockIndex + STARS_PSEUDO_ID_MIN;
+ DefAddr = (STARS_ea_t) BlockIndex + STARS_PSEUDO_ID_MIN;
FoundDEF = true;
break;
}
@@ -942,7 +921,7 @@ ea_t SMPBasicBlock::GetUltimateDefAddr(STARSOpndTypePtr UseOp, ea_t InstAddr, in
vector<SMPInstr *>::reverse_iterator RevInstIter;
for (RevInstIter = CurrBlock->GetRevInstBegin(); RevInstIter != CurrBlock->GetRevInstEnd(); ++RevInstIter) {
SMPInstr *CurrInst = (*RevInstIter);
- ea_t CurrAddr = CurrInst->GetAddr();
+ STARS_ea_t CurrAddr = CurrInst->GetAddr();
if (CurrInst->HasDestMemoryOperand() || CurrInst->MDIsPushInstr()) {
DefIter = CurrInst->FindDef(UseOp);
if (DefIter != CurrInst->GetLastDef()) {
@@ -971,7 +950,7 @@ ea_t SMPBasicBlock::GetUltimateDefAddr(STARSOpndTypePtr UseOp, ea_t InstAddr, in
// we need to check to see if it is the DefAddr.
vector<SMPInstr *>::reverse_iterator RevInstIter = PredBlock->GetRevInstBegin();
SMPInstr *LastPredInst = (*RevInstIter);
- ea_t LastPredAddr = LastPredInst->GetAddr();
+ STARS_ea_t LastPredAddr = LastPredInst->GetAddr();
if (LastPredInst->FindDef(UseOp) != LastPredInst->GetLastDef()) {
DefAddr = LastPredAddr;
PredBlock->SetProcessed(true);
@@ -997,9 +976,9 @@ ea_t SMPBasicBlock::GetUltimateDefAddr(STARSOpndTypePtr UseOp, ea_t InstAddr, in
} // end of SMPBasicBlock::GetUltimateDefAddr()
// STUB: Trace UseOp through move and Phi defs to some defining operation.
-ea_t SMPBasicBlock::GetUltimateOperandSource(ea_t UseAddr, STARSOpndTypePtr UseOp, int UseSSANum) {
+STARS_ea_t SMPBasicBlock::GetUltimateOperandSource(STARS_ea_t UseAddr, STARSOpndTypePtr UseOp, int UseSSANum) {
bool LocalName = this->IsLocalName(UseOp);
- ea_t DefiningAddr = this->GetDefAddrFromUseAddr(UseOp, UseAddr, UseSSANum, LocalName);
+ STARS_ea_t DefiningAddr = this->GetDefAddrFromUseAddr(UseOp, UseAddr, UseSSANum, LocalName);
SMPBasicBlock *CurrBlock;
// We have four possibilities for DefiningAddr:
@@ -1013,13 +992,13 @@ ea_t SMPBasicBlock::GetUltimateOperandSource(ea_t UseAddr, STARSOpndTypePtr UseO
} // end of SMPBasicBlock::GetUltimateOperandSource()
// Does DefOp get written out in truncated form (lower bits only)?
-bool SMPBasicBlock::IsOpDestTruncatedWrite(STARSOpndTypePtr DefOp, int DefSSANum, ea_t DefAddr) {
+bool SMPBasicBlock::IsOpDestTruncatedWrite(STARSOpndTypePtr DefOp, int DefSSANum, STARS_ea_t DefAddr) {
vector<SMPInstr *>::iterator InstIter;
SMPInstr *LastUseInst = NULL;
set<DefOrUse, LessDefUse>::iterator DefIter;
bool RegisterOp = (DefOp->IsRegOp());
bool LastUseIsTruncatedWrite = false;
- ea_t LastAddr = BADADDR;
+ STARS_ea_t LastAddr = BADADDR;
if (!RegisterOp || (DefSSANum == SMP_SSA_UNINIT))
return false;
@@ -1153,7 +1132,7 @@ bool SMPBasicBlock::ComputeReachesOutSet(void) {
size_t NewSize; // If NewSize becomes different from OldSize, then ReachesOutSet changed.
// First step: Add all ReachesIn defns that are not killed.
- set<pair<STARSOpndTypePtr, ea_t>, LessDefinition>::iterator ReachesInIter;
+ set<pair<STARSOpndTypePtr, STARS_ea_t>, LessDefinition>::iterator ReachesInIter;
for (ReachesInIter = this->GetFirstReachesIn(); ReachesInIter != this->GetLastReachesIn(); ++ReachesInIter) {
STARSOpndTypePtr InOp = ReachesInIter->first;
if (!(this->IsVarKill(InOp))) {
@@ -1162,7 +1141,7 @@ bool SMPBasicBlock::ComputeReachesOutSet(void) {
}
// Second step: Add DEDefns.
- set<pair<STARSOpndTypePtr, ea_t>, LessDefinition>::iterator DEDefnIter;
+ set<pair<STARSOpndTypePtr, STARS_ea_t>, LessDefinition>::iterator DEDefnIter;
for (DEDefnIter = this->GetFirstDownExposedDefn(); DEDefnIter != this->GetLastDownExposedDefn(); ++DEDefnIter) {
this->AddReachesOut(*DEDefnIter);
}
@@ -1173,9 +1152,9 @@ bool SMPBasicBlock::ComputeReachesOutSet(void) {
} // end of SMPBasicBlock::ComputeReachesOutSet()
// Add DefOp, remove previous defs of DefOp that now do not reach the end of the block.
-void SMPBasicBlock::UpdateDownExposedDefs(STARSOpndTypePtr DefOp, ea_t InstAddr) {
+void SMPBasicBlock::UpdateDownExposedDefs(STARSOpndTypePtr DefOp, STARS_ea_t InstAddr) {
// First, remove any definition of DefOp that precedes the current definition.
- set<pair<STARSOpndTypePtr, ea_t>, LessDefinition>::iterator DEDefnIter = this->GetFirstDownExposedDefn();
+ set<pair<STARSOpndTypePtr, STARS_ea_t>, LessDefinition>::iterator DEDefnIter = this->GetFirstDownExposedDefn();
while (DEDefnIter != this->GetLastDownExposedDefn()) {
STARSOpndTypePtr OldOp = DEDefnIter->first;
if (IsEqOpIgnoreBitwidth(OldOp, DefOp)) {
@@ -1187,8 +1166,8 @@ void SMPBasicBlock::UpdateDownExposedDefs(STARSOpndTypePtr DefOp, ea_t InstAddr)
}
}
// Next, insert the new definition.
- pair<STARSOpndTypePtr, ea_t> NewDefn(DefOp, InstAddr);
- pair<set<pair<STARSOpndTypePtr, ea_t>, LessDefinition>::iterator, bool> InsertResult;
+ pair<STARSOpndTypePtr, STARS_ea_t> NewDefn(DefOp, InstAddr);
+ pair<set<pair<STARSOpndTypePtr, STARS_ea_t>, LessDefinition>::iterator, bool> InsertResult;
InsertResult = this->DownExposedDefnSet.insert(NewDefn);
assert(InsertResult.second);
this->SetReachesOutStale();
@@ -1325,7 +1304,7 @@ void SMPBasicBlock::SCCPNullifyUnreachableBlock(void) {
// Remove this block from the predecessors list of its successors.
list<SMPBasicBlock *>::iterator SuccIter;
- ea_t TempAddr = this->GetFirstAddr();
+ STARS_ea_t TempAddr = this->GetFirstAddr();
for (SuccIter = this->GetFirstSucc(); SuccIter != this->GetLastSucc(); ++SuccIter) {
(*SuccIter)->ErasePred(TempAddr);
}
@@ -1340,7 +1319,7 @@ void SMPBasicBlock::SCCPNullifyUnreachableBlock(void) {
// Patch all bytes in the database for this block into nops.
size_t NumBytes = this->GetBlockSize();
- ea_t CurrAddr = this->GetFirstAddr();
+ STARS_ea_t CurrAddr = this->GetFirstAddr();
for (size_t ByteIndex = 0; ByteIndex < NumBytes; ++ByteIndex) {
bool success = patch_byte(CurrAddr, MD_BINARY_NOP_INSTRUCTION);
// If success == false, that just means the byte already had that value in the
@@ -1468,7 +1447,7 @@ void SMPBasicBlock::SSALocalRenumber(void) {
set<STARSOpndTypePtr, LessOp>::iterator UseNameIter, DefNameIter;
for (InstIter = this->GetFirstInst(); InstIter != this->GetLastInst(); ++InstIter) {
SMPInstr *CurrInst = (*InstIter);
- ea_t InstAddr = CurrInst->GetAddr(); // for debugging
+ STARS_ea_t InstAddr = CurrInst->GetAddr(); // for debugging
size_t NameIndex;
// USEs get referenced logically before DEFs, so start with them.
CurrUse = CurrInst->GetFirstUse();
@@ -1537,7 +1516,7 @@ bool SMPBasicBlock::FindLoopHeadsAndTails(void) {
} // end of SMPBasicBlock::FindLoopHeadsAndTails()
// Does DefOp/DefSSANum control loop-back or loop-exit branches?
-bool SMPBasicBlock::DoesDefControlLoopFlow(STARSOpndTypePtr DefOp, int DefSSANum, ea_t DefAddr) {
+bool SMPBasicBlock::DoesDefControlLoopFlow(STARSOpndTypePtr DefOp, int DefSSANum, STARS_ea_t DefAddr) {
bool FoundLoopControl = false;
// First, determine if the current block ends with a loop exit or a loop-back.
@@ -1545,7 +1524,7 @@ bool SMPBasicBlock::DoesDefControlLoopFlow(STARSOpndTypePtr DefOp, int DefSSANum
SMPInstr *LastInst = (*RevInstIter);
SMPitype FlowType = LastInst->GetDataFlowType();
if (FlowType == COND_BRANCH) {
- ea_t LastAddr = LastInst->GetAddr();
+ STARS_ea_t LastAddr = LastInst->GetAddr();
ControlFlowType LastBranchType = this->GetFunc()->GetControlFlowType(LastAddr);
if (LastBranchType != LOOP_EXIT) {
return false;
@@ -1611,7 +1590,7 @@ void SMPBasicBlock::FreeUnusedMemory4(void) {
std::set<STARSOpndTypePtr, LessOp>(this->KillSet).swap(this->KillSet);
std::set<STARSOpndTypePtr, LessOp>(this->LiveOutSet).swap(this->LiveOutSet);
std::set<SMPPhiFunction, LessPhi>(this->PhiFunctions).swap(this->PhiFunctions);
- std::map<ea_t, size_t>(this->AddrInstMap).swap(this->AddrInstMap);
+ std::map<STARS_ea_t, size_t>(this->AddrInstMap).swap(this->AddrInstMap);
std::list<SMPBasicBlock *>(this->Predecessors).swap(this->Predecessors);
std::list<SMPBasicBlock *>(this->Successors).swap(this->Successors);
#endif
@@ -1642,7 +1621,7 @@ unsigned int SMPBasicBlock::GetLocalDUIndex(STARSOpndTypePtr DefOp, int SSANum)
} // end of SMPBasicBlock::GetLocalDUIndex()
// Find the global Def-Use chain index for the given DefOp with given address.
-unsigned int SMPBasicBlock::GetGlobalDUIndex(STARSOpndTypePtr DefOp, ea_t DefAddr) {
+unsigned int SMPBasicBlock::GetGlobalDUIndex(STARSOpndTypePtr DefOp, STARS_ea_t DefAddr) {
unsigned int RegIndex = 0;
set<STARSOpndTypePtr, LessOp>::iterator NameIter;
@@ -1698,7 +1677,7 @@ bool SMPBasicBlock::HasUseAfterIndWrite(STARSOpndTypePtr MemDefOp, vector<SMPIns
void SMPBasicBlock::MarkBranchSignedness(void) {
unsigned short SignMask;
set<DefOrUse, LessDefUse>::iterator UseIter;
- ea_t DefAddr; // for flags USE in branch
+ STARS_ea_t DefAddr; // for flags USE in branch
int SSANum; // for flags USE in branch
bool LocalFlags; // is flags register a local name?
vector<SMPInstr *>::reverse_iterator InstRevIter;
@@ -1739,14 +1718,14 @@ void SMPBasicBlock::MarkBranchSignedness(void) {
// and SearchOp will change as we backtrack up the signedness propagation chain.
// We recurse on all USEs until we encounter memory operands, also terminating the recursion as
// soon as we see an instruction other than a move, compare, or test.
-void SMPBasicBlock::PropagateBranchSignedness(ea_t DefAddr, STARSOpndTypePtr SearchOp, unsigned short SignMask) {
+void SMPBasicBlock::PropagateBranchSignedness(STARS_ea_t DefAddr, STARSOpndTypePtr SearchOp, unsigned short SignMask) {
SMPInstr *DefInst;
SMPBasicBlock *DefBlock;
set<DefOrUse, LessDefUse>::iterator UseIter;
set<DefOrUse, LessDefUse>::iterator DefIter;
int DefHashValue, UseHashValue;
- ea_t PhiUseDefAddr; // for a Phi USE, where was it DEFed?
- ea_t UseDefAddr; // for an instruction USE, where was it DEFed?
+ STARS_ea_t PhiUseDefAddr; // for a Phi USE, where was it DEFed?
+ STARS_ea_t UseDefAddr; // for an instruction USE, where was it DEFed?
bool LocalDef = this->IsLocalName(SearchOp);
if (! SearchOp->IsRegOp())
@@ -1890,7 +1869,7 @@ void SMPBasicBlock::PropagateBranchSignedness(ea_t DefAddr, STARSOpndTypePtr Sea
#else
bool PropagateThroughUses = false;
#endif
- ea_t UseDefAddr = BADADDR;
+ STARS_ea_t UseDefAddr = BADADDR;
for (UseIter = DefInst->GetFirstUse(); UseIter != DefInst->GetLastUse(); ++UseIter) {
STARSOpndTypePtr UseOp = UseIter->GetOp();
if (UseOp->IsRegOp() && ((!ReadsMemory) || (DefInst->IsNonAddressReg(UseOp)))) { // don't want addressing registers
@@ -1996,14 +1975,14 @@ bool SMPBasicBlock::PropagateDEFSignedness(void) {
} // end of SMPBasicBlock::PropagateDEFSignedness()
// backtrack from CallAddr and mark unsigned args based on bitset
-void SMPBasicBlock::MarkUnsignedArgs(ea_t CallAddr, unsigned int ArgPosBits) {
+void SMPBasicBlock::MarkUnsignedArgs(STARS_ea_t CallAddr, unsigned int ArgPosBits) {
vector<SMPInstr *>::reverse_iterator RevInstIter;
unsigned int UnsignedArgCount = CountBitsSet(ArgPosBits);
unsigned int UnsignedArgsFound = 0;
for (RevInstIter = this->GetRevInstBegin(); RevInstIter != this->GetRevInstEnd(); ++RevInstIter) {
SMPInstr *CurrInst = (*RevInstIter);
- ea_t InstAddr = CurrInst->GetAddr();
+ STARS_ea_t InstAddr = CurrInst->GetAddr();
if (InstAddr < CallAddr) {
SMPitype FlowType = CurrInst->GetDataFlowType();
if ((FlowType == CALL) || (FlowType == INDIR_CALL)) {
@@ -2028,14 +2007,14 @@ void SMPBasicBlock::MarkUnsignedArgs(ea_t CallAddr, unsigned int ArgPosBits) {
} // end of SMPBasicBlock::MarkUnsignedArgs()
// backtrack from CallAddr and mark POINTER args based on bitset
-void SMPBasicBlock::MarkPointerArgs(ea_t CallAddr, unsigned int ArgPosBits) {
+void SMPBasicBlock::MarkPointerArgs(STARS_ea_t CallAddr, unsigned int ArgPosBits) {
vector<SMPInstr *>::reverse_iterator RevInstIter;
unsigned int PointerArgCount = CountBitsSet(ArgPosBits);
unsigned int PointerArgsFound = 0;
for (RevInstIter = this->GetRevInstBegin(); RevInstIter != this->GetRevInstEnd(); ++RevInstIter) {
SMPInstr *CurrInst = (*RevInstIter);
- ea_t InstAddr = CurrInst->GetAddr();
+ STARS_ea_t InstAddr = CurrInst->GetAddr();
if (InstAddr < CallAddr) {
SMPitype FlowType = CurrInst->GetDataFlowType();
if ((FlowType == CALL) || (FlowType == INDIR_CALL)) {
@@ -2074,10 +2053,10 @@ void SMPBasicBlock::MarkPointerArgs(ea_t CallAddr, unsigned int ArgPosBits) {
// Find the stack target of a call to memset() and the size in bytes of the memset() region.
// If the memset() target is not on the stack, return false. If the
// size of the memset() region is not a constant, we also return false.
-bool SMPBasicBlock::AnalyzeMemSet(ea_t MemSetAddr, STARSOpndTypePtr &MemSetTarget, size_t &MemSetSize, int &StackOffset, bool &FPRelativeTarget) {
+bool SMPBasicBlock::AnalyzeMemSet(STARS_ea_t MemSetAddr, STARSOpndTypePtr &MemSetTarget, size_t &MemSetSize, int &StackOffset, bool &FPRelativeTarget) {
set<DefOrUse, LessDefUse>::iterator UseIter;
STARSOpndTypePtr DefOp = nullptr, UseOp = nullptr, UltimateSourceOp = nullptr;
- ea_t InstAddr;
+ STARS_ea_t InstAddr;
int UseSSANum;
bool FoundTarget = false, FoundSize = false;
bool UseFP = this->GetFunc()->UsesFramePointer();
@@ -2085,7 +2064,7 @@ bool SMPBasicBlock::AnalyzeMemSet(ea_t MemSetAddr, STARSOpndTypePtr &MemSetTarge
vector<SMPInstr *>::reverse_iterator InstRevIter;
sval_t CurrentDelta;
- ea_t FirstAddr = this->GetFirstAddr();
+ STARS_ea_t FirstAddr = this->GetFirstAddr();
if (!(STARS_IsSSAMarkerPseudoID(FirstAddr))) {
assert(MemSetAddr >= FirstAddr);
}
@@ -2124,9 +2103,9 @@ bool SMPBasicBlock::AnalyzeMemSet(ea_t MemSetAddr, STARSOpndTypePtr &MemSetTarge
if (MDIsDirectStackAccessOpnd(UseOp, UseFP)) {
int BaseReg, IndexReg;
uint16_t ScaleFactor;
- ea_t offset;
+ STARS_ea_t offset;
MDExtractAddressFields(UseOp, BaseReg, IndexReg, ScaleFactor, offset);
- if ((R_none != IndexReg) || (0 != ScaleFactor)) {
+ if ((STARS_x86_R_none != IndexReg) || (0 != ScaleFactor)) {
break; // cannot make use of complex stack loc expression
}
else {
@@ -2164,9 +2143,9 @@ bool SMPBasicBlock::AnalyzeMemSet(ea_t MemSetAddr, STARSOpndTypePtr &MemSetTarge
// UltimateSourceOp.
int BaseReg, IndexReg;
uint16_t ScaleFactor;
- ea_t offset;
+ STARS_ea_t offset;
MDExtractAddressFields(UltimateSourceOp, BaseReg, IndexReg, ScaleFactor, offset);
- if ((R_none != IndexReg) || (0 != ScaleFactor)) {
+ if ((STARS_x86_R_none != IndexReg) || (0 != ScaleFactor)) {
break; // cannot make use of complex stack loc expression
}
else {
@@ -2225,7 +2204,7 @@ bool SMPBasicBlock::AnalyzeMemSet(ea_t MemSetAddr, STARSOpndTypePtr &MemSetTarge
// For the newly defined type DefType for DefOp at instruction DefAddr, propagate the
// type to all USEs in the local SSA chain for the DEF. If any USE types change,
// return true.
-bool SMPBasicBlock::PropagateLocalDefType(STARSOpndTypePtr DefOp, SMPOperandType DefType, ea_t DefAddr, int SSANum, bool IsMemOp, bool PointerOverride) {
+bool SMPBasicBlock::PropagateLocalDefType(STARSOpndTypePtr DefOp, SMPOperandType DefType, STARS_ea_t DefAddr, int SSANum, bool IsMemOp, bool PointerOverride) {
bool changed = false;
bool SafeFunc = (this->MyFunc) && this->MyFunc->IsSafe();
bool DebugFlag = false;
@@ -2263,7 +2242,7 @@ bool SMPBasicBlock::PropagateLocalDefType(STARSOpndTypePtr DefOp, SMPOperandType
while (InstIter != this->GetLastInst()) {
SMPInstr *CurrInst = (*InstIter);
++InstIter;
- ea_t CurrAddr = CurrInst->GetAddr();
+ STARS_ea_t CurrAddr = CurrInst->GetAddr();
#if SMP_VERBOSE_ALIAS_DETECTION
if (IsMemOp && (CurrInst->HasIndirectMemoryWrite())) {
SMP_msg("CAUTION: Indirect memory write in MemOp chain.\n");
@@ -2302,7 +2281,7 @@ bool SMPBasicBlock::PropagateLocalDefType(STARSOpndTypePtr DefOp, SMPOperandType
changed = true;
}
else if (IsDataPtr(DefType) && IsNumeric(UseType)
- && ((InstOpcode == NN_adc) || (InstOpcode == NN_sbb))) {
+ && ((InstOpcode == STARS_NN_adc) || (InstOpcode == STARS_NN_sbb))) {
SMP_msg("ADC/SBB: Refining NUMERIC to %d at %lx %s for USE:", DefType,
(unsigned long) CurrInst->GetAddr(), CurrInst->GetDisasm());
CurrUse->Dump();
@@ -2449,7 +2428,7 @@ bool SMPBasicBlock::PropagateGlobalDefType(STARSOpndTypePtr DefOp, SMPOperandTyp
bool FoundUse = false;
for (InstIter = this->GetFirstInst(); InstIter != this->GetLastInst(); ++InstIter) {
SMPInstr *CurrInst = (*InstIter);
- ea_t InstAddr = CurrInst->GetAddr();
+ STARS_ea_t InstAddr = CurrInst->GetAddr();
#if 0
if (IsMemOp && (CurrInst->HasIndirectMemoryWrite())) {
if (!SafeFunc) {
@@ -2528,7 +2507,7 @@ bool SMPBasicBlock::PropagateGlobalDefType(STARSOpndTypePtr DefOp, SMPOperandTyp
changed = true;
}
else if (IsDataPtr(DefType) && IsNumeric(UseType)
- && ((InstOpcode == NN_adc) || (InstOpcode == NN_sbb))) {
+ && ((InstOpcode == STARS_NN_adc) || (InstOpcode == STARS_NN_sbb))) {
SMP_msg("ADC/SBB: Refining NUMERIC to %d at %lx %s for USE:", DefType,
(unsigned long) CurrInst->GetAddr(), CurrInst->GetDisasm());
CurrUse->Dump();
@@ -2578,7 +2557,7 @@ bool SMPBasicBlock::PropagateGlobalDefType(STARSOpndTypePtr DefOp, SMPOperandTyp
// Propagate the metadata Status for UseOp/SSANum to its local DEF.
// Return true if successful.
-bool SMPBasicBlock::PropagateLocalMetadata(STARSOpndTypePtr UseOp, SMPMetadataType Status, int SSANum, ea_t UseAddr) {
+bool SMPBasicBlock::PropagateLocalMetadata(STARSOpndTypePtr UseOp, SMPMetadataType Status, int SSANum, STARS_ea_t UseAddr) {
bool changed = false;
set<STARSOpndTypePtr, LessOp>::iterator NameIter;
NameIter = this->FindLocalName(UseOp);
@@ -2587,7 +2566,7 @@ bool SMPBasicBlock::PropagateLocalMetadata(STARSOpndTypePtr UseOp, SMPMetadataTy
}
assert(0 <= SSANum);
- ea_t DefAddr = this->GetDefAddrFromUseAddr(UseOp, UseAddr, SSANum, true);
+ STARS_ea_t DefAddr = this->GetDefAddrFromUseAddr(UseOp, UseAddr, SSANum, true);
if ((DefAddr == BADADDR) || STARS_IsLiveInPseudoID(DefAddr)) {
return false;
}
@@ -2645,9 +2624,9 @@ bool SMPBasicBlock::PropagateLocalMetadata(STARSOpndTypePtr UseOp, SMPMetadataTy
return changed; // address regs are not live metadata
}
else if ((5 == CurrInst->GetOptType())
- || (NN_and == CurrInst->GetIDAOpcode())
- || (NN_or == CurrInst->GetIDAOpcode())
- || (NN_xor == CurrInst->GetIDAOpcode())) {
+ || (STARS_NN_and == CurrInst->GetIDAOpcode())
+ || (STARS_NN_or == CurrInst->GetIDAOpcode())
+ || (STARS_NN_xor == CurrInst->GetIDAOpcode())) {
// add, subtract, and, or with memsrc
// Find the DEF reg in the USE list.
CurrUse = CurrInst->FindUse(UseOp);
@@ -2689,7 +2668,7 @@ bool SMPBasicBlock::PropagateLocalMetadata(STARSOpndTypePtr UseOp, SMPMetadataTy
// For the UNINIT type DEF DefOp at instruction DefAddr, see if all its USEs have
// a single type. If so, set the DEF to that type and return true, else return false.
-bool SMPBasicBlock::InferLocalDefType(STARSOpndTypePtr DefOp, unsigned int LocIndex, ea_t DefAddr) {
+bool SMPBasicBlock::InferLocalDefType(STARSOpndTypePtr DefOp, unsigned int LocIndex, STARS_ea_t DefAddr) {
bool changed = false;
bool DebugFlag = false;
#if SMP_DEBUG_OPTIMIZATIONS
@@ -2732,7 +2711,7 @@ bool SMPBasicBlock::InferLocalDefType(STARSOpndTypePtr DefOp, unsigned int LocIn
++InstIter;
for ( ; InstIter != this->GetLastInst(); ++InstIter) {
SMPInstr *CurrInst = (*InstIter);
- ea_t CurrAddr = CurrInst->GetAddr();
+ STARS_ea_t CurrAddr = CurrInst->GetAddr();
CurrUse = CurrInst->FindUse(DefOp);
if (CurrUse != CurrInst->GetLastUse()) { // found a USE in the chain
if (!FirstUseSeen)
@@ -2796,7 +2775,7 @@ bool SMPBasicBlock::InferLocalDefType(STARSOpndTypePtr DefOp, unsigned int LocIn
return changed;
} // end of SMPBasicBlock::InferLocalDefType()
-void SMPBasicBlock::InferGlobalDefType(STARSOpndTypePtr DefOp, int SSANum, ea_t DefAddr, bool &FoundNumeric, bool &FoundPointer,
+void SMPBasicBlock::InferGlobalDefType(STARSOpndTypePtr DefOp, int SSANum, STARS_ea_t DefAddr, bool &FoundNumeric, bool &FoundPointer,
bool &FoundUnknown, bool &FoundUninit, SMPOperandType &PtrType) {
// Avoid infinite recursion
@@ -2882,7 +2861,7 @@ void SMPBasicBlock::InferGlobalDefType(STARSOpndTypePtr DefOp, int SSANum, ea_t
if (DefEscapes) { // Need to recurse into successor blocks
list<SMPBasicBlock *>::iterator SuccIter;
- ea_t TempAddr;
+ STARS_ea_t TempAddr;
set<SMPPhiFunction, LessPhi>::iterator PhiIter;
for (SuccIter = this->GetFirstSucc(); SuccIter != this->GetLastSucc(); ++SuccIter) {
SMPBasicBlock *CurrBlock = (*SuccIter);
@@ -3036,7 +3015,7 @@ bool SMPBasicBlock::IsGlobalNameUsedLiveIn(STARSOpndTypePtr GlobalOp) {
} // end of SMPBasicBlock::IsGlobalNameUsed()
// Extension of IsRegDead for Global names. Check and see if it overlaps with a DEF-USE chain
-bool SMPBasicBlock::IsGlobalRegDead(ea_t InstAddr, STARSOpndTypePtr Operand, unsigned int RegIndex) {
+bool SMPBasicBlock::IsGlobalRegDead(STARS_ea_t InstAddr, STARSOpndTypePtr Operand, unsigned int RegIndex) {
bool FoundInLiveInSet = this->IsLiveIn(Operand);
bool FoundInLiveOutSet = this->IsLiveOut(Operand);
bool FoundInKillSet = this->IsVarKill(Operand);
@@ -3082,7 +3061,7 @@ bool SMPBasicBlock::IsGlobalRegDead(ea_t InstAddr, STARSOpndTypePtr Operand, uns
// falls between the USEs of the instruction at InstAddr and its DEFs), for register RegIndex,
// then it is safe for the instrumentation to use that register without saving and
// restoring its value. Return true in this case, false if there is DEF-USE overlap.
-bool SMPBasicBlock::IsRegDead(ea_t InstAddr, uint16 RegNo) {
+bool SMPBasicBlock::IsRegDead(STARS_ea_t InstAddr, uint16 RegNo) {
// See if any DEF-USE chains overlap InstAddr's USEs.
vector<SMPInstr *>::iterator InstIter = this->GetInstIterFromAddr(InstAddr);
STARSOpndTypePtr RegOp = (*InstIter)->MakeRegOpnd(RegNo);
@@ -3130,7 +3109,7 @@ void SMPBasicBlock::MarkDeadRegs(void) {
SMPInstr *CurrInst = (*InstIter);
if (CurrInst->IsMarkerInst())
continue;
- ea_t InstAddr = CurrInst->GetAddr();
+ STARS_ea_t InstAddr = CurrInst->GetAddr();
DebugFlag = (0x804dafc == InstAddr);
if (DebugFlag) {
CurrInst->PrintOperands();
@@ -3223,7 +3202,7 @@ void SMPBasicBlock::MarkDeadRegs(void) {
} // end of SMPBasicBlock::MarkDeadRegs()
// Does DefOp at DefAddr never get used?
-bool SMPBasicBlock::IsDefDead(ea_t DefAddr, STARSOpndTypePtr DefOp) {
+bool SMPBasicBlock::IsDefDead(STARS_ea_t DefAddr, STARSOpndTypePtr DefOp) {
vector<SMPInstr *>::iterator InstIter = this->GetInstIterFromAddr(DefAddr);
++InstIter; // start with next instruction
@@ -3248,7 +3227,7 @@ bool SMPBasicBlock::IsDefDead(ea_t DefAddr, STARSOpndTypePtr DefOp) {
// Return true and produce list if any flags are live out of inst at InstAddr.
// NOTE: Assumes deadregs have been computed for all registers.
-bool SMPBasicBlock::AreFlagsLiveAfterInst(ea_t InstAddr, set<int> &LiveFlagRegs) {
+bool SMPBasicBlock::AreFlagsLiveAfterInst(STARS_ea_t InstAddr, set<int> &LiveFlagRegs) {
vector<SMPInstr *>::iterator InstIter = this->GetInstIterFromAddr(InstAddr);
STARSOpndTypePtr FlagsOp = (*InstIter)->MakeRegOpnd(MD_FLAGS_REG);
@@ -3300,7 +3279,7 @@ bool SMPBasicBlock::AreFlagsLiveAfterInst(ea_t InstAddr, set<int> &LiveFlagRegs)
} // end of SMPBasicBlock::AreFlagsLiveAfterInst()
// Return true if DefOp at DefAddr is used in or redefined by addition; pass back AdditionAddr
-bool SMPBasicBlock::IsDefInvolvedInAddition(ea_t DefAddr, STARSOpndTypePtr DefOp, ea_t &AdditionAddr) {
+bool SMPBasicBlock::IsDefInvolvedInAddition(STARS_ea_t DefAddr, STARSOpndTypePtr DefOp, STARS_ea_t &AdditionAddr) {
set<STARSOpndTypePtr, LessOp>::iterator LocalIter = this->LocalNames.find(DefOp);
bool UseFP = this->GetFunc()->UsesFramePointer();
vector<SMPInstr *>::iterator UseInstIter;
@@ -3323,7 +3302,7 @@ bool SMPBasicBlock::IsDefInvolvedInAddition(ea_t DefAddr, STARSOpndTypePtr DefOp
// Copied to another location via move or subtraction; could reach addition in that location.
set<DefOrUse, LessDefUse>::iterator CopyDefIter = UseInst->GetFirstNonFlagsDef();
STARSOpndTypePtr CopyDefOp = CopyDefIter->GetOp();
- ea_t CopyAdditionAddr;
+ STARS_ea_t CopyAdditionAddr;
if (this->IsDefInvolvedInAddition(UseInst->GetAddr(), CopyDefOp, CopyAdditionAddr)) {
AdditionAddr = CopyAdditionAddr;
return true;
@@ -3341,7 +3320,7 @@ bool SMPBasicBlock::IsDefInvolvedInAddition(ea_t DefAddr, STARSOpndTypePtr DefOp
} // end of SMPBasicBlock::IsDefInvolvedInAddition()
// Does a copy of UseOp get shifted right in this block?
-bool SMPBasicBlock::IsUseCopiedAndShiftedRight(STARSOpndTypePtr UseOp, ea_t UseAddr) {
+bool SMPBasicBlock::IsUseCopiedAndShiftedRight(STARSOpndTypePtr UseOp, STARS_ea_t UseAddr) {
SMPInstr *UseInst = this->FindInstr(UseAddr);
STARSOpndTypePtr SearchOp = UseOp;
set<DefOrUse, LessDefUse>::iterator UseIter = UseInst->FindUse(SearchOp);
@@ -3386,7 +3365,7 @@ bool SMPBasicBlock::IsUseCopiedAndShiftedRight(STARSOpndTypePtr UseOp, ea_t UseA
} // end of SMPBasicBlock::IsUseCopiedAndShiftedRight()
// Does value of DefOp/DefSSANum reach block end in any computation of any DEF at all?
-bool SMPBasicBlock::DoesDefReachBlockEnd(ea_t DefAddr, STARSOpndTypePtr DefOp, int DefSSANum, set<int> &NonEscapingRegisterHashes) {
+bool SMPBasicBlock::DoesDefReachBlockEnd(STARS_ea_t DefAddr, STARSOpndTypePtr DefOp, int DefSSANum, set<int> &NonEscapingRegisterHashes) {
set<STARSOpndTypePtr, LessOp>::iterator LocalIter = this->LocalNames.find(DefOp);
bool LocalName = (LocalIter != this->LocalNames.end());
bool DoesEscape = false;
@@ -3424,7 +3403,7 @@ bool SMPBasicBlock::DoesDefReachBlockEnd(ea_t DefAddr, STARSOpndTypePtr DefOp, i
continue;
}
}
- ea_t NextDefAddr = NextInst->GetAddr();
+ STARS_ea_t NextDefAddr = NextInst->GetAddr();
if (this->DoesDefReachBlockEnd(NextDefAddr, NextDefOp, NextDefSSANum, NonEscapingRegisterHashes)) {
DoesEscape = true;
break;
@@ -3457,7 +3436,7 @@ bool SMPBasicBlock::DoesDefReachBlockEnd(ea_t DefAddr, STARSOpndTypePtr DefOp, i
} // end of SMPBasicBlock::DoesDefReachBlockEnd()
// DefOp/DefSSANum is only used in LoopNum (outside of DefAddr) as address reg or Phi USE
-bool SMPBasicBlock::IsDefOnlyUsedAsAddressReg(ea_t DefAddr, STARSOpndTypePtr DefOp, size_t LoopNum, size_t &AddrUseCounter, SMPOperandType &MemType) {
+bool SMPBasicBlock::IsDefOnlyUsedAsAddressReg(STARS_ea_t DefAddr, STARSOpndTypePtr DefOp, size_t LoopNum, size_t &AddrUseCounter, SMPOperandType &MemType) {
bool OnlyAddressReg = false;
bool ReDefSeen = false;
@@ -3473,7 +3452,7 @@ bool SMPBasicBlock::IsDefOnlyUsedAsAddressReg(ea_t DefAddr, STARSOpndTypePtr Def
set<DefOrUse, LessDefUse>::iterator UseIter;
for (InstIter = this->GetFirstInst(); InstIter != this->GetLastInst(); ++InstIter) {
SMPInstr *CurrInst = (*InstIter);
- ea_t InstAddr = CurrInst->GetAddr();
+ STARS_ea_t InstAddr = CurrInst->GetAddr();
if (CurrInst->IsMarkerInst())
continue;
if (InstAddr != DefAddr) { // Skip induction variable re-definition.
@@ -3487,7 +3466,7 @@ bool SMPBasicBlock::IsDefOnlyUsedAsAddressReg(ea_t DefAddr, STARSOpndTypePtr Def
}
int BaseReg, IndexReg;
uint16_t ScaleFactor;
- ea_t offset;
+ STARS_ea_t offset;
MDExtractAddressFields(MemOp, BaseReg, IndexReg, ScaleFactor, offset);
if ((BaseReg != DefOp->GetReg()) && (IndexReg != DefOp->GetReg())) {
OnlyAddressReg = false; // USEd somehow, but not as an address reg.
@@ -3519,7 +3498,7 @@ bool SMPBasicBlock::IsDefOnlyUsedAsAddressReg(ea_t DefAddr, STARSOpndTypePtr Def
this->SetProcessed(true);
if (OnlyAddressReg && (!ReDefSeen)) {
list<SMPBasicBlock *>::iterator SuccIter;
- ea_t PseudoDefAddr; // To identify re-DEF instructions in successor blocks.
+ STARS_ea_t PseudoDefAddr; // To identify re-DEF instructions in successor blocks.
for (SuccIter = this->GetFirstSucc(); SuccIter != this->GetLastSucc(); ++SuccIter) {
PseudoDefAddr = STARS_LIVEIN_PSEUDO_ID; // any DEF without USE will be seen as a re-DEF in successor.
if (!(*SuccIter)->IsDefOnlyUsedAsAddressReg(PseudoDefAddr, DefOp, LoopNum, AddrUseCounter, MemType)) {
@@ -3542,7 +3521,7 @@ bool SMPBasicBlock::IsDefOnlyUsedAsAddressReg(ea_t DefAddr, STARSOpndTypePtr Def
// Is DefOp/DefAddr used in a loop back edge compare-and-branch?
-bool SMPBasicBlock::IsDefUsedInLoopCompareAndBranch(ea_t DefAddr, STARSOpndTypePtr DefOp, int DefSSANum, bool &Signed) {
+bool SMPBasicBlock::IsDefUsedInLoopCompareAndBranch(STARS_ea_t DefAddr, STARSOpndTypePtr DefOp, int DefSSANum, bool &Signed) {
bool UsedInCompareAndBranch = false;
bool ReDefSeen = false;
bool ReDefInvalidates = false;
@@ -3567,7 +3546,7 @@ bool SMPBasicBlock::IsDefUsedInLoopCompareAndBranch(ea_t DefAddr, STARSOpndTypeP
set<DefOrUse, LessDefUse>::iterator UseIter;
for (InstIter = this->GetFirstInst(); InstIter != this->GetLastInst(); ++InstIter) {
SMPInstr *CurrInst = (*InstIter);
- ea_t InstAddr = CurrInst->GetAddr();
+ STARS_ea_t InstAddr = CurrInst->GetAddr();
if (CurrInst->IsMarkerInst())
continue;
if (InstAddr > DefAddr) { // Don't waste time before DefAddr.
@@ -3648,7 +3627,7 @@ bool SMPBasicBlock::IsDefUsedInLoopCompareAndBranch(ea_t DefAddr, STARSOpndTypeP
if (!UsedInCompareAndBranch && (!CompareSeen) && !ReDefInvalidates) {
list<SMPBasicBlock *>::iterator SuccIter;
- ea_t PseudoDefAddr; // To identify re-DEF instructions in successor blocks.
+ STARS_ea_t PseudoDefAddr; // To identify re-DEF instructions in successor blocks.
for (SuccIter = this->GetFirstSucc(); SuccIter != this->GetLastSucc(); ++SuccIter) {
if ((*SuccIter)->IsLiveIn(SearchOp)) {
PseudoDefAddr = STARS_LIVEIN_PSEUDO_ID; // any DEF without USE will be seen as a re-DEF in successor.
@@ -3664,7 +3643,7 @@ bool SMPBasicBlock::IsDefUsedInLoopCompareAndBranch(ea_t DefAddr, STARSOpndTypeP
} // end of SMPBasicBlock::IsDefUsedInLoopCompareAndBranch()
// erase() block starting at FirstAddr from Preds list
-void SMPBasicBlock::ErasePred(ea_t FirstBlockAddr) {
+void SMPBasicBlock::ErasePred(STARS_ea_t FirstBlockAddr) {
list<SMPBasicBlock *>::iterator PredIter;
PredIter = this->Predecessors.begin();
while (PredIter != this->Predecessors.end()) {
@@ -3679,7 +3658,7 @@ void SMPBasicBlock::ErasePred(ea_t FirstBlockAddr) {
} // end of SMPBasicBlock::ErasePred()
// erase() block starting at FirstAddr from Successors list
-void SMPBasicBlock::EraseSucc(ea_t FirstBlockAddr) {
+void SMPBasicBlock::EraseSucc(STARS_ea_t FirstBlockAddr) {
list<SMPBasicBlock *>::iterator SuccIter;
SuccIter = this->Successors.begin();
while (SuccIter != this->Successors.end()) {
@@ -3695,8 +3674,8 @@ void SMPBasicBlock::EraseSucc(ea_t FirstBlockAddr) {
// Add ReachInDefn to the ReachesIn set. If it was not already present,
// then update the ReachesOutStale flag.
-void SMPBasicBlock::AddReachesIn(pair<STARSOpndTypePtr, ea_t> ReachInDefn) {
- pair<set<pair<STARSOpndTypePtr, ea_t>, LessDefinition>::iterator, bool> InsertResult;
+void SMPBasicBlock::AddReachesIn(pair<STARSOpndTypePtr, STARS_ea_t> ReachInDefn) {
+ pair<set<pair<STARSOpndTypePtr, STARS_ea_t>, LessDefinition>::iterator, bool> InsertResult;
InsertResult = ReachesInSet.insert(ReachInDefn);
if (InsertResult.second) {
// New element added; ReachesOut set might be stale.
@@ -3708,8 +3687,8 @@ void SMPBasicBlock::AddReachesIn(pair<STARSOpndTypePtr, ea_t> ReachInDefn) {
// present in the ReachesOut set, then propagate it to the ReachesIn sets
// of all successor blocks. NOTE: The policy here is to keep the ReachesIn
// sets up to date at all times.
-void SMPBasicBlock::AddReachesOut(pair<STARSOpndTypePtr, ea_t> ReachOutDefn) {
- pair<set<pair<STARSOpndTypePtr, ea_t>, LessDefinition>::iterator, bool> InsertResult;
+void SMPBasicBlock::AddReachesOut(pair<STARSOpndTypePtr, STARS_ea_t> ReachOutDefn) {
+ pair<set<pair<STARSOpndTypePtr, STARS_ea_t>, LessDefinition>::iterator, bool> InsertResult;
InsertResult = ReachesOutSet.insert(ReachOutDefn);
if (InsertResult.second) {
// Insertion was of a new element; propagate to ReachesIn of all successors.
@@ -4078,7 +4057,7 @@ bool SMPBasicBlock::FindRedundantLocalMetadata(bool SafeFunc) {
for (InstIter = this->GetFirstInst(); InstIter != this->GetLastInst(); ++InstIter) {
CurrInst = (*InstIter);
- ea_t InstAddr = CurrInst->GetAddr();
+ STARS_ea_t InstAddr = CurrInst->GetAddr();
if (CurrInst->IsMarkerInst())
continue; // skip SSA marker instruction; has no normal DEFs
CallInst = ((CurrInst->GetDataFlowType() == CALL)
@@ -4273,7 +4252,7 @@ bool SMPBasicBlock::IsBenignOverflowDEF(STARSOpndTypePtr DefOp, int DefSSANum, s
// only capable of two-address instructions. For either of the source operands, we want to
// suppress annotations if the ultimate source was any special operation, such as bitwise operations
// or zero-extended moves.
- ea_t SourceInstAddr = BADADDR;
+ STARS_ea_t SourceInstAddr = BADADDR;
int UseSSANum = SMP_SSA_UNINIT;
bool SpecialSourceFound = false;
if (DefInst->MDIsLoadEffectiveAddressInstr()) {
@@ -4389,7 +4368,7 @@ bool SMPBasicBlock::IsBenignOverflowDEF(STARSOpndTypePtr DefOp, int DefSSANum, s
UseIter = DefInst->FindUse(DefOp);
if (UseIter != DefInst->GetLastUse()) {
int UseSSANum = UseIter->GetSSANum();
- ea_t UseDefAddr = this->GetDefAddrFromUseAddr(DefOp, DefAddr, UseSSANum, LocalDefName);
+ STARS_ea_t UseDefAddr = this->GetDefAddrFromUseAddr(DefOp, DefAddr, UseSSANum, LocalDefName);
if (UseDefAddr >= this->GetFirstAddr() && (UseDefAddr <= this->GetLastAddr())) {
// Limit to the simple case in which UseDefAddr is in our block, not Phi function or function entry marker inst.
SMPInstr *UseDefInst = this->GetFunc()->GetInstFromAddr(UseDefAddr);
@@ -4439,10 +4418,10 @@ bool SMPBasicBlock::IsBenignOverflowDEF(STARSOpndTypePtr DefOp, int DefSSANum, s
STARSOpndTypePtr UseOp = DefInst->GetLeaMemUseOp();
int BaseReg, IndexReg;
uint16_t ScaleFactor;
- ea_t offset;
+ STARS_ea_t offset;
MDExtractAddressFields(UseOp, BaseReg, IndexReg, ScaleFactor, offset);
- bool SafeBaseReg = (BaseReg == R_none);
- bool SafeIndexReg = (IndexReg == R_none);
+ bool SafeBaseReg = (BaseReg == STARS_x86_R_none);
+ bool SafeIndexReg = (IndexReg == STARS_x86_R_none);
STARSOpndTypePtr SearchOp = nullptr;
if (!SafeBaseReg) {
SearchOp = DefInst->MakeRegOpnd(BaseReg);
@@ -4616,7 +4595,7 @@ bool SMPBasicBlock::IsBenignOverflowDEF(STARSOpndTypePtr DefOp, int DefSSANum, s
InstIter = this->GetInstIterFromAddr(DefAddr);
assert(InstIter != this->GetLastInst());
vector<SMPInstr *>::reverse_iterator RevInstIter(InstIter);
- ea_t FirstAddrFound = (*InstIter)->GetAddr();
+ STARS_ea_t FirstAddrFound = (*InstIter)->GetAddr();
while (RevInstIter != this->GetRevInstEnd()) {
SMPInstr *SearchInst = (*RevInstIter);
if (SearchInst->FindDef(DefOp) != SearchInst->GetLastDef()) {
@@ -4715,7 +4694,7 @@ bool SMPBasicBlock::IsBenignOverflowDEF(STARSOpndTypePtr DefOp, int DefSSANum, s
set<DefOrUse, LessDefUse>::iterator UseIter = DefInst->FindUse(UseOp2);
assert(UseIter != DefInst->GetLastUse());
int UseSSANum = UseIter->GetSSANum();
- ea_t UseDefAddr = this->GetDefAddrFromUseAddr(UseOp2, DefAddr, UseSSANum, this->IsLocalName(UseOp2));
+ STARS_ea_t UseDefAddr = this->GetDefAddrFromUseAddr(UseOp2, DefAddr, UseSSANum, this->IsLocalName(UseOp2));
// Stick with simple case in which an instruction was found in the block.
if ((UseDefAddr >= this->GetFirstAddr()) && (UseDefAddr <= this->GetLastAddr())) {
vector<SMPInstr *>::iterator InstIter = this->GetInstIterFromAddr(UseDefAddr);
@@ -4742,7 +4721,7 @@ bool SMPBasicBlock::IsBenignOverflowDEF(STARSOpndTypePtr DefOp, int DefSSANum, s
set<DefOrUse, LessDefUse>::iterator UseIter = DefInst->FindUse(DefOp);
assert(UseIter != DefInst->GetLastUse());
int DefUseSSANum = UseIter->GetSSANum();
- ea_t DefUseDefAddr = this->GetDefAddrFromUseAddr(DefOp, DefAddr, DefUseSSANum, this->IsLocalName(DefOp));
+ STARS_ea_t DefUseDefAddr = this->GetDefAddrFromUseAddr(DefOp, DefAddr, DefUseSSANum, this->IsLocalName(DefOp));
// Stick with simple case in which an instruction was found in the block.
if ((DefUseDefAddr >= this->GetFirstAddr()) && (DefUseDefAddr <= this->GetLastAddr())) {
@@ -4770,7 +4749,7 @@ bool SMPBasicBlock::IsBenignOverflowDEF(STARSOpndTypePtr DefOp, int DefSSANum, s
} // end of SMPBasicBlock::IsBenignOverflowDEF()
// Is subword of DefOp written later, before TruncAddr?
-bool SMPBasicBlock::IsDEFWrittenWithTruncation(STARSOpndTypePtr DefOp, int DefSSANum, ea_t DefAddr, ea_t TruncAddr, bool PhiDEF) {
+bool SMPBasicBlock::IsDEFWrittenWithTruncation(STARSOpndTypePtr DefOp, int DefSSANum, STARS_ea_t DefAddr, STARS_ea_t TruncAddr, bool PhiDEF) {
assert(DefOp->IsRegOp());
STARSOpndTypePtr SearchOp = CloneIfNecessary(DefOp, this->GetFunc()->UsesFramePointer());
CanonicalizeOpnd(SearchOp);
@@ -4785,7 +4764,7 @@ bool SMPBasicBlock::IsDEFWrittenWithTruncation(STARSOpndTypePtr DefOp, int DefSS
while (InstIter != this->GetLastInst()) {
// Search for subword write of DefOp/DefSSANum.
SMPInstr *CurrInst = (*InstIter);
- ea_t InstAddr = CurrInst->GetAddr();
+ STARS_ea_t InstAddr = CurrInst->GetAddr();
if (InstAddr >= TruncAddr)
break; // else we will find the apparent truncation we started with!
@@ -4981,7 +4960,7 @@ bool SMPBasicBlock::IsBenignTruncationDEF(STARSOpndTypePtr DefOp, int DefSSANum,
return true;
SMPInstr *DefInst = this->GetFunc()->GetInstFromAddr(DefAddr);
- ea_t SourceInstAddr = BADADDR;
+ STARS_ea_t SourceInstAddr = BADADDR;
SMPInstr *SourceInst = NULL;
int DefUseSSANum = SMP_SSA_UNINIT;
bool SpecialSourceFound = false;
@@ -5004,7 +4983,7 @@ bool SMPBasicBlock::IsBenignTruncationDEF(STARSOpndTypePtr DefOp, int DefSSANum,
// See if truncation use is a copy of another register that gets subword masked, which
// is a sign that the truncation use is also only valid for the lower bits.
bool LocalName = this->IsLocalName(SearchOp);
- ea_t UseDefAddr = this->GetDefAddrFromUseAddr(SearchOp, DefAddr, UseSSANum, LocalName);
+ STARS_ea_t UseDefAddr = this->GetDefAddrFromUseAddr(SearchOp, DefAddr, UseSSANum, LocalName);
if ((BADADDR != UseDefAddr) && (!STARS_IsBlockNumPseudoID(UseDefAddr))) {
// We have a valid inst addr (not Phi block number). See if it is a reg to reg copy.
SMPInstr *CopyInst = this->GetFunc()->GetInstFromAddr(UseDefAddr);
@@ -5051,7 +5030,7 @@ bool SMPBasicBlock::IsBenignTruncationDEF(STARSOpndTypePtr DefOp, int DefSSANum,
set<DefOrUse, LessDefUse>::iterator UseIter = CurrInst->FindUse(SearchOp);
if ((UseIter != CurrInst->GetLastUse()) && (UseSSANum == UseIter->GetSSANum())) {
// Found a copy of SearchOp+UseSSANum to another register.
- ea_t CopyAddr = CurrInst->GetAddr();
+ STARS_ea_t CopyAddr = CurrInst->GetAddr();
set<DefOrUse, LessDefUse>::iterator DefIter = CurrInst->GetFirstNonFlagsDef();
STARSOpndTypePtr CopyRegOp = DefIter->GetOp();
int CopyRegSSANum = DefIter->GetSSANum();
@@ -5075,7 +5054,7 @@ bool SMPBasicBlock::IsBenignTruncationDEF(STARSOpndTypePtr DefOp, int DefSSANum,
// etc.
// write subword of edx ; not really a truncation
bool LocalName = this->IsLocalName(SearchOp);
- ea_t UseDefAddr = this->GetDefAddrFromUseAddr(SearchOp, DefAddr, UseSSANum, LocalName);
+ STARS_ea_t UseDefAddr = this->GetDefAddrFromUseAddr(SearchOp, DefAddr, UseSSANum, LocalName);
if (BADADDR != UseDefAddr) {
// Check for Phi DEF instead of inst DEF.
bool PhiDEF = false;
@@ -5102,14 +5081,14 @@ bool SMPBasicBlock::IsBenignTruncationDEF(STARSOpndTypePtr DefOp, int DefSSANum,
} // end of SMPBasicBlock::IsBenignTruncationDEF()
// Does DefOp+DefSSANum get subreg masked before it gets re-DEFined?
-bool SMPBasicBlock::IsDefMaskedOrShiftedRight(STARSOpndTypePtr DefOp, int DefSSANum, ea_t DefAddr) {
+bool SMPBasicBlock::IsDefMaskedOrShiftedRight(STARSOpndTypePtr DefOp, int DefSSANum, STARS_ea_t DefAddr) {
bool MaskingDetected = false;
vector<SMPInstr *>::iterator InstIter;
set<DefOrUse, LessDefUse>::iterator UseIter, DefIter;
STARSOpndTypePtr SearchOp = CloneIfSubwordReg(DefOp);
int UseSSANum;
- ea_t InstAddr;
+ STARS_ea_t InstAddr;
size_t BytesMasked;
if (DefOp->IsRegOp()) {
@@ -5174,7 +5153,7 @@ bool SMPBasicBlock::UseHasCriticalSink(STARSOpndTypePtr DefOp, int DefSSANum, ST
bool FoundArgPass = false;
int SearchSSANum = DefSSANum;
int SearchSSANum2 = DefSSANum2;
- ea_t InstAddr; // for debugging, breakpoints, etc.
+ STARS_ea_t InstAddr; // for debugging, breakpoints, etc.
size_t ArgumentNumber = 7; // init to bad number
// avoid infinite recursion
@@ -5370,11 +5349,11 @@ bool SMPBasicBlock::UseHasCriticalSink(STARSOpndTypePtr DefOp, int DefSSANum, ST
// It is safe to emit signedness checks when the very next use of a stack DEF is as
// a sign-extended or zero-extended load. Beyond a single basic block, we need to
// do more analysis. This catches a simple case that is valid across all programs.
-bool SMPBasicBlock::IsStackOpNextUsedWithSignedness(STARSOpndTypePtr StackDefOp, ea_t DefAddr, int SSANum) {
+bool SMPBasicBlock::IsStackOpNextUsedWithSignedness(STARSOpndTypePtr StackDefOp, STARS_ea_t DefAddr, int SSANum) {
bool SafeCheck = false;
vector<SMPInstr *>::iterator InstIter;
set<DefOrUse, LessDefUse>::iterator UseIter;
- ea_t InstAddr; // for debugging, breakpoints, etc.
+ STARS_ea_t InstAddr; // for debugging, breakpoints, etc.
bool FoundDefInst = false;
for (InstIter = this->GetFirstInst(); InstIter != this->GetLastInst(); ++InstIter) {
@@ -5415,7 +5394,7 @@ void SMPBasicBlock::SuppressAnnotOnSignChangingAddition(STARSOpndTypePtr DefOp,
++DefInstIter;
while (DefInstIter != this->GetLastInst()) {
SMPInstr *CurrInst = (*DefInstIter);
- ea_t InstAddr = CurrInst->GetAddr();
+ STARS_ea_t InstAddr = CurrInst->GetAddr();
if (CurrInst->MDIsSmallPositiveAddition()) {
UseIter = CurrInst->FindUse(DefOp);
if (UseIter != CurrInst->GetLastUse()) {
@@ -5466,13 +5445,13 @@ void SMPBasicBlock::AnalyzePrepForNumericAnnotations(void) {
if (this->HasCallInstruction()) {
vector<SMPInstr *>::iterator InstIter;
bool FoundTrustedCall = false;
- ea_t FirstTrustedCallAddr = 0xfffffff0;
+ STARS_ea_t FirstTrustedCallAddr = 0xfffffff0;
SMPInstr *CurrInst;
- ea_t InstAddr;
+ STARS_ea_t InstAddr;
unsigned int TaintArgPosBits = 0;
bool FoundTaintWarningCall = false;
- ea_t FirstTaintSensitiveCallAddr;
- ea_t SkipOverCallAddr = 0;
+ STARS_ea_t FirstTaintSensitiveCallAddr;
+ STARS_ea_t SkipOverCallAddr = 0;
string TaintFuncName;
// See if we have any calls to system calls that produce trusted output or are taint sensitive.
@@ -5543,9 +5522,9 @@ void SMPBasicBlock::AnalyzePrepForNumericAnnotations(void) {
if (UseIter != CurrInst->GetLastUse()) {
int UseSSANum = UseIter->GetSSANum();
this->GetFunc()->ResetProcessedBlocks(); // prevent infinite recursion in IsOpSourceByteSwap()
- ea_t ByteSwapAddr;
+ STARS_ea_t ByteSwapAddr;
if (CurrInst->IsOpSourceByteSwap(ArgSourceOp, UseSSANum, ByteSwapAddr)) {
- SMP_fprintf(ZST_AlarmFile, "ALARM: Call to %s at %lx receives user-tainted argument at %lx which was tainted at %lx\n",
+ SMP_fprintf(global_STARS_program->GetAlarmFile(), "ALARM: Call to %s at %lx receives user-tainted argument at %lx which was tainted at %lx\n",
TaintFuncName.c_str(), (unsigned long) FirstTaintSensitiveCallAddr, (unsigned long) InstAddr, (unsigned long) ByteSwapAddr);
break;
}
@@ -5560,7 +5539,7 @@ void SMPBasicBlock::AnalyzePrepForNumericAnnotations(void) {
}
} // end if block has call
else if (STARS_HASH_BLOCK_MIN_INSTRS <= this->InstVec.size()) {
- ea_t InstAddr;
+ STARS_ea_t InstAddr;
size_t HashingArithmeticCount = 0;
for (vector<SMPInstr *>::iterator InstIter = this->GetFirstInst(); InstIter != this->GetLastInst(); ++InstIter) {
SMPInstr *CurrInst = (*InstIter);
@@ -5624,7 +5603,7 @@ bool SMPBasicBlock::IsBranchSignednessUnreliable(void) {
// UNSIGNED.
bool JumpAbove = false;
bool JumpBelow = false;
- ea_t TargetAddr = BADADDR, BranchAddr = BADADDR;
+ STARS_ea_t TargetAddr = BADADDR, BranchAddr = BADADDR;
SMPInstr *BranchInst;
unsigned short opcode;
vector<SMPInstr *>::reverse_iterator InstRevIter;
@@ -5636,8 +5615,8 @@ bool SMPBasicBlock::IsBranchSignednessUnreliable(void) {
BranchInst = (*InstIter);
BranchAddr = BranchInst->GetAddr();
opcode = BranchInst->GetIDAOpcode();
- JumpAbove = (opcode == NN_ja);
- JumpBelow = (opcode == NN_jb);
+ JumpAbove = (opcode == STARS_NN_ja);
+ JumpBelow = (opcode == STARS_NN_jb);
if (JumpAbove || JumpBelow) {
// We look for the simple pattern of fall-through-only from first block
// to second block.
@@ -5648,9 +5627,9 @@ bool SMPBasicBlock::IsBranchSignednessUnreliable(void) {
BranchInst = (*InstRevIter);
opcode = BranchInst->GetIDAOpcode();
if (JumpBelow)
- JumpAbove = (opcode == NN_ja);
+ JumpAbove = (opcode == STARS_NN_ja);
else if (JumpAbove)
- JumpBelow = (opcode == NN_jb);
+ JumpBelow = (opcode == STARS_NN_jb);
}
}
}
@@ -5660,8 +5639,8 @@ bool SMPBasicBlock::IsBranchSignednessUnreliable(void) {
BranchInst = (*InstRevIter);
BranchAddr = BranchInst->GetAddr();
opcode = BranchInst->GetIDAOpcode();
- JumpAbove = (opcode == NN_ja);
- JumpBelow = (opcode == NN_jb);
+ JumpAbove = (opcode == STARS_NN_ja);
+ JumpBelow = (opcode == STARS_NN_jb);
if (JumpAbove || JumpBelow) {
// We look for the simple pattern of fall-through-only from first block
// to second block, plus conditional branch target.
@@ -5673,9 +5652,9 @@ bool SMPBasicBlock::IsBranchSignednessUnreliable(void) {
BranchInst = (*InstIter);
opcode = BranchInst->GetIDAOpcode();
if (JumpBelow)
- JumpAbove = (opcode == NN_ja);
+ JumpAbove = (opcode == STARS_NN_ja);
else if (JumpAbove)
- JumpBelow = (opcode == NN_jb);
+ JumpBelow = (opcode == STARS_NN_jb);
}
}
}
@@ -5695,7 +5674,7 @@ bool SMPBasicBlock::IsBranchSignednessUnreliable(void) {
assert(UseIter != BranchInst->GetLastUse());
int UseSSANum = UseIter->GetSSANum();
bool LocalFlags = this->IsLocalName(UseOp);
- ea_t DefAddr = this->GetDefAddrFromUseAddr(UseOp, BranchInst->GetAddr(), UseSSANum, LocalFlags);
+ STARS_ea_t DefAddr = this->GetDefAddrFromUseAddr(UseOp, BranchInst->GetAddr(), UseSSANum, LocalFlags);
// Phi DEFs are rarely or never found as the source of the flags for a branch, so keep it simple.
if (!STARS_IsBlockNumPseudoID(DefAddr)) { // DefAddr is an inst, not a Phi DEF.
// In order to fit the pattern, we need to see a comparison to a positive immediate constant.
@@ -5717,7 +5696,7 @@ bool SMPBasicBlock::IsBranchSignednessUnreliable(void) {
UseSSANum = UseIter->GetSSANum();
SMPBasicBlock *CompareBlock = CompareInst->GetBlock(); // just in case it's not this block
bool LocalCompName = CompareBlock->IsLocalName(CompareOperand);
- ea_t SubtractAddr = CompareBlock->GetDefAddrFromUseAddr(CompareOperand, DefAddr, UseSSANum, LocalCompName);
+ STARS_ea_t SubtractAddr = CompareBlock->GetDefAddrFromUseAddr(CompareOperand, DefAddr, UseSSANum, LocalCompName);
if (!STARS_IsBlockNumPseudoID(SubtractAddr)) {
SMPInstr *SubtractInst = this->GetFunc()->GetInstFromAddr(SubtractAddr);
STARSOpndTypePtr MinuendOp = nullptr;
@@ -5742,11 +5721,11 @@ bool SMPBasicBlock::IsBranchSignednessUnreliable(void) {
} // end of SMPBasicBlock::IsBranchSignednessUnreliable()
// Find stack adjustment code, if any, after CallAddr.
-sval_t SMPBasicBlock::ComputeStackAdjustmentAfterCall(ea_t CallAddr) {
+sval_t SMPBasicBlock::ComputeStackAdjustmentAfterCall(STARS_ea_t CallAddr) {
sval_t AdjustmentBytes = 0;
sval_t PriorAdjustmentBytes = 0; // stack deltas before the call
vector<SMPInstr *>::iterator InstIter;
- ea_t InstAddr; // for debugging, breakpoints, etc.
+ STARS_ea_t InstAddr; // for debugging, breakpoints, etc.
bool FoundCallInst = false;
bool FirstBlock = (this->GetFirstAddr() == this->GetFunc()->GetFirstFuncAddr());
@@ -5824,7 +5803,7 @@ sval_t SMPBasicBlock::ComputeStackAdjustmentAfterCall(ea_t CallAddr) {
} // end of SMPBasicBlock::ComputeStackAdjustmentAfterCall()
// Is reg DefOp+DefSSANum (popped from WorkList) at DefAddr used as address reg or as source operand in memory write?
-bool SMPBasicBlock::IsDefUsedInMemWrite(list<pair<pair<STARSOpndTypePtr, int>, ea_t> > &WorkList, STARSOpndTypePtr DefOp, int DefSSANum, ea_t DefAddr) {
+bool SMPBasicBlock::IsDefUsedInMemWrite(list<pair<pair<STARSOpndTypePtr, int>, STARS_ea_t> > &WorkList, STARSOpndTypePtr DefOp, int DefSSANum, STARS_ea_t DefAddr) {
#if 0
return true;
#else
@@ -5873,9 +5852,9 @@ bool SMPBasicBlock::IsDefUsedInMemWrite(list<pair<pair<STARSOpndTypePtr, int>, e
if (IsMemOperand(NewDefOp)) {
int BaseReg, IndexReg;
uint16_t ScaleFactor;
- ea_t Offset;
+ STARS_ea_t Offset;
MDExtractAddressFields(NewDefOp, BaseReg, IndexReg, ScaleFactor, Offset);
- if ((BaseReg == DefOp->GetReg()) && ((IndexReg == R_none) || (MD_STACK_POINTER_REG == IndexReg))) {
+ if ((BaseReg == DefOp->GetReg()) && ((IndexReg == STARS_x86_R_none) || (MD_STACK_POINTER_REG == IndexReg))) {
// Direct write through DefOp reg. Only danger is the unlikely case that DefOp appears twice,
// e.g. mov [eax],eax in which case it is hard to track eax later in memory.
DangerousWrite = CurrInst->IsNonAddressReg(DefOp);
@@ -5895,7 +5874,7 @@ bool SMPBasicBlock::IsDefUsedInMemWrite(list<pair<pair<STARSOpndTypePtr, int>, e
// USEd to create a new DEF by arithmetic or by a copy.
int NewDefSSANum = DefIter->GetSSANum();
pair<STARSOpndTypePtr, int> NewSearchItem(NewDefOp, NewDefSSANum);
- pair<pair<STARSOpndTypePtr, int>, ea_t> NewWorkListItem(NewSearchItem, CurrInst->GetAddr());
+ pair<pair<STARSOpndTypePtr, int>, STARS_ea_t> NewWorkListItem(NewSearchItem, CurrInst->GetAddr());
WorkList.push_back(NewWorkListItem);
}
}
@@ -5917,7 +5896,7 @@ bool SMPBasicBlock::IsDefUsedInMemWrite(list<pair<pair<STARSOpndTypePtr, int>, e
while (SuccIter != this->GetLastSucc()) {
SMPBasicBlock *SuccBlock = (*SuccIter);
if (SuccBlock->IsLiveIn(DefOp)) {
- ea_t NewDefAddr = STARS_LIVEIN_PSEUDO_ID;
+ STARS_ea_t NewDefAddr = STARS_LIVEIN_PSEUDO_ID;
FoundMemWriteUse = SuccBlock->IsDefUsedInMemWrite(WorkList, DefOp, DefSSANum, NewDefAddr);
if (FoundMemWriteUse)
break;
diff --git a/src/base/SMPDBInterface.cpp b/src/base/SMPDBInterface.cpp
index 9e43fe4b..abdd3aee 100644
--- a/src/base/SMPDBInterface.cpp
+++ b/src/base/SMPDBInterface.cpp
@@ -54,14 +54,82 @@
#include <intel.hpp>
#include <name.hpp>
-#include "SMPDBInterface.h"
-#include "SMPStaticAnalyzer.h"
-#include "SMPDataFlowAnalysis.h"
+#include "interfaces/SMPDBInterface.h"
+#include "base/SMPDataFlowAnalysis.h"
+
+// Indentation level when emitting SPARK Ada translation of the RTLs.
+unsigned short STARS_SPARK_IndentCount;
+
+// Debugging counters for analyzing memory usage.
+unsigned long UnusedStructCount;
+unsigned long UnusedIntCount;
+
+// Counters for dead metadata analysis.
+unsigned long DeadMetadataCount;
+unsigned long LiveMetadataCount;
+
+// Counters for indirect jump resolution.
+unsigned long ResolvedIndirectJumpCount;
+unsigned long UnresolvedIndirectJumpCount;
+
+// Counters for measuring SCCP success in finding constant DEFs.
+unsigned long ConstantDEFCount;
+unsigned long AlwaysTakenBranchCount;
+unsigned long NeverTakenBranchCount;
+
+// Counters for accessing less than machine register width.
+unsigned long SubwordRegCount;
+unsigned long SubwordMemCount;
+unsigned long SubwordAddressRegCount;
+unsigned long SPARKOperandCount; // total operands printed
+
+#if SMP_COUNT_MEMORY_ALLOCATIONS
+// Counters for analyzing memory use for allocated and used objects.
+unsigned long SMPInstCount;
+unsigned long SMPBlockCount;
+unsigned long SMPFuncCount;
+unsigned long SMPGlobalVarCount;
+unsigned long SMPLocalVarCount;
+unsigned long SMPDefUseChainCount;
+unsigned long SMPInstBytes;
+unsigned long SMPDefUseChainBytes;
+#endif
+
+#if SMP_MEASURE_NUMERIC_ANNOTATIONS
+unsigned long NumericAnnotationsCount12; // cases 1 and 2
+unsigned long NumericAnnotationsCount3; // case 3
+unsigned long TruncationAnnotationsCount; // case 4
+unsigned long SignednessWithoutTruncationCount; // case 5
+unsigned long LeaInstOverflowCount; // case 6
+unsigned long WidthDoublingTruncationCount; // case 7
+unsigned long BenignOverflowInstCount;
+unsigned long BenignOverflowDefCount;
+unsigned long SuppressStackPtrOverflowCount;
+unsigned long SuppressLiveFlagsOverflowCount;
+unsigned long LiveMultiplyBitsCount;
+unsigned long BenignTruncationCount;
+unsigned long SuppressTruncationRegPiecesAllUsed;
+unsigned long SuppressSignednessOnTruncation;
+#endif
+
+#if STARS_SCCP_GATHER_STATISTICS
+// Counters for analyzing Sparse Conditional Constant Propagation effectiveness.
+unsigned long SCCPFuncsWithArgWriteCount;
+unsigned long SCCPFuncsWithConstantArgWriteCount;
+unsigned long SCCPOutgoingArgWriteCount;
+unsigned long SCCPConstantOutgoingArgWriteCount;
+#endif
+
+// Counter for max # of basic blocks seen in one function.
+unsigned long STARS_MaxBlockCount;
+
+// strings for printing ZST_SysCallType
+const char *CallTypeNames[4] = { "Unrestricted", "High-Privilege", "File-Access", "Network-Access" };
#ifdef STARS_IDA_INTERFACE
// Get instruction info by address from IDA Pro.
-bool SMPGetCmd(STARS_ea_t InstAddr, insn_t &SMPcmd, uint32 &SMPfeatures) {
+bool SMPGetCmd(STARS_ea_t InstAddr, insn_t &SMPcmd, uint32_t &SMPfeatures) {
bool success = true;
// Fill cmd structure with disassembly of instr
@@ -86,7 +154,7 @@ bool SMPGetCmd(STARS_ea_t InstAddr, insn_t &SMPcmd, uint32 &SMPfeatures) {
for (int i = 0; i < UA_MAXOP; ++i) {
SMPcmd.Operands[i].specflag4 = 0;
#ifdef __EA64__
- if (STARS_ISA_Bitwidth == 64) {
+ if (global_STARS_program->GetSTARS_ISA_Bitwidth() == 64) {
// Copy the cmd.rex prefix into the op_t.specflag4 field for each operand
// that has a SIB byte.
SMPcmd.Operands[i].specflag4 = SMPcmd.rex;
@@ -99,14 +167,14 @@ bool SMPGetCmd(STARS_ea_t InstAddr, insn_t &SMPcmd, uint32 &SMPfeatures) {
}
switch (SMPcmd.itype) {
- case NN_vgatherdps:
- case NN_vgatherdpd:
- case NN_vgatherqps:
- case NN_vgatherqpd:
- case NN_vpgatherdd:
- case NN_vpgatherdq:
- case NN_vpgatherqd:
- case NN_vpgatherqq:
+ case STARS_NN_vgatherdps:
+ case STARS_NN_vgatherdpd:
+ case STARS_NN_vgatherqps:
+ case STARS_NN_vgatherqpd:
+ case STARS_NN_vpgatherdd:
+ case STARS_NN_vpgatherdq:
+ case STARS_NN_vpgatherqd:
+ case STARS_NN_vpgatherqq:
SMPcmd.Operands[i].specflag4 |= STARS_VSIB;
default:
;
diff --git a/src/base/SMPDataFlowAnalysis.cpp b/src/base/SMPDataFlowAnalysis.cpp
index 0691465f..43760e94 100644
--- a/src/base/SMPDataFlowAnalysis.cpp
+++ b/src/base/SMPDataFlowAnalysis.cpp
@@ -19,7 +19,7 @@
* e-mail: jwd@virginia.com
* URL : http://www.cs.virginia.edu/
*
- * Additional copyrights 2010, 2011 by Zephyr Software LLC
+ * Additional copyrights 2010, 2011, 2012, 2013, 2014, 2015 by Zephyr Software LLC
* e-mail: {clc,jwd}@zephyr-software.com
* URL : http://www.zephyr-software.com/
*
@@ -39,22 +39,23 @@
#include <string>
#include <cstring>
+#include <cassert>
+#if 0
#include <pro.h>
-#include <assert.h>
+#include <intel.hpp>
#include <ida.hpp>
#include <idp.hpp>
#include <auto.hpp>
#include <bytes.hpp>
#include <funcs.hpp>
-#include <intel.hpp>
#include <loader.hpp>
#include <lines.hpp>
#include <name.hpp>
+#endif
#include "interfaces/SMPDBInterface.h"
#include "base/SMPDataFlowAnalysis.h"
-#include "base/SMPStaticAnalyzer.h"
#include "base/SMPInstr.h"
#include "base/SMPBasicBlock.h"
#include "base/SMPFunction.h"
@@ -69,11 +70,14 @@ using namespace std;
#define STARS_DEBUG_DUMP_IDENTIFY_HIDDEN_OPERANDS 0 // print HIDDEN if operand.showed() is false
#if IDA_SDK_VERSION > 560
-#define MAX_IDA_REG R_last
+#define MAX_IDA_REG STARS_x86_R_last
#else
#define MAX_IDA_REG 80
#endif
+// Bit masks for extracting bits from a STARSBitSet unsigned char.
+const unsigned char STARSBitMasks[8] = { 1, 2, 4, 8, 16, 32, 64, 128 };
+
const char *RegNames[MAX_IDA_REG + 1] =
{ "EAX", "ECX", "EDX", "EBX", "ESP", "EBP", "ESI", "EDI",
"R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15",
@@ -111,7 +115,7 @@ const unsigned char RegSizes[MAX_IDA_REG + 1] =
};
unsigned char GetRegSize(uint16_t RegNum) {
- assert(RegNum != ((uint16_t) R_none));
+ assert(RegNum != ((uint16_t) STARS_x86_R_none));
return RegSizes[RegNum];
}
@@ -144,13 +148,13 @@ const char *LeaSignednessStrings[4] = { "NOFLAGUNKNOWNSIGN", "NOFLAGSIGNED", "NO
// Distinguishes subword regs from their parent regs
const char *MDGetRegNumName(uint16_t RegNum, uint16_t ByteWidth) {
- if ((R_none == RegNum) || (MAX_IDA_REG < RegNum))
+ if ((STARS_x86_R_none == RegNum) || (MAX_IDA_REG < RegNum))
return ErrorStrings[0];
- else if ((ByteWidth == 2) && (RegNum >= R_ax) && (RegNum <= R_di)) {
+ else if ((ByteWidth == 2) && (RegNum >= STARS_x86_R_ax) && (RegNum <= STARS_x86_R_di)) {
// 16-bit registers
return WordRegStrings[RegNum];
}
- else if ((ByteWidth == 8) && (RegNum >= R_ax) && (RegNum <= R_di)) {
+ else if ((ByteWidth == 8) && (RegNum >= STARS_x86_R_ax) && (RegNum <= STARS_x86_R_di)) {
// 64-bit registers
return QWordRegStrings[RegNum];
}
@@ -170,13 +174,13 @@ const char *MDGetRegName(STARSOpndTypePtr RegOp) {
}
// Define instruction categories for data flow analysis.
-SMPitype DFACategory[NN_last+1];
+SMPitype DFACategory[STARS_NN_last+1];
// Define instruction categories for data type analysis.
-int SMPTypeCategory[NN_last+1];
+int SMPTypeCategory[STARS_NN_last+1];
// Define which instructions define and use the CPU flags.
-bool SMPDefsFlags[NN_last + 1];
-bool SMPUsesFlags[NN_last + 1];
+bool SMPDefsFlags[STARS_NN_last + 1];
+bool SMPUsesFlags[STARS_NN_last + 1];
// Hash a global name and SSA number into an int, for use in SMPFunction.GlobalDefAddrBySSA map
int HashGlobalNameAndSSA(STARSOpndTypePtr DefOp, int SSANum) {
@@ -250,7 +254,7 @@ size_t GetOpDataSize(STARSOpndTypePtr DataOp) {
SMP_msg("ERROR: unexpected data type %d in GetOpDataSize() :", OpDtyp);
PrintOperand(DataOp);
SMP_msg("\n");
- DataSize = STARS_ISA_dtyp;
+ DataSize = global_STARS_program->GetSTARS_ISA_dtyp();
break;
}
return DataSize;
@@ -258,10 +262,10 @@ size_t GetOpDataSize(STARSOpndTypePtr DataOp) {
// Get the IDA Pro register size (dtyp) field
char GetRegDtyp(uint16 RegNum, bool Has64BitOpnds) {
- assert(RegNum != ((uint16_t) R_none));
+ assert(RegNum != ((uint16_t) STARS_x86_R_none));
assert(RegNum < MAX_IDA_REG);
char RegDtyp = RegDtyps[RegNum];
- if ((STARS_ISA_Bytewidth == 8) && Has64BitOpnds && (RegDtyp == dt_dword) && (RegNum <= R_ip)) {
+ if ((global_STARS_program->GetSTARS_ISA_Bytewidth() == 8) && Has64BitOpnds && (RegDtyp == dt_dword) && (RegNum <= STARS_x86_R_ip)) {
// 32-bit IDA general regs are 64-bit for x86-64
RegDtyp = dt_qword;
}
@@ -337,87 +341,11 @@ bool MDIsGeneralPurposeReg(STARSOpndTypePtr CurrOp) {
if (success) {
// intel.hpp defines two ranges that are general purpose regs in enum RegNo.
uint16_t CurrReg = CurrOp->GetReg();
- success = (CurrOp->IsRegOp() && ((CurrReg >= R_ax) && (CurrReg <= R_dil)));
+ success = (CurrOp->IsRegOp() && ((CurrReg >= STARS_x86_R_ax) && (CurrReg <= STARS_x86_R_dil)));
}
return success;
}
-// We maintain a list of the caller-saved regs for the current binary's ABI.
-// This differs from 32-bit to 64-bit x86 binaries, as well as across other ISAs.
-list<uint16> STARS_MDCallerSavedRegs;
-
-void MDInitializeCallerSavedRegs(void) {
- STARS_MDCallerSavedRegs.clear();
- bool x86_64_ISA_flag = false;
-#ifdef __EA64__
- x86_64_ISA_flag = (STARS_ISA_Bitwidth == 64);
-#endif
- if (!x86_64_ISA_flag) {
- // 32-bit x86 uses EAX, ECX, EDX as caller-saved.
- STARS_MDCallerSavedRegs.push_back(R_ax);
- STARS_MDCallerSavedRegs.push_back(R_cx);
- STARS_MDCallerSavedRegs.push_back(R_dx);
- }
- else {
- // 64-bit x86 uses EDI, ESI, EDX, ECX, R8 and R9
- // in that order. After six arguments that fit into
- // these regs, arguments are passed on the stack.
- // In addition, registers EAX, R10 and R11 are caller-saved
- // but are not used to pass arguments.
- STARS_MDCallerSavedRegs.push_back(R_ax);
- STARS_MDCallerSavedRegs.push_back(R_cx);
- STARS_MDCallerSavedRegs.push_back(R_dx);
- STARS_MDCallerSavedRegs.push_back(R_si);
- STARS_MDCallerSavedRegs.push_back(R_di);
- STARS_MDCallerSavedRegs.push_back(R_r8);
- STARS_MDCallerSavedRegs.push_back(R_r9);
- STARS_MDCallerSavedRegs.push_back(R_r10);
- STARS_MDCallerSavedRegs.push_back(R_r11);
- }
- return;
-}
-
-list<uint16>::iterator GetFirstCallerSavedReg(void) {
- return STARS_MDCallerSavedRegs.begin();
-}
-
-list<uint16>::iterator GetLastCallerSavedReg(void) {
- return STARS_MDCallerSavedRegs.end();
-}
-
-// We maintain a list of the argument-passing regs for the current binary's ABI.
-// This differs from 32-bit to 64-bit x86 binaries, as well as across other ISAs.
-// The list is in order of argument position number. For x86-64, this means EDI,
-// ESI, EDX, ECX, R8, R9.
-list<uint16> STARS_MDArgumentRegs;
-
-void MDInitializeArgumentRegs(void) {
- bool x86_64_ISA_flag = false;
-#ifdef __EA64__
- x86_64_ISA_flag = (STARS_ISA_Bitwidth == 64);
-#endif
- if (x86_64_ISA_flag) {
- STARS_MDArgumentRegs.push_back(R_di);
- STARS_MDArgumentRegs.push_back(R_si);
- STARS_MDArgumentRegs.push_back(R_dx);
- STARS_MDArgumentRegs.push_back(R_cx);
- STARS_MDArgumentRegs.push_back(R_r8);
- STARS_MDArgumentRegs.push_back(R_r9);
- }
- else {
- STARS_MDArgumentRegs.clear();
- }
- return;
-}
-
-list<uint16>::iterator GetFirstArgumentReg(void) {
- return STARS_MDArgumentRegs.begin();
-}
-
-list<uint16>::iterator GetLastArgumentReg(void) {
- return STARS_MDArgumentRegs.end();
-}
-
// Are operands equal?
bool IsEqOp(STARSOpndTypePtr Opnd1, STARSOpndTypePtr Opnd2) {
if ((nullptr == Opnd1) || (nullptr == Opnd2))
@@ -425,68 +353,46 @@ bool IsEqOp(STARSOpndTypePtr Opnd1, STARSOpndTypePtr Opnd2) {
if (Opnd1->GetOpType() != Opnd2->GetOpType())
return false;
- switch (Opnd1->GetOpType()) {
- case o_void: return true;
- case o_reg: return ((Opnd1->GetReg() == Opnd2->GetReg()) && (Opnd1->GetByteWidth() == Opnd2->GetByteWidth()));
- case o_mem: return (Opnd1->GetAddr() == Opnd2->GetAddr());
- case o_phrase: if (Opnd1->HasSIBByte() && Opnd2->HasSIBByte()) return ((Opnd1->GetSIB() == Opnd2->GetSIB()) && (Opnd1->GetSpecFlag4() == Opnd2->GetSpecFlag4()));
- else if (Opnd1->HasSIBByte() || Opnd2->HasSIBByte()) return false; // no SIB != has SIB
- else return (Opnd1->GetReg() == Opnd2->GetReg()); // neither has SIB; compare register, e.g. [ebx] to [edx]
- case o_displ: if (Opnd1->HasSIBByte() && Opnd2->HasSIBByte())
+
+ if (Opnd1->IsVoidOp())
+ return true;
+ if (Opnd1->IsRegOp())
+ return ((Opnd1->GetReg() == Opnd2->GetReg()) && (Opnd1->GetByteWidth() == Opnd2->GetByteWidth()));
+ if (Opnd1->IsStaticMemOp())
+ return (Opnd1->GetAddr() == Opnd2->GetAddr());
+ if (Opnd1->IsMemNoDisplacementOp()) {
+ if (Opnd1->HasSIBByte() && Opnd2->HasSIBByte()) return ((Opnd1->GetSIB() == Opnd2->GetSIB()) && (Opnd1->GetSpecFlag4() == Opnd2->GetSpecFlag4()));
+ else if (Opnd1->HasSIBByte() || Opnd2->HasSIBByte()) return false; // no SIB != has SIB
+ else return (Opnd1->GetReg() == Opnd2->GetReg()); // neither has SIB; compare register, e.g. [ebx] to [edx]
+ }
+ if (Opnd1->IsMemDisplacementOp()) {
+ if (Opnd1->HasSIBByte() && Opnd2->HasSIBByte())
return ((Opnd1->GetSIB() == Opnd2->GetSIB()) && (Opnd1->GetAddr() == Opnd2->GetAddr()) && (Opnd1->GetSpecFlag4() == Opnd2->GetSpecFlag4()));
- else if ((!Opnd1->HasSIBByte()) && (!Opnd2->HasSIBByte()))
- return ((Opnd1->GetAddr() == Opnd2->GetAddr()) && (Opnd1->GetReg() == Opnd2->GetReg()));
- else return false; // no SIB != has SIB
- case o_imm: return (Opnd1->GetImmedValue() == Opnd2->GetImmedValue());
- case o_far: // fall through to o_near case
- case o_near: return (Opnd1->GetAddr() == Opnd2->GetAddr());
- case o_trreg: // fall through
- case o_dbreg: // fall through
- case o_crreg: // fall through
- case o_fpreg: // fall through
- case o_mmxreg: // fall through
- case o_xmmreg: // fall through
- case o_ymmreg: return (Opnd1->GetReg() == Opnd2->GetReg()); // no subword regs to deal with
-
- default: SMP_msg("ERROR: Unknown operand type in IsEqOp.\n"); return false;
- }; // end switch (Opnd1.type)}
+ else if ((!Opnd1->HasSIBByte()) && (!Opnd2->HasSIBByte()))
+ return ((Opnd1->GetAddr() == Opnd2->GetAddr()) && (Opnd1->GetReg() == Opnd2->GetReg()));
+ else return false; // no SIB != has SIB
+ }
+ if (Opnd1->IsImmedOp())
+ return (Opnd1->GetImmedValue() == Opnd2->GetImmedValue());
+ if (Opnd1->IsFarPointer() || Opnd1->IsNearPointer())
+ return (Opnd1->GetAddr() == Opnd2->GetAddr());
+ if (Opnd1->MDIsKnownOpType()) // compare regs for all special-register cases, e.g. MMX, XMM, YMM, debug regs, etc.
+ return (Opnd1->GetReg() == Opnd2->GetReg()); // no subword regs to deal with
+
+ SMP_msg("ERROR: Unknown operand type in IsEqOp.\n");
+ return false;
} // end of function IsEqOp()
// Are operands equal, ignoring bitwidth differences for register operands?
bool IsEqOpIgnoreBitwidth(STARSOpndTypePtr Opnd1, STARSOpndTypePtr Opnd2) {
if (Opnd1->GetOpType() != Opnd2->GetOpType())
return false;
-#if 1
+
if (Opnd1->IsRegOp())
return (Opnd1->GetReg() == Opnd2->GetReg()); // no concern for subword regs; AX == EAX == RAX
else
return IsEqOp(Opnd1, Opnd2);
-#else
- switch (Opnd1->GetOpType()) {
- case o_void: return true;
- case o_reg: return (Opnd1->GetReg() == Opnd2->GetReg());
- case o_mem: return (Opnd1.addr == Opnd2.addr);
- case o_phrase: if (Opnd1.hasSIB && Opnd2.hasSIB) return ((Opnd1.sib == Opnd2.sib) && (Opnd1.specflag4 == Opnd2.specflag4));
- else if (Opnd1.hasSIB || Opnd2.hasSIB) return false; // no SIB != has SIB
- else return (Opnd1.reg == Opnd2.reg); // neither has SIB; compare register, e.g. [ebx] to [edx]
- case o_displ: if (Opnd1.hasSIB && Opnd2.hasSIB)
- return ((Opnd1.sib == Opnd2.sib) && (Opnd1.addr == Opnd2.addr) && (Opnd1.specflag4 == Opnd2.specflag4));
- else if ((!Opnd1.hasSIB) && (!Opnd2.hasSIB))
- return ((Opnd1.addr == Opnd2.addr) && (Opnd1.reg == Opnd2.reg));
- else return false; // no SIB != has SIB
- case o_imm: return (Opnd1.value == Opnd2.value);
- case o_far: // fall through to o_near case
- case o_near: return (Opnd1.addr == Opnd2.addr);
- case o_trreg: // fall through
- case o_dbreg: // fall through
- case o_crreg: // fall through
- case o_fpreg: // fall through
- case o_mmxreg: // fall through
- case o_xmmreg: return (Opnd1.reg == Opnd2.reg); // no subword regs to deal with
-
- default: SMP_msg("ERROR: Unknown operand type in IsEqOpIgnoreBitwidth.\n"); return false;
- }; // end switch (Opnd1.type)}
-#endif
+
} // end of function IsEqOpIgnoreBitwidth()
// We need to make subword registers equal to their containing registers when we
@@ -517,10 +423,10 @@ uint16_t MDCanonicalizeSubReg(const uint16_t Reg1) {
if (Subword) {
// See enumeration RegNo in intel.hpp.
- if (SReg1 < R_ah) // AL, CL, DL or BL
- SReg1 -= (R_al - R_ax);
+ if (SReg1 < STARS_x86_R_ah) // AL, CL, DL or BL
+ SReg1 -= (STARS_x86_R_al - STARS_x86_R_ax);
else // AH, CH, DH, BH, SPL, BPL, SIL, DIL
- SReg1 -= (R_ah - R_ax);
+ SReg1 -= (STARS_x86_R_ah - STARS_x86_R_ax);
}
return SReg1;
} // end of MDCanonicalizeSubReg()
@@ -588,9 +494,9 @@ int MD_STARS_sib_base(const STARSOpndTypePtr &x) // get exten
return base;
}
-regnum_t MD_STARS_sib_index(const STARSOpndTypePtr &x) // get extended sib index
+short MD_STARS_sib_index(const STARSOpndTypePtr &x) // get extended sib index
{
- regnum_t index = regnum_t((x->GetSIB() >> 3) & 7);
+ short index = short((x->GetSIB() >> 3) & 7);
#ifdef __EA64__
if ( x->GetSpecFlag4() & REX_X )
index |= 8;
@@ -609,7 +515,7 @@ bool MDIsIndirectMemoryOpnd(STARSOpndTypePtr CurrOp, bool UseFP) {
if (CurrOp->HasSIBByte()) {
int BaseReg = MD_STARS_sib_base(CurrOp);
short IndexReg = MD_STARS_sib_index(CurrOp);
- if ((R_none != IndexReg) && (MD_STACK_POINTER_REG != IndexReg)) {
+ if ((STARS_x86_R_none != IndexReg) && (MD_STACK_POINTER_REG != IndexReg)) {
if ((MD_FRAME_POINTER_REG == IndexReg) && UseFP)
;
else
@@ -617,7 +523,7 @@ bool MDIsIndirectMemoryOpnd(STARSOpndTypePtr CurrOp, bool UseFP) {
}
if (0 != CurrOp->GetSIBScaleFactor())
indirect = true;
- if (R_none != BaseReg) {
+ if (STARS_x86_R_none != BaseReg) {
if ((BaseReg == MD_FRAME_POINTER_REG) && CurrOp->IsStaticMemOp()) {
; // EBP ==> no base register for o_mem type
}
@@ -651,33 +557,33 @@ bool MDIsIndirectMemoryOpnd(STARSOpndTypePtr CurrOp, bool UseFP) {
// Extract the base and index registers and scale factor and displacement from the
// memory operand.
-void MDExtractAddressFields(STARSOpndTypePtr MemOp, int &BaseReg, int &IndexReg, uint16_t &Scale, ea_t &Offset) {
+void MDExtractAddressFields(STARSOpndTypePtr MemOp, int &BaseReg, int &IndexReg, uint16_t &Scale, STARS_ea_t &Offset) {
assert(MemOp->IsMemOp());
Scale = 0;
- BaseReg = R_none;
- IndexReg = R_none;
+ BaseReg = STARS_x86_R_none;
+ IndexReg = STARS_x86_R_none;
Offset = MemOp->GetAddr();
if (MemOp->HasSIBByte()) {
BaseReg = MD_STARS_sib_base(MemOp);
IndexReg = (int) MD_STARS_sib_index(MemOp);
if (MD_STACK_POINTER_REG == IndexReg) // signifies no index register
- IndexReg = R_none;
- if (R_none != IndexReg) {
+ IndexReg = STARS_x86_R_none;
+ if (STARS_x86_R_none != IndexReg) {
Scale = (uint16_t) MemOp->GetSIBScaleFactor();
}
- if (R_none != BaseReg) {
+ if (STARS_x86_R_none != BaseReg) {
if ((BaseReg == MD_FRAME_POINTER_REG) && MemOp->IsStaticMemOp()) {
- BaseReg = R_none;
+ BaseReg = STARS_x86_R_none;
// **!!** BaseReg allowed for o_mem with SIB byte???
}
}
}
else { // no SIB byte; can have base reg but no index reg or scale factor
- BaseReg = (int) MemOp->GetReg(); // cannot be R_none for no SIB case
+ BaseReg = (int) MemOp->GetReg(); // cannot be STARS_x86_R_none for no SIB case
if (MemOp->IsStaticMemOp()) {
- BaseReg = R_none; // no Base register for o_mem operands
+ BaseReg = STARS_x86_R_none; // no Base register for o_mem operands
}
}
@@ -704,7 +610,7 @@ bool MDIsStackAccessOpnd(STARSOpndTypePtr CurrOp, bool UseFP) {
int BaseReg;
int IndexReg;
uint16_t ScaleFactor;
- ea_t offset;
+ STARS_ea_t offset;
if ((nullptr == CurrOp) || ((!CurrOp->IsMemDisplacementOp()) && (!CurrOp->IsMemNoDisplacementOp()))) {
return false;
@@ -719,7 +625,7 @@ bool MDIsDirectStackAccessOpnd(STARSOpndTypePtr CurrOp, bool UseFP) {
int BaseReg;
int IndexReg;
uint16_t ScaleFactor;
- ea_t offset;
+ STARS_ea_t offset;
if ((nullptr == CurrOp) || ((! CurrOp->IsMemDisplacementOp()) && (! CurrOp->IsMemNoDisplacementOp()))) {
return false;
@@ -727,7 +633,7 @@ bool MDIsDirectStackAccessOpnd(STARSOpndTypePtr CurrOp, bool UseFP) {
MDExtractAddressFields(CurrOp, BaseReg, IndexReg, ScaleFactor, offset);
// When the IndexReg is
- return (MDIsStackPtrReg(BaseReg, UseFP) && (IndexReg == R_none));
+ return (MDIsStackPtrReg(BaseReg, UseFP) && (IndexReg == STARS_x86_R_none));
} // end of MDIsDirectStackAccessOpnd()
// MACHINE DEPENDENT: Is operand trackable in data flow analyses (i.e. a direct stack memory access or a register?)
@@ -740,14 +646,14 @@ bool MDIsCallerSavedReg(STARSOpndTypePtr CurrOp) {
if (! CurrOp->IsRegOp())
return false;
uint16_t CurrReg = MDCanonicalizeSubReg(CurrOp->GetReg());
- return ((R_ax == CurrReg) || (R_cx == CurrReg) || (R_dx == CurrReg));
+ return ((STARS_x86_R_ax == CurrReg) || (STARS_x86_R_cx == CurrReg) || (STARS_x86_R_dx == CurrReg));
} // end of MDIsCallerSavedReg()
// If CurrOp would change when reg is canonicalized, then return CurrOp->clone(), else return CurrOp;
STARSOpndTypePtr CloneIfSubwordReg(STARSOpndTypePtr CurrOp) {
uint16_t CurrReg = CurrOp->GetReg();
if (CurrOp->IsRegOp()) {
- if (STARS_ISA_Bytewidth > CurrOp->GetByteWidth()) {
+ if (global_STARS_program->GetSTARS_ISA_Bytewidth() > CurrOp->GetByteWidth()) {
return CurrOp->clone();
}
else {
@@ -823,17 +729,17 @@ void PrintSIB(STARSOpndTypePtr Opnd) {
int BaseReg;
int IndexReg;
uint16_t ScaleFactor;
- ea_t offset;
+ STARS_ea_t offset;
#define NAME_LEN 5
char BaseName[NAME_LEN] = {'N', 'o', 'n', 'e', '\0'};
char IndexName[NAME_LEN] = {'N', 'o', 'n', 'e', '\0'};
MDExtractAddressFields(Opnd, BaseReg, IndexReg, ScaleFactor, offset);
- if (BaseReg != R_none)
+ if (BaseReg != STARS_x86_R_none)
SMP_strncpy(BaseName, RegNames[BaseReg], NAME_LEN - 1);
- if (IndexReg != R_none) {
+ if (IndexReg != STARS_x86_R_none) {
SMP_strncpy(IndexName, RegNames[IndexReg], NAME_LEN -1);
}
SMP_msg(" Base %s Index %s Scale %d Flag4 %d", BaseName, IndexName, ScaleFactor, Opnd->GetSpecFlag4());
@@ -844,7 +750,7 @@ void AnnotPrintSIB(STARSOpndTypePtr Opnd, bool HasOffset, FILE *OutFile) {
int BaseReg;
int IndexReg;
uint16_t ScaleFactor;
- ea_t offset;
+ STARS_ea_t offset;
char OutString[MAXSTR] = {'[', '\0'};
char ScaleString[4];
@@ -855,9 +761,9 @@ void AnnotPrintSIB(STARSOpndTypePtr Opnd, bool HasOffset, FILE *OutFile) {
(void) SMP_snprintf(ScaleString, 4, "%d", ScaleFactor);
}
- if (BaseReg != R_none) {
+ if (BaseReg != STARS_x86_R_none) {
(void) SMP_strncat(OutString, MDGetRegNumName(BaseReg, RegSizes[BaseReg]), MAXSTR - 1);
- if (IndexReg != R_none) {
+ if (IndexReg != STARS_x86_R_none) {
(void) SMP_strncat(OutString, "+", MAXSTR-1);
(void) SMP_strncat(OutString, MDGetRegNumName(IndexReg, RegSizes[IndexReg]), MAXSTR - 1);
if (ScaleFactor > 0) {
@@ -866,7 +772,7 @@ void AnnotPrintSIB(STARSOpndTypePtr Opnd, bool HasOffset, FILE *OutFile) {
}
}
}
- else if (IndexReg != R_none) {
+ else if (IndexReg != STARS_x86_R_none) {
(void) SMP_strncat(OutString, MDGetRegNumName(IndexReg, RegSizes[IndexReg]), MAXSTR - 1);
if (ScaleFactor > 0) {
(void) SMP_strncat(OutString, "*", MAXSTR-1);
@@ -886,7 +792,7 @@ void SPARKAnnotPrintSIB(STARSOpndTypePtr Opnd, bool HasOffset, FILE *OutFile, ui
int BaseReg;
int IndexReg;
uint16_t ScaleFactor;
- ea_t offset;
+ STARS_ea_t offset;
char OutString[MAXSTR] = {'(', '\0'};
char ScaleString[4];
@@ -896,7 +802,7 @@ void SPARKAnnotPrintSIB(STARSOpndTypePtr Opnd, bool HasOffset, FILE *OutFile, ui
if (SegRegPrefix) {
// Emit segment register string unless it is just the stack segment plus a stack operand,
// where the stack segment is implied anyway.
- if ((SegReg == R_ss) && MDIsStackAccessOpnd(Opnd, UseFP)) {
+ if ((SegReg == STARS_x86_R_ss) && MDIsStackAccessOpnd(Opnd, UseFP)) {
SegRegPrefix = false;
}
else {
@@ -910,20 +816,20 @@ void SPARKAnnotPrintSIB(STARSOpndTypePtr Opnd, bool HasOffset, FILE *OutFile, ui
(void) SMP_snprintf(ScaleString, 4, "%d", ScaleFactor);
}
- if (BaseReg != R_none) {
+ if (BaseReg != STARS_x86_R_none) {
if (SegRegPrefix) {
(void) SMP_strncat(OutString, " + ", MAXSTR-1);
}
(void) SMP_strncat(OutString, "X86.", MAXSTR-1);
(void) SMP_strncat(OutString, MDGetRegNumName(BaseReg, RegSizes[BaseReg]), MAXSTR-1);
- if (STARS_ISA_Bytewidth > RegSizes[BaseReg]) {
+ if (global_STARS_program->GetSTARS_ISA_Bytewidth() > RegSizes[BaseReg]) {
++SubwordAddressRegCount;
}
- if (IndexReg != R_none) {
+ if (IndexReg != STARS_x86_R_none) {
(void) SMP_strncat(OutString, " + ", MAXSTR-1);
(void) SMP_strncat(OutString, "X86.", MAXSTR-1);
(void) SMP_strncat(OutString, MDGetRegNumName(IndexReg, RegSizes[IndexReg]), MAXSTR-1);
- if (STARS_ISA_Bytewidth > RegSizes[IndexReg]) {
+ if (global_STARS_program->GetSTARS_ISA_Bytewidth() > RegSizes[IndexReg]) {
++SubwordAddressRegCount;
}
if (ScaleFactor > 0) {
@@ -932,13 +838,13 @@ void SPARKAnnotPrintSIB(STARSOpndTypePtr Opnd, bool HasOffset, FILE *OutFile, ui
}
}
}
- else if (IndexReg != R_none) {
+ else if (IndexReg != STARS_x86_R_none) {
if (SegRegPrefix) {
(void) SMP_strncat(OutString, " + ", MAXSTR-1);
}
(void) SMP_strncat(OutString, "X86.", MAXSTR-1);
(void) SMP_strncat(OutString, MDGetRegNumName(IndexReg, RegSizes[IndexReg]), MAXSTR - 1);
- if (STARS_ISA_Bytewidth > RegSizes[IndexReg]) {
+ if (global_STARS_program->GetSTARS_ISA_Bytewidth() > RegSizes[IndexReg]) {
++SubwordAddressRegCount;
}
if (ScaleFactor > 0) {
@@ -988,7 +894,7 @@ void PrintOperand(STARSOpndTypePtr Opnd) {
}
else if (Opnd->IsMemDisplacementOp()) {
SMP_msg(" Operand: memory displ :");
- ea_t offset = Opnd->GetAddr();
+ STARS_ea_t offset = Opnd->GetAddr();
int SignedOffset = (int) offset;
if (Opnd->HasSIBByte()) {
PrintSIB(Opnd);
@@ -1036,7 +942,7 @@ void PrintOperand(STARSOpndTypePtr Opnd) {
SMP_msg(" Operand: unknown");
}
#if STARS_DEBUG_DUMP_IDENTIFY_HIDDEN_OPERANDS
- if (!(Opnd.showed()))
+ if (!(Opnd->IsVisible()))
SMP_msg(" HIDDEN ");
#endif
return;
@@ -1074,7 +980,7 @@ void AnnotPrintOperand(STARSOpndTypePtr Opnd, FILE *OutFile) {
}
}
else if (Opnd->IsMemDisplacementOp()) {
- ea_t offset = Opnd->GetAddr();
+ STARS_ea_t offset = Opnd->GetAddr();
int SignedOffset = (int) offset;
if (Opnd->HasSIBByte()) {
AnnotPrintSIB(Opnd, (SignedOffset != 0), OutFile);
@@ -1110,343 +1016,343 @@ void AnnotPrintOperand(STARSOpndTypePtr Opnd, FILE *OutFile) {
// Print opcode string.
void PrintOpcode(uint16 opcode, FILE *OutFile) {
switch (opcode) {
- case NN_null: // Unknown Operation
- case NN_aaa: // ASCII Adjust after Addition
- case NN_aad: // ASCII Adjust AX before Division
- case NN_aam: // ASCII Adjust AX after Multiply
- case NN_aas: // ASCII Adjust AL after Subtraction
- case NN_adc: // Add with Carry
+ case STARS_NN_null: // Unknown Operation
+ case STARS_NN_aaa: // ASCII Adjust after Addition
+ case STARS_NN_aad: // ASCII Adjust AX before Division
+ case STARS_NN_aam: // ASCII Adjust AX after Multiply
+ case STARS_NN_aas: // ASCII Adjust AL after Subtraction
+ case STARS_NN_adc: // Add with Carry
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_add: // Add
+ case STARS_NN_add: // Add
SMP_fprintf(OutFile, "add");
break;
- case NN_and: // Logical AND
+ case STARS_NN_and: // Logical AND
SMP_fprintf(OutFile, "and");
break;
- case NN_arpl: // Adjust RPL Field of Selector
- case NN_bound: // Check Array Index Against Bounds
- case NN_bsf: // Bit Scan Forward
- case NN_bsr: // Bit Scan Reverse
- case NN_bt: // Bit Test
- case NN_btc: // Bit Test and Complement
- case NN_btr: // Bit Test and Reset
- case NN_bts: // Bit Test and Set
+ case STARS_NN_arpl: // Adjust RPL Field of Selector
+ case STARS_NN_bound: // Check Array Index Against Bounds
+ case STARS_NN_bsf: // Bit Scan Forward
+ case STARS_NN_bsr: // Bit Scan Reverse
+ case STARS_NN_bt: // Bit Test
+ case STARS_NN_btc: // Bit Test and Complement
+ case STARS_NN_btr: // Bit Test and Reset
+ case STARS_NN_bts: // Bit Test and Set
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_call: // Call Procedure
- case NN_callfi: // Indirect Call Far Procedure
- case NN_callni: // Indirect Call Near Procedure
+ case STARS_NN_call: // Call Procedure
+ case STARS_NN_callfi: // Indirect Call Far Procedure
+ case STARS_NN_callni: // Indirect Call Near Procedure
SMP_fprintf(OutFile, "");
break;
- case NN_cbw: // AL -> AX (with sign)
- case NN_cwde: // AX -> EAX (with sign)
- case NN_cdqe: // EAX -> RAX (with sign)
- case NN_clc: // Clear Carry Flag
- case NN_cld: // Clear Direction Flag
- case NN_cli: // Clear Interrupt Flag
- case NN_clts: // Clear Task-Switched Flag in CR0
- case NN_cmc: // Complement Carry Flag
- case NN_cmp: // Compare Two Operands
- case NN_cmps: // Compare Strings
- case NN_cwd: // AX -> DX:AX (with sign)
- case NN_cdq: // EAX -> EDX:EAX (with sign)
- case NN_cqo: // RAX -> RDX:RAX (with sign)
- case NN_daa: // Decimal Adjust AL after Addition
- case NN_das: // Decimal Adjust AL after Subtraction
+ case STARS_NN_cbw: // AL -> AX (with sign)
+ case STARS_NN_cwde: // AX -> EAX (with sign)
+ case STARS_NN_cdqe: // EAX -> RAX (with sign)
+ case STARS_NN_clc: // Clear Carry Flag
+ case STARS_NN_cld: // Clear Direction Flag
+ case STARS_NN_cli: // Clear Interrupt Flag
+ case STARS_NN_clts: // Clear Task-Switched Flag in CR0
+ case STARS_NN_cmc: // Complement Carry Flag
+ case STARS_NN_cmp: // Compare Two Operands
+ case STARS_NN_cmps: // Compare Strings
+ case STARS_NN_cwd: // AX -> DX:AX (with sign)
+ case STARS_NN_cdq: // EAX -> EDX:EAX (with sign)
+ case STARS_NN_cqo: // RAX -> RDX:RAX (with sign)
+ case STARS_NN_daa: // Decimal Adjust AL after Addition
+ case STARS_NN_das: // Decimal Adjust AL after Subtraction
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_dec: // Decrement by 1
+ case STARS_NN_dec: // Decrement by 1
SMP_fprintf(OutFile, "sub");
break;
- case NN_div: // Unsigned Divide
+ case STARS_NN_div: // Unsigned Divide
SMP_fprintf(OutFile, "div");
break;
- case NN_enterw: // Make Stack Frame for Procedure Parameters
- case NN_enter: // Make Stack Frame for Procedure Parameters
- case NN_enterd: // Make Stack Frame for Procedure Parameters
- case NN_enterq: // Make Stack Frame for Procedure Parameters
+ case STARS_NN_enterw: // Make Stack Frame for Procedure Parameters
+ case STARS_NN_enter: // Make Stack Frame for Procedure Parameters
+ case STARS_NN_enterd: // Make Stack Frame for Procedure Parameters
+ case STARS_NN_enterq: // Make Stack Frame for Procedure Parameters
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_hlt: // Halt
+ case STARS_NN_hlt: // Halt
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_idiv: // Signed Divide
+ case STARS_NN_idiv: // Signed Divide
SMP_fprintf(OutFile, "div");
break;
- case NN_imul: // Signed Multiply
+ case STARS_NN_imul: // Signed Multiply
SMP_fprintf(OutFile, "mul");
break;
- case NN_in: // Input from Port
+ case STARS_NN_in: // Input from Port
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_inc: // Increment by 1
+ case STARS_NN_inc: // Increment by 1
SMP_fprintf(OutFile, "add");
break;
- case NN_ins: // Input Byte(s) from Port to String
- case NN_int: // Call to Interrupt Procedure
- case NN_into: // Call to Interrupt Procedure if Overflow Flag = 1
- case NN_int3: // Trap to Debugger
- case NN_iretw: // Interrupt Return
- case NN_iret: // Interrupt Return
- case NN_iretd: // Interrupt Return (use32)
- case NN_iretq: // Interrupt Return (use64)
+ case STARS_NN_ins: // Input Byte(s) from Port to String
+ case STARS_NN_int: // Call to Interrupt Procedure
+ case STARS_NN_into: // Call to Interrupt Procedure if Overflow Flag = 1
+ case STARS_NN_int3: // Trap to Debugger
+ case STARS_NN_iretw: // Interrupt Return
+ case STARS_NN_iret: // Interrupt Return
+ case STARS_NN_iretd: // Interrupt Return (use32)
+ case STARS_NN_iretq: // Interrupt Return (use64)
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_ja: // Jump if Above (CF=0 & ZF=0)
- case NN_jae: // Jump if Above or Equal (CF=0)
- case NN_jb: // Jump if Below (CF=1)
- case NN_jbe: // Jump if Below or Equal (CF=1 | ZF=1)
- case NN_jc: // Jump if Carry (CF=1)
- case NN_jcxz: // Jump if CX is 0
- case NN_jecxz: // Jump if ECX is 0
- case NN_jrcxz: // Jump if RCX is 0
- case NN_je: // Jump if Equal (ZF=1)
- case NN_jg: // Jump if Greater (ZF=0 & SF=OF)
- case NN_jge: // Jump if Greater or Equal (SF=OF)
- case NN_jl: // Jump if Less (SF!=OF)
- case NN_jle: // Jump if Less or Equal (ZF=1 | SF!=OF)
- case NN_jna: // Jump if Not Above (CF=1 | ZF=1)
- case NN_jnae: // Jump if Not Above or Equal (CF=1)
- case NN_jnb: // Jump if Not Below (CF=0)
- case NN_jnbe: // Jump if Not Below or Equal (CF=0 & ZF=0)
- case NN_jnc: // Jump if Not Carry (CF=0)
- case NN_jne: // Jump if Not Equal (ZF=0)
- case NN_jng: // Jump if Not Greater (ZF=1 | SF!=OF)
- case NN_jnge: // Jump if Not Greater or Equal (ZF=1)
- case NN_jnl: // Jump if Not Less (SF=OF)
- case NN_jnle: // Jump if Not Less or Equal (ZF=0 & SF=OF)
- case NN_jno: // Jump if Not Overflow (OF=0)
- case NN_jnp: // Jump if Not Parity (PF=0)
- case NN_jns: // Jump if Not Sign (SF=0)
- case NN_jnz: // Jump if Not Zero (ZF=0)
- case NN_jo: // Jump if Overflow (OF=1)
- case NN_jp: // Jump if Parity (PF=1)
- case NN_jpe: // Jump if Parity Even (PF=1)
- case NN_jpo: // Jump if Parity Odd (PF=0)
- case NN_js: // Jump if Sign (SF=1)
- case NN_jz: // Jump if Zero (ZF=1)
- case NN_jmp: // Jump
- case NN_jmpfi: // Indirect Far Jump
- case NN_jmpni: // Indirect Near Jump
- case NN_jmpshort: // Jump Short (not used)
+ case STARS_NN_ja: // Jump if Above (CF=0 & ZF=0)
+ case STARS_NN_jae: // Jump if Above or Equal (CF=0)
+ case STARS_NN_jb: // Jump if Below (CF=1)
+ case STARS_NN_jbe: // Jump if Below or Equal (CF=1 | ZF=1)
+ case STARS_NN_jc: // Jump if Carry (CF=1)
+ case STARS_NN_jcxz: // Jump if CX is 0
+ case STARS_NN_jecxz: // Jump if ECX is 0
+ case STARS_NN_jrcxz: // Jump if RCX is 0
+ case STARS_NN_je: // Jump if Equal (ZF=1)
+ case STARS_NN_jg: // Jump if Greater (ZF=0 & SF=OF)
+ case STARS_NN_jge: // Jump if Greater or Equal (SF=OF)
+ case STARS_NN_jl: // Jump if Less (SF!=OF)
+ case STARS_NN_jle: // Jump if Less or Equal (ZF=1 | SF!=OF)
+ case STARS_NN_jna: // Jump if Not Above (CF=1 | ZF=1)
+ case STARS_NN_jnae: // Jump if Not Above or Equal (CF=1)
+ case STARS_NN_jnb: // Jump if Not Below (CF=0)
+ case STARS_NN_jnbe: // Jump if Not Below or Equal (CF=0 & ZF=0)
+ case STARS_NN_jnc: // Jump if Not Carry (CF=0)
+ case STARS_NN_jne: // Jump if Not Equal (ZF=0)
+ case STARS_NN_jng: // Jump if Not Greater (ZF=1 | SF!=OF)
+ case STARS_NN_jnge: // Jump if Not Greater or Equal (ZF=1)
+ case STARS_NN_jnl: // Jump if Not Less (SF=OF)
+ case STARS_NN_jnle: // Jump if Not Less or Equal (ZF=0 & SF=OF)
+ case STARS_NN_jno: // Jump if Not Overflow (OF=0)
+ case STARS_NN_jnp: // Jump if Not Parity (PF=0)
+ case STARS_NN_jns: // Jump if Not Sign (SF=0)
+ case STARS_NN_jnz: // Jump if Not Zero (ZF=0)
+ case STARS_NN_jo: // Jump if Overflow (OF=1)
+ case STARS_NN_jp: // Jump if Parity (PF=1)
+ case STARS_NN_jpe: // Jump if Parity Even (PF=1)
+ case STARS_NN_jpo: // Jump if Parity Odd (PF=0)
+ case STARS_NN_js: // Jump if Sign (SF=1)
+ case STARS_NN_jz: // Jump if Zero (ZF=1)
+ case STARS_NN_jmp: // Jump
+ case STARS_NN_jmpfi: // Indirect Far Jump
+ case STARS_NN_jmpni: // Indirect Near Jump
+ case STARS_NN_jmpshort: // Jump Short (not used)
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_lahf: // Load Flags into AH Register
- case NN_lar: // Load Access Right Byte
+ case STARS_NN_lahf: // Load Flags into AH Register
+ case STARS_NN_lar: // Load Access Right Byte
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_lea: // Load Effective Address
+ case STARS_NN_lea: // Load Effective Address
SMP_fprintf(OutFile, "lea");
break;
- case NN_leavew: // High Level Procedure Exit
- case NN_leave: // High Level Procedure Exit
- case NN_leaved: // High Level Procedure Exit
- case NN_leaveq: // High Level Procedure Exit
+ case STARS_NN_leavew: // High Level Procedure Exit
+ case STARS_NN_leave: // High Level Procedure Exit
+ case STARS_NN_leaved: // High Level Procedure Exit
+ case STARS_NN_leaveq: // High Level Procedure Exit
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_lgdt: // Load Global Descriptor Table Register
- case NN_lidt: // Load Interrupt Descriptor Table Register
- case NN_lgs: // Load Full Pointer to GS:xx
- case NN_lss: // Load Full Pointer to SS:xx
- case NN_lds: // Load Full Pointer to DS:xx
- case NN_les: // Load Full Pointer to ES:xx
- case NN_lfs: // Load Full Pointer to FS:xx
- case NN_lldt: // Load Local Descriptor Table Register
- case NN_lmsw: // Load Machine Status Word
- case NN_lock: // Assert LOCK# Signal Prefix
+ case STARS_NN_lgdt: // Load Global Descriptor Table Register
+ case STARS_NN_lidt: // Load Interrupt Descriptor Table Register
+ case STARS_NN_lgs: // Load Full Pointer to GS:xx
+ case STARS_NN_lss: // Load Full Pointer to SS:xx
+ case STARS_NN_lds: // Load Full Pointer to DS:xx
+ case STARS_NN_les: // Load Full Pointer to ES:xx
+ case STARS_NN_lfs: // Load Full Pointer to FS:xx
+ case STARS_NN_lldt: // Load Local Descriptor Table Register
+ case STARS_NN_lmsw: // Load Machine Status Word
+ case STARS_NN_lock: // Assert LOCK# Signal Prefix
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_lods: // Load String
+ case STARS_NN_lods: // Load String
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_loopw: // Loop while ECX != 0
- case NN_loop: // Loop while CX != 0
- case NN_loopd: // Loop while ECX != 0
- case NN_loopq: // Loop while RCX != 0
- case NN_loopwe: // Loop while CX != 0 and ZF=1
- case NN_loope: // Loop while rCX != 0 and ZF=1
- case NN_loopde: // Loop while ECX != 0 and ZF=1
- case NN_loopqe: // Loop while RCX != 0 and ZF=1
- case NN_loopwne: // Loop while CX != 0 and ZF=0
- case NN_loopne: // Loop while rCX != 0 and ZF=0
- case NN_loopdne: // Loop while ECX != 0 and ZF=0
- case NN_loopqne: // Loop while RCX != 0 and ZF=0
+ case STARS_NN_loopw: // Loop while ECX != 0
+ case STARS_NN_loop: // Loop while CX != 0
+ case STARS_NN_loopd: // Loop while ECX != 0
+ case STARS_NN_loopq: // Loop while RCX != 0
+ case STARS_NN_loopwe: // Loop while CX != 0 and ZF=1
+ case STARS_NN_loope: // Loop while rCX != 0 and ZF=1
+ case STARS_NN_loopde: // Loop while ECX != 0 and ZF=1
+ case STARS_NN_loopqe: // Loop while RCX != 0 and ZF=1
+ case STARS_NN_loopwne: // Loop while CX != 0 and ZF=0
+ case STARS_NN_loopne: // Loop while rCX != 0 and ZF=0
+ case STARS_NN_loopdne: // Loop while ECX != 0 and ZF=0
+ case STARS_NN_loopqne: // Loop while RCX != 0 and ZF=0
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_lsl: // Load Segment Limit
- case NN_ltr: // Load Task Register
+ case STARS_NN_lsl: // Load Segment Limit
+ case STARS_NN_ltr: // Load Task Register
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_mov: // Move Data
+ case STARS_NN_mov: // Move Data
SMP_fprintf(OutFile, "mov");
break;
- case NN_movsp: // Move to/from Special Registers
+ case STARS_NN_movsp: // Move to/from Special Registers
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_movs: // Move Byte(s) from String to String
+ case STARS_NN_movs: // Move Byte(s) from String to String
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_movsx: // Move with Sign-Extend
+ case STARS_NN_movsx: // Move with Sign-Extend
SMP_fprintf(OutFile, "movsx");
break;
- case NN_movzx: // Move with Zero-Extend
+ case STARS_NN_movzx: // Move with Zero-Extend
SMP_fprintf(OutFile, "movzx");
break;
- case NN_mul: // Unsigned Multiplication of AL or AX
+ case STARS_NN_mul: // Unsigned Multiplication of AL or AX
SMP_fprintf(OutFile, "mul");
break;
- case NN_neg: // Two's Complement Negation
+ case STARS_NN_neg: // Two's Complement Negation
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_nop: // No Operation
+ case STARS_NN_nop: // No Operation
SMP_fprintf(OutFile, "");
break;
- case NN_not: // One's Complement Negation
+ case STARS_NN_not: // One's Complement Negation
SMP_fprintf(OutFile, "not");
break;
- case NN_or: // Logical Inclusive OR
+ case STARS_NN_or: // Logical Inclusive OR
SMP_fprintf(OutFile, "or");
break;
- case NN_out: // Output to Port
- case NN_outs: // Output Byte(s) to Port
+ case STARS_NN_out: // Output to Port
+ case STARS_NN_outs: // Output Byte(s) to Port
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_pop: // Pop a word from the Stack
+ case STARS_NN_pop: // Pop a word from the Stack
SMP_fprintf(OutFile, "pop");
break;
- case NN_popaw: // Pop all General Registers
- case NN_popa: // Pop all General Registers
- case NN_popad: // Pop all General Registers (use32)
- case NN_popaq: // Pop all General Registers (use64)
- case NN_popfw: // Pop Stack into Flags Register
- case NN_popf: // Pop Stack into Flags Register
- case NN_popfd: // Pop Stack into Eflags Register
- case NN_popfq: // Pop Stack into Rflags Register
+ case STARS_NN_popaw: // Pop all General Registers
+ case STARS_NN_popa: // Pop all General Registers
+ case STARS_NN_popad: // Pop all General Registers (use32)
+ case STARS_NN_popaq: // Pop all General Registers (use64)
+ case STARS_NN_popfw: // Pop Stack into Flags Register
+ case STARS_NN_popf: // Pop Stack into Flags Register
+ case STARS_NN_popfd: // Pop Stack into Eflags Register
+ case STARS_NN_popfq: // Pop Stack into Rflags Register
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_push: // Push Operand onto the Stack
+ case STARS_NN_push: // Push Operand onto the Stack
SMP_fprintf(OutFile, "push");
break;
- case NN_pushaw: // Push all General Registers
- case NN_pusha: // Push all General Registers
- case NN_pushad: // Push all General Registers (use32)
- case NN_pushaq: // Push all General Registers (use64)
- case NN_pushfw: // Push Flags Register onto the Stack
- case NN_pushf: // Push Flags Register onto the Stack
- case NN_pushfd: // Push Flags Register onto the Stack (use32)
- case NN_pushfq: // Push Flags Register onto the Stack (use64)
+ case STARS_NN_pushaw: // Push all General Registers
+ case STARS_NN_pusha: // Push all General Registers
+ case STARS_NN_pushad: // Push all General Registers (use32)
+ case STARS_NN_pushaq: // Push all General Registers (use64)
+ case STARS_NN_pushfw: // Push Flags Register onto the Stack
+ case STARS_NN_pushf: // Push Flags Register onto the Stack
+ case STARS_NN_pushfd: // Push Flags Register onto the Stack (use32)
+ case STARS_NN_pushfq: // Push Flags Register onto the Stack (use64)
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_rcl: // Rotate Through Carry Left
- case NN_rcr: // Rotate Through Carry Right
- case NN_rol: // Rotate Left
- case NN_ror: // Rotate Right
+ case STARS_NN_rcl: // Rotate Through Carry Left
+ case STARS_NN_rcr: // Rotate Through Carry Right
+ case STARS_NN_rol: // Rotate Left
+ case STARS_NN_ror: // Rotate Right
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_rep: // Repeat String Operation
- case NN_repe: // Repeat String Operation while ZF=1
- case NN_repne: // Repeat String Operation while ZF=0
+ case STARS_NN_rep: // Repeat String Operation
+ case STARS_NN_repe: // Repeat String Operation while ZF=1
+ case STARS_NN_repne: // Repeat String Operation while ZF=0
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_retn: // Return Near from Procedure
- case NN_retf: // Return Far from Procedure
+ case STARS_NN_retn: // Return Near from Procedure
+ case STARS_NN_retf: // Return Far from Procedure
SMP_fprintf(OutFile, "return");
break;
- case NN_sahf: // Store AH into Flags Register
+ case STARS_NN_sahf: // Store AH into Flags Register
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_sal: // Shift Arithmetic Left
+ case STARS_NN_sal: // Shift Arithmetic Left
SMP_fprintf(OutFile, "sal");
break;
- case NN_sar: // Shift Arithmetic Right
+ case STARS_NN_sar: // Shift Arithmetic Right
SMP_fprintf(OutFile, "sar");
break;
- case NN_shl: // Shift Logical Left
+ case STARS_NN_shl: // Shift Logical Left
SMP_fprintf(OutFile, "shl");
break;
- case NN_shr: // Shift Logical Right
+ case STARS_NN_shr: // Shift Logical Right
SMP_fprintf(OutFile, "shr");
break;
- case NN_sbb: // Integer Subtraction with Borrow
+ case STARS_NN_sbb: // Integer Subtraction with Borrow
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_scas: // Compare String
+ case STARS_NN_scas: // Compare String
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_seta: // Set Byte if Above (CF=0 & ZF=0)
- case NN_setae: // Set Byte if Above or Equal (CF=0)
- case NN_setb: // Set Byte if Below (CF=1)
- case NN_setbe: // Set Byte if Below or Equal (CF=1 | ZF=1)
- case NN_setc: // Set Byte if Carry (CF=1)
- case NN_sete: // Set Byte if Equal (ZF=1)
- case NN_setg: // Set Byte if Greater (ZF=0 & SF=OF)
- case NN_setge: // Set Byte if Greater or Equal (SF=OF)
- case NN_setl: // Set Byte if Less (SF!=OF)
- case NN_setle: // Set Byte if Less or Equal (ZF=1 | SF!=OF)
- case NN_setna: // Set Byte if Not Above (CF=1 | ZF=1)
- case NN_setnae: // Set Byte if Not Above or Equal (CF=1)
- case NN_setnb: // Set Byte if Not Below (CF=0)
- case NN_setnbe: // Set Byte if Not Below or Equal (CF=0 & ZF=0)
- case NN_setnc: // Set Byte if Not Carry (CF=0)
- case NN_setne: // Set Byte if Not Equal (ZF=0)
- case NN_setng: // Set Byte if Not Greater (ZF=1 | SF!=OF)
- case NN_setnge: // Set Byte if Not Greater or Equal (ZF=1)
- case NN_setnl: // Set Byte if Not Less (SF=OF)
- case NN_setnle: // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
- case NN_setno: // Set Byte if Not Overflow (OF=0)
- case NN_setnp: // Set Byte if Not Parity (PF=0)
- case NN_setns: // Set Byte if Not Sign (SF=0)
- case NN_setnz: // Set Byte if Not Zero (ZF=0)
- case NN_seto: // Set Byte if Overflow (OF=1)
- case NN_setp: // Set Byte if Parity (PF=1)
- case NN_setpe: // Set Byte if Parity Even (PF=1)
- case NN_setpo: // Set Byte if Parity Odd (PF=0)
- case NN_sets: // Set Byte if Sign (SF=1)
- case NN_setz: // Set Byte if Zero (ZF=1)
+ case STARS_NN_seta: // Set Byte if Above (CF=0 & ZF=0)
+ case STARS_NN_setae: // Set Byte if Above or Equal (CF=0)
+ case STARS_NN_setb: // Set Byte if Below (CF=1)
+ case STARS_NN_setbe: // Set Byte if Below or Equal (CF=1 | ZF=1)
+ case STARS_NN_setc: // Set Byte if Carry (CF=1)
+ case STARS_NN_sete: // Set Byte if Equal (ZF=1)
+ case STARS_NN_setg: // Set Byte if Greater (ZF=0 & SF=OF)
+ case STARS_NN_setge: // Set Byte if Greater or Equal (SF=OF)
+ case STARS_NN_setl: // Set Byte if Less (SF!=OF)
+ case STARS_NN_setle: // Set Byte if Less or Equal (ZF=1 | SF!=OF)
+ case STARS_NN_setna: // Set Byte if Not Above (CF=1 | ZF=1)
+ case STARS_NN_setnae: // Set Byte if Not Above or Equal (CF=1)
+ case STARS_NN_setnb: // Set Byte if Not Below (CF=0)
+ case STARS_NN_setnbe: // Set Byte if Not Below or Equal (CF=0 & ZF=0)
+ case STARS_NN_setnc: // Set Byte if Not Carry (CF=0)
+ case STARS_NN_setne: // Set Byte if Not Equal (ZF=0)
+ case STARS_NN_setng: // Set Byte if Not Greater (ZF=1 | SF!=OF)
+ case STARS_NN_setnge: // Set Byte if Not Greater or Equal (ZF=1)
+ case STARS_NN_setnl: // Set Byte if Not Less (SF=OF)
+ case STARS_NN_setnle: // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
+ case STARS_NN_setno: // Set Byte if Not Overflow (OF=0)
+ case STARS_NN_setnp: // Set Byte if Not Parity (PF=0)
+ case STARS_NN_setns: // Set Byte if Not Sign (SF=0)
+ case STARS_NN_setnz: // Set Byte if Not Zero (ZF=0)
+ case STARS_NN_seto: // Set Byte if Overflow (OF=1)
+ case STARS_NN_setp: // Set Byte if Parity (PF=1)
+ case STARS_NN_setpe: // Set Byte if Parity Even (PF=1)
+ case STARS_NN_setpo: // Set Byte if Parity Odd (PF=0)
+ case STARS_NN_sets: // Set Byte if Sign (SF=1)
+ case STARS_NN_setz: // Set Byte if Zero (ZF=1)
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_sgdt: // Store Global Descriptor Table Register
- case NN_sidt: // Store Interrupt Descriptor Table Register
+ case STARS_NN_sgdt: // Store Global Descriptor Table Register
+ case STARS_NN_sidt: // Store Interrupt Descriptor Table Register
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_shld: // Double Precision Shift Left
- case NN_shrd: // Double Precision Shift Right
+ case STARS_NN_shld: // Double Precision Shift Left
+ case STARS_NN_shrd: // Double Precision Shift Right
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_sldt: // Store Local Descriptor Table Register
- case NN_smsw: // Store Machine Status Word
- case NN_stc: // Set Carry Flag
- case NN_std: // Set Direction Flag
- case NN_sti: // Set Interrupt Flag
+ case STARS_NN_sldt: // Store Local Descriptor Table Register
+ case STARS_NN_smsw: // Store Machine Status Word
+ case STARS_NN_stc: // Set Carry Flag
+ case STARS_NN_std: // Set Direction Flag
+ case STARS_NN_sti: // Set Interrupt Flag
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_stos: // Store String
- case NN_str: // Store Task Register
+ case STARS_NN_stos: // Store String
+ case STARS_NN_str: // Store Task Register
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_sub: // Integer Subtraction
+ case STARS_NN_sub: // Integer Subtraction
SMP_fprintf(OutFile, "sub");
break;
- case NN_test: // Logical Compare
+ case STARS_NN_test: // Logical Compare
SMP_fprintf(OutFile, "test");
break;
- case NN_verr: // Verify a Segment for Reading
- case NN_verw: // Verify a Segment for Writing
- case NN_wait: // Wait until BUSY# Pin is Inactive (HIGH)
+ case STARS_NN_verr: // Verify a Segment for Reading
+ case STARS_NN_verw: // Verify a Segment for Writing
+ case STARS_NN_wait: // Wait until BUSY# Pin is Inactive (HIGH)
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_xchg: // Exchange Register/Memory with Register
- case NN_xlat: // Table Lookup Translation
+ case STARS_NN_xchg: // Exchange Register/Memory with Register
+ case STARS_NN_xlat: // Table Lookup Translation
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_xor: // Logical Exclusive OR
+ case STARS_NN_xor: // Logical Exclusive OR
SMP_fprintf(OutFile, "xor");
break;
@@ -1454,12 +1360,12 @@ void PrintOpcode(uint16 opcode, FILE *OutFile) {
// 486 instructions
//
- case NN_cmpxchg: // Compare and Exchange
- case NN_bswap: // Swap bits in EAX
- case NN_xadd: // t<-dest; dest<-src+dest; src<-t
- case NN_invd: // Invalidate Data Cache
- case NN_wbinvd: // Invalidate Data Cache (write changes)
- case NN_invlpg: // Invalidate TLB entry
+ case STARS_NN_cmpxchg: // Compare and Exchange
+ case STARS_NN_bswap: // Swap bits in EAX
+ case STARS_NN_xadd: // t<-dest; dest<-src+dest; src<-t
+ case STARS_NN_invd: // Invalidate Data Cache
+ case STARS_NN_wbinvd: // Invalidate Data Cache (write changes)
+ case STARS_NN_invlpg: // Invalidate TLB entry
SMP_fprintf(OutFile, "ERROR");
break;
@@ -1467,12 +1373,12 @@ void PrintOpcode(uint16 opcode, FILE *OutFile) {
// Pentium instructions
//
- case NN_rdmsr: // Read Machine Status Register
- case NN_wrmsr: // Write Machine Status Register
- case NN_cpuid: // Get CPU ID
- case NN_cmpxchg8b: // Compare and Exchange Eight Bytes
- case NN_rdtsc: // Read Time Stamp Counter
- case NN_rsm: // Resume from System Management Mode
+ case STARS_NN_rdmsr: // Read Machine Status Register
+ case STARS_NN_wrmsr: // Write Machine Status Register
+ case STARS_NN_cpuid: // Get CPU ID
+ case STARS_NN_cmpxchg8b: // Compare and Exchange Eight Bytes
+ case STARS_NN_rdtsc: // Read Time Stamp Counter
+ case STARS_NN_rsm: // Resume from System Management Mode
SMP_fprintf(OutFile, "ERROR");
break;
@@ -1480,35 +1386,35 @@ void PrintOpcode(uint16 opcode, FILE *OutFile) {
// Pentium Pro instructions
//
- case NN_cmova: // Move if Above (CF=0 & ZF=0)
- case NN_cmovb: // Move if Below (CF=1)
- case NN_cmovbe: // Move if Below or Equal (CF=1 | ZF=1)
- case NN_cmovg: // Move if Greater (ZF=0 & SF=OF)
- case NN_cmovge: // Move if Greater or Equal (SF=OF)
- case NN_cmovl: // Move if Less (SF!=OF)
- case NN_cmovle: // Move if Less or Equal (ZF=1 | SF!=OF)
- case NN_cmovnb: // Move if Not Below (CF=0)
- case NN_cmovno: // Move if Not Overflow (OF=0)
- case NN_cmovnp: // Move if Not Parity (PF=0)
- case NN_cmovns: // Move if Not Sign (SF=0)
- case NN_cmovnz: // Move if Not Zero (ZF=0)
- case NN_cmovo: // Move if Overflow (OF=1)
- case NN_cmovp: // Move if Parity (PF=1)
- case NN_cmovs: // Move if Sign (SF=1)
- case NN_cmovz: // Move if Zero (ZF=1)
- case NN_fcmovb: // Floating Move if Below
- case NN_fcmove: // Floating Move if Equal
- case NN_fcmovbe: // Floating Move if Below or Equal
- case NN_fcmovu: // Floating Move if Unordered
- case NN_fcmovnb: // Floating Move if Not Below
- case NN_fcmovne: // Floating Move if Not Equal
- case NN_fcmovnbe: // Floating Move if Not Below or Equal
- case NN_fcmovnu: // Floating Move if Not Unordered
- case NN_fcomi: // FP Compare, result in EFLAGS
- case NN_fucomi: // FP Unordered Compare, result in EFLAGS
- case NN_fcomip: // FP Compare, result in EFLAGS, pop stack
- case NN_fucomip: // FP Unordered Compare, result in EFLAGS, pop stack
- case NN_rdpmc: // Read Performance Monitor Counter
+ case STARS_NN_cmova: // Move if Above (CF=0 & ZF=0)
+ case STARS_NN_cmovb: // Move if Below (CF=1)
+ case STARS_NN_cmovbe: // Move if Below or Equal (CF=1 | ZF=1)
+ case STARS_NN_cmovg: // Move if Greater (ZF=0 & SF=OF)
+ case STARS_NN_cmovge: // Move if Greater or Equal (SF=OF)
+ case STARS_NN_cmovl: // Move if Less (SF!=OF)
+ case STARS_NN_cmovle: // Move if Less or Equal (ZF=1 | SF!=OF)
+ case STARS_NN_cmovnb: // Move if Not Below (CF=0)
+ case STARS_NN_cmovno: // Move if Not Overflow (OF=0)
+ case STARS_NN_cmovnp: // Move if Not Parity (PF=0)
+ case STARS_NN_cmovns: // Move if Not Sign (SF=0)
+ case STARS_NN_cmovnz: // Move if Not Zero (ZF=0)
+ case STARS_NN_cmovo: // Move if Overflow (OF=1)
+ case STARS_NN_cmovp: // Move if Parity (PF=1)
+ case STARS_NN_cmovs: // Move if Sign (SF=1)
+ case STARS_NN_cmovz: // Move if Zero (ZF=1)
+ case STARS_NN_fcmovb: // Floating Move if Below
+ case STARS_NN_fcmove: // Floating Move if Equal
+ case STARS_NN_fcmovbe: // Floating Move if Below or Equal
+ case STARS_NN_fcmovu: // Floating Move if Unordered
+ case STARS_NN_fcmovnb: // Floating Move if Not Below
+ case STARS_NN_fcmovne: // Floating Move if Not Equal
+ case STARS_NN_fcmovnbe: // Floating Move if Not Below or Equal
+ case STARS_NN_fcmovnu: // Floating Move if Not Unordered
+ case STARS_NN_fcomi: // FP Compare, result in EFLAGS
+ case STARS_NN_fucomi: // FP Unordered Compare, result in EFLAGS
+ case STARS_NN_fcomip: // FP Compare, result in EFLAGS, pop stack
+ case STARS_NN_fucomip: // FP Unordered Compare, result in EFLAGS, pop stack
+ case STARS_NN_rdpmc: // Read Performance Monitor Counter
SMP_fprintf(OutFile, "ERROR");
break;
@@ -1516,83 +1422,83 @@ void PrintOpcode(uint16 opcode, FILE *OutFile) {
// FPP instructions
//
- case NN_fld: // Load Real
- case NN_fst: // Store Real
- case NN_fstp: // Store Real and Pop
- case NN_fxch: // Exchange Registers
- case NN_fild: // Load Integer
- case NN_fist: // Store Integer
- case NN_fistp: // Store Integer and Pop
- case NN_fbld: // Load BCD
- case NN_fbstp: // Store BCD and Pop
- case NN_fadd: // Add Real
- case NN_faddp: // Add Real and Pop
- case NN_fiadd: // Add Integer
- case NN_fsub: // Subtract Real
- case NN_fsubp: // Subtract Real and Pop
- case NN_fisub: // Subtract Integer
- case NN_fsubr: // Subtract Real Reversed
- case NN_fsubrp: // Subtract Real Reversed and Pop
- case NN_fisubr: // Subtract Integer Reversed
- case NN_fmul: // Multiply Real
- case NN_fmulp: // Multiply Real and Pop
- case NN_fimul: // Multiply Integer
- case NN_fdiv: // Divide Real
- case NN_fdivp: // Divide Real and Pop
- case NN_fidiv: // Divide Integer
- case NN_fdivr: // Divide Real Reversed
- case NN_fdivrp: // Divide Real Reversed and Pop
- case NN_fidivr: // Divide Integer Reversed
- case NN_fsqrt: // Square Root
- case NN_fscale: // Scale: st(0) <- st(0) * 2^st(1)
- case NN_fprem: // Partial Remainder
- case NN_frndint: // Round to Integer
- case NN_fxtract: // Extract exponent and significand
- case NN_fabs: // Absolute value
- case NN_fchs: // Change Sign
- case NN_fcom: // Compare Real
- case NN_fcomp: // Compare Real and Pop
- case NN_fcompp: // Compare Real and Pop Twice
- case NN_ficom: // Compare Integer
- case NN_ficomp: // Compare Integer and Pop
- case NN_ftst: // Test
- case NN_fxam: // Examine
- case NN_fptan: // Partial tangent
- case NN_fpatan: // Partial arctangent
- case NN_f2xm1: // 2^x - 1
- case NN_fyl2x: // Y * lg2(X)
- case NN_fyl2xp1: // Y * lg2(X+1)
- case NN_fldz: // Load +0.0
- case NN_fld1: // Load +1.0
- case NN_fldpi: // Load PI=3.14...
- case NN_fldl2t: // Load lg2(10)
- case NN_fldl2e: // Load lg2(e)
- case NN_fldlg2: // Load lg10(2)
- case NN_fldln2: // Load ln(2)
- case NN_finit: // Initialize Processor
- case NN_fninit: // Initialize Processor (no wait)
- case NN_fsetpm: // Set Protected Mode
- case NN_fldcw: // Load Control Word
- case NN_fstcw: // Store Control Word
- case NN_fnstcw: // Store Control Word (no wait)
- case NN_fstsw: // Store Status Word
- case NN_fnstsw: // Store Status Word (no wait)
- case NN_fclex: // Clear Exceptions
- case NN_fnclex: // Clear Exceptions (no wait)
- case NN_fstenv: // Store Environment
- case NN_fnstenv: // Store Environment (no wait)
- case NN_fldenv: // Load Environment
- case NN_fsave: // Save State
- case NN_fnsave: // Save State (no wait)
- case NN_frstor: // Restore State
- case NN_fincstp: // Increment Stack Pointer
- case NN_fdecstp: // Decrement Stack Pointer
- case NN_ffree: // Free Register
- case NN_fnop: // No Operation
- case NN_feni: // (8087 only)
- case NN_fneni: // (no wait) (8087 only)
- case NN_fdisi: // (8087 only)
- case NN_fndisi: // (no wait) (8087 only)
+ case STARS_NN_fld: // Load Real
+ case STARS_NN_fst: // Store Real
+ case STARS_NN_fstp: // Store Real and Pop
+ case STARS_NN_fxch: // Exchange Registers
+ case STARS_NN_fild: // Load Integer
+ case STARS_NN_fist: // Store Integer
+ case STARS_NN_fistp: // Store Integer and Pop
+ case STARS_NN_fbld: // Load BCD
+ case STARS_NN_fbstp: // Store BCD and Pop
+ case STARS_NN_fadd: // Add Real
+ case STARS_NN_faddp: // Add Real and Pop
+ case STARS_NN_fiadd: // Add Integer
+ case STARS_NN_fsub: // Subtract Real
+ case STARS_NN_fsubp: // Subtract Real and Pop
+ case STARS_NN_fisub: // Subtract Integer
+ case STARS_NN_fsubr: // Subtract Real Reversed
+ case STARS_NN_fsubrp: // Subtract Real Reversed and Pop
+ case STARS_NN_fisubr: // Subtract Integer Reversed
+ case STARS_NN_fmul: // Multiply Real
+ case STARS_NN_fmulp: // Multiply Real and Pop
+ case STARS_NN_fimul: // Multiply Integer
+ case STARS_NN_fdiv: // Divide Real
+ case STARS_NN_fdivp: // Divide Real and Pop
+ case STARS_NN_fidiv: // Divide Integer
+ case STARS_NN_fdivr: // Divide Real Reversed
+ case STARS_NN_fdivrp: // Divide Real Reversed and Pop
+ case STARS_NN_fidivr: // Divide Integer Reversed
+ case STARS_NN_fsqrt: // Square Root
+ case STARS_NN_fscale: // Scale: st(0) <- st(0) * 2^st(1)
+ case STARS_NN_fprem: // Partial Remainder
+ case STARS_NN_frndint: // Round to Integer
+ case STARS_NN_fxtract: // Extract exponent and significand
+ case STARS_NN_fabs: // Absolute value
+ case STARS_NN_fchs: // Change Sign
+ case STARS_NN_fcom: // Compare Real
+ case STARS_NN_fcomp: // Compare Real and Pop
+ case STARS_NN_fcompp: // Compare Real and Pop Twice
+ case STARS_NN_ficom: // Compare Integer
+ case STARS_NN_ficomp: // Compare Integer and Pop
+ case STARS_NN_ftst: // Test
+ case STARS_NN_fxam: // Examine
+ case STARS_NN_fptan: // Partial tangent
+ case STARS_NN_fpatan: // Partial arctangent
+ case STARS_NN_f2xm1: // 2^x - 1
+ case STARS_NN_fyl2x: // Y * lg2(X)
+ case STARS_NN_fyl2xp1: // Y * lg2(X+1)
+ case STARS_NN_fldz: // Load +0.0
+ case STARS_NN_fld1: // Load +1.0
+ case STARS_NN_fldpi: // Load PI=3.14...
+ case STARS_NN_fldl2t: // Load lg2(10)
+ case STARS_NN_fldl2e: // Load lg2(e)
+ case STARS_NN_fldlg2: // Load lg10(2)
+ case STARS_NN_fldln2: // Load ln(2)
+ case STARS_NN_finit: // Initialize Processor
+ case STARS_NN_fninit: // Initialize Processor (no wait)
+ case STARS_NN_fsetpm: // Set Protected Mode
+ case STARS_NN_fldcw: // Load Control Word
+ case STARS_NN_fstcw: // Store Control Word
+ case STARS_NN_fnstcw: // Store Control Word (no wait)
+ case STARS_NN_fstsw: // Store Status Word
+ case STARS_NN_fnstsw: // Store Status Word (no wait)
+ case STARS_NN_fclex: // Clear Exceptions
+ case STARS_NN_fnclex: // Clear Exceptions (no wait)
+ case STARS_NN_fstenv: // Store Environment
+ case STARS_NN_fnstenv: // Store Environment (no wait)
+ case STARS_NN_fldenv: // Load Environment
+ case STARS_NN_fsave: // Save State
+ case STARS_NN_fnsave: // Save State (no wait)
+ case STARS_NN_frstor: // Restore State
+ case STARS_NN_fincstp: // Increment Stack Pointer
+ case STARS_NN_fdecstp: // Decrement Stack Pointer
+ case STARS_NN_ffree: // Free Register
+ case STARS_NN_fnop: // No Operation
+ case STARS_NN_feni: // (8087 only)
+ case STARS_NN_fneni: // (no wait) (8087 only)
+ case STARS_NN_fdisi: // (8087 only)
+ case STARS_NN_fndisi: // (no wait) (8087 only)
SMP_fprintf(OutFile, "ERROR");
break;
@@ -1600,13 +1506,13 @@ void PrintOpcode(uint16 opcode, FILE *OutFile) {
// 80387 instructions
//
- case NN_fprem1: // Partial Remainder ( < half )
- case NN_fsincos: // t<-cos(st); st<-sin(st); push t
- case NN_fsin: // Sine
- case NN_fcos: // Cosine
- case NN_fucom: // Compare Unordered Real
- case NN_fucomp: // Compare Unordered Real and Pop
- case NN_fucompp: // Compare Unordered Real and Pop Twice
+ case STARS_NN_fprem1: // Partial Remainder ( < half )
+ case STARS_NN_fsincos: // t<-cos(st); st<-sin(st); push t
+ case STARS_NN_fsin: // Sine
+ case STARS_NN_fcos: // Cosine
+ case STARS_NN_fucom: // Compare Unordered Real
+ case STARS_NN_fucomp: // Compare Unordered Real and Pop
+ case STARS_NN_fucompp: // Compare Unordered Real and Pop Twice
SMP_fprintf(OutFile, "ERROR");
break;
@@ -1614,15 +1520,15 @@ void PrintOpcode(uint16 opcode, FILE *OutFile) {
// Instructions added 28.02.96
//
- case NN_setalc: // Set AL to Carry Flag
- case NN_svdc: // Save Register and Descriptor
- case NN_rsdc: // Restore Register and Descriptor
- case NN_svldt: // Save LDTR and Descriptor
- case NN_rsldt: // Restore LDTR and Descriptor
- case NN_svts: // Save TR and Descriptor
- case NN_rsts: // Restore TR and Descriptor
- case NN_icebp: // ICE Break Point
- case NN_loadall: // Load the entire CPU state from ES:EDI
+ case STARS_NN_setalc: // Set AL to Carry Flag
+ case STARS_NN_svdc: // Save Register and Descriptor
+ case STARS_NN_rsdc: // Restore Register and Descriptor
+ case STARS_NN_svldt: // Save LDTR and Descriptor
+ case STARS_NN_rsldt: // Restore LDTR and Descriptor
+ case STARS_NN_svts: // Save TR and Descriptor
+ case STARS_NN_rsts: // Restore TR and Descriptor
+ case STARS_NN_icebp: // ICE Break Point
+ case STARS_NN_loadall: // Load the entire CPU state from ES:EDI
SMP_fprintf(OutFile, "ERROR");
break;
@@ -1630,53 +1536,53 @@ void PrintOpcode(uint16 opcode, FILE *OutFile) {
// MMX instructions
//
- case NN_emms: // Empty MMX state
- case NN_movd: // Move 32 bits
- case NN_movq: // Move 64 bits
- case NN_packsswb: // Pack with Signed Saturation (Word->Byte)
- case NN_packssdw: // Pack with Signed Saturation (Dword->Word)
- case NN_packuswb: // Pack with Unsigned Saturation (Word->Byte)
- case NN_paddb: // Packed Add Byte
- case NN_paddw: // Packed Add Word
- case NN_paddd: // Packed Add Dword
- case NN_paddsb: // Packed Add with Saturation (Byte)
- case NN_paddsw: // Packed Add with Saturation (Word)
- case NN_paddusb: // Packed Add Unsigned with Saturation (Byte)
- case NN_paddusw: // Packed Add Unsigned with Saturation (Word)
- case NN_pand: // Bitwise Logical And
- case NN_pandn: // Bitwise Logical And Not
- case NN_pcmpeqb: // Packed Compare for Equal (Byte)
- case NN_pcmpeqw: // Packed Compare for Equal (Word)
- case NN_pcmpeqd: // Packed Compare for Equal (Dword)
- case NN_pcmpgtb: // Packed Compare for Greater Than (Byte)
- case NN_pcmpgtw: // Packed Compare for Greater Than (Word)
- case NN_pcmpgtd: // Packed Compare for Greater Than (Dword)
- case NN_pmaddwd: // Packed Multiply and Add
- case NN_pmulhw: // Packed Multiply High
- case NN_pmullw: // Packed Multiply Low
- case NN_por: // Bitwise Logical Or
- case NN_psllw: // Packed Shift Left Logical (Word)
- case NN_pslld: // Packed Shift Left Logical (Dword)
- case NN_psllq: // Packed Shift Left Logical (Qword)
- case NN_psraw: // Packed Shift Right Arithmetic (Word)
- case NN_psrad: // Packed Shift Right Arithmetic (Dword)
- case NN_psrlw: // Packed Shift Right Logical (Word)
- case NN_psrld: // Packed Shift Right Logical (Dword)
- case NN_psrlq: // Packed Shift Right Logical (Qword)
- case NN_psubb: // Packed Subtract Byte
- case NN_psubw: // Packed Subtract Word
- case NN_psubd: // Packed Subtract Dword
- case NN_psubsb: // Packed Subtract with Saturation (Byte)
- case NN_psubsw: // Packed Subtract with Saturation (Word)
- case NN_psubusb: // Packed Subtract Unsigned with Saturation (Byte)
- case NN_psubusw: // Packed Subtract Unsigned with Saturation (Word)
- case NN_punpckhbw: // Unpack High Packed Data (Byte->Word)
- case NN_punpckhwd: // Unpack High Packed Data (Word->Dword)
- case NN_punpckhdq: // Unpack High Packed Data (Dword->Qword)
- case NN_punpcklbw: // Unpack Low Packed Data (Byte->Word)
- case NN_punpcklwd: // Unpack Low Packed Data (Word->Dword)
- case NN_punpckldq: // Unpack Low Packed Data (Dword->Qword)
- case NN_pxor: // Bitwise Logical Exclusive Or
+ case STARS_NN_emms: // Empty MMX state
+ case STARS_NN_movd: // Move 32 bits
+ case STARS_NN_movq: // Move 64 bits
+ case STARS_NN_packsswb: // Pack with Signed Saturation (Word->Byte)
+ case STARS_NN_packssdw: // Pack with Signed Saturation (Dword->Word)
+ case STARS_NN_packuswb: // Pack with Unsigned Saturation (Word->Byte)
+ case STARS_NN_paddb: // Packed Add Byte
+ case STARS_NN_paddw: // Packed Add Word
+ case STARS_NN_paddd: // Packed Add Dword
+ case STARS_NN_paddsb: // Packed Add with Saturation (Byte)
+ case STARS_NN_paddsw: // Packed Add with Saturation (Word)
+ case STARS_NN_paddusb: // Packed Add Unsigned with Saturation (Byte)
+ case STARS_NN_paddusw: // Packed Add Unsigned with Saturation (Word)
+ case STARS_NN_pand: // Bitwise Logical And
+ case STARS_NN_pandn: // Bitwise Logical And Not
+ case STARS_NN_pcmpeqb: // Packed Compare for Equal (Byte)
+ case STARS_NN_pcmpeqw: // Packed Compare for Equal (Word)
+ case STARS_NN_pcmpeqd: // Packed Compare for Equal (Dword)
+ case STARS_NN_pcmpgtb: // Packed Compare for Greater Than (Byte)
+ case STARS_NN_pcmpgtw: // Packed Compare for Greater Than (Word)
+ case STARS_NN_pcmpgtd: // Packed Compare for Greater Than (Dword)
+ case STARS_NN_pmaddwd: // Packed Multiply and Add
+ case STARS_NN_pmulhw: // Packed Multiply High
+ case STARS_NN_pmullw: // Packed Multiply Low
+ case STARS_NN_por: // Bitwise Logical Or
+ case STARS_NN_psllw: // Packed Shift Left Logical (Word)
+ case STARS_NN_pslld: // Packed Shift Left Logical (Dword)
+ case STARS_NN_psllq: // Packed Shift Left Logical (Qword)
+ case STARS_NN_psraw: // Packed Shift Right Arithmetic (Word)
+ case STARS_NN_psrad: // Packed Shift Right Arithmetic (Dword)
+ case STARS_NN_psrlw: // Packed Shift Right Logical (Word)
+ case STARS_NN_psrld: // Packed Shift Right Logical (Dword)
+ case STARS_NN_psrlq: // Packed Shift Right Logical (Qword)
+ case STARS_NN_psubb: // Packed Subtract Byte
+ case STARS_NN_psubw: // Packed Subtract Word
+ case STARS_NN_psubd: // Packed Subtract Dword
+ case STARS_NN_psubsb: // Packed Subtract with Saturation (Byte)
+ case STARS_NN_psubsw: // Packed Subtract with Saturation (Word)
+ case STARS_NN_psubusb: // Packed Subtract Unsigned with Saturation (Byte)
+ case STARS_NN_psubusw: // Packed Subtract Unsigned with Saturation (Word)
+ case STARS_NN_punpckhbw: // Unpack High Packed Data (Byte->Word)
+ case STARS_NN_punpckhwd: // Unpack High Packed Data (Word->Dword)
+ case STARS_NN_punpckhdq: // Unpack High Packed Data (Dword->Qword)
+ case STARS_NN_punpcklbw: // Unpack Low Packed Data (Byte->Word)
+ case STARS_NN_punpcklwd: // Unpack Low Packed Data (Word->Dword)
+ case STARS_NN_punpckldq: // Unpack Low Packed Data (Dword->Qword)
+ case STARS_NN_pxor: // Bitwise Logical Exclusive Or
SMP_fprintf(OutFile, "ERROR");
break;
@@ -1684,923 +1590,923 @@ void PrintOpcode(uint16 opcode, FILE *OutFile) {
// Undocumented Deschutes processor instructions
//
- case NN_fxsave: // Fast save FP context
- case NN_fxrstor: // Fast restore FP context
+ case STARS_NN_fxsave: // Fast save FP context
+ case STARS_NN_fxrstor: // Fast restore FP context
SMP_fprintf(OutFile, "ERROR");
break;
// Pentium II instructions
- case NN_sysenter: // Fast Transition to System Call Entry Point
- case NN_sysexit: // Fast Transition from System Call Entry Point
+ case STARS_NN_sysenter: // Fast Transition to System Call Entry Point
+ case STARS_NN_sysexit: // Fast Transition from System Call Entry Point
SMP_fprintf(OutFile, "ERROR");
break;
// 3DNow! instructions
- case NN_pavgusb: // Packed 8-bit Unsigned Integer Averaging
- case NN_pfadd: // Packed Floating-Point Addition
- case NN_pfsub: // Packed Floating-Point Subtraction
- case NN_pfsubr: // Packed Floating-Point Reverse Subtraction
- case NN_pfacc: // Packed Floating-Point Accumulate
- case NN_pfcmpge: // Packed Floating-Point Comparison, Greater or Equal
- case NN_pfcmpgt: // Packed Floating-Point Comparison, Greater
- case NN_pfcmpeq: // Packed Floating-Point Comparison, Equal
- case NN_pfmin: // Packed Floating-Point Minimum
- case NN_pfmax: // Packed Floating-Point Maximum
- case NN_pi2fd: // Packed 32-bit Integer to Floating-Point
- case NN_pf2id: // Packed Floating-Point to 32-bit Integer
- case NN_pfrcp: // Packed Floating-Point Reciprocal Approximation
- case NN_pfrsqrt: // Packed Floating-Point Reciprocal Square Root Approximation
- case NN_pfmul: // Packed Floating-Point Multiplication
- case NN_pfrcpit1: // Packed Floating-Point Reciprocal First Iteration Step
- case NN_pfrsqit1: // Packed Floating-Point Reciprocal Square Root First Iteration Step
- case NN_pfrcpit2: // Packed Floating-Point Reciprocal Second Iteration Step
- case NN_pmulhrw: // Packed Floating-Point 16-bit Integer Multiply with rounding
- case NN_femms: // Faster entry/exit of the MMX or floating-point state
- case NN_prefetch: // Prefetch at least a 32-byte line into L1 data cache
- case NN_prefetchw: // Prefetch processor cache line into L1 data cache (mark as modified)
+ case STARS_NN_pavgusb: // Packed 8-bit Unsigned Integer Averaging
+ case STARS_NN_pfadd: // Packed Floating-Point Addition
+ case STARS_NN_pfsub: // Packed Floating-Point Subtraction
+ case STARS_NN_pfsubr: // Packed Floating-Point Reverse Subtraction
+ case STARS_NN_pfacc: // Packed Floating-Point Accumulate
+ case STARS_NN_pfcmpge: // Packed Floating-Point Comparison, Greater or Equal
+ case STARS_NN_pfcmpgt: // Packed Floating-Point Comparison, Greater
+ case STARS_NN_pfcmpeq: // Packed Floating-Point Comparison, Equal
+ case STARS_NN_pfmin: // Packed Floating-Point Minimum
+ case STARS_NN_pfmax: // Packed Floating-Point Maximum
+ case STARS_NN_pi2fd: // Packed 32-bit Integer to Floating-Point
+ case STARS_NN_pf2id: // Packed Floating-Point to 32-bit Integer
+ case STARS_NN_pfrcp: // Packed Floating-Point Reciprocal Approximation
+ case STARS_NN_pfrsqrt: // Packed Floating-Point Reciprocal Square Root Approximation
+ case STARS_NN_pfmul: // Packed Floating-Point Multiplication
+ case STARS_NN_pfrcpit1: // Packed Floating-Point Reciprocal First Iteration Step
+ case STARS_NN_pfrsqit1: // Packed Floating-Point Reciprocal Square Root First Iteration Step
+ case STARS_NN_pfrcpit2: // Packed Floating-Point Reciprocal Second Iteration Step
+ case STARS_NN_pmulhrw: // Packed Floating-Point 16-bit Integer Multiply with rounding
+ case STARS_NN_femms: // Faster entry/exit of the MMX or floating-point state
+ case STARS_NN_prefetch: // Prefetch at least a 32-byte line into L1 data cache
+ case STARS_NN_prefetchw: // Prefetch processor cache line into L1 data cache (mark as modified)
SMP_fprintf(OutFile, "ERROR");
break;
// Pentium III instructions
- case NN_addps: // Packed Single-FP Add
- case NN_addss: // Scalar Single-FP Add
- case NN_andnps: // Bitwise Logical And Not for Single-FP
- case NN_andps: // Bitwise Logical And for Single-FP
- case NN_cmpps: // Packed Single-FP Compare
- case NN_cmpss: // Scalar Single-FP Compare
- case NN_comiss: // Scalar Ordered Single-FP Compare and Set EFLAGS
- case NN_cvtpi2ps: // Packed signed INT32 to Packed Single-FP conversion
- case NN_cvtps2pi: // Packed Single-FP to Packed INT32 conversion
- case NN_cvtsi2ss: // Scalar signed INT32 to Single-FP conversion
- case NN_cvtss2si: // Scalar Single-FP to signed INT32 conversion
- case NN_cvttps2pi: // Packed Single-FP to Packed INT32 conversion (truncate)
- case NN_cvttss2si: // Scalar Single-FP to signed INT32 conversion (truncate)
- case NN_divps: // Packed Single-FP Divide
- case NN_divss: // Scalar Single-FP Divide
- case NN_ldmxcsr: // Load Streaming SIMD Extensions Technology Control/Status Register
- case NN_maxps: // Packed Single-FP Maximum
- case NN_maxss: // Scalar Single-FP Maximum
- case NN_minps: // Packed Single-FP Minimum
- case NN_minss: // Scalar Single-FP Minimum
- case NN_movaps: // Move Aligned Four Packed Single-FP
- case NN_movhlps: // Move High to Low Packed Single-FP
- case NN_movhps: // Move High Packed Single-FP
- case NN_movlhps: // Move Low to High Packed Single-FP
- case NN_movlps: // Move Low Packed Single-FP
- case NN_movmskps: // Move Mask to Register
- case NN_movss: // Move Scalar Single-FP
- case NN_movups: // Move Unaligned Four Packed Single-FP
- case NN_mulps: // Packed Single-FP Multiply
- case NN_mulss: // Scalar Single-FP Multiply
- case NN_orps: // Bitwise Logical OR for Single-FP Data
- case NN_rcpps: // Packed Single-FP Reciprocal
- case NN_rcpss: // Scalar Single-FP Reciprocal
- case NN_rsqrtps: // Packed Single-FP Square Root Reciprocal
- case NN_rsqrtss: // Scalar Single-FP Square Root Reciprocal
- case NN_shufps: // Shuffle Single-FP
- case NN_sqrtps: // Packed Single-FP Square Root
- case NN_sqrtss: // Scalar Single-FP Square Root
- case NN_stmxcsr: // Store Streaming SIMD Extensions Technology Control/Status Register
- case NN_subps: // Packed Single-FP Subtract
- case NN_subss: // Scalar Single-FP Subtract
- case NN_ucomiss: // Scalar Unordered Single-FP Compare and Set EFLAGS
- case NN_unpckhps: // Unpack High Packed Single-FP Data
- case NN_unpcklps: // Unpack Low Packed Single-FP Data
- case NN_xorps: // Bitwise Logical XOR for Single-FP Data
- case NN_pavgb: // Packed Average (Byte)
- case NN_pavgw: // Packed Average (Word)
- case NN_pextrw: // Extract Word
- case NN_pinsrw: // Insert Word
- case NN_pmaxsw: // Packed Signed Integer Word Maximum
- case NN_pmaxub: // Packed Unsigned Integer Byte Maximum
- case NN_pminsw: // Packed Signed Integer Word Minimum
- case NN_pminub: // Packed Unsigned Integer Byte Minimum
- case NN_pmovmskb: // Move Byte Mask to Integer
- case NN_pmulhuw: // Packed Multiply High Unsigned
- case NN_psadbw: // Packed Sum of Absolute Differences
- case NN_pshufw: // Packed Shuffle Word
- case NN_maskmovq: // Byte Mask write
- case NN_movntps: // Move Aligned Four Packed Single-FP Non Temporal
- case NN_movntq: // Move 64 Bits Non Temporal
- case NN_prefetcht0: // Prefetch to all cache levels
- case NN_prefetcht1: // Prefetch to all cache levels
- case NN_prefetcht2: // Prefetch to L2 cache
- case NN_prefetchnta: // Prefetch to L1 cache
- case NN_sfence: // Store Fence
+ case STARS_NN_addps: // Packed Single-FP Add
+ case STARS_NN_addss: // Scalar Single-FP Add
+ case STARS_NN_andnps: // Bitwise Logical And Not for Single-FP
+ case STARS_NN_andps: // Bitwise Logical And for Single-FP
+ case STARS_NN_cmpps: // Packed Single-FP Compare
+ case STARS_NN_cmpss: // Scalar Single-FP Compare
+ case STARS_NN_comiss: // Scalar Ordered Single-FP Compare and Set EFLAGS
+ case STARS_NN_cvtpi2ps: // Packed signed INT32 to Packed Single-FP conversion
+ case STARS_NN_cvtps2pi: // Packed Single-FP to Packed INT32 conversion
+ case STARS_NN_cvtsi2ss: // Scalar signed INT32 to Single-FP conversion
+ case STARS_NN_cvtss2si: // Scalar Single-FP to signed INT32 conversion
+ case STARS_NN_cvttps2pi: // Packed Single-FP to Packed INT32 conversion (truncate)
+ case STARS_NN_cvttss2si: // Scalar Single-FP to signed INT32 conversion (truncate)
+ case STARS_NN_divps: // Packed Single-FP Divide
+ case STARS_NN_divss: // Scalar Single-FP Divide
+ case STARS_NN_ldmxcsr: // Load Streaming SIMD Extensions Technology Control/Status Register
+ case STARS_NN_maxps: // Packed Single-FP Maximum
+ case STARS_NN_maxss: // Scalar Single-FP Maximum
+ case STARS_NN_minps: // Packed Single-FP Minimum
+ case STARS_NN_minss: // Scalar Single-FP Minimum
+ case STARS_NN_movaps: // Move Aligned Four Packed Single-FP
+ case STARS_NN_movhlps: // Move High to Low Packed Single-FP
+ case STARS_NN_movhps: // Move High Packed Single-FP
+ case STARS_NN_movlhps: // Move Low to High Packed Single-FP
+ case STARS_NN_movlps: // Move Low Packed Single-FP
+ case STARS_NN_movmskps: // Move Mask to Register
+ case STARS_NN_movss: // Move Scalar Single-FP
+ case STARS_NN_movups: // Move Unaligned Four Packed Single-FP
+ case STARS_NN_mulps: // Packed Single-FP Multiply
+ case STARS_NN_mulss: // Scalar Single-FP Multiply
+ case STARS_NN_orps: // Bitwise Logical OR for Single-FP Data
+ case STARS_NN_rcpps: // Packed Single-FP Reciprocal
+ case STARS_NN_rcpss: // Scalar Single-FP Reciprocal
+ case STARS_NN_rsqrtps: // Packed Single-FP Square Root Reciprocal
+ case STARS_NN_rsqrtss: // Scalar Single-FP Square Root Reciprocal
+ case STARS_NN_shufps: // Shuffle Single-FP
+ case STARS_NN_sqrtps: // Packed Single-FP Square Root
+ case STARS_NN_sqrtss: // Scalar Single-FP Square Root
+ case STARS_NN_stmxcsr: // Store Streaming SIMD Extensions Technology Control/Status Register
+ case STARS_NN_subps: // Packed Single-FP Subtract
+ case STARS_NN_subss: // Scalar Single-FP Subtract
+ case STARS_NN_ucomiss: // Scalar Unordered Single-FP Compare and Set EFLAGS
+ case STARS_NN_unpckhps: // Unpack High Packed Single-FP Data
+ case STARS_NN_unpcklps: // Unpack Low Packed Single-FP Data
+ case STARS_NN_xorps: // Bitwise Logical XOR for Single-FP Data
+ case STARS_NN_pavgb: // Packed Average (Byte)
+ case STARS_NN_pavgw: // Packed Average (Word)
+ case STARS_NN_pextrw: // Extract Word
+ case STARS_NN_pinsrw: // Insert Word
+ case STARS_NN_pmaxsw: // Packed Signed Integer Word Maximum
+ case STARS_NN_pmaxub: // Packed Unsigned Integer Byte Maximum
+ case STARS_NN_pminsw: // Packed Signed Integer Word Minimum
+ case STARS_NN_pminub: // Packed Unsigned Integer Byte Minimum
+ case STARS_NN_pmovmskb: // Move Byte Mask to Integer
+ case STARS_NN_pmulhuw: // Packed Multiply High Unsigned
+ case STARS_NN_psadbw: // Packed Sum of Absolute Differences
+ case STARS_NN_pshufw: // Packed Shuffle Word
+ case STARS_NN_maskmovq: // Byte Mask write
+ case STARS_NN_movntps: // Move Aligned Four Packed Single-FP Non Temporal
+ case STARS_NN_movntq: // Move 64 Bits Non Temporal
+ case STARS_NN_prefetcht0: // Prefetch to all cache levels
+ case STARS_NN_prefetcht1: // Prefetch to all cache levels
+ case STARS_NN_prefetcht2: // Prefetch to L2 cache
+ case STARS_NN_prefetchnta: // Prefetch to L1 cache
+ case STARS_NN_sfence: // Store Fence
SMP_fprintf(OutFile, "ERROR");
break;
// Pentium III Pseudo instructions
- case NN_cmpeqps: // Packed Single-FP Compare EQ
- case NN_cmpltps: // Packed Single-FP Compare LT
- case NN_cmpleps: // Packed Single-FP Compare LE
- case NN_cmpunordps: // Packed Single-FP Compare UNORD
- case NN_cmpneqps: // Packed Single-FP Compare NOT EQ
- case NN_cmpnltps: // Packed Single-FP Compare NOT LT
- case NN_cmpnleps: // Packed Single-FP Compare NOT LE
- case NN_cmpordps: // Packed Single-FP Compare ORDERED
- case NN_cmpeqss: // Scalar Single-FP Compare EQ
- case NN_cmpltss: // Scalar Single-FP Compare LT
- case NN_cmpless: // Scalar Single-FP Compare LE
- case NN_cmpunordss: // Scalar Single-FP Compare UNORD
- case NN_cmpneqss: // Scalar Single-FP Compare NOT EQ
- case NN_cmpnltss: // Scalar Single-FP Compare NOT LT
- case NN_cmpnless: // Scalar Single-FP Compare NOT LE
- case NN_cmpordss: // Scalar Single-FP Compare ORDERED
+ case STARS_NN_cmpeqps: // Packed Single-FP Compare EQ
+ case STARS_NN_cmpltps: // Packed Single-FP Compare LT
+ case STARS_NN_cmpleps: // Packed Single-FP Compare LE
+ case STARS_NN_cmpunordps: // Packed Single-FP Compare UNORD
+ case STARS_NN_cmpneqps: // Packed Single-FP Compare NOT EQ
+ case STARS_NN_cmpnltps: // Packed Single-FP Compare NOT LT
+ case STARS_NN_cmpnleps: // Packed Single-FP Compare NOT LE
+ case STARS_NN_cmpordps: // Packed Single-FP Compare ORDERED
+ case STARS_NN_cmpeqss: // Scalar Single-FP Compare EQ
+ case STARS_NN_cmpltss: // Scalar Single-FP Compare LT
+ case STARS_NN_cmpless: // Scalar Single-FP Compare LE
+ case STARS_NN_cmpunordss: // Scalar Single-FP Compare UNORD
+ case STARS_NN_cmpneqss: // Scalar Single-FP Compare NOT EQ
+ case STARS_NN_cmpnltss: // Scalar Single-FP Compare NOT LT
+ case STARS_NN_cmpnless: // Scalar Single-FP Compare NOT LE
+ case STARS_NN_cmpordss: // Scalar Single-FP Compare ORDERED
SMP_fprintf(OutFile, "ERROR");
break;
// AMD K7 instructions
- case NN_pf2iw: // Packed Floating-Point to Integer with Sign Extend
- case NN_pfnacc: // Packed Floating-Point Negative Accumulate
- case NN_pfpnacc: // Packed Floating-Point Mixed Positive-Negative Accumulate
- case NN_pi2fw: // Packed 16-bit Integer to Floating-Point
- case NN_pswapd: // Packed Swap Double Word
+ case STARS_NN_pf2iw: // Packed Floating-Point to Integer with Sign Extend
+ case STARS_NN_pfnacc: // Packed Floating-Point Negative Accumulate
+ case STARS_NN_pfpnacc: // Packed Floating-Point Mixed Positive-Negative Accumulate
+ case STARS_NN_pi2fw: // Packed 16-bit Integer to Floating-Point
+ case STARS_NN_pswapd: // Packed Swap Double Word
SMP_fprintf(OutFile, "ERROR");
break;
// Undocumented FP instructions (thanks to norbert.juffa@adm.com)
- case NN_fstp1: // Alias of Store Real and Pop
- case NN_fcom2: // Alias of Compare Real
- case NN_fcomp3: // Alias of Compare Real and Pop
- case NN_fxch4: // Alias of Exchange Registers
- case NN_fcomp5: // Alias of Compare Real and Pop
- case NN_ffreep: // Free Register and Pop
- case NN_fxch7: // Alias of Exchange Registers
- case NN_fstp8: // Alias of Store Real and Pop
- case NN_fstp9: // Alias of Store Real and Pop
+ case STARS_NN_fstp1: // Alias of Store Real and Pop
+ case STARS_NN_fcom2: // Alias of Compare Real
+ case STARS_NN_fcomp3: // Alias of Compare Real and Pop
+ case STARS_NN_fxch4: // Alias of Exchange Registers
+ case STARS_NN_fcomp5: // Alias of Compare Real and Pop
+ case STARS_NN_ffreep: // Free Register and Pop
+ case STARS_NN_fxch7: // Alias of Exchange Registers
+ case STARS_NN_fstp8: // Alias of Store Real and Pop
+ case STARS_NN_fstp9: // Alias of Store Real and Pop
SMP_fprintf(OutFile, "ERROR");
break;
// Pentium 4 instructions
- case NN_addpd: // Add Packed Double-Precision Floating-Point Values
- case NN_addsd: // Add Scalar Double-Precision Floating-Point Values
- case NN_andnpd: // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
- case NN_andpd: // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
- case NN_clflush: // Flush Cache Line
- case NN_cmppd: // Compare Packed Double-Precision Floating-Point Values
- case NN_cmpsd: // Compare Scalar Double-Precision Floating-Point Values
- case NN_comisd: // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
- case NN_cvtdq2pd: // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
- case NN_cvtdq2ps: // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
- case NN_cvtpd2dq: // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_cvtpd2pi: // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_cvtpd2ps: // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
- case NN_cvtpi2pd: // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
- case NN_cvtps2dq: // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_cvtps2pd: // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
- case NN_cvtsd2si: // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
- case NN_cvtsd2ss: // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
- case NN_cvtsi2sd: // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
- case NN_cvtss2sd: // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
- case NN_cvttpd2dq: // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_cvttpd2pi: // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_cvttps2dq: // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_cvttsd2si: // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
- case NN_divpd: // Divide Packed Double-Precision Floating-Point Values
- case NN_divsd: // Divide Scalar Double-Precision Floating-Point Values
- case NN_lfence: // Load Fence
- case NN_maskmovdqu: // Store Selected Bytes of Double Quadword
- case NN_maxpd: // Return Maximum Packed Double-Precision Floating-Point Values
- case NN_maxsd: // Return Maximum Scalar Double-Precision Floating-Point Value
- case NN_mfence: // Memory Fence
- case NN_minpd: // Return Minimum Packed Double-Precision Floating-Point Values
- case NN_minsd: // Return Minimum Scalar Double-Precision Floating-Point Value
- case NN_movapd: // Move Aligned Packed Double-Precision Floating-Point Values
- case NN_movdq2q: // Move Quadword from XMM to MMX Register
- case NN_movdqa: // Move Aligned Double Quadword
- case NN_movdqu: // Move Unaligned Double Quadword
- case NN_movhpd: // Move High Packed Double-Precision Floating-Point Values
- case NN_movlpd: // Move Low Packed Double-Precision Floating-Point Values
- case NN_movmskpd: // Extract Packed Double-Precision Floating-Point Sign Mask
- case NN_movntdq: // Store Double Quadword Using Non-Temporal Hint
- case NN_movnti: // Store Doubleword Using Non-Temporal Hint
- case NN_movntpd: // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
- case NN_movq2dq: // Move Quadword from MMX to XMM Register
- case NN_movsd: // Move Scalar Double-Precision Floating-Point Values
- case NN_movupd: // Move Unaligned Packed Double-Precision Floating-Point Values
- case NN_mulpd: // Multiply Packed Double-Precision Floating-Point Values
- case NN_mulsd: // Multiply Scalar Double-Precision Floating-Point Values
- case NN_orpd: // Bitwise Logical OR of Double-Precision Floating-Point Values
- case NN_paddq: // Add Packed Quadword Integers
- case NN_pause: // Spin Loop Hint
- case NN_pmuludq: // Multiply Packed Unsigned Doubleword Integers
- case NN_pshufd: // Shuffle Packed Doublewords
- case NN_pshufhw: // Shuffle Packed High Words
- case NN_pshuflw: // Shuffle Packed Low Words
- case NN_pslldq: // Shift Double Quadword Left Logical
- case NN_psrldq: // Shift Double Quadword Right Logical
- case NN_psubq: // Subtract Packed Quadword Integers
- case NN_punpckhqdq: // Unpack High Data
- case NN_punpcklqdq: // Unpack Low Data
- case NN_shufpd: // Shuffle Packed Double-Precision Floating-Point Values
- case NN_sqrtpd: // Compute Square Roots of Packed Double-Precision Floating-Point Values
- case NN_sqrtsd: // Compute Square Rootof Scalar Double-Precision Floating-Point Value
- case NN_subpd: // Subtract Packed Double-Precision Floating-Point Values
- case NN_subsd: // Subtract Scalar Double-Precision Floating-Point Values
- case NN_ucomisd: // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
- case NN_unpckhpd: // Unpack and Interleave High Packed Double-Precision Floating-Point Values
- case NN_unpcklpd: // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
- case NN_xorpd: // Bitwise Logical OR of Double-Precision Floating-Point Values
+ case STARS_NN_addpd: // Add Packed Double-Precision Floating-Point Values
+ case STARS_NN_addsd: // Add Scalar Double-Precision Floating-Point Values
+ case STARS_NN_andnpd: // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
+ case STARS_NN_andpd: // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
+ case STARS_NN_clflush: // Flush Cache Line
+ case STARS_NN_cmppd: // Compare Packed Double-Precision Floating-Point Values
+ case STARS_NN_cmpsd: // Compare Scalar Double-Precision Floating-Point Values
+ case STARS_NN_comisd: // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ case STARS_NN_cvtdq2pd: // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
+ case STARS_NN_cvtdq2ps: // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
+ case STARS_NN_cvtpd2dq: // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_cvtpd2pi: // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_cvtpd2ps: // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
+ case STARS_NN_cvtpi2pd: // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
+ case STARS_NN_cvtps2dq: // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_cvtps2pd: // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
+ case STARS_NN_cvtsd2si: // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ case STARS_NN_cvtsd2ss: // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
+ case STARS_NN_cvtsi2sd: // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
+ case STARS_NN_cvtss2sd: // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
+ case STARS_NN_cvttpd2dq: // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_cvttpd2pi: // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_cvttps2dq: // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_cvttsd2si: // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ case STARS_NN_divpd: // Divide Packed Double-Precision Floating-Point Values
+ case STARS_NN_divsd: // Divide Scalar Double-Precision Floating-Point Values
+ case STARS_NN_lfence: // Load Fence
+ case STARS_NN_maskmovdqu: // Store Selected Bytes of Double Quadword
+ case STARS_NN_maxpd: // Return Maximum Packed Double-Precision Floating-Point Values
+ case STARS_NN_maxsd: // Return Maximum Scalar Double-Precision Floating-Point Value
+ case STARS_NN_mfence: // Memory Fence
+ case STARS_NN_minpd: // Return Minimum Packed Double-Precision Floating-Point Values
+ case STARS_NN_minsd: // Return Minimum Scalar Double-Precision Floating-Point Value
+ case STARS_NN_movapd: // Move Aligned Packed Double-Precision Floating-Point Values
+ case STARS_NN_movdq2q: // Move Quadword from XMM to MMX Register
+ case STARS_NN_movdqa: // Move Aligned Double Quadword
+ case STARS_NN_movdqu: // Move Unaligned Double Quadword
+ case STARS_NN_movhpd: // Move High Packed Double-Precision Floating-Point Values
+ case STARS_NN_movlpd: // Move Low Packed Double-Precision Floating-Point Values
+ case STARS_NN_movmskpd: // Extract Packed Double-Precision Floating-Point Sign Mask
+ case STARS_NN_movntdq: // Store Double Quadword Using Non-Temporal Hint
+ case STARS_NN_movnti: // Store Doubleword Using Non-Temporal Hint
+ case STARS_NN_movntpd: // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
+ case STARS_NN_movq2dq: // Move Quadword from MMX to XMM Register
+ case STARS_NN_movsd: // Move Scalar Double-Precision Floating-Point Values
+ case STARS_NN_movupd: // Move Unaligned Packed Double-Precision Floating-Point Values
+ case STARS_NN_mulpd: // Multiply Packed Double-Precision Floating-Point Values
+ case STARS_NN_mulsd: // Multiply Scalar Double-Precision Floating-Point Values
+ case STARS_NN_orpd: // Bitwise Logical OR of Double-Precision Floating-Point Values
+ case STARS_NN_paddq: // Add Packed Quadword Integers
+ case STARS_NN_pause: // Spin Loop Hint
+ case STARS_NN_pmuludq: // Multiply Packed Unsigned Doubleword Integers
+ case STARS_NN_pshufd: // Shuffle Packed Doublewords
+ case STARS_NN_pshufhw: // Shuffle Packed High Words
+ case STARS_NN_pshuflw: // Shuffle Packed Low Words
+ case STARS_NN_pslldq: // Shift Double Quadword Left Logical
+ case STARS_NN_psrldq: // Shift Double Quadword Right Logical
+ case STARS_NN_psubq: // Subtract Packed Quadword Integers
+ case STARS_NN_punpckhqdq: // Unpack High Data
+ case STARS_NN_punpcklqdq: // Unpack Low Data
+ case STARS_NN_shufpd: // Shuffle Packed Double-Precision Floating-Point Values
+ case STARS_NN_sqrtpd: // Compute Square Roots of Packed Double-Precision Floating-Point Values
+ case STARS_NN_sqrtsd: // Compute Square Rootof Scalar Double-Precision Floating-Point Value
+ case STARS_NN_subpd: // Subtract Packed Double-Precision Floating-Point Values
+ case STARS_NN_subsd: // Subtract Scalar Double-Precision Floating-Point Values
+ case STARS_NN_ucomisd: // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ case STARS_NN_unpckhpd: // Unpack and Interleave High Packed Double-Precision Floating-Point Values
+ case STARS_NN_unpcklpd: // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
+ case STARS_NN_xorpd: // Bitwise Logical OR of Double-Precision Floating-Point Values
SMP_fprintf(OutFile, "ERROR");
break;
// AMD syscall/sysret instructions
- case NN_syscall: // Low latency system call
- case NN_sysret: // Return from system call
+ case STARS_NN_syscall: // Low latency system call
+ case STARS_NN_sysret: // Return from system call
SMP_fprintf(OutFile, "ERROR");
break;
// AMD64 instructions
- case NN_swapgs: // Exchange GS base with KernelGSBase MSR
+ case STARS_NN_swapgs: // Exchange GS base with KernelGSBase MSR
SMP_fprintf(OutFile, "ERROR");
break;
// New Pentium instructions (SSE3)
- case NN_movddup: // Move One Double-FP and Duplicate
- case NN_movshdup: // Move Packed Single-FP High and Duplicate
- case NN_movsldup: // Move Packed Single-FP Low and Duplicate
+ case STARS_NN_movddup: // Move One Double-FP and Duplicate
+ case STARS_NN_movshdup: // Move Packed Single-FP High and Duplicate
+ case STARS_NN_movsldup: // Move Packed Single-FP Low and Duplicate
SMP_fprintf(OutFile, "ERROR");
break;
// Missing AMD64 instructions
- case NN_movsxd: // Move with Sign-Extend Doubleword
- case NN_cmpxchg16b: // Compare and Exchange 16 Bytes
+ case STARS_NN_movsxd: // Move with Sign-Extend Doubleword
+ case STARS_NN_cmpxchg16b: // Compare and Exchange 16 Bytes
SMP_fprintf(OutFile, "ERROR");
break;
// SSE3 instructions
- case NN_addsubpd: // Add /Sub packed DP FP numbers
- case NN_addsubps: // Add /Sub packed SP FP numbers
- case NN_haddpd: // Add horizontally packed DP FP numbers
- case NN_haddps: // Add horizontally packed SP FP numbers
- case NN_hsubpd: // Sub horizontally packed DP FP numbers
- case NN_hsubps: // Sub horizontally packed SP FP numbers
- case NN_monitor: // Set up a linear address range to be monitored by hardware
- case NN_mwait: // Wait until write-back store performed within the range specified by the MONITOR instruction
- case NN_fisttp: // Store ST in intXX (chop) and pop
- case NN_lddqu: // Load unaligned integer 128-bit
+ case STARS_NN_addsubpd: // Add /Sub packed DP FP numbers
+ case STARS_NN_addsubps: // Add /Sub packed SP FP numbers
+ case STARS_NN_haddpd: // Add horizontally packed DP FP numbers
+ case STARS_NN_haddps: // Add horizontally packed SP FP numbers
+ case STARS_NN_hsubpd: // Sub horizontally packed DP FP numbers
+ case STARS_NN_hsubps: // Sub horizontally packed SP FP numbers
+ case STARS_NN_monitor: // Set up a linear address range to be monitored by hardware
+ case STARS_NN_mwait: // Wait until write-back store performed within the range specified by the MONITOR instruction
+ case STARS_NN_fisttp: // Store ST in intXX (chop) and pop
+ case STARS_NN_lddqu: // Load unaligned integer 128-bit
SMP_fprintf(OutFile, "ERROR");
break;
// SSSE3 instructions
- case NN_psignb: // Packed SIGN Byte
- case NN_psignw: // Packed SIGN Word
- case NN_psignd: // Packed SIGN Doubleword
- case NN_pshufb: // Packed Shuffle Bytes
- case NN_pmulhrsw: // Packed Multiply High with Round and Scale
- case NN_pmaddubsw: // Multiply and Add Packed Signed and Unsigned Bytes
- case NN_phsubsw: // Packed Horizontal Subtract and Saturate
- case NN_phaddsw: // Packed Horizontal Add and Saturate
- case NN_phaddw: // Packed Horizontal Add Word
- case NN_phaddd: // Packed Horizontal Add Doubleword
- case NN_phsubw: // Packed Horizontal Subtract Word
- case NN_phsubd: // Packed Horizontal Subtract Doubleword
- case NN_palignr: // Packed Align Right
- case NN_pabsb: // Packed Absolute Value Byte
- case NN_pabsw: // Packed Absolute Value Word
- case NN_pabsd: // Packed Absolute Value Doubleword
+ case STARS_NN_psignb: // Packed SIGN Byte
+ case STARS_NN_psignw: // Packed SIGN Word
+ case STARS_NN_psignd: // Packed SIGN Doubleword
+ case STARS_NN_pshufb: // Packed Shuffle Bytes
+ case STARS_NN_pmulhrsw: // Packed Multiply High with Round and Scale
+ case STARS_NN_pmaddubsw: // Multiply and Add Packed Signed and Unsigned Bytes
+ case STARS_NN_phsubsw: // Packed Horizontal Subtract and Saturate
+ case STARS_NN_phaddsw: // Packed Horizontal Add and Saturate
+ case STARS_NN_phaddw: // Packed Horizontal Add Word
+ case STARS_NN_phaddd: // Packed Horizontal Add Doubleword
+ case STARS_NN_phsubw: // Packed Horizontal Subtract Word
+ case STARS_NN_phsubd: // Packed Horizontal Subtract Doubleword
+ case STARS_NN_palignr: // Packed Align Right
+ case STARS_NN_pabsb: // Packed Absolute Value Byte
+ case STARS_NN_pabsw: // Packed Absolute Value Word
+ case STARS_NN_pabsd: // Packed Absolute Value Doubleword
SMP_fprintf(OutFile, "ERROR");
break;
// VMX instructions
- case NN_vmcall: // Call to VM Monitor
- case NN_vmclear: // Clear Virtual Machine Control Structure
- case NN_vmlaunch: // Launch Virtual Machine
- case NN_vmresume: // Resume Virtual Machine
- case NN_vmptrld: // Load Pointer to Virtual Machine Control Structure
- case NN_vmptrst: // Store Pointer to Virtual Machine Control Structure
- case NN_vmread: // Read Field from Virtual Machine Control Structure
- case NN_vmwrite: // Write Field from Virtual Machine Control Structure
- case NN_vmxoff: // Leave VMX Operation
- case NN_vmxon: // Enter VMX Operation
+ case STARS_NN_vmcall: // Call to VM Monitor
+ case STARS_NN_vmclear: // Clear Virtual Machine Control Structure
+ case STARS_NN_vmlaunch: // Launch Virtual Machine
+ case STARS_NN_vmresume: // Resume Virtual Machine
+ case STARS_NN_vmptrld: // Load Pointer to Virtual Machine Control Structure
+ case STARS_NN_vmptrst: // Store Pointer to Virtual Machine Control Structure
+ case STARS_NN_vmread: // Read Field from Virtual Machine Control Structure
+ case STARS_NN_vmwrite: // Write Field from Virtual Machine Control Structure
+ case STARS_NN_vmxoff: // Leave VMX Operation
+ case STARS_NN_vmxon: // Enter VMX Operation
SMP_fprintf(OutFile, "ERROR");
break;
// Undefined Instruction
- case NN_ud2: // Undefined Instruction
+ case STARS_NN_ud2: // Undefined Instruction
SMP_fprintf(OutFile, "ERROR");
break;
// Added with x86-64
- case NN_rdtscp: // Read Time-Stamp Counter and Processor ID
+ case STARS_NN_rdtscp: // Read Time-Stamp Counter and Processor ID
SMP_fprintf(OutFile, "ERROR");
break;
// Geode LX 3DNow! extensions
- case NN_pfrcpv: // Reciprocal Approximation for a Pair of 32-bit Floats
- case NN_pfrsqrtv: // Reciprocal Square Root Approximation for a Pair of 32-bit Floats
+ case STARS_NN_pfrcpv: // Reciprocal Approximation for a Pair of 32-bit Floats
+ case STARS_NN_pfrsqrtv: // Reciprocal Square Root Approximation for a Pair of 32-bit Floats
SMP_fprintf(OutFile, "ERROR");
break;
// SSE2 pseudoinstructions
- case NN_cmpeqpd: // Packed Double-FP Compare EQ
- case NN_cmpltpd: // Packed Double-FP Compare LT
- case NN_cmplepd: // Packed Double-FP Compare LE
- case NN_cmpunordpd: // Packed Double-FP Compare UNORD
- case NN_cmpneqpd: // Packed Double-FP Compare NOT EQ
- case NN_cmpnltpd: // Packed Double-FP Compare NOT LT
- case NN_cmpnlepd: // Packed Double-FP Compare NOT LE
- case NN_cmpordpd: // Packed Double-FP Compare ORDERED
- case NN_cmpeqsd: // Scalar Double-FP Compare EQ
- case NN_cmpltsd: // Scalar Double-FP Compare LT
- case NN_cmplesd: // Scalar Double-FP Compare LE
- case NN_cmpunordsd: // Scalar Double-FP Compare UNORD
- case NN_cmpneqsd: // Scalar Double-FP Compare NOT EQ
- case NN_cmpnltsd: // Scalar Double-FP Compare NOT LT
- case NN_cmpnlesd: // Scalar Double-FP Compare NOT LE
- case NN_cmpordsd: // Scalar Double-FP Compare ORDERED
+ case STARS_NN_cmpeqpd: // Packed Double-FP Compare EQ
+ case STARS_NN_cmpltpd: // Packed Double-FP Compare LT
+ case STARS_NN_cmplepd: // Packed Double-FP Compare LE
+ case STARS_NN_cmpunordpd: // Packed Double-FP Compare UNORD
+ case STARS_NN_cmpneqpd: // Packed Double-FP Compare NOT EQ
+ case STARS_NN_cmpnltpd: // Packed Double-FP Compare NOT LT
+ case STARS_NN_cmpnlepd: // Packed Double-FP Compare NOT LE
+ case STARS_NN_cmpordpd: // Packed Double-FP Compare ORDERED
+ case STARS_NN_cmpeqsd: // Scalar Double-FP Compare EQ
+ case STARS_NN_cmpltsd: // Scalar Double-FP Compare LT
+ case STARS_NN_cmplesd: // Scalar Double-FP Compare LE
+ case STARS_NN_cmpunordsd: // Scalar Double-FP Compare UNORD
+ case STARS_NN_cmpneqsd: // Scalar Double-FP Compare NOT EQ
+ case STARS_NN_cmpnltsd: // Scalar Double-FP Compare NOT LT
+ case STARS_NN_cmpnlesd: // Scalar Double-FP Compare NOT LE
+ case STARS_NN_cmpordsd: // Scalar Double-FP Compare ORDERED
SMP_fprintf(OutFile, "ERROR");
break;
// SSSE4.1 instructions
- case NN_blendpd: // Blend Packed Double Precision Floating-Point Values
- case NN_blendps: // Blend Packed Single Precision Floating-Point Values
- case NN_blendvpd: // Variable Blend Packed Double Precision Floating-Point Values
- case NN_blendvps: // Variable Blend Packed Single Precision Floating-Point Values
- case NN_dppd: // Dot Product of Packed Double Precision Floating-Point Values
- case NN_dpps: // Dot Product of Packed Single Precision Floating-Point Values
- case NN_extractps: // Extract Packed Single Precision Floating-Point Value
- case NN_insertps: // Insert Packed Single Precision Floating-Point Value
- case NN_movntdqa: // Load Double Quadword Non-Temporal Aligned Hint
- case NN_mpsadbw: // Compute Multiple Packed Sums of Absolute Difference
- case NN_packusdw: // Pack with Unsigned Saturation
- case NN_pblendvb: // Variable Blend Packed Bytes
- case NN_pblendw: // Blend Packed Words
- case NN_pcmpeqq: // Compare Packed Qword Data for Equal
- case NN_pextrb: // Extract Byte
- case NN_pextrd: // Extract Dword
- case NN_pextrq: // Extract Qword
- case NN_phminposuw: // Packed Horizontal Word Minimum
- case NN_pinsrb: // Insert Byte
- case NN_pinsrd: // Insert Dword
- case NN_pinsrq: // Insert Qword
- case NN_pmaxsb: // Maximum of Packed Signed Byte Integers
- case NN_pmaxsd: // Maximum of Packed Signed Dword Integers
- case NN_pmaxud: // Maximum of Packed Unsigned Dword Integers
- case NN_pmaxuw: // Maximum of Packed Word Integers
- case NN_pminsb: // Minimum of Packed Signed Byte Integers
- case NN_pminsd: // Minimum of Packed Signed Dword Integers
- case NN_pminud: // Minimum of Packed Unsigned Dword Integers
- case NN_pminuw: // Minimum of Packed Word Integers
- case NN_pmovsxbw: // Packed Move with Sign Extend
- case NN_pmovsxbd: // Packed Move with Sign Extend
- case NN_pmovsxbq: // Packed Move with Sign Extend
- case NN_pmovsxwd: // Packed Move with Sign Extend
- case NN_pmovsxwq: // Packed Move with Sign Extend
- case NN_pmovsxdq: // Packed Move with Sign Extend
- case NN_pmovzxbw: // Packed Move with Zero Extend
- case NN_pmovzxbd: // Packed Move with Zero Extend
- case NN_pmovzxbq: // Packed Move with Zero Extend
- case NN_pmovzxwd: // Packed Move with Zero Extend
- case NN_pmovzxwq: // Packed Move with Zero Extend
- case NN_pmovzxdq: // Packed Move with Zero Extend
- case NN_pmuldq: // Multiply Packed Signed Dword Integers
- case NN_pmulld: // Multiply Packed Signed Dword Integers and Store Low Result
- case NN_ptest: // Logical Compare
- case NN_roundpd: // Round Packed Double Precision Floating-Point Values
- case NN_roundps: // Round Packed Single Precision Floating-Point Values
- case NN_roundsd: // Round Scalar Double Precision Floating-Point Values
- case NN_roundss: // Round Scalar Single Precision Floating-Point Values
+ case STARS_NN_blendpd: // Blend Packed Double Precision Floating-Point Values
+ case STARS_NN_blendps: // Blend Packed Single Precision Floating-Point Values
+ case STARS_NN_blendvpd: // Variable Blend Packed Double Precision Floating-Point Values
+ case STARS_NN_blendvps: // Variable Blend Packed Single Precision Floating-Point Values
+ case STARS_NN_dppd: // Dot Product of Packed Double Precision Floating-Point Values
+ case STARS_NN_dpps: // Dot Product of Packed Single Precision Floating-Point Values
+ case STARS_NN_extractps: // Extract Packed Single Precision Floating-Point Value
+ case STARS_NN_insertps: // Insert Packed Single Precision Floating-Point Value
+ case STARS_NN_movntdqa: // Load Double Quadword Non-Temporal Aligned Hint
+ case STARS_NN_mpsadbw: // Compute Multiple Packed Sums of Absolute Difference
+ case STARS_NN_packusdw: // Pack with Unsigned Saturation
+ case STARS_NN_pblendvb: // Variable Blend Packed Bytes
+ case STARS_NN_pblendw: // Blend Packed Words
+ case STARS_NN_pcmpeqq: // Compare Packed Qword Data for Equal
+ case STARS_NN_pextrb: // Extract Byte
+ case STARS_NN_pextrd: // Extract Dword
+ case STARS_NN_pextrq: // Extract Qword
+ case STARS_NN_phminposuw: // Packed Horizontal Word Minimum
+ case STARS_NN_pinsrb: // Insert Byte
+ case STARS_NN_pinsrd: // Insert Dword
+ case STARS_NN_pinsrq: // Insert Qword
+ case STARS_NN_pmaxsb: // Maximum of Packed Signed Byte Integers
+ case STARS_NN_pmaxsd: // Maximum of Packed Signed Dword Integers
+ case STARS_NN_pmaxud: // Maximum of Packed Unsigned Dword Integers
+ case STARS_NN_pmaxuw: // Maximum of Packed Word Integers
+ case STARS_NN_pminsb: // Minimum of Packed Signed Byte Integers
+ case STARS_NN_pminsd: // Minimum of Packed Signed Dword Integers
+ case STARS_NN_pminud: // Minimum of Packed Unsigned Dword Integers
+ case STARS_NN_pminuw: // Minimum of Packed Word Integers
+ case STARS_NN_pmovsxbw: // Packed Move with Sign Extend
+ case STARS_NN_pmovsxbd: // Packed Move with Sign Extend
+ case STARS_NN_pmovsxbq: // Packed Move with Sign Extend
+ case STARS_NN_pmovsxwd: // Packed Move with Sign Extend
+ case STARS_NN_pmovsxwq: // Packed Move with Sign Extend
+ case STARS_NN_pmovsxdq: // Packed Move with Sign Extend
+ case STARS_NN_pmovzxbw: // Packed Move with Zero Extend
+ case STARS_NN_pmovzxbd: // Packed Move with Zero Extend
+ case STARS_NN_pmovzxbq: // Packed Move with Zero Extend
+ case STARS_NN_pmovzxwd: // Packed Move with Zero Extend
+ case STARS_NN_pmovzxwq: // Packed Move with Zero Extend
+ case STARS_NN_pmovzxdq: // Packed Move with Zero Extend
+ case STARS_NN_pmuldq: // Multiply Packed Signed Dword Integers
+ case STARS_NN_pmulld: // Multiply Packed Signed Dword Integers and Store Low Result
+ case STARS_NN_ptest: // Logical Compare
+ case STARS_NN_roundpd: // Round Packed Double Precision Floating-Point Values
+ case STARS_NN_roundps: // Round Packed Single Precision Floating-Point Values
+ case STARS_NN_roundsd: // Round Scalar Double Precision Floating-Point Values
+ case STARS_NN_roundss: // Round Scalar Single Precision Floating-Point Values
SMP_fprintf(OutFile, "ERROR");
break;
// SSSE4.2 instructions
- case NN_crc32: // Accumulate CRC32 Value
- case NN_pcmpestri: // Packed Compare Explicit Length Strings: Return Index
- case NN_pcmpestrm: // Packed Compare Explicit Length Strings: Return Mask
- case NN_pcmpistri: // Packed Compare Implicit Length Strings: Return Index
- case NN_pcmpistrm: // Packed Compare Implicit Length Strings: Return Mask
- case NN_pcmpgtq: // Compare Packed Data for Greater Than
- case NN_popcnt: // Return the Count of Number of Bits Set to 1
+ case STARS_NN_crc32: // Accumulate CRC32 Value
+ case STARS_NN_pcmpestri: // Packed Compare Explicit Length Strings: Return Index
+ case STARS_NN_pcmpestrm: // Packed Compare Explicit Length Strings: Return Mask
+ case STARS_NN_pcmpistri: // Packed Compare Implicit Length Strings: Return Index
+ case STARS_NN_pcmpistrm: // Packed Compare Implicit Length Strings: Return Mask
+ case STARS_NN_pcmpgtq: // Compare Packed Data for Greater Than
+ case STARS_NN_popcnt: // Return the Count of Number of Bits Set to 1
SMP_fprintf(OutFile, "ERROR");
break;
// AMD SSE4a instructions
- case NN_extrq: // Extract Field From Register
- case NN_insertq: // Insert Field
- case NN_movntsd: // Move Non-Temporal Scalar Double-Precision Floating-Point
- case NN_movntss: // Move Non-Temporal Scalar Single-Precision Floating-Point
- case NN_lzcnt: // Leading Zero Count
+ case STARS_NN_extrq: // Extract Field From Register
+ case STARS_NN_insertq: // Insert Field
+ case STARS_NN_movntsd: // Move Non-Temporal Scalar Double-Precision Floating-Point
+ case STARS_NN_movntss: // Move Non-Temporal Scalar Single-Precision Floating-Point
+ case STARS_NN_lzcnt: // Leading Zero Count
SMP_fprintf(OutFile, "ERROR");
break;
// xsave/xrstor instructions
- case NN_xgetbv: // Get Value of Extended Control Register
- case NN_xrstor: // Restore Processor Extended States
- case NN_xsave: // Save Processor Extended States
- case NN_xsetbv: // Set Value of Extended Control Register
+ case STARS_NN_xgetbv: // Get Value of Extended Control Register
+ case STARS_NN_xrstor: // Restore Processor Extended States
+ case STARS_NN_xsave: // Save Processor Extended States
+ case STARS_NN_xsetbv: // Set Value of Extended Control Register
SMP_fprintf(OutFile, "ERROR");
break;
// Intel Safer Mode Extensions (SMX)
- case NN_getsec: // Safer Mode Extensions (SMX) Instruction
+ case STARS_NN_getsec: // Safer Mode Extensions (SMX) Instruction
SMP_fprintf(OutFile, "ERROR");
break;
// AMD-V Virtualization ISA Extension
- case NN_clgi: // Clear Global Interrupt Flag
- case NN_invlpga: // Invalidate TLB Entry in a Specified ASID
- case NN_skinit: // Secure Init and Jump with Attestation
- case NN_stgi: // Set Global Interrupt Flag
- case NN_vmexit: // Stop Executing Guest: Begin Executing Host
- case NN_vmload: // Load State from VMCB
- case NN_vmmcall: // Call VMM
- case NN_vmrun: // Run Virtual Machine
- case NN_vmsave: // Save State to VMCB
+ case STARS_NN_clgi: // Clear Global Interrupt Flag
+ case STARS_NN_invlpga: // Invalidate TLB Entry in a Specified ASID
+ case STARS_NN_skinit: // Secure Init and Jump with Attestation
+ case STARS_NN_stgi: // Set Global Interrupt Flag
+ case STARS_NN_vmexit: // Stop Executing Guest: Begin Executing Host
+ case STARS_NN_vmload: // Load State from VMCB
+ case STARS_NN_vmmcall: // Call VMM
+ case STARS_NN_vmrun: // Run Virtual Machine
+ case STARS_NN_vmsave: // Save State to VMCB
SMP_fprintf(OutFile, "ERROR");
break;
// VMX+ instructions
- case NN_invept: // Invalidate Translations Derived from EPT
- case NN_invvpid: // Invalidate Translations Based on VPID
+ case STARS_NN_invept: // Invalidate Translations Derived from EPT
+ case STARS_NN_invvpid: // Invalidate Translations Based on VPID
SMP_fprintf(OutFile, "ERROR");
break;
// Intel Atom instructions
- case NN_movbe: // Move Data After Swapping Bytes
+ case STARS_NN_movbe: // Move Data After Swapping Bytes
SMP_fprintf(OutFile, "ERROR");
break;
// Intel AES instructions
- case NN_aesenc: // Perform One Round of an AES Encryption Flow
- case NN_aesenclast: // Perform the Last Round of an AES Encryption Flow
- case NN_aesdec: // Perform One Round of an AES Decryption Flow
- case NN_aesdeclast: // Perform the Last Round of an AES Decryption Flow
- case NN_aesimc: // Perform the AES InvMixColumn Transformation
- case NN_aeskeygenassist: // AES Round Key Generation Assist
+ case STARS_NN_aesenc: // Perform One Round of an AES Encryption Flow
+ case STARS_NN_aesenclast: // Perform the Last Round of an AES Encryption Flow
+ case STARS_NN_aesdec: // Perform One Round of an AES Decryption Flow
+ case STARS_NN_aesdeclast: // Perform the Last Round of an AES Decryption Flow
+ case STARS_NN_aesimc: // Perform the AES InvMixColumn Transformation
+ case STARS_NN_aeskeygenassist: // AES Round Key Generation Assist
SMP_fprintf(OutFile, "ERROR");
break;
// Carryless multiplication
- case NN_pclmulqdq: // Carry-Less Multiplication Quadword
+ case STARS_NN_pclmulqdq: // Carry-Less Multiplication Quadword
SMP_fprintf(OutFile, "ERROR");
break;
// Returns modifies by operand size prefixes
- case NN_retnw: // Return Near from Procedure (use16)
- case NN_retnd: // Return Near from Procedure (use32)
- case NN_retnq: // Return Near from Procedure (use64)
- case NN_retfw: // Return Far from Procedure (use16)
- case NN_retfd: // Return Far from Procedure (use32)
- case NN_retfq: // Return Far from Procedure (use64)
+ case STARS_NN_retnw: // Return Near from Procedure (use16)
+ case STARS_NN_retnd: // Return Near from Procedure (use32)
+ case STARS_NN_retnq: // Return Near from Procedure (use64)
+ case STARS_NN_retfw: // Return Far from Procedure (use16)
+ case STARS_NN_retfd: // Return Far from Procedure (use32)
+ case STARS_NN_retfq: // Return Far from Procedure (use64)
SMP_fprintf(OutFile, "return");
break;
// RDRAND support
- case NN_rdrand: // Read Random Number
+ case STARS_NN_rdrand: // Read Random Number
SMP_fprintf(OutFile, "ERROR");
break;
// new GPR instructions
- case NN_adcx: // Unsigned Integer Addition of Two Operands with Carry Flag
- case NN_adox: // Unsigned Integer Addition of Two Operands with Overflow Flag
- case NN_andn: // Logical AND NOT
- case NN_bextr: // Bit Field Extract
- case NN_blsi: // Extract Lowest Set Isolated Bit
- case NN_blsmsk: // Get Mask Up to Lowest Set Bit
- case NN_blsr: // Reset Lowest Set Bit
- case NN_bzhi: // Zero High Bits Starting with Specified Bit Position
- case NN_clac: // Clear AC Flag in EFLAGS Register
- case NN_mulx: // Unsigned Multiply Without Affecting Flags
- case NN_pdep: // Parallel Bits Deposit
- case NN_pext: // Parallel Bits Extract
- case NN_rorx: // Rotate Right Logical Without Affecting Flags
- case NN_sarx: // Shift Arithmetically Right Without Affecting Flags
- case NN_shlx: // Shift Logically Left Without Affecting Flags
- case NN_shrx: // Shift Logically Right Without Affecting Flags
- case NN_stac: // Set AC Flag in EFLAGS Register
- case NN_tzcnt: // Count the Number of Trailing Zero Bits
- case NN_xsaveopt: // Save Processor Extended States Optimized
- case NN_invpcid: // Invalidate Processor Context ID
- case NN_rdseed: // Read Random Seed
- case NN_rdfsbase: // Read FS Segment Base
- case NN_rdgsbase: // Read GS Segment Base
- case NN_wrfsbase: // Write FS Segment Base
- case NN_wrgsbase: // Write GS Segment Base
+ case STARS_NN_adcx: // Unsigned Integer Addition of Two Operands with Carry Flag
+ case STARS_NN_adox: // Unsigned Integer Addition of Two Operands with Overflow Flag
+ case STARS_NN_andn: // Logical AND NOT
+ case STARS_NN_bextr: // Bit Field Extract
+ case STARS_NN_blsi: // Extract Lowest Set Isolated Bit
+ case STARS_NN_blsmsk: // Get Mask Up to Lowest Set Bit
+ case STARS_NN_blsr: // Reset Lowest Set Bit
+ case STARS_NN_bzhi: // Zero High Bits Starting with Specified Bit Position
+ case STARS_NN_clac: // Clear AC Flag in EFLAGS Register
+ case STARS_NN_mulx: // Unsigned Multiply Without Affecting Flags
+ case STARS_NN_pdep: // Parallel Bits Deposit
+ case STARS_NN_pext: // Parallel Bits Extract
+ case STARS_NN_rorx: // Rotate Right Logical Without Affecting Flags
+ case STARS_NN_sarx: // Shift Arithmetically Right Without Affecting Flags
+ case STARS_NN_shlx: // Shift Logically Left Without Affecting Flags
+ case STARS_NN_shrx: // Shift Logically Right Without Affecting Flags
+ case STARS_NN_stac: // Set AC Flag in EFLAGS Register
+ case STARS_NN_tzcnt: // Count the Number of Trailing Zero Bits
+ case STARS_NN_xsaveopt: // Save Processor Extended States Optimized
+ case STARS_NN_invpcid: // Invalidate Processor Context ID
+ case STARS_NN_rdseed: // Read Random Seed
+ case STARS_NN_rdfsbase: // Read FS Segment Base
+ case STARS_NN_rdgsbase: // Read GS Segment Base
+ case STARS_NN_wrfsbase: // Write FS Segment Base
+ case STARS_NN_wrgsbase: // Write GS Segment Base
SMP_fprintf(OutFile, "ERROR");
break;
// new AVX instructions
- case NN_vaddpd: // Add Packed Double-Precision Floating-Point Values
- case NN_vaddps: // Packed Single-FP Add
- case NN_vaddsd: // Add Scalar Double-Precision Floating-Point Values
- case NN_vaddss: // Scalar Single-FP Add
- case NN_vaddsubpd: // Add /Sub packed DP FP numbers
- case NN_vaddsubps: // Add /Sub packed SP FP numbers
- case NN_vaesdec: // Perform One Round of an AES Decryption Flow
- case NN_vaesdeclast: // Perform the Last Round of an AES Decryption Flow
- case NN_vaesenc: // Perform One Round of an AES Encryption Flow
- case NN_vaesenclast: // Perform the Last Round of an AES Encryption Flow
- case NN_vaesimc: // Perform the AES InvMixColumn Transformation
- case NN_vaeskeygenassist: // AES Round Key Generation Assist
- case NN_vandnpd: // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
- case NN_vandnps: // Bitwise Logical And Not for Single-FP
- case NN_vandpd: // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
- case NN_vandps: // Bitwise Logical And for Single-FP
- case NN_vblendpd: // Blend Packed Double Precision Floating-Point Values
- case NN_vblendps: // Blend Packed Single Precision Floating-Point Values
- case NN_vblendvpd: // Variable Blend Packed Double Precision Floating-Point Values
- case NN_vblendvps: // Variable Blend Packed Single Precision Floating-Point Values
- case NN_vbroadcastf128: // Broadcast 128 Bits of Floating-Point Data
- case NN_vbroadcasti128: // Broadcast 128 Bits of Integer Data
- case NN_vbroadcastsd: // Broadcast Double-Precision Floating-Point Element
- case NN_vbroadcastss: // Broadcast Single-Precision Floating-Point Element
- case NN_vcmppd: // Compare Packed Double-Precision Floating-Point Values
- case NN_vcmpps: // Packed Single-FP Compare
- case NN_vcmpsd: // Compare Scalar Double-Precision Floating-Point Values
- case NN_vcmpss: // Scalar Single-FP Compare
- case NN_vcomisd: // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
- case NN_vcomiss: // Scalar Ordered Single-FP Compare and Set EFLAGS
- case NN_vcvtdq2pd: // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
- case NN_vcvtdq2ps: // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
- case NN_vcvtpd2dq: // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_vcvtpd2ps: // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
- case NN_vcvtph2ps: // Convert 16-bit FP Values to Single-Precision FP Values
- case NN_vcvtps2dq: // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_vcvtps2pd: // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
- case NN_vcvtps2ph: // Convert Single-Precision FP value to 16-bit FP value
- case NN_vcvtsd2si: // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
- case NN_vcvtsd2ss: // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
- case NN_vcvtsi2sd: // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
- case NN_vcvtsi2ss: // Scalar signed INT32 to Single-FP conversion
- case NN_vcvtss2sd: // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
- case NN_vcvtss2si: // Scalar Single-FP to signed INT32 conversion
- case NN_vcvttpd2dq: // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_vcvttps2dq: // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_vcvttsd2si: // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
- case NN_vcvttss2si: // Scalar Single-FP to signed INT32 conversion (truncate)
- case NN_vdivpd: // Divide Packed Double-Precision Floating-Point Values
- case NN_vdivps: // Packed Single-FP Divide
- case NN_vdivsd: // Divide Scalar Double-Precision Floating-Point Values
- case NN_vdivss: // Scalar Single-FP Divide
- case NN_vdppd: // Dot Product of Packed Double Precision Floating-Point Values
- case NN_vdpps: // Dot Product of Packed Single Precision Floating-Point Values
- case NN_vextractf128: // Extract Packed Floating-Point Values
- case NN_vextracti128: // Extract Packed Integer Values
- case NN_vextractps: // Extract Packed Floating-Point Values
- case NN_vfmadd132pd: // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
- case NN_vfmadd132ps: // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
- case NN_vfmadd132sd: // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
- case NN_vfmadd132ss: // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
- case NN_vfmadd213pd: // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
- case NN_vfmadd213ps: // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
- case NN_vfmadd213sd: // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
- case NN_vfmadd213ss: // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
- case NN_vfmadd231pd: // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
- case NN_vfmadd231ps: // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
- case NN_vfmadd231sd: // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
- case NN_vfmadd231ss: // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
- case NN_vfmaddsub132pd: // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
- case NN_vfmaddsub132ps: // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
- case NN_vfmaddsub213pd: // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
- case NN_vfmaddsub213ps: // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
- case NN_vfmaddsub231pd: // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
- case NN_vfmaddsub231ps: // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
- case NN_vfmsub132pd: // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
- case NN_vfmsub132ps: // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
- case NN_vfmsub132sd: // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
- case NN_vfmsub132ss: // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
- case NN_vfmsub213pd: // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
- case NN_vfmsub213ps: // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
- case NN_vfmsub213sd: // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
- case NN_vfmsub213ss: // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
- case NN_vfmsub231pd: // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
- case NN_vfmsub231ps: // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
- case NN_vfmsub231sd: // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
- case NN_vfmsub231ss: // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
- case NN_vfmsubadd132pd: // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
- case NN_vfmsubadd132ps: // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
- case NN_vfmsubadd213pd: // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
- case NN_vfmsubadd213ps: // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
- case NN_vfmsubadd231pd: // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
- case NN_vfmsubadd231ps: // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
- case NN_vfnmadd132pd: // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
- case NN_vfnmadd132ps: // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
- case NN_vfnmadd132sd: // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
- case NN_vfnmadd132ss: // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
- case NN_vfnmadd213pd: // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
- case NN_vfnmadd213ps: // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
- case NN_vfnmadd213sd: // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
- case NN_vfnmadd213ss: // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
- case NN_vfnmadd231pd: // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
- case NN_vfnmadd231ps: // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
- case NN_vfnmadd231sd: // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
- case NN_vfnmadd231ss: // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
- case NN_vfnmsub132pd: // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
- case NN_vfnmsub132ps: // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
- case NN_vfnmsub132sd: // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
- case NN_vfnmsub132ss: // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
- case NN_vfnmsub213pd: // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
- case NN_vfnmsub213ps: // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
- case NN_vfnmsub213sd: // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
- case NN_vfnmsub213ss: // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
- case NN_vfnmsub231pd: // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
- case NN_vfnmsub231ps: // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
- case NN_vfnmsub231sd: // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
- case NN_vfnmsub231ss: // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
- case NN_vgatherdps: // Gather Packed SP FP Values Using Signed Dword Indices
- case NN_vgatherdpd: // Gather Packed DP FP Values Using Signed Dword Indices
- case NN_vgatherqps: // Gather Packed SP FP Values Using Signed Qword Indices
- case NN_vgatherqpd: // Gather Packed DP FP Values Using Signed Qword Indices
- case NN_vhaddpd: // Add horizontally packed DP FP numbers
- case NN_vhaddps: // Add horizontally packed SP FP numbers
- case NN_vhsubpd: // Sub horizontally packed DP FP numbers
- case NN_vhsubps: // Sub horizontally packed SP FP numbers
- case NN_vinsertf128: // Insert Packed Floating-Point Values
- case NN_vinserti128: // Insert Packed Integer Values
- case NN_vinsertps: // Insert Packed Single Precision Floating-Point Value
- case NN_vlddqu: // Load Unaligned Packed Integer Values
- case NN_vldmxcsr: // Load Streaming SIMD Extensions Technology Control/Status Register
- case NN_vmaskmovdqu: // Store Selected Bytes of Double Quadword with NT Hint
- case NN_vmaskmovpd: // Conditionally Load Packed Double-Precision Floating-Point Values
- case NN_vmaskmovps: // Conditionally Load Packed Single-Precision Floating-Point Values
- case NN_vmaxpd: // Return Maximum Packed Double-Precision Floating-Point Values
- case NN_vmaxps: // Packed Single-FP Maximum
- case NN_vmaxsd: // Return Maximum Scalar Double-Precision Floating-Point Value
- case NN_vmaxss: // Scalar Single-FP Maximum
- case NN_vminpd: // Return Minimum Packed Double-Precision Floating-Point Values
- case NN_vminps: // Packed Single-FP Minimum
- case NN_vminsd: // Return Minimum Scalar Double-Precision Floating-Point Value
- case NN_vminss: // Scalar Single-FP Minimum
- case NN_vmovapd: // Move Aligned Packed Double-Precision Floating-Point Values
- case NN_vmovaps: // Move Aligned Four Packed Single-FP
- case NN_vmovd: // Move 32 bits
- case NN_vmovddup: // Move One Double-FP and Duplicate
- case NN_vmovdqa: // Move Aligned Double Quadword
- case NN_vmovdqu: // Move Unaligned Double Quadword
- case NN_vmovhlps: // Move High to Low Packed Single-FP
- case NN_vmovhpd: // Move High Packed Double-Precision Floating-Point Values
- case NN_vmovhps: // Move High Packed Single-FP
- case NN_vmovlhps: // Move Low to High Packed Single-FP
- case NN_vmovlpd: // Move Low Packed Double-Precision Floating-Point Values
- case NN_vmovlps: // Move Low Packed Single-FP
- case NN_vmovmskpd: // Extract Packed Double-Precision Floating-Point Sign Mask
- case NN_vmovmskps: // Move Mask to Register
- case NN_vmovntdq: // Store Double Quadword Using Non-Temporal Hint
- case NN_vmovntdqa: // Load Double Quadword Non-Temporal Aligned Hint
- case NN_vmovntpd: // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
- case NN_vmovntps: // Move Aligned Four Packed Single-FP Non Temporal
- case NN_vmovntsd: // Move Non-Temporal Scalar Double-Precision Floating-Point
- case NN_vmovntss: // Move Non-Temporal Scalar Single-Precision Floating-Point
- case NN_vmovq: // Move 64 bits
- case NN_vmovsd: // Move Scalar Double-Precision Floating-Point Values
- case NN_vmovshdup: // Move Packed Single-FP High and Duplicate
- case NN_vmovsldup: // Move Packed Single-FP Low and Duplicate
- case NN_vmovss: // Move Scalar Single-FP
- case NN_vmovupd: // Move Unaligned Packed Double-Precision Floating-Point Values
- case NN_vmovups: // Move Unaligned Four Packed Single-FP
- case NN_vmpsadbw: // Compute Multiple Packed Sums of Absolute Difference
- case NN_vmulpd: // Multiply Packed Double-Precision Floating-Point Values
- case NN_vmulps: // Packed Single-FP Multiply
- case NN_vmulsd: // Multiply Scalar Double-Precision Floating-Point Values
- case NN_vmulss: // Scalar Single-FP Multiply
- case NN_vorpd: // Bitwise Logical OR of Double-Precision Floating-Point Values
- case NN_vorps: // Bitwise Logical OR for Single-FP Data
- case NN_vpabsb: // Packed Absolute Value Byte
- case NN_vpabsd: // Packed Absolute Value Doubleword
- case NN_vpabsw: // Packed Absolute Value Word
- case NN_vpackssdw: // Pack with Signed Saturation (Dword->Word)
- case NN_vpacksswb: // Pack with Signed Saturation (Word->Byte)
- case NN_vpackusdw: // Pack with Unsigned Saturation
- case NN_vpackuswb: // Pack with Unsigned Saturation (Word->Byte)
- case NN_vpaddb: // Packed Add Byte
- case NN_vpaddd: // Packed Add Dword
- case NN_vpaddq: // Add Packed Quadword Integers
- case NN_vpaddsb: // Packed Add with Saturation (Byte)
- case NN_vpaddsw: // Packed Add with Saturation (Word)
- case NN_vpaddusb: // Packed Add Unsigned with Saturation (Byte)
- case NN_vpaddusw: // Packed Add Unsigned with Saturation (Word)
- case NN_vpaddw: // Packed Add Word
- case NN_vpalignr: // Packed Align Right
- case NN_vpand: // Bitwise Logical And
- case NN_vpandn: // Bitwise Logical And Not
- case NN_vpavgb: // Packed Average (Byte)
- case NN_vpavgw: // Packed Average (Word)
- case NN_vpblendd: // Blend Packed Dwords
- case NN_vpblendvb: // Variable Blend Packed Bytes
- case NN_vpblendw: // Blend Packed Words
- case NN_vpbroadcastb: // Broadcast a Byte Integer
- case NN_vpbroadcastd: // Broadcast a Dword Integer
- case NN_vpbroadcastq: // Broadcast a Qword Integer
- case NN_vpbroadcastw: // Broadcast a Word Integer
- case NN_vpclmulqdq: // Carry-Less Multiplication Quadword
- case NN_vpcmpeqb: // Packed Compare for Equal (Byte)
- case NN_vpcmpeqd: // Packed Compare for Equal (Dword)
- case NN_vpcmpeqq: // Compare Packed Qword Data for Equal
- case NN_vpcmpeqw: // Packed Compare for Equal (Word)
- case NN_vpcmpestri: // Packed Compare Explicit Length Strings: Return Index
- case NN_vpcmpestrm: // Packed Compare Explicit Length Strings: Return Mask
- case NN_vpcmpgtb: // Packed Compare for Greater Than (Byte)
- case NN_vpcmpgtd: // Packed Compare for Greater Than (Dword)
- case NN_vpcmpgtq: // Compare Packed Data for Greater Than
- case NN_vpcmpgtw: // Packed Compare for Greater Than (Word)
- case NN_vpcmpistri: // Packed Compare Implicit Length Strings: Return Index
- case NN_vpcmpistrm: // Packed Compare Implicit Length Strings: Return Mask
- case NN_vperm2f128: // Permute Floating-Point Values
- case NN_vperm2i128: // Permute Integer Values
- case NN_vpermd: // Full Doublewords Element Permutation
- case NN_vpermilpd: // Permute Double-Precision Floating-Point Values
- case NN_vpermilps: // Permute Single-Precision Floating-Point Values
- case NN_vpermpd: // Permute Double-Precision Floating-Point Elements
- case NN_vpermps: // Permute Single-Precision Floating-Point Elements
- case NN_vpermq: // Qwords Element Permutation
- case NN_vpextrb: // Extract Byte
- case NN_vpextrd: // Extract Dword
- case NN_vpextrq: // Extract Qword
- case NN_vpextrw: // Extract Word
- case NN_vpgatherdd: // Gather Packed Dword Values Using Signed Dword Indices
- case NN_vpgatherdq: // Gather Packed Qword Values Using Signed Dword Indices
- case NN_vpgatherqd: // Gather Packed Dword Values Using Signed Qword Indices
- case NN_vpgatherqq: // Gather Packed Qword Values Using Signed Qword Indices
- case NN_vphaddd: // Packed Horizontal Add Doubleword
- case NN_vphaddsw: // Packed Horizontal Add and Saturate
- case NN_vphaddw: // Packed Horizontal Add Word
- case NN_vphminposuw: // Packed Horizontal Word Minimum
- case NN_vphsubd: // Packed Horizontal Subtract Doubleword
- case NN_vphsubsw: // Packed Horizontal Subtract and Saturate
- case NN_vphsubw: // Packed Horizontal Subtract Word
- case NN_vpinsrb: // Insert Byte
- case NN_vpinsrd: // Insert Dword
- case NN_vpinsrq: // Insert Qword
- case NN_vpinsrw: // Insert Word
- case NN_vpmaddubsw: // Multiply and Add Packed Signed and Unsigned Bytes
- case NN_vpmaddwd: // Packed Multiply and Add
- case NN_vpmaskmovd: // Conditionally Store Dword Values Using Mask
- case NN_vpmaskmovq: // Conditionally Store Qword Values Using Mask
- case NN_vpmaxsb: // Maximum of Packed Signed Byte Integers
- case NN_vpmaxsd: // Maximum of Packed Signed Dword Integers
- case NN_vpmaxsw: // Packed Signed Integer Word Maximum
- case NN_vpmaxub: // Packed Unsigned Integer Byte Maximum
- case NN_vpmaxud: // Maximum of Packed Unsigned Dword Integers
- case NN_vpmaxuw: // Maximum of Packed Word Integers
- case NN_vpminsb: // Minimum of Packed Signed Byte Integers
- case NN_vpminsd: // Minimum of Packed Signed Dword Integers
- case NN_vpminsw: // Packed Signed Integer Word Minimum
- case NN_vpminub: // Packed Unsigned Integer Byte Minimum
- case NN_vpminud: // Minimum of Packed Unsigned Dword Integers
- case NN_vpminuw: // Minimum of Packed Word Integers
- case NN_vpmovmskb: // Move Byte Mask to Integer
- case NN_vpmovsxbd: // Packed Move with Sign Extend
- case NN_vpmovsxbq: // Packed Move with Sign Extend
- case NN_vpmovsxbw: // Packed Move with Sign Extend
- case NN_vpmovsxdq: // Packed Move with Sign Extend
- case NN_vpmovsxwd: // Packed Move with Sign Extend
- case NN_vpmovsxwq: // Packed Move with Sign Extend
- case NN_vpmovzxbd: // Packed Move with Zero Extend
- case NN_vpmovzxbq: // Packed Move with Zero Extend
- case NN_vpmovzxbw: // Packed Move with Zero Extend
- case NN_vpmovzxdq: // Packed Move with Zero Extend
- case NN_vpmovzxwd: // Packed Move with Zero Extend
- case NN_vpmovzxwq: // Packed Move with Zero Extend
- case NN_vpmuldq: // Multiply Packed Signed Dword Integers
- case NN_vpmulhrsw: // Packed Multiply High with Round and Scale
- case NN_vpmulhuw: // Packed Multiply High Unsigned
- case NN_vpmulhw: // Packed Multiply High
- case NN_vpmulld: // Multiply Packed Signed Dword Integers and Store Low Result
- case NN_vpmullw: // Packed Multiply Low
- case NN_vpmuludq: // Multiply Packed Unsigned Doubleword Integers
- case NN_vpor: // Bitwise Logical Or
- case NN_vpsadbw: // Packed Sum of Absolute Differences
- case NN_vpshufb: // Packed Shuffle Bytes
- case NN_vpshufd: // Shuffle Packed Doublewords
- case NN_vpshufhw: // Shuffle Packed High Words
- case NN_vpshuflw: // Shuffle Packed Low Words
- case NN_vpsignb: // Packed SIGN Byte
- case NN_vpsignd: // Packed SIGN Doubleword
- case NN_vpsignw: // Packed SIGN Word
- case NN_vpslld: // Packed Shift Left Logical (Dword)
- case NN_vpslldq: // Shift Double Quadword Left Logical
- case NN_vpsllq: // Packed Shift Left Logical (Qword)
- case NN_vpsllvd: // Variable Bit Shift Left Logical (Dword)
- case NN_vpsllvq: // Variable Bit Shift Left Logical (Qword)
- case NN_vpsllw: // Packed Shift Left Logical (Word)
- case NN_vpsrad: // Packed Shift Right Arithmetic (Dword)
- case NN_vpsravd: // Variable Bit Shift Right Arithmetic
- case NN_vpsraw: // Packed Shift Right Arithmetic (Word)
- case NN_vpsrld: // Packed Shift Right Logical (Dword)
- case NN_vpsrldq: // Shift Double Quadword Right Logical (Qword)
- case NN_vpsrlq: // Packed Shift Right Logical (Qword)
- case NN_vpsrlvd: // Variable Bit Shift Right Logical (Dword)
- case NN_vpsrlvq: // Variable Bit Shift Right Logical (Qword)
- case NN_vpsrlw: // Packed Shift Right Logical (Word)
- case NN_vpsubb: // Packed Subtract Byte
- case NN_vpsubd: // Packed Subtract Dword
- case NN_vpsubq: // Subtract Packed Quadword Integers
- case NN_vpsubsb: // Packed Subtract with Saturation (Byte)
- case NN_vpsubsw: // Packed Subtract with Saturation (Word)
- case NN_vpsubusb: // Packed Subtract Unsigned with Saturation (Byte)
- case NN_vpsubusw: // Packed Subtract Unsigned with Saturation (Word)
- case NN_vpsubw: // Packed Subtract Word
- case NN_vptest: // Logical Compare
- case NN_vpunpckhbw: // Unpack High Packed Data (Byte->Word)
- case NN_vpunpckhdq: // Unpack High Packed Data (Dword->Qword)
- case NN_vpunpckhqdq: // Unpack High Packed Data (Qword->Xmmword)
- case NN_vpunpckhwd: // Unpack High Packed Data (Word->Dword)
- case NN_vpunpcklbw: // Unpack Low Packed Data (Byte->Word)
- case NN_vpunpckldq: // Unpack Low Packed Data (Dword->Qword)
- case NN_vpunpcklqdq: // Unpack Low Packed Data (Qword->Xmmword)
- case NN_vpunpcklwd: // Unpack Low Packed Data (Word->Dword)
- case NN_vpxor: // Bitwise Logical Exclusive Or
- case NN_vrcpps: // Packed Single-FP Reciprocal
- case NN_vrcpss: // Scalar Single-FP Reciprocal
- case NN_vroundpd: // Round Packed Double Precision Floating-Point Values
- case NN_vroundps: // Round Packed Single Precision Floating-Point Values
- case NN_vroundsd: // Round Scalar Double Precision Floating-Point Values
- case NN_vroundss: // Round Scalar Single Precision Floating-Point Values
- case NN_vrsqrtps: // Packed Single-FP Square Root Reciprocal
- case NN_vrsqrtss: // Scalar Single-FP Square Root Reciprocal
- case NN_vshufpd: // Shuffle Packed Double-Precision Floating-Point Values
- case NN_vshufps: // Shuffle Single-FP
- case NN_vsqrtpd: // Compute Square Roots of Packed Double-Precision Floating-Point Values
- case NN_vsqrtps: // Packed Single-FP Square Root
- case NN_vsqrtsd: // Compute Square Rootof Scalar Double-Precision Floating-Point Value
- case NN_vsqrtss: // Scalar Single-FP Square Root
- case NN_vstmxcsr: // Store Streaming SIMD Extensions Technology Control/Status Register
- case NN_vsubpd: // Subtract Packed Double-Precision Floating-Point Values
- case NN_vsubps: // Packed Single-FP Subtract
- case NN_vsubsd: // Subtract Scalar Double-Precision Floating-Point Values
- case NN_vsubss: // Scalar Single-FP Subtract
- case NN_vtestpd: // Packed Double-Precision Floating-Point Bit Test
- case NN_vtestps: // Packed Single-Precision Floating-Point Bit Test
- case NN_vucomisd: // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
- case NN_vucomiss: // Scalar Unordered Single-FP Compare and Set EFLAGS
- case NN_vunpckhpd: // Unpack and Interleave High Packed Double-Precision Floating-Point Values
- case NN_vunpckhps: // Unpack High Packed Single-FP Data
- case NN_vunpcklpd: // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
- case NN_vunpcklps: // Unpack Low Packed Single-FP Data
- case NN_vxorpd: // Bitwise Logical OR of Double-Precision Floating-Point Values
- case NN_vxorps: // Bitwise Logical XOR for Single-FP Data
- case NN_vzeroall: // Zero All YMM Registers
- case NN_vzeroupper: // Zero Upper Bits of YMM Registers
+ case STARS_NN_vaddpd: // Add Packed Double-Precision Floating-Point Values
+ case STARS_NN_vaddps: // Packed Single-FP Add
+ case STARS_NN_vaddsd: // Add Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vaddss: // Scalar Single-FP Add
+ case STARS_NN_vaddsubpd: // Add /Sub packed DP FP numbers
+ case STARS_NN_vaddsubps: // Add /Sub packed SP FP numbers
+ case STARS_NN_vaesdec: // Perform One Round of an AES Decryption Flow
+ case STARS_NN_vaesdeclast: // Perform the Last Round of an AES Decryption Flow
+ case STARS_NN_vaesenc: // Perform One Round of an AES Encryption Flow
+ case STARS_NN_vaesenclast: // Perform the Last Round of an AES Encryption Flow
+ case STARS_NN_vaesimc: // Perform the AES InvMixColumn Transformation
+ case STARS_NN_vaeskeygenassist: // AES Round Key Generation Assist
+ case STARS_NN_vandnpd: // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vandnps: // Bitwise Logical And Not for Single-FP
+ case STARS_NN_vandpd: // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vandps: // Bitwise Logical And for Single-FP
+ case STARS_NN_vblendpd: // Blend Packed Double Precision Floating-Point Values
+ case STARS_NN_vblendps: // Blend Packed Single Precision Floating-Point Values
+ case STARS_NN_vblendvpd: // Variable Blend Packed Double Precision Floating-Point Values
+ case STARS_NN_vblendvps: // Variable Blend Packed Single Precision Floating-Point Values
+ case STARS_NN_vbroadcastf128: // Broadcast 128 Bits of Floating-Point Data
+ case STARS_NN_vbroadcasti128: // Broadcast 128 Bits of Integer Data
+ case STARS_NN_vbroadcastsd: // Broadcast Double-Precision Floating-Point Element
+ case STARS_NN_vbroadcastss: // Broadcast Single-Precision Floating-Point Element
+ case STARS_NN_vcmppd: // Compare Packed Double-Precision Floating-Point Values
+ case STARS_NN_vcmpps: // Packed Single-FP Compare
+ case STARS_NN_vcmpsd: // Compare Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vcmpss: // Scalar Single-FP Compare
+ case STARS_NN_vcomisd: // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ case STARS_NN_vcomiss: // Scalar Ordered Single-FP Compare and Set EFLAGS
+ case STARS_NN_vcvtdq2pd: // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
+ case STARS_NN_vcvtdq2ps: // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
+ case STARS_NN_vcvtpd2dq: // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_vcvtpd2ps: // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
+ case STARS_NN_vcvtph2ps: // Convert 16-bit FP Values to Single-Precision FP Values
+ case STARS_NN_vcvtps2dq: // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_vcvtps2pd: // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
+ case STARS_NN_vcvtps2ph: // Convert Single-Precision FP value to 16-bit FP value
+ case STARS_NN_vcvtsd2si: // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ case STARS_NN_vcvtsd2ss: // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
+ case STARS_NN_vcvtsi2sd: // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
+ case STARS_NN_vcvtsi2ss: // Scalar signed INT32 to Single-FP conversion
+ case STARS_NN_vcvtss2sd: // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
+ case STARS_NN_vcvtss2si: // Scalar Single-FP to signed INT32 conversion
+ case STARS_NN_vcvttpd2dq: // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_vcvttps2dq: // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_vcvttsd2si: // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ case STARS_NN_vcvttss2si: // Scalar Single-FP to signed INT32 conversion (truncate)
+ case STARS_NN_vdivpd: // Divide Packed Double-Precision Floating-Point Values
+ case STARS_NN_vdivps: // Packed Single-FP Divide
+ case STARS_NN_vdivsd: // Divide Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vdivss: // Scalar Single-FP Divide
+ case STARS_NN_vdppd: // Dot Product of Packed Double Precision Floating-Point Values
+ case STARS_NN_vdpps: // Dot Product of Packed Single Precision Floating-Point Values
+ case STARS_NN_vextractf128: // Extract Packed Floating-Point Values
+ case STARS_NN_vextracti128: // Extract Packed Integer Values
+ case STARS_NN_vextractps: // Extract Packed Floating-Point Values
+ case STARS_NN_vfmadd132pd: // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmadd132ps: // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmadd132sd: // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfmadd132ss: // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfmadd213pd: // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmadd213ps: // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmadd213sd: // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfmadd213ss: // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfmadd231pd: // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmadd231ps: // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmadd231sd: // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfmadd231ss: // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfmaddsub132pd: // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmaddsub132ps: // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmaddsub213pd: // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmaddsub213ps: // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmaddsub231pd: // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmaddsub231ps: // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmsub132pd: // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmsub132ps: // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmsub132sd: // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfmsub132ss: // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfmsub213pd: // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmsub213ps: // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmsub213sd: // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfmsub213ss: // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfmsub231pd: // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmsub231ps: // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmsub231sd: // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfmsub231ss: // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfmsubadd132pd: // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmsubadd132ps: // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmsubadd213pd: // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmsubadd213ps: // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmsubadd231pd: // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmsubadd231ps: // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfnmadd132pd: // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfnmadd132ps: // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfnmadd132sd: // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfnmadd132ss: // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfnmadd213pd: // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfnmadd213ps: // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfnmadd213sd: // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfnmadd213ss: // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfnmadd231pd: // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfnmadd231ps: // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfnmadd231sd: // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfnmadd231ss: // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfnmsub132pd: // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfnmsub132ps: // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfnmsub132sd: // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfnmsub132ss: // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfnmsub213pd: // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfnmsub213ps: // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfnmsub213sd: // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfnmsub213ss: // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfnmsub231pd: // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfnmsub231ps: // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfnmsub231sd: // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfnmsub231ss: // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vgatherdps: // Gather Packed SP FP Values Using Signed Dword Indices
+ case STARS_NN_vgatherdpd: // Gather Packed DP FP Values Using Signed Dword Indices
+ case STARS_NN_vgatherqps: // Gather Packed SP FP Values Using Signed Qword Indices
+ case STARS_NN_vgatherqpd: // Gather Packed DP FP Values Using Signed Qword Indices
+ case STARS_NN_vhaddpd: // Add horizontally packed DP FP numbers
+ case STARS_NN_vhaddps: // Add horizontally packed SP FP numbers
+ case STARS_NN_vhsubpd: // Sub horizontally packed DP FP numbers
+ case STARS_NN_vhsubps: // Sub horizontally packed SP FP numbers
+ case STARS_NN_vinsertf128: // Insert Packed Floating-Point Values
+ case STARS_NN_vinserti128: // Insert Packed Integer Values
+ case STARS_NN_vinsertps: // Insert Packed Single Precision Floating-Point Value
+ case STARS_NN_vlddqu: // Load Unaligned Packed Integer Values
+ case STARS_NN_vldmxcsr: // Load Streaming SIMD Extensions Technology Control/Status Register
+ case STARS_NN_vmaskmovdqu: // Store Selected Bytes of Double Quadword with NT Hint
+ case STARS_NN_vmaskmovpd: // Conditionally Load Packed Double-Precision Floating-Point Values
+ case STARS_NN_vmaskmovps: // Conditionally Load Packed Single-Precision Floating-Point Values
+ case STARS_NN_vmaxpd: // Return Maximum Packed Double-Precision Floating-Point Values
+ case STARS_NN_vmaxps: // Packed Single-FP Maximum
+ case STARS_NN_vmaxsd: // Return Maximum Scalar Double-Precision Floating-Point Value
+ case STARS_NN_vmaxss: // Scalar Single-FP Maximum
+ case STARS_NN_vminpd: // Return Minimum Packed Double-Precision Floating-Point Values
+ case STARS_NN_vminps: // Packed Single-FP Minimum
+ case STARS_NN_vminsd: // Return Minimum Scalar Double-Precision Floating-Point Value
+ case STARS_NN_vminss: // Scalar Single-FP Minimum
+ case STARS_NN_vmovapd: // Move Aligned Packed Double-Precision Floating-Point Values
+ case STARS_NN_vmovaps: // Move Aligned Four Packed Single-FP
+ case STARS_NN_vmovd: // Move 32 bits
+ case STARS_NN_vmovddup: // Move One Double-FP and Duplicate
+ case STARS_NN_vmovdqa: // Move Aligned Double Quadword
+ case STARS_NN_vmovdqu: // Move Unaligned Double Quadword
+ case STARS_NN_vmovhlps: // Move High to Low Packed Single-FP
+ case STARS_NN_vmovhpd: // Move High Packed Double-Precision Floating-Point Values
+ case STARS_NN_vmovhps: // Move High Packed Single-FP
+ case STARS_NN_vmovlhps: // Move Low to High Packed Single-FP
+ case STARS_NN_vmovlpd: // Move Low Packed Double-Precision Floating-Point Values
+ case STARS_NN_vmovlps: // Move Low Packed Single-FP
+ case STARS_NN_vmovmskpd: // Extract Packed Double-Precision Floating-Point Sign Mask
+ case STARS_NN_vmovmskps: // Move Mask to Register
+ case STARS_NN_vmovntdq: // Store Double Quadword Using Non-Temporal Hint
+ case STARS_NN_vmovntdqa: // Load Double Quadword Non-Temporal Aligned Hint
+ case STARS_NN_vmovntpd: // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
+ case STARS_NN_vmovntps: // Move Aligned Four Packed Single-FP Non Temporal
+ case STARS_NN_vmovntsd: // Move Non-Temporal Scalar Double-Precision Floating-Point
+ case STARS_NN_vmovntss: // Move Non-Temporal Scalar Single-Precision Floating-Point
+ case STARS_NN_vmovq: // Move 64 bits
+ case STARS_NN_vmovsd: // Move Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vmovshdup: // Move Packed Single-FP High and Duplicate
+ case STARS_NN_vmovsldup: // Move Packed Single-FP Low and Duplicate
+ case STARS_NN_vmovss: // Move Scalar Single-FP
+ case STARS_NN_vmovupd: // Move Unaligned Packed Double-Precision Floating-Point Values
+ case STARS_NN_vmovups: // Move Unaligned Four Packed Single-FP
+ case STARS_NN_vmpsadbw: // Compute Multiple Packed Sums of Absolute Difference
+ case STARS_NN_vmulpd: // Multiply Packed Double-Precision Floating-Point Values
+ case STARS_NN_vmulps: // Packed Single-FP Multiply
+ case STARS_NN_vmulsd: // Multiply Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vmulss: // Scalar Single-FP Multiply
+ case STARS_NN_vorpd: // Bitwise Logical OR of Double-Precision Floating-Point Values
+ case STARS_NN_vorps: // Bitwise Logical OR for Single-FP Data
+ case STARS_NN_vpabsb: // Packed Absolute Value Byte
+ case STARS_NN_vpabsd: // Packed Absolute Value Doubleword
+ case STARS_NN_vpabsw: // Packed Absolute Value Word
+ case STARS_NN_vpackssdw: // Pack with Signed Saturation (Dword->Word)
+ case STARS_NN_vpacksswb: // Pack with Signed Saturation (Word->Byte)
+ case STARS_NN_vpackusdw: // Pack with Unsigned Saturation
+ case STARS_NN_vpackuswb: // Pack with Unsigned Saturation (Word->Byte)
+ case STARS_NN_vpaddb: // Packed Add Byte
+ case STARS_NN_vpaddd: // Packed Add Dword
+ case STARS_NN_vpaddq: // Add Packed Quadword Integers
+ case STARS_NN_vpaddsb: // Packed Add with Saturation (Byte)
+ case STARS_NN_vpaddsw: // Packed Add with Saturation (Word)
+ case STARS_NN_vpaddusb: // Packed Add Unsigned with Saturation (Byte)
+ case STARS_NN_vpaddusw: // Packed Add Unsigned with Saturation (Word)
+ case STARS_NN_vpaddw: // Packed Add Word
+ case STARS_NN_vpalignr: // Packed Align Right
+ case STARS_NN_vpand: // Bitwise Logical And
+ case STARS_NN_vpandn: // Bitwise Logical And Not
+ case STARS_NN_vpavgb: // Packed Average (Byte)
+ case STARS_NN_vpavgw: // Packed Average (Word)
+ case STARS_NN_vpblendd: // Blend Packed Dwords
+ case STARS_NN_vpblendvb: // Variable Blend Packed Bytes
+ case STARS_NN_vpblendw: // Blend Packed Words
+ case STARS_NN_vpbroadcastb: // Broadcast a Byte Integer
+ case STARS_NN_vpbroadcastd: // Broadcast a Dword Integer
+ case STARS_NN_vpbroadcastq: // Broadcast a Qword Integer
+ case STARS_NN_vpbroadcastw: // Broadcast a Word Integer
+ case STARS_NN_vpclmulqdq: // Carry-Less Multiplication Quadword
+ case STARS_NN_vpcmpeqb: // Packed Compare for Equal (Byte)
+ case STARS_NN_vpcmpeqd: // Packed Compare for Equal (Dword)
+ case STARS_NN_vpcmpeqq: // Compare Packed Qword Data for Equal
+ case STARS_NN_vpcmpeqw: // Packed Compare for Equal (Word)
+ case STARS_NN_vpcmpestri: // Packed Compare Explicit Length Strings: Return Index
+ case STARS_NN_vpcmpestrm: // Packed Compare Explicit Length Strings: Return Mask
+ case STARS_NN_vpcmpgtb: // Packed Compare for Greater Than (Byte)
+ case STARS_NN_vpcmpgtd: // Packed Compare for Greater Than (Dword)
+ case STARS_NN_vpcmpgtq: // Compare Packed Data for Greater Than
+ case STARS_NN_vpcmpgtw: // Packed Compare for Greater Than (Word)
+ case STARS_NN_vpcmpistri: // Packed Compare Implicit Length Strings: Return Index
+ case STARS_NN_vpcmpistrm: // Packed Compare Implicit Length Strings: Return Mask
+ case STARS_NN_vperm2f128: // Permute Floating-Point Values
+ case STARS_NN_vperm2i128: // Permute Integer Values
+ case STARS_NN_vpermd: // Full Doublewords Element Permutation
+ case STARS_NN_vpermilpd: // Permute Double-Precision Floating-Point Values
+ case STARS_NN_vpermilps: // Permute Single-Precision Floating-Point Values
+ case STARS_NN_vpermpd: // Permute Double-Precision Floating-Point Elements
+ case STARS_NN_vpermps: // Permute Single-Precision Floating-Point Elements
+ case STARS_NN_vpermq: // Qwords Element Permutation
+ case STARS_NN_vpextrb: // Extract Byte
+ case STARS_NN_vpextrd: // Extract Dword
+ case STARS_NN_vpextrq: // Extract Qword
+ case STARS_NN_vpextrw: // Extract Word
+ case STARS_NN_vpgatherdd: // Gather Packed Dword Values Using Signed Dword Indices
+ case STARS_NN_vpgatherdq: // Gather Packed Qword Values Using Signed Dword Indices
+ case STARS_NN_vpgatherqd: // Gather Packed Dword Values Using Signed Qword Indices
+ case STARS_NN_vpgatherqq: // Gather Packed Qword Values Using Signed Qword Indices
+ case STARS_NN_vphaddd: // Packed Horizontal Add Doubleword
+ case STARS_NN_vphaddsw: // Packed Horizontal Add and Saturate
+ case STARS_NN_vphaddw: // Packed Horizontal Add Word
+ case STARS_NN_vphminposuw: // Packed Horizontal Word Minimum
+ case STARS_NN_vphsubd: // Packed Horizontal Subtract Doubleword
+ case STARS_NN_vphsubsw: // Packed Horizontal Subtract and Saturate
+ case STARS_NN_vphsubw: // Packed Horizontal Subtract Word
+ case STARS_NN_vpinsrb: // Insert Byte
+ case STARS_NN_vpinsrd: // Insert Dword
+ case STARS_NN_vpinsrq: // Insert Qword
+ case STARS_NN_vpinsrw: // Insert Word
+ case STARS_NN_vpmaddubsw: // Multiply and Add Packed Signed and Unsigned Bytes
+ case STARS_NN_vpmaddwd: // Packed Multiply and Add
+ case STARS_NN_vpmaskmovd: // Conditionally Store Dword Values Using Mask
+ case STARS_NN_vpmaskmovq: // Conditionally Store Qword Values Using Mask
+ case STARS_NN_vpmaxsb: // Maximum of Packed Signed Byte Integers
+ case STARS_NN_vpmaxsd: // Maximum of Packed Signed Dword Integers
+ case STARS_NN_vpmaxsw: // Packed Signed Integer Word Maximum
+ case STARS_NN_vpmaxub: // Packed Unsigned Integer Byte Maximum
+ case STARS_NN_vpmaxud: // Maximum of Packed Unsigned Dword Integers
+ case STARS_NN_vpmaxuw: // Maximum of Packed Word Integers
+ case STARS_NN_vpminsb: // Minimum of Packed Signed Byte Integers
+ case STARS_NN_vpminsd: // Minimum of Packed Signed Dword Integers
+ case STARS_NN_vpminsw: // Packed Signed Integer Word Minimum
+ case STARS_NN_vpminub: // Packed Unsigned Integer Byte Minimum
+ case STARS_NN_vpminud: // Minimum of Packed Unsigned Dword Integers
+ case STARS_NN_vpminuw: // Minimum of Packed Word Integers
+ case STARS_NN_vpmovmskb: // Move Byte Mask to Integer
+ case STARS_NN_vpmovsxbd: // Packed Move with Sign Extend
+ case STARS_NN_vpmovsxbq: // Packed Move with Sign Extend
+ case STARS_NN_vpmovsxbw: // Packed Move with Sign Extend
+ case STARS_NN_vpmovsxdq: // Packed Move with Sign Extend
+ case STARS_NN_vpmovsxwd: // Packed Move with Sign Extend
+ case STARS_NN_vpmovsxwq: // Packed Move with Sign Extend
+ case STARS_NN_vpmovzxbd: // Packed Move with Zero Extend
+ case STARS_NN_vpmovzxbq: // Packed Move with Zero Extend
+ case STARS_NN_vpmovzxbw: // Packed Move with Zero Extend
+ case STARS_NN_vpmovzxdq: // Packed Move with Zero Extend
+ case STARS_NN_vpmovzxwd: // Packed Move with Zero Extend
+ case STARS_NN_vpmovzxwq: // Packed Move with Zero Extend
+ case STARS_NN_vpmuldq: // Multiply Packed Signed Dword Integers
+ case STARS_NN_vpmulhrsw: // Packed Multiply High with Round and Scale
+ case STARS_NN_vpmulhuw: // Packed Multiply High Unsigned
+ case STARS_NN_vpmulhw: // Packed Multiply High
+ case STARS_NN_vpmulld: // Multiply Packed Signed Dword Integers and Store Low Result
+ case STARS_NN_vpmullw: // Packed Multiply Low
+ case STARS_NN_vpmuludq: // Multiply Packed Unsigned Doubleword Integers
+ case STARS_NN_vpor: // Bitwise Logical Or
+ case STARS_NN_vpsadbw: // Packed Sum of Absolute Differences
+ case STARS_NN_vpshufb: // Packed Shuffle Bytes
+ case STARS_NN_vpshufd: // Shuffle Packed Doublewords
+ case STARS_NN_vpshufhw: // Shuffle Packed High Words
+ case STARS_NN_vpshuflw: // Shuffle Packed Low Words
+ case STARS_NN_vpsignb: // Packed SIGN Byte
+ case STARS_NN_vpsignd: // Packed SIGN Doubleword
+ case STARS_NN_vpsignw: // Packed SIGN Word
+ case STARS_NN_vpslld: // Packed Shift Left Logical (Dword)
+ case STARS_NN_vpslldq: // Shift Double Quadword Left Logical
+ case STARS_NN_vpsllq: // Packed Shift Left Logical (Qword)
+ case STARS_NN_vpsllvd: // Variable Bit Shift Left Logical (Dword)
+ case STARS_NN_vpsllvq: // Variable Bit Shift Left Logical (Qword)
+ case STARS_NN_vpsllw: // Packed Shift Left Logical (Word)
+ case STARS_NN_vpsrad: // Packed Shift Right Arithmetic (Dword)
+ case STARS_NN_vpsravd: // Variable Bit Shift Right Arithmetic
+ case STARS_NN_vpsraw: // Packed Shift Right Arithmetic (Word)
+ case STARS_NN_vpsrld: // Packed Shift Right Logical (Dword)
+ case STARS_NN_vpsrldq: // Shift Double Quadword Right Logical (Qword)
+ case STARS_NN_vpsrlq: // Packed Shift Right Logical (Qword)
+ case STARS_NN_vpsrlvd: // Variable Bit Shift Right Logical (Dword)
+ case STARS_NN_vpsrlvq: // Variable Bit Shift Right Logical (Qword)
+ case STARS_NN_vpsrlw: // Packed Shift Right Logical (Word)
+ case STARS_NN_vpsubb: // Packed Subtract Byte
+ case STARS_NN_vpsubd: // Packed Subtract Dword
+ case STARS_NN_vpsubq: // Subtract Packed Quadword Integers
+ case STARS_NN_vpsubsb: // Packed Subtract with Saturation (Byte)
+ case STARS_NN_vpsubsw: // Packed Subtract with Saturation (Word)
+ case STARS_NN_vpsubusb: // Packed Subtract Unsigned with Saturation (Byte)
+ case STARS_NN_vpsubusw: // Packed Subtract Unsigned with Saturation (Word)
+ case STARS_NN_vpsubw: // Packed Subtract Word
+ case STARS_NN_vptest: // Logical Compare
+ case STARS_NN_vpunpckhbw: // Unpack High Packed Data (Byte->Word)
+ case STARS_NN_vpunpckhdq: // Unpack High Packed Data (Dword->Qword)
+ case STARS_NN_vpunpckhqdq: // Unpack High Packed Data (Qword->Xmmword)
+ case STARS_NN_vpunpckhwd: // Unpack High Packed Data (Word->Dword)
+ case STARS_NN_vpunpcklbw: // Unpack Low Packed Data (Byte->Word)
+ case STARS_NN_vpunpckldq: // Unpack Low Packed Data (Dword->Qword)
+ case STARS_NN_vpunpcklqdq: // Unpack Low Packed Data (Qword->Xmmword)
+ case STARS_NN_vpunpcklwd: // Unpack Low Packed Data (Word->Dword)
+ case STARS_NN_vpxor: // Bitwise Logical Exclusive Or
+ case STARS_NN_vrcpps: // Packed Single-FP Reciprocal
+ case STARS_NN_vrcpss: // Scalar Single-FP Reciprocal
+ case STARS_NN_vroundpd: // Round Packed Double Precision Floating-Point Values
+ case STARS_NN_vroundps: // Round Packed Single Precision Floating-Point Values
+ case STARS_NN_vroundsd: // Round Scalar Double Precision Floating-Point Values
+ case STARS_NN_vroundss: // Round Scalar Single Precision Floating-Point Values
+ case STARS_NN_vrsqrtps: // Packed Single-FP Square Root Reciprocal
+ case STARS_NN_vrsqrtss: // Scalar Single-FP Square Root Reciprocal
+ case STARS_NN_vshufpd: // Shuffle Packed Double-Precision Floating-Point Values
+ case STARS_NN_vshufps: // Shuffle Single-FP
+ case STARS_NN_vsqrtpd: // Compute Square Roots of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vsqrtps: // Packed Single-FP Square Root
+ case STARS_NN_vsqrtsd: // Compute Square Rootof Scalar Double-Precision Floating-Point Value
+ case STARS_NN_vsqrtss: // Scalar Single-FP Square Root
+ case STARS_NN_vstmxcsr: // Store Streaming SIMD Extensions Technology Control/Status Register
+ case STARS_NN_vsubpd: // Subtract Packed Double-Precision Floating-Point Values
+ case STARS_NN_vsubps: // Packed Single-FP Subtract
+ case STARS_NN_vsubsd: // Subtract Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vsubss: // Scalar Single-FP Subtract
+ case STARS_NN_vtestpd: // Packed Double-Precision Floating-Point Bit Test
+ case STARS_NN_vtestps: // Packed Single-Precision Floating-Point Bit Test
+ case STARS_NN_vucomisd: // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ case STARS_NN_vucomiss: // Scalar Unordered Single-FP Compare and Set EFLAGS
+ case STARS_NN_vunpckhpd: // Unpack and Interleave High Packed Double-Precision Floating-Point Values
+ case STARS_NN_vunpckhps: // Unpack High Packed Single-FP Data
+ case STARS_NN_vunpcklpd: // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
+ case STARS_NN_vunpcklps: // Unpack Low Packed Single-FP Data
+ case STARS_NN_vxorpd: // Bitwise Logical OR of Double-Precision Floating-Point Values
+ case STARS_NN_vxorps: // Bitwise Logical XOR for Single-FP Data
+ case STARS_NN_vzeroall: // Zero All YMM Registers
+ case STARS_NN_vzeroupper: // Zero Upper Bits of YMM Registers
SMP_fprintf(OutFile, "ERROR");
break;
// Transactional Synchronization Extensions
- case NN_xabort: // Transaction Abort
- case NN_xbegin: // Transaction Begin
- case NN_xend: // Transaction End
- case NN_xtest: // Test If In Transactional Execution
+ case STARS_NN_xabort: // Transaction Abort
+ case STARS_NN_xbegin: // Transaction Begin
+ case STARS_NN_xend: // Transaction End
+ case STARS_NN_xtest: // Test If In Transactional Execution
SMP_fprintf(OutFile, "ERROR");
break;
// Virtual PC synthetic instructions
- case NN_vmgetinfo: // Virtual PC - Get VM Information
- case NN_vmsetinfo: // Virtual PC - Set VM Information
- case NN_vmdxdsbl: // Virtual PC - Disable Direct Execution
- case NN_vmdxenbl: // Virtual PC - Enable Direct Execution
- case NN_vmcpuid: // Virtual PC - Virtualized CPU Information
- case NN_vmhlt: // Virtual PC - Halt
- case NN_vmsplaf: // Virtual PC - Spin Lock Acquisition Failed
- case NN_vmpushfd: // Virtual PC - Push virtualized flags register
- case NN_vmpopfd: // Virtual PC - Pop virtualized flags register
- case NN_vmcli: // Virtual PC - Clear Interrupt Flag
- case NN_vmsti: // Virtual PC - Set Interrupt Flag
- case NN_vmiretd: // Virtual PC - Return From Interrupt
- case NN_vmsgdt: // Virtual PC - Store Global Descriptor Table
- case NN_vmsidt: // Virtual PC - Store Interrupt Descriptor Table
- case NN_vmsldt: // Virtual PC - Store Local Descriptor Table
- case NN_vmstr: // Virtual PC - Store Task Register
- case NN_vmsdte: // Virtual PC - Store to Descriptor Table Entry
- case NN_vpcext: // Virtual PC - ISA extension
+ case STARS_NN_vmgetinfo: // Virtual PC - Get VM Information
+ case STARS_NN_vmsetinfo: // Virtual PC - Set VM Information
+ case STARS_NN_vmdxdsbl: // Virtual PC - Disable Direct Execution
+ case STARS_NN_vmdxenbl: // Virtual PC - Enable Direct Execution
+ case STARS_NN_vmcpuid: // Virtual PC - Virtualized CPU Information
+ case STARS_NN_vmhlt: // Virtual PC - Halt
+ case STARS_NN_vmsplaf: // Virtual PC - Spin Lock Acquisition Failed
+ case STARS_NN_vmpushfd: // Virtual PC - Push virtualized flags register
+ case STARS_NN_vmpopfd: // Virtual PC - Pop virtualized flags register
+ case STARS_NN_vmcli: // Virtual PC - Clear Interrupt Flag
+ case STARS_NN_vmsti: // Virtual PC - Set Interrupt Flag
+ case STARS_NN_vmiretd: // Virtual PC - Return From Interrupt
+ case STARS_NN_vmsgdt: // Virtual PC - Store Global Descriptor Table
+ case STARS_NN_vmsidt: // Virtual PC - Store Interrupt Descriptor Table
+ case STARS_NN_vmsldt: // Virtual PC - Store Local Descriptor Table
+ case STARS_NN_vmstr: // Virtual PC - Store Task Register
+ case STARS_NN_vmsdte: // Virtual PC - Store to Descriptor Table Entry
+ case STARS_NN_vpcext: // Virtual PC - ISA extension
SMP_fprintf(OutFile, "ERROR");
break;
- case NN_last:
+ case STARS_NN_last:
SMP_fprintf(OutFile, "ERROR");
break;
@@ -2615,7 +2521,7 @@ void PrintOpcode(uint16 opcode, FILE *OutFile) {
// MACHINE DEPENDENT: Is operand type a known type that we want to analyze?
bool MDKnownOperandType(STARSOpndTypePtr TempOp) {
- bool GoodOpType = (nullptr != TempOp) && ((TempOp->GetOpType() >= o_reg) && (TempOp->GetOpType() <= o_ymmreg));
+ bool GoodOpType = (nullptr != TempOp) && TempOp->MDIsKnownOpType();
#if SMP_DEBUG_OPERAND_TYPES
if (!GoodOpType && (! TempOp->IsVoidOp())) {
SMP_msg("WARNING: Operand type %d \n", TempOp->GetOpType());
@@ -2683,7 +2589,7 @@ DisAsmString::DisAsmString(void) {
return;
}
-char *DisAsmString::GetDisAsm(ea_t InstAddr, bool MarkerInst) {
+char *DisAsmString::GetDisAsm(STARS_ea_t InstAddr, bool MarkerInst) {
if (InstAddr != this->CurrAddr) {
this->CurrAddr = InstAddr;
if (MarkerInst) {
@@ -2710,7 +2616,7 @@ char *DisAsmString::GetDisAsm(ea_t InstAddr, bool MarkerInst) {
// Set the disasm text for the SSA marker instructions, which have no IDA Pro disasm because
// they are pseudo-instructions that we add at the top of each function to hold LiveIn name info.
-void DisAsmString::SetMarkerInstText(ea_t InstAddr) {
+void DisAsmString::SetMarkerInstText(STARS_ea_t InstAddr) {
if (InstAddr != this->CurrAddr) {
this->CurrAddr = InstAddr;
SMP_strncpy(this->CachedDisAsm, "\tfnop\t; Top of function SSA marker for SMP",
@@ -2720,6 +2626,8 @@ void DisAsmString::SetMarkerInstText(ea_t InstAddr) {
return;
} // end of DisAsmString::SetMarkerInstText()
+DisAsmString DisAsmText;
+
// *****************************************************************
// Class DefOrUse
// *****************************************************************
@@ -3187,7 +3095,7 @@ SMPOperandType SMPPhiFunction::ConditionalMeetType(SMPBasicBlock *CurrBlock) con
bool FoundNEGATEDPTR = false; // any USE type NEGATEDPTR?
bool ProfilerDerived = false; // was any USE type Profiler-derived?
list<size_t> ZeroConstIndices;
- ea_t BlockStartAddr = CurrBlock->GetFirstAddr(); // for debugging
+ STARS_ea_t BlockStartAddr = CurrBlock->GetFirstAddr(); // for debugging
STARSOpndTypePtr PhiOp = this->GetAnyOp();
for (size_t index = 0; index < this->GetPhiListSize(); ++index) {
@@ -3199,7 +3107,7 @@ SMPOperandType SMPPhiFunction::ConditionalMeetType(SMPBasicBlock *CurrBlock) con
int UseSSANum = this->GetUseSSANum(index);
bool CurrentUseZeroCase = false;
if (MDIsDataFlowOpnd(PhiOp, false)) {
- ea_t DefAddr = CurrBlock->GetFunc()->GetGlobalDefAddr(PhiOp, UseSSANum);
+ STARS_ea_t DefAddr = CurrBlock->GetFunc()->GetGlobalDefAddr(PhiOp, UseSSANum);
// Handle simple case: DEF is in an instruction.
if ((BADADDR != DefAddr) && (DefAddr < STARS_PSEUDO_ID_MIN)) {
SMPInstr *DefInst = CurrBlock->GetFunc()->GetInstFromAddr(DefAddr);
@@ -3276,7 +3184,7 @@ SMPOperandType SMPPhiFunction::ConditionalMeetType(SMPBasicBlock *CurrBlock) con
do {
size_t ZeroConstIndex = ZeroConstIndices.front();
int UseSSANum = this->GetUseSSANum(ZeroConstIndex);
- ea_t DefAddr = CurrBlock->GetFunc()->GetGlobalDefAddr(PhiOp, UseSSANum);
+ STARS_ea_t DefAddr = CurrBlock->GetFunc()->GetGlobalDefAddr(PhiOp, UseSSANum);
// Handle simple case: DEF is in an instruction.
if ((BADADDR != DefAddr) && (DefAddr < STARS_PSEUDO_ID_MIN)) {
SMPInstr *DefInst = CurrBlock->GetFunc()->GetInstFromAddr(DefAddr);
@@ -3334,7 +3242,7 @@ SMPDefUseChain::SMPDefUseChain(void) {
return;
}
-SMPDefUseChain::SMPDefUseChain(STARSOpndTypePtr Name, ea_t Def) {
+SMPDefUseChain::SMPDefUseChain(STARSOpndTypePtr Name, STARS_ea_t Def) {
this->SetName(Name);
this->RefInstrs.push_back(Def);
this->IndWrite = false;
@@ -3358,13 +3266,13 @@ void SMPDefUseChain::SetName(STARSOpndTypePtr Name) {
}
// Set the DEF instruction.
-void SMPDefUseChain::SetDef(ea_t Def) {
+void SMPDefUseChain::SetDef(STARS_ea_t Def) {
this->RefInstrs[0] = (unsigned short) Def;
return;
}
// Push a USE onto the list
-void SMPDefUseChain::PushUse(ea_t Use) {
+void SMPDefUseChain::PushUse(STARS_ea_t Use) {
this->RefInstrs.push_back((unsigned short) Use);
return;
}
@@ -3400,7 +3308,7 @@ SMPDUChainArray::SMPDUChainArray(void) {
return;
}
-SMPDUChainArray::SMPDUChainArray(STARSOpndTypePtr Name, ea_t FirstAddrMinusOne) {
+SMPDUChainArray::SMPDUChainArray(STARSOpndTypePtr Name, STARS_ea_t FirstAddrMinusOne) {
STARSOpndTypePtr Name2 = nullptr;
if (Name->IsRegOp()) {
// We want to map AH, AL, and AX to EAX, etc. throughout our data flow analysis
@@ -3417,7 +3325,7 @@ SMPDUChainArray::SMPDUChainArray(STARSOpndTypePtr Name, ea_t FirstAddrMinusOne)
return;
}
-ea_t SMPDUChainArray::GetLastUse(int SSANum) const {
+STARS_ea_t SMPDUChainArray::GetLastUse(int SSANum) const {
ea_t TempAddr = DUChains.at(SSANum).GetLastUse();
if (BADADDR != TempAddr) {
// If BADADDR, leave it as BADADDR. Otherwise, add in BaseAddr.
@@ -3530,7 +3438,7 @@ bool STARSBitSet::IsAnyBitSet(void) const {
}
// Map system or library call name to FG info about its return value.
-static map<string, struct FineGrainedInfo> ReturnRegisterTypeMap;
+map<string, struct FineGrainedInfo> ReturnRegisterTypeMap;
// Map system or library call name to the annotation substring that
// guides saturating arithmetic or other continuation policies in
@@ -4318,3210 +4226,4 @@ void GetLibFuncFGInfo(string FuncName, struct FineGrainedInfo &InitFGInfo) {
return;
} // end of GetLibFuncFGInfo()
-// Initialize the lookup maps that are used to define the FG info that can
-// be inferred from a library function name.
-void InitLibFuncFGInfoMaps(void) {
- struct FineGrainedInfo FGEntry;
- pair<string, struct FineGrainedInfo> MapEntry;
- pair<map<string, struct FineGrainedInfo>::iterator, bool> InsertResult;
-
- // Add functions that return signed integers.
- FGEntry.SignMiscInfo = FG_MASK_SIGNED;
- FGEntry.SizeInfo = (FG_MASK_INTEGER | ComputeOperandBitWidthMask(nullptr, sizeof(int)));
- MapEntry.second = FGEntry;
-
- MapEntry.first = "atoi";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "strcmp";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "strcoll";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "strncmp";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "memcmp";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "isalnum";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "isalpha";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "islower";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "isupper";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "isdigit";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "isxdigit";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "iscntrl";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "isgraph";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "isblank";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "isspace";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "isprint";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "ispunct";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- // Functions that return signed longs.
- if (sizeof(long int) != sizeof(int)) {
- FGEntry.SizeInfo = (FG_MASK_INTEGER | ComputeOperandBitWidthMask(nullptr, sizeof(long int)));
- MapEntry.second = FGEntry;
- }
-
- MapEntry.first = "atol";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "strtol";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- // Functions that return signed long longs.
- if (sizeof(long long int) != sizeof(long int)) {
- FGEntry.SizeInfo = (FG_MASK_INTEGER | ComputeOperandBitWidthMask(nullptr, sizeof(long long int)));
- MapEntry.second = FGEntry;
- }
-
- MapEntry.first = "atoll";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "strtoll";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- // Functions that return unsigned long longs.
- FGEntry.SignMiscInfo = FG_MASK_UNSIGNED;
- MapEntry.second = FGEntry;
-
- MapEntry.first = "strtoull";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- // Functions that return unsigned longs.
- if (sizeof(long long int) != sizeof(long int)) {
- FGEntry.SizeInfo = (FG_MASK_INTEGER | ComputeOperandBitWidthMask(nullptr, sizeof(long int)));
- MapEntry.second = FGEntry;
- }
-
- MapEntry.first = "strtoul";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- // Functions that return size_t.
- FGEntry.SizeInfo = (FG_MASK_INTEGER | ComputeOperandBitWidthMask(nullptr, sizeof(size_t)));
- FGEntry.SignMiscInfo = FG_MASK_UNSIGNED;
- MapEntry.second = FGEntry;
-
- MapEntry.first = "strlen";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "strxfrm";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "strspn";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "strcspn";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "strftime";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- // Functions that return (char *).
- FGEntry.SizeInfo = (FG_MASK_DATAPOINTER | ComputeOperandBitWidthMask(nullptr, sizeof(char *)));
- FGEntry.SignMiscInfo = FG_MASK_UNSIGNED;
- MapEntry.second = FGEntry;
-
- MapEntry.first = "strcpy";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "strncpy";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "strcat";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "strncat";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "strchr";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "strrchr";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "strpbrk";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "strstr";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "strtok";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "strerror";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "asctime";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "ctime";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- // Functions that return (void *) or a similar data pointer.
- FGEntry.SizeInfo = (FG_MASK_DATAPOINTER | ComputeOperandBitWidthMask(nullptr, sizeof(void *)));
- FGEntry.SignMiscInfo = FG_MASK_UNSIGNED;
- MapEntry.second = FGEntry;
-
- MapEntry.first = "setlocale";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "localeconv";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "malloc";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "calloc";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "realloc";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "memchr";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "memcpy";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "mempcpy"; // non-standard, found in glibc
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "memmove";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "memset";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "gmtime";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- MapEntry.first = "localtime";
- InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
- assert(InsertResult.second);
-
- // Functions that return bool.
- FGEntry.SizeInfo = (FG_MASK_INTEGER | ComputeOperandBitWidthMask(nullptr, sizeof(bool)));
- FGEntry.SignMiscInfo = FG_MASK_UNSIGNED;
- MapEntry.second = FGEntry;
-
-
- // NOTE: Add <math.h> functions later.
-
- return;
-} // end of InitLibFuncFGInfoMaps()
-
-// Initialize the DFACategory[] array to define instruction classes
-// for the purposes of data flow analysis.
-void InitDFACategory(void) {
- // Default category is 0, not the start or end of a basic block.
- (void) memset(DFACategory, 0, sizeof(DFACategory));
-
-DFACategory[NN_call] = CALL; // Call Procedure
-DFACategory[NN_callfi] = INDIR_CALL; // Indirect Call Far Procedure
-DFACategory[NN_callni] = INDIR_CALL; // Indirect Call Near Procedure
-
-DFACategory[NN_hlt] = HALT; // Halt
-
-DFACategory[NN_int] = INDIR_CALL; // Call to Interrupt Procedure
-DFACategory[NN_into] = INDIR_CALL; // Call to Interrupt Procedure if Overflow Flag = 1
-DFACategory[NN_int3] = INDIR_CALL; // Trap to Debugger
-DFACategory[NN_iretw] = RETURN; // Interrupt Return
-DFACategory[NN_iret] = RETURN; // Interrupt Return
-DFACategory[NN_iretd] = RETURN; // Interrupt Return (use32)
-DFACategory[NN_iretq] = RETURN; // Interrupt Return (use64)
-DFACategory[NN_ja] = COND_BRANCH; // Jump if Above (CF=0 & ZF=0)
-DFACategory[NN_jae] = COND_BRANCH; // Jump if Above or Equal (CF=0)
-DFACategory[NN_jb] = COND_BRANCH; // Jump if Below (CF=1)
-DFACategory[NN_jbe] = COND_BRANCH; // Jump if Below or Equal (CF=1 | ZF=1)
-DFACategory[NN_jc] = COND_BRANCH; // Jump if Carry (CF=1)
-DFACategory[NN_jcxz] = COND_BRANCH; // Jump if CX is 0
-DFACategory[NN_jecxz] = COND_BRANCH; // Jump if ECX is 0
-DFACategory[NN_jrcxz] = COND_BRANCH; // Jump if RCX is 0
-DFACategory[NN_je] = COND_BRANCH; // Jump if Equal (ZF=1)
-DFACategory[NN_jg] = COND_BRANCH; // Jump if Greater (ZF=0 & SF=OF)
-DFACategory[NN_jge] = COND_BRANCH; // Jump if Greater or Equal (SF=OF)
-DFACategory[NN_jl] = COND_BRANCH; // Jump if Less (SF!=OF)
-DFACategory[NN_jle] = COND_BRANCH; // Jump if Less or Equal (ZF=1 | SF!=OF)
-DFACategory[NN_jna] = COND_BRANCH; // Jump if Not Above (CF=1 | ZF=1)
-DFACategory[NN_jnae] = COND_BRANCH; // Jump if Not Above or Equal (CF=1)
-DFACategory[NN_jnb] = COND_BRANCH; // Jump if Not Below (CF=0)
-DFACategory[NN_jnbe] = COND_BRANCH; // Jump if Not Below or Equal (CF=0 & ZF=0)
-DFACategory[NN_jnc] = COND_BRANCH; // Jump if Not Carry (CF=0)
-DFACategory[NN_jne] = COND_BRANCH; // Jump if Not Equal (ZF=0)
-DFACategory[NN_jng] = COND_BRANCH; // Jump if Not Greater (ZF=1 | SF!=OF)
-DFACategory[NN_jnge] = COND_BRANCH; // Jump if Not Greater or Equal (SF!=OF)
-DFACategory[NN_jnl] = COND_BRANCH; // Jump if Not Less (SF=OF)
-DFACategory[NN_jnle] = COND_BRANCH; // Jump if Not Less or Equal (ZF=0 & SF=OF)
-DFACategory[NN_jno] = COND_BRANCH; // Jump if Not Overflow (OF=0)
-DFACategory[NN_jnp] = COND_BRANCH; // Jump if Not Parity (PF=0)
-DFACategory[NN_jns] = COND_BRANCH; // Jump if Not Sign (SF=0)
-DFACategory[NN_jnz] = COND_BRANCH; // Jump if Not Zero (ZF=0)
-DFACategory[NN_jo] = COND_BRANCH; // Jump if Overflow (OF=1)
-DFACategory[NN_jp] = COND_BRANCH; // Jump if Parity (PF=1)
-DFACategory[NN_jpe] = COND_BRANCH; // Jump if Parity Even (PF=1)
-DFACategory[NN_jpo] = COND_BRANCH; // Jump if Parity Odd (PF=0)
-DFACategory[NN_js] = COND_BRANCH; // Jump if Sign (SF=1)
-DFACategory[NN_jz] = COND_BRANCH; // Jump if Zero (ZF=1)
-DFACategory[NN_jmp] = JUMP; // Jump
-DFACategory[NN_jmpfi] = INDIR_JUMP; // Indirect Far Jump
-DFACategory[NN_jmpni] = INDIR_JUMP; // Indirect Near Jump
-DFACategory[NN_jmpshort] = JUMP; // Jump Short (only in 64-bit mode)
-
-DFACategory[NN_loopw] = COND_BRANCH; // Loop while ECX != 0
-DFACategory[NN_loop] = COND_BRANCH; // Loop while CX != 0
-DFACategory[NN_loopd] = COND_BRANCH; // Loop while ECX != 0
-DFACategory[NN_loopq] = COND_BRANCH; // Loop while RCX != 0
-DFACategory[NN_loopwe] = COND_BRANCH; // Loop while CX != 0 and ZF=1
-DFACategory[NN_loope] = COND_BRANCH; // Loop while rCX != 0 and ZF=1
-DFACategory[NN_loopde] = COND_BRANCH; // Loop while ECX != 0 and ZF=1
-DFACategory[NN_loopqe] = COND_BRANCH; // Loop while RCX != 0 and ZF=1
-DFACategory[NN_loopwne] = COND_BRANCH; // Loop while CX != 0 and ZF=0
-DFACategory[NN_loopne] = COND_BRANCH; // Loop while rCX != 0 and ZF=0
-DFACategory[NN_loopdne] = COND_BRANCH; // Loop while ECX != 0 and ZF=0
-DFACategory[NN_loopqne] = COND_BRANCH; // Loop while RCX != 0 and ZF=0
-
-DFACategory[NN_retn] = RETURN; // Return Near from Procedure
-DFACategory[NN_retf] = RETURN; // Return Far from Procedure
-
-//
-// Pentium instructions
-//
-
-DFACategory[NN_rsm] = HALT; // Resume from System Management Mode
-
-// Pentium II instructions
-
-DFACategory[NN_sysenter] = CALL; // Fast Transition to System Call Entry Point
-DFACategory[NN_sysexit] = CALL; // Fast Transition from System Call Entry Point
-
-// AMD syscall/sysret instructions NOTE: not AMD, found in Intel manual
-
-DFACategory[NN_syscall] = CALL; // Low latency system call
-DFACategory[NN_sysret] = CALL; // Return from system call
-
-// VMX instructions
-
-DFACategory[NN_vmcall] = INDIR_CALL; // Call to VM Monitor
-
-// Added with x86-64
-
-// Geode LX 3DNow! extensions
-
-// SSE2 pseudoinstructions
-
-// SSSE4.1 instructions
-
-// SSSE4.2 instructions
-
-// AMD SSE4a instructions
-
-// xsave/xrstor instructions
-
-// Intel Safer Mode Extensions (SMX)
-
-// AMD-V Virtualization ISA Extension
-
-// VMX+ instructions
-
-// Intel Atom instructions
-
-// Intel AES instructions
-
-// Carryless multiplication
-
-// Returns modified by operand size prefixes
-
-DFACategory[NN_retnw] = RETURN; // Return Near from Procedure (use16)
-DFACategory[NN_retnd] = RETURN; // Return Near from Procedure (use32)
-DFACategory[NN_retnq] = RETURN; // Return Near from Procedure (use64)
-DFACategory[NN_retfw] = RETURN; // Return Far from Procedure (use16)
-DFACategory[NN_retfd] = RETURN; // Return Far from Procedure (use32)
-DFACategory[NN_retfq] = RETURN; // Return Far from Procedure (use64)
-
-// RDRAND support
-
-// new GPR instructions
-
-// new AVX instructions
-
-// Transactional Synchronization Extensions
-
-// Virtual PC synthetic instructions
-
- return;
-
-} // end InitDFACategory()
-
-// Initialize the SMPDefsFlags[] array to define how we emit
-// optimizing annotations.
-void InitSMPDefsFlags(void) {
- // Default value is true. Many instructions set the flags.
- (void) memset(SMPDefsFlags, true, sizeof(SMPDefsFlags));
-
-SMPDefsFlags[NN_null] = false; // Unknown Operation
-SMPDefsFlags[NN_bound] = false; // Check Array Index Against Bounds
-SMPDefsFlags[NN_call] = false; // Call Procedure
-SMPDefsFlags[NN_callfi] = false; // Indirect Call Far Procedure
-SMPDefsFlags[NN_callni] = false; // Indirect Call Near Procedure
-SMPDefsFlags[NN_cbw] = false; // AL -> AX (with sign)
-SMPDefsFlags[NN_cwde] = false; // AX -> EAX (with sign)
-SMPDefsFlags[NN_cdqe] = false; // EAX -> RAX (with sign)
-SMPDefsFlags[NN_clts] = false; // Clear Task-Switched Flag in CR0
-SMPDefsFlags[NN_cwd] = false; // AX -> DX:AX (with sign)
-SMPDefsFlags[NN_cdq] = false; // EAX -> EDX:EAX (with sign)
-SMPDefsFlags[NN_cqo] = false; // RAX -> RDX:RAX (with sign)
-SMPDefsFlags[NN_enterw] = false; // Make Stack Frame for Procedure Parameters
-SMPDefsFlags[NN_enter] = false; // Make Stack Frame for Procedure Parameters
-SMPDefsFlags[NN_enterd] = false; // Make Stack Frame for Procedure Parameters
-SMPDefsFlags[NN_enterq] = false; // Make Stack Frame for Procedure Parameters
-SMPDefsFlags[NN_hlt] = false; // Halt
-SMPDefsFlags[NN_in] = false; // Input from Port
-SMPDefsFlags[NN_ins] = false; // Input Byte(s) from Port to String
-SMPDefsFlags[NN_iretw] = false; // Interrupt Return
-SMPDefsFlags[NN_iret] = false; // Interrupt Return
-SMPDefsFlags[NN_iretd] = false; // Interrupt Return (use32)
-SMPDefsFlags[NN_iretq] = false; // Interrupt Return (use64)
-SMPDefsFlags[NN_ja] = false; // Jump if Above (CF=0 & ZF=0)
-SMPDefsFlags[NN_jae] = false; // Jump if Above or Equal (CF=0)
-SMPDefsFlags[NN_jb] = false; // Jump if Below (CF=1)
-SMPDefsFlags[NN_jbe] = false; // Jump if Below or Equal (CF=1 | ZF=1)
-SMPDefsFlags[NN_jc] = false; // Jump if Carry (CF=1)
-SMPDefsFlags[NN_jcxz] = false; // Jump if CX is 0
-SMPDefsFlags[NN_jecxz] = false; // Jump if ECX is 0
-SMPDefsFlags[NN_jrcxz] = false; // Jump if RCX is 0
-SMPDefsFlags[NN_je] = false; // Jump if Equal (ZF=1)
-SMPDefsFlags[NN_jg] = false; // Jump if Greater (ZF=0 & SF=OF)
-SMPDefsFlags[NN_jge] = false; // Jump if Greater or Equal (SF=OF)
-SMPDefsFlags[NN_jl] = false; // Jump if Less (SF!=OF)
-SMPDefsFlags[NN_jle] = false; // Jump if Less or Equal (ZF=1 | SF!=OF)
-SMPDefsFlags[NN_jna] = false; // Jump if Not Above (CF=1 | ZF=1)
-SMPDefsFlags[NN_jnae] = false; // Jump if Not Above or Equal (CF=1)
-SMPDefsFlags[NN_jnb] = false; // Jump if Not Below (CF=0)
-SMPDefsFlags[NN_jnbe] = false; // Jump if Not Below or Equal (CF=0 & ZF=0)
-SMPDefsFlags[NN_jnc] = false; // Jump if Not Carry (CF=0)
-SMPDefsFlags[NN_jne] = false; // Jump if Not Equal (ZF=0)
-SMPDefsFlags[NN_jng] = false; // Jump if Not Greater (ZF=1 | SF!=OF)
-SMPDefsFlags[NN_jnge] = false; // Jump if Not Greater or Equal (SF!=OF)
-SMPDefsFlags[NN_jnl] = false; // Jump if Not Less (SF=OF)
-SMPDefsFlags[NN_jnle] = false; // Jump if Not Less or Equal (ZF=0 & SF=OF)
-SMPDefsFlags[NN_jno] = false; // Jump if Not Overflow (OF=0)
-SMPDefsFlags[NN_jnp] = false; // Jump if Not Parity (PF=0)
-SMPDefsFlags[NN_jns] = false; // Jump if Not Sign (SF=0)
-SMPDefsFlags[NN_jnz] = false; // Jump if Not Zero (ZF=0)
-SMPDefsFlags[NN_jo] = false; // Jump if Overflow (OF=1)
-SMPDefsFlags[NN_jp] = false; // Jump if Parity (PF=1)
-SMPDefsFlags[NN_jpe] = false; // Jump if Parity Even (PF=1)
-SMPDefsFlags[NN_jpo] = false; // Jump if Parity Odd (PF=0)
-SMPDefsFlags[NN_js] = false; // Jump if Sign (SF=1)
-SMPDefsFlags[NN_jz] = false; // Jump if Zero (ZF=1)
-SMPDefsFlags[NN_jmp] = false; // Jump
-SMPDefsFlags[NN_jmpfi] = false; // Indirect Far Jump
-SMPDefsFlags[NN_jmpni] = false; // Indirect Near Jump
-SMPDefsFlags[NN_jmpshort] = false; // Jump Short (not used)
-SMPDefsFlags[NN_lahf] = false; // Load Flags into AH Register
-SMPDefsFlags[NN_lea] = false; // Load Effective Address
-SMPDefsFlags[NN_leavew] = false; // High Level Procedure Exit
-SMPDefsFlags[NN_leave] = false; // High Level Procedure Exit
-SMPDefsFlags[NN_leaved] = false; // High Level Procedure Exit
-SMPDefsFlags[NN_leaveq] = false; // High Level Procedure Exit
-SMPDefsFlags[NN_lgdt] = false; // Load Global Descriptor Table Register
-SMPDefsFlags[NN_lidt] = false; // Load Interrupt Descriptor Table Register
-SMPDefsFlags[NN_lgs] = false; // Load Full Pointer to GS:xx
-SMPDefsFlags[NN_lss] = false; // Load Full Pointer to SS:xx
-SMPDefsFlags[NN_lds] = false; // Load Full Pointer to DS:xx
-SMPDefsFlags[NN_les] = false; // Load Full Pointer to ES:xx
-SMPDefsFlags[NN_lfs] = false; // Load Full Pointer to FS:xx
-SMPDefsFlags[NN_loopw] = false; // Loop while ECX != 0
-SMPDefsFlags[NN_loop] = false; // Loop while ECX != 0
-SMPDefsFlags[NN_loopwe] = false; // Loop while CX != 0 and ZF=1
-SMPDefsFlags[NN_loope] = false; // Loop while rCX != 0 and ZF=1
-SMPDefsFlags[NN_loopde] = false; // Loop while ECX != 0 and ZF=1
-SMPDefsFlags[NN_loopqe] = false; // Loop while RCX != 0 and ZF=1
-SMPDefsFlags[NN_loopwne] = false; // Loop while CX != 0 and ZF=0
-SMPDefsFlags[NN_loopne] = false; // Loop while rCX != 0 and ZF=0
-SMPDefsFlags[NN_loopdne] = false; // Loop while ECX != 0 and ZF=0
-SMPDefsFlags[NN_loopqne] = false; // Loop while RCX != 0 and ZF=0
-SMPDefsFlags[NN_ltr] = false; // Load Task Register
-SMPDefsFlags[NN_mov] = false; // Move Data
-SMPDefsFlags[NN_movsp] = true; // Move to/from Special Registers
-SMPDefsFlags[NN_movs] = false; // Move Byte(s) from String to String
-SMPDefsFlags[NN_movsx] = false; // Move with Sign-Extend
-SMPDefsFlags[NN_movzx] = false; // Move with Zero-Extend
-SMPDefsFlags[NN_nop] = false; // No Operation
-SMPDefsFlags[NN_not] = false; // One's Complement Negation
-SMPDefsFlags[NN_out] = false; // Output to Port
-SMPDefsFlags[NN_outs] = false; // Output Byte(s) to Port
-SMPDefsFlags[NN_pop] = false; // Pop a word from the Stack
-SMPDefsFlags[NN_popaw] = false; // Pop all General Registers
-SMPDefsFlags[NN_popa] = false; // Pop all General Registers
-SMPDefsFlags[NN_popad] = false; // Pop all General Registers (use32)
-SMPDefsFlags[NN_popaq] = false; // Pop all General Registers (use64)
-SMPDefsFlags[NN_push] = false; // Push Operand onto the Stack
-SMPDefsFlags[NN_pushaw] = false; // Push all General Registers
-SMPDefsFlags[NN_pusha] = false; // Push all General Registers
-SMPDefsFlags[NN_pushad] = false; // Push all General Registers (use32)
-SMPDefsFlags[NN_pushaq] = false; // Push all General Registers (use64)
-SMPDefsFlags[NN_pushfw] = false; // Push Flags Register onto the Stack
-SMPDefsFlags[NN_pushf] = false; // Push Flags Register onto the Stack
-SMPDefsFlags[NN_pushfd] = false; // Push Flags Register onto the Stack (use32)
-SMPDefsFlags[NN_pushfq] = false; // Push Flags Register onto the Stack (use64)
-SMPDefsFlags[NN_rep] = false; // Repeat String Operation
-SMPDefsFlags[NN_repe] = false; // Repeat String Operation while ZF=1
-SMPDefsFlags[NN_repne] = false; // Repeat String Operation while ZF=0
-SMPDefsFlags[NN_retn] = false; // Return Near from Procedure
-SMPDefsFlags[NN_retf] = false; // Return Far from Procedure
-SMPDefsFlags[NN_sahf] = true; // Store AH into flags
-SMPDefsFlags[NN_shl] = true; // Shift Logical Left
-SMPDefsFlags[NN_shr] = true; // Shift Logical Right
-SMPDefsFlags[NN_seta] = false; // Set Byte if Above (CF=0 & ZF=0)
-SMPDefsFlags[NN_setae] = false; // Set Byte if Above or Equal (CF=0)
-SMPDefsFlags[NN_setb] = false; // Set Byte if Below (CF=1)
-SMPDefsFlags[NN_setbe] = false; // Set Byte if Below or Equal (CF=1 | ZF=1)
-SMPDefsFlags[NN_setc] = false; // Set Byte if Carry (CF=1)
-SMPDefsFlags[NN_sete] = false; // Set Byte if Equal (ZF=1)
-SMPDefsFlags[NN_setg] = false; // Set Byte if Greater (ZF=0 & SF=OF)
-SMPDefsFlags[NN_setge] = false; // Set Byte if Greater or Equal (SF=OF)
-SMPDefsFlags[NN_setl] = false; // Set Byte if Less (SF!=OF)
-SMPDefsFlags[NN_setle] = false; // Set Byte if Less or Equal (ZF=1 | SF!=OF)
-SMPDefsFlags[NN_setna] = false; // Set Byte if Not Above (CF=1 | ZF=1)
-SMPDefsFlags[NN_setnae] = false; // Set Byte if Not Above or Equal (CF=1)
-SMPDefsFlags[NN_setnb] = false; // Set Byte if Not Below (CF=0)
-SMPDefsFlags[NN_setnbe] = false; // Set Byte if Not Below or Equal (CF=0 & ZF=0)
-SMPDefsFlags[NN_setnc] = false; // Set Byte if Not Carry (CF=0)
-SMPDefsFlags[NN_setne] = false; // Set Byte if Not Equal (ZF=0)
-SMPDefsFlags[NN_setng] = false; // Set Byte if Not Greater (ZF=1 | SF!=OF)
-SMPDefsFlags[NN_setnge] = false; // Set Byte if Not Greater or Equal (SF!=OF)
-SMPDefsFlags[NN_setnl] = false; // Set Byte if Not Less (SF=OF)
-SMPDefsFlags[NN_setnle] = false; // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
-SMPDefsFlags[NN_setno] = false; // Set Byte if Not Overflow (OF=0)
-SMPDefsFlags[NN_setnp] = false; // Set Byte if Not Parity (PF=0)
-SMPDefsFlags[NN_setns] = false; // Set Byte if Not Sign (SF=0)
-SMPDefsFlags[NN_setnz] = false; // Set Byte if Not Zero (ZF=0)
-SMPDefsFlags[NN_seto] = false; // Set Byte if Overflow (OF=1)
-SMPDefsFlags[NN_setp] = false; // Set Byte if Parity (PF=1)
-SMPDefsFlags[NN_setpe] = false; // Set Byte if Parity Even (PF=1)
-SMPDefsFlags[NN_setpo] = false; // Set Byte if Parity Odd (PF=0)
-SMPDefsFlags[NN_sets] = false; // Set Byte if Sign (SF=1)
-SMPDefsFlags[NN_setz] = false; // Set Byte if Zero (ZF=1)
-SMPDefsFlags[NN_sgdt] = false; // Store Global Descriptor Table Register
-SMPDefsFlags[NN_sidt] = false; // Store Interrupt Descriptor Table Register
-SMPDefsFlags[NN_sldt] = false; // Store Local Descriptor Table Register
-SMPDefsFlags[NN_str] = false; // Store Task Register
-SMPDefsFlags[NN_wait] = false; // Wait until BUSY# Pin is Inactive (HIGH)
-SMPDefsFlags[NN_xchg] = false; // Exchange Register/Memory with Register
-SMPDefsFlags[NN_xlat] = false; // Table Lookup Translation
-
-//
-// 486 instructions
-//
-
-SMPDefsFlags[NN_bswap] = false; // Swap bytes in register
-SMPDefsFlags[NN_invd] = false; // Invalidate Data Cache
-SMPDefsFlags[NN_wbinvd] = false; // Invalidate Data Cache (write changes)
-SMPDefsFlags[NN_invlpg] = false; // Invalidate TLB entry
-
-//
-// Pentium instructions
-//
-
-SMPDefsFlags[NN_rdmsr] = false; // Read Machine Status Register
-SMPDefsFlags[NN_wrmsr] = false; // Write Machine Status Register
-SMPDefsFlags[NN_cpuid] = false; // Get CPU ID
-SMPDefsFlags[NN_rdtsc] = false; // Read Time Stamp Counter
-
-//
-// Pentium Pro instructions
-//
-
-SMPDefsFlags[NN_cmova] = false; // Move if Above (CF=0 & ZF=0)
-SMPDefsFlags[NN_cmovb] = false; // Move if Below (CF=1)
-SMPDefsFlags[NN_cmovbe] = false; // Move if Below or Equal (CF=1 | ZF=1)
-SMPDefsFlags[NN_cmovg] = false; // Move if Greater (ZF=0 & SF=OF)
-SMPDefsFlags[NN_cmovge] = false; // Move if Greater or Equal (SF=OF)
-SMPDefsFlags[NN_cmovl] = false; // Move if Less (SF!=OF)
-SMPDefsFlags[NN_cmovle] = false; // Move if Less or Equal (ZF=1 | SF!=OF)
-SMPDefsFlags[NN_cmovnb] = false; // Move if Not Below (CF=0)
-SMPDefsFlags[NN_cmovno] = false; // Move if Not Overflow (OF=0)
-SMPDefsFlags[NN_cmovnp] = false; // Move if Not Parity (PF=0)
-SMPDefsFlags[NN_cmovns] = false; // Move if Not Sign (SF=0)
-SMPDefsFlags[NN_cmovnz] = false; // Move if Not Zero (ZF=0)
-SMPDefsFlags[NN_cmovo] = false; // Move if Overflow (OF=1)
-SMPDefsFlags[NN_cmovp] = false; // Move if Parity (PF=1)
-SMPDefsFlags[NN_cmovs] = false; // Move if Sign (SF=1)
-SMPDefsFlags[NN_cmovz] = false; // Move if Zero (ZF=1)
-SMPDefsFlags[NN_fcmovb] = false; // Floating Move if Below
-SMPDefsFlags[NN_fcmove] = false; // Floating Move if Equal
-SMPDefsFlags[NN_fcmovbe] = false; // Floating Move if Below or Equal
-SMPDefsFlags[NN_fcmovu] = false; // Floating Move if Unordered
-SMPDefsFlags[NN_fcmovnb] = false; // Floating Move if Not Below
-SMPDefsFlags[NN_fcmovne] = false; // Floating Move if Not Equal
-SMPDefsFlags[NN_fcmovnbe] = false; // Floating Move if Not Below or Equal
-SMPDefsFlags[NN_fcmovnu] = false; // Floating Move if Not Unordered
-SMPDefsFlags[NN_rdpmc] = false; // Read Performance Monitor Counter
-
-//
-// FPP instructions
-//
-
-SMPDefsFlags[NN_fld] = false; // Load Real
-SMPDefsFlags[NN_fst] = false; // Store Real
-SMPDefsFlags[NN_fstp] = false; // Store Real and Pop
-SMPDefsFlags[NN_fxch] = false; // Exchange Registers
-SMPDefsFlags[NN_fild] = false; // Load Integer
-SMPDefsFlags[NN_fist] = false; // Store Integer
-SMPDefsFlags[NN_fistp] = false; // Store Integer and Pop
-SMPDefsFlags[NN_fbld] = false; // Load BCD
-SMPDefsFlags[NN_fbstp] = false; // Store BCD and Pop
-SMPDefsFlags[NN_fadd] = false; // Add Real
-SMPDefsFlags[NN_faddp] = false; // Add Real and Pop
-SMPDefsFlags[NN_fiadd] = false; // Add Integer
-SMPDefsFlags[NN_fsub] = false; // Subtract Real
-SMPDefsFlags[NN_fsubp] = false; // Subtract Real and Pop
-SMPDefsFlags[NN_fisub] = false; // Subtract Integer
-SMPDefsFlags[NN_fsubr] = false; // Subtract Real Reversed
-SMPDefsFlags[NN_fsubrp] = false; // Subtract Real Reversed and Pop
-SMPDefsFlags[NN_fisubr] = false; // Subtract Integer Reversed
-SMPDefsFlags[NN_fmul] = false; // Multiply Real
-SMPDefsFlags[NN_fmulp] = false; // Multiply Real and Pop
-SMPDefsFlags[NN_fimul] = false; // Multiply Integer
-SMPDefsFlags[NN_fdiv] = false; // Divide Real
-SMPDefsFlags[NN_fdivp] = false; // Divide Real and Pop
-SMPDefsFlags[NN_fidiv] = false; // Divide Integer
-SMPDefsFlags[NN_fdivr] = false; // Divide Real Reversed
-SMPDefsFlags[NN_fdivrp] = false; // Divide Real Reversed and Pop
-SMPDefsFlags[NN_fidivr] = false; // Divide Integer Reversed
-SMPDefsFlags[NN_fsqrt] = false; // Square Root
-SMPDefsFlags[NN_fscale] = false; // Scale: st(0) <- st(0) * 2^st(1)
-SMPDefsFlags[NN_fprem] = false; // Partial Remainder
-SMPDefsFlags[NN_frndint] = false; // Round to Integer
-SMPDefsFlags[NN_fxtract] = false; // Extract exponent and significand
-SMPDefsFlags[NN_fabs] = false; // Absolute value
-SMPDefsFlags[NN_fchs] = false; // Change Sign
-SMPDefsFlags[NN_ficom] = false; // Compare Integer
-SMPDefsFlags[NN_ficomp] = false; // Compare Integer and Pop
-SMPDefsFlags[NN_ftst] = false; // Test
-SMPDefsFlags[NN_fxam] = false; // Examine
-SMPDefsFlags[NN_fptan] = false; // Partial tangent
-SMPDefsFlags[NN_fpatan] = false; // Partial arctangent
-SMPDefsFlags[NN_f2xm1] = false; // 2^x - 1
-SMPDefsFlags[NN_fyl2x] = false; // Y * lg2(X)
-SMPDefsFlags[NN_fyl2xp1] = false; // Y * lg2(X+1)
-SMPDefsFlags[NN_fldz] = false; // Load +0.0
-SMPDefsFlags[NN_fld1] = false; // Load +1.0
-SMPDefsFlags[NN_fldpi] = false; // Load PI=3.14...
-SMPDefsFlags[NN_fldl2t] = false; // Load lg2(10)
-SMPDefsFlags[NN_fldl2e] = false; // Load lg2(e)
-SMPDefsFlags[NN_fldlg2] = false; // Load lg10(2)
-SMPDefsFlags[NN_fldln2] = false; // Load ln(2)
-SMPDefsFlags[NN_finit] = false; // Initialize Processor
-SMPDefsFlags[NN_fninit] = false; // Initialize Processor (no wait)
-SMPDefsFlags[NN_fsetpm] = false; // Set Protected Mode
-SMPDefsFlags[NN_fldcw] = false; // Load Control Word
-SMPDefsFlags[NN_fstcw] = false; // Store Control Word
-SMPDefsFlags[NN_fnstcw] = false; // Store Control Word (no wait)
-SMPDefsFlags[NN_fstsw] = false; // Store Status Word to memory or AX
-SMPDefsFlags[NN_fnstsw] = false; // Store Status Word (no wait) to memory or AX
-SMPDefsFlags[NN_fclex] = false; // Clear Exceptions
-SMPDefsFlags[NN_fnclex] = false; // Clear Exceptions (no wait)
-SMPDefsFlags[NN_fstenv] = false; // Store Environment
-SMPDefsFlags[NN_fnstenv] = false; // Store Environment (no wait)
-SMPDefsFlags[NN_fldenv] = false; // Load Environment
-SMPDefsFlags[NN_fsave] = false; // Save State
-SMPDefsFlags[NN_fnsave] = false; // Save State (no wait)
-SMPDefsFlags[NN_frstor] = false; // Restore State
-SMPDefsFlags[NN_fincstp] = false; // Increment Stack Pointer
-SMPDefsFlags[NN_fdecstp] = false; // Decrement Stack Pointer
-SMPDefsFlags[NN_ffree] = false; // Free Register
-SMPDefsFlags[NN_fnop] = false; // No Operation
-SMPDefsFlags[NN_feni] = false; // (8087 only)
-SMPDefsFlags[NN_fneni] = false; // (no wait) (8087 only)
-SMPDefsFlags[NN_fdisi] = false; // (8087 only)
-SMPDefsFlags[NN_fndisi] = false; // (no wait) (8087 only)
-
-//
-// 80387 instructions
-//
-
-SMPDefsFlags[NN_fprem1] = false; // Partial Remainder ( < half )
-SMPDefsFlags[NN_fsincos] = false; // t<-cos(st); st<-sin(st); push t
-SMPDefsFlags[NN_fsin] = false; // Sine
-SMPDefsFlags[NN_fcos] = false; // Cosine
-SMPDefsFlags[NN_fucom] = false; // Compare Unordered Real
-SMPDefsFlags[NN_fucomp] = false; // Compare Unordered Real and Pop
-SMPDefsFlags[NN_fucompp] = false; // Compare Unordered Real and Pop Twice
-
-//
-// Instructions added 28.02.96
-//
-
-SMPDefsFlags[NN_svdc] = false; // Save Register and Descriptor
-SMPDefsFlags[NN_rsdc] = false; // Restore Register and Descriptor
-SMPDefsFlags[NN_svldt] = false; // Save LDTR and Descriptor
-SMPDefsFlags[NN_rsldt] = false; // Restore LDTR and Descriptor
-SMPDefsFlags[NN_svts] = false; // Save TR and Descriptor
-SMPDefsFlags[NN_rsts] = false; // Restore TR and Descriptor
-SMPDefsFlags[NN_icebp] = false; // ICE Break Point
-
-//
-// MMX instructions
-//
-
-SMPDefsFlags[NN_emms] = false; // Empty MMX state
-SMPDefsFlags[NN_movd] = false; // Move 32 bits
-SMPDefsFlags[NN_movq] = false; // Move 64 bits
-SMPDefsFlags[NN_packsswb] = false; // Pack with Signed Saturation (Word->Byte)
-SMPDefsFlags[NN_packssdw] = false; // Pack with Signed Saturation (Dword->Word)
-SMPDefsFlags[NN_packuswb] = false; // Pack with Unsigned Saturation (Word->Byte)
-SMPDefsFlags[NN_paddb] = false; // Packed Add Byte
-SMPDefsFlags[NN_paddw] = false; // Packed Add Word
-SMPDefsFlags[NN_paddd] = false; // Packed Add Dword
-SMPDefsFlags[NN_paddsb] = false; // Packed Add with Saturation (Byte)
-SMPDefsFlags[NN_paddsw] = false; // Packed Add with Saturation (Word)
-SMPDefsFlags[NN_paddusb] = false; // Packed Add Unsigned with Saturation (Byte)
-SMPDefsFlags[NN_paddusw] = false; // Packed Add Unsigned with Saturation (Word)
-SMPDefsFlags[NN_pand] = false; // Bitwise Logical And
-SMPDefsFlags[NN_pandn] = false; // Bitwise Logical And Not
-SMPDefsFlags[NN_pcmpeqb] = false; // Packed Compare for Equal (Byte)
-SMPDefsFlags[NN_pcmpeqw] = false; // Packed Compare for Equal (Word)
-SMPDefsFlags[NN_pcmpeqd] = false; // Packed Compare for Equal (Dword)
-SMPDefsFlags[NN_pcmpgtb] = false; // Packed Compare for Greater Than (Byte)
-SMPDefsFlags[NN_pcmpgtw] = false; // Packed Compare for Greater Than (Word)
-SMPDefsFlags[NN_pcmpgtd] = false; // Packed Compare for Greater Than (Dword)
-SMPDefsFlags[NN_pmaddwd] = false; // Packed Multiply and Add
-SMPDefsFlags[NN_pmulhw] = false; // Packed Multiply High
-SMPDefsFlags[NN_pmullw] = false; // Packed Multiply Low
-SMPDefsFlags[NN_por] = false; // Bitwise Logical Or
-SMPDefsFlags[NN_psllw] = false; // Packed Shift Left Logical (Word)
-SMPDefsFlags[NN_pslld] = false; // Packed Shift Left Logical (Dword)
-SMPDefsFlags[NN_psllq] = false; // Packed Shift Left Logical (Qword)
-SMPDefsFlags[NN_psraw] = false; // Packed Shift Right Arithmetic (Word)
-SMPDefsFlags[NN_psrad] = false; // Packed Shift Right Arithmetic (Dword)
-SMPDefsFlags[NN_psrlw] = false; // Packed Shift Right Logical (Word)
-SMPDefsFlags[NN_psrld] = false; // Packed Shift Right Logical (Dword)
-SMPDefsFlags[NN_psrlq] = false; // Packed Shift Right Logical (Qword)
-SMPDefsFlags[NN_psubb] = false; // Packed Subtract Byte
-SMPDefsFlags[NN_psubw] = false; // Packed Subtract Word
-SMPDefsFlags[NN_psubd] = false; // Packed Subtract Dword
-SMPDefsFlags[NN_psubsb] = false; // Packed Subtract with Saturation (Byte)
-SMPDefsFlags[NN_psubsw] = false; // Packed Subtract with Saturation (Word)
-SMPDefsFlags[NN_psubusb] = false; // Packed Subtract Unsigned with Saturation (Byte)
-SMPDefsFlags[NN_psubusw] = false; // Packed Subtract Unsigned with Saturation (Word)
-SMPDefsFlags[NN_punpckhbw] = false; // Unpack High Packed Data (Byte->Word)
-SMPDefsFlags[NN_punpckhwd] = false; // Unpack High Packed Data (Word->Dword)
-SMPDefsFlags[NN_punpckhdq] = false; // Unpack High Packed Data (Dword->Qword)
-SMPDefsFlags[NN_punpcklbw] = false; // Unpack Low Packed Data (Byte->Word)
-SMPDefsFlags[NN_punpcklwd] = false; // Unpack Low Packed Data (Word->Dword)
-SMPDefsFlags[NN_punpckldq] = false; // Unpack Low Packed Data (Dword->Qword)
-SMPDefsFlags[NN_pxor] = false; // Bitwise Logical Exclusive Or
-
-//
-// Undocumented Deschutes processor instructions
-//
-
-SMPDefsFlags[NN_fxsave] = false; // Fast save FP context
-SMPDefsFlags[NN_fxrstor] = false; // Fast restore FP context
-
-// Pentium II instructions
-
-SMPDefsFlags[NN_sysexit] = false; // Fast Transition from System Call Entry Point
-
-// 3DNow! instructions
-
-SMPDefsFlags[NN_pavgusb] = false; // Packed 8-bit Unsigned Integer Averaging
-SMPDefsFlags[NN_pfadd] = false; // Packed Floating-Point Addition
-SMPDefsFlags[NN_pfsub] = false; // Packed Floating-Point Subtraction
-SMPDefsFlags[NN_pfsubr] = false; // Packed Floating-Point Reverse Subtraction
-SMPDefsFlags[NN_pfacc] = false; // Packed Floating-Point Accumulate
-SMPDefsFlags[NN_pfcmpge] = false; // Packed Floating-Point Comparison, Greater or Equal
-SMPDefsFlags[NN_pfcmpgt] = false; // Packed Floating-Point Comparison, Greater
-SMPDefsFlags[NN_pfcmpeq] = false; // Packed Floating-Point Comparison, Equal
-SMPDefsFlags[NN_pfmin] = false; // Packed Floating-Point Minimum
-SMPDefsFlags[NN_pfmax] = false; // Packed Floating-Point Maximum
-SMPDefsFlags[NN_pi2fd] = false; // Packed 32-bit Integer to Floating-Point
-SMPDefsFlags[NN_pf2id] = false; // Packed Floating-Point to 32-bit Integer
-SMPDefsFlags[NN_pfrcp] = false; // Packed Floating-Point Reciprocal Approximation
-SMPDefsFlags[NN_pfrsqrt] = false; // Packed Floating-Point Reciprocal Square Root Approximation
-SMPDefsFlags[NN_pfmul] = false; // Packed Floating-Point Multiplication
-SMPDefsFlags[NN_pfrcpit1] = false; // Packed Floating-Point Reciprocal First Iteration Step
-SMPDefsFlags[NN_pfrsqit1] = false; // Packed Floating-Point Reciprocal Square Root First Iteration Step
-SMPDefsFlags[NN_pfrcpit2] = false; // Packed Floating-Point Reciprocal Second Iteration Step
-SMPDefsFlags[NN_pmulhrw] = false; // Packed Floating-Point 16-bit Integer Multiply with rounding
-SMPDefsFlags[NN_femms] = false; // Faster entry/exit of the MMX or floating-point state
-SMPDefsFlags[NN_prefetch] = false; // Prefetch at least a 32-byte line into L1 data cache
-SMPDefsFlags[NN_prefetchw] = false; // Prefetch processor cache line into L1 data cache (mark as modified)
-
-
-// Pentium III instructions
-
-SMPDefsFlags[NN_addps] = false; // Packed Single-FP Add
-SMPDefsFlags[NN_addss] = false; // Scalar Single-FP Add
-SMPDefsFlags[NN_andnps] = false; // Bitwise Logical And Not for Single-FP
-SMPDefsFlags[NN_andps] = false; // Bitwise Logical And for Single-FP
-SMPDefsFlags[NN_cmpps] = false; // Packed Single-FP Compare
-SMPDefsFlags[NN_cmpss] = false; // Scalar Single-FP Compare
-SMPDefsFlags[NN_cvtpi2ps] = false; // Packed signed INT32 to Packed Single-FP conversion
-SMPDefsFlags[NN_cvtps2pi] = false; // Packed Single-FP to Packed INT32 conversion
-SMPDefsFlags[NN_cvtsi2ss] = false; // Scalar signed INT32 to Single-FP conversion
-SMPDefsFlags[NN_cvtss2si] = false; // Scalar Single-FP to signed INT32 conversion
-SMPDefsFlags[NN_cvttps2pi] = false; // Packed Single-FP to Packed INT32 conversion (truncate)
-SMPDefsFlags[NN_cvttss2si] = false; // Scalar Single-FP to signed INT32 conversion (truncate)
-SMPDefsFlags[NN_divps] = false; // Packed Single-FP Divide
-SMPDefsFlags[NN_divss] = false; // Scalar Single-FP Divide
-SMPDefsFlags[NN_ldmxcsr] = false; // Load Streaming SIMD Extensions Technology Control/Status Register
-SMPDefsFlags[NN_maxps] = false; // Packed Single-FP Maximum
-SMPDefsFlags[NN_maxss] = false; // Scalar Single-FP Maximum
-SMPDefsFlags[NN_minps] = false; // Packed Single-FP Minimum
-SMPDefsFlags[NN_minss] = false; // Scalar Single-FP Minimum
-SMPDefsFlags[NN_movaps] = false; // Move Aligned Four Packed Single-FP
-SMPDefsFlags[NN_movhlps] = false; // Move High to Low Packed Single-FP
-SMPDefsFlags[NN_movhps] = false; // Move High Packed Single-FP
-SMPDefsFlags[NN_movlhps] = false; // Move Low to High Packed Single-FP
-SMPDefsFlags[NN_movlps] = false; // Move Low Packed Single-FP
-SMPDefsFlags[NN_movmskps] = false; // Move Mask to Register
-SMPDefsFlags[NN_movss] = false; // Move Scalar Single-FP
-SMPDefsFlags[NN_movups] = false; // Move Unaligned Four Packed Single-FP
-SMPDefsFlags[NN_mulps] = false; // Packed Single-FP Multiply
-SMPDefsFlags[NN_mulss] = false; // Scalar Single-FP Multiply
-SMPDefsFlags[NN_orps] = false; // Bitwise Logical OR for Single-FP Data
-SMPDefsFlags[NN_rcpps] = false; // Packed Single-FP Reciprocal
-SMPDefsFlags[NN_rcpss] = false; // Scalar Single-FP Reciprocal
-SMPDefsFlags[NN_rsqrtps] = false; // Packed Single-FP Square Root Reciprocal
-SMPDefsFlags[NN_rsqrtss] = false; // Scalar Single-FP Square Root Reciprocal
-SMPDefsFlags[NN_shufps] = false; // Shuffle Single-FP
-SMPDefsFlags[NN_sqrtps] = false; // Packed Single-FP Square Root
-SMPDefsFlags[NN_sqrtss] = false; // Scalar Single-FP Square Root
-SMPDefsFlags[NN_stmxcsr] = false; // Store Streaming SIMD Extensions Technology Control/Status Register
-SMPDefsFlags[NN_subps] = false; // Packed Single-FP Subtract
-SMPDefsFlags[NN_subss] = false; // Scalar Single-FP Subtract
-SMPDefsFlags[NN_unpckhps] = false; // Unpack High Packed Single-FP Data
-SMPDefsFlags[NN_unpcklps] = false; // Unpack Low Packed Single-FP Data
-SMPDefsFlags[NN_xorps] = false; // Bitwise Logical XOR for Single-FP Data
-SMPDefsFlags[NN_pavgb] = false; // Packed Average (Byte)
-SMPDefsFlags[NN_pavgw] = false; // Packed Average (Word)
-SMPDefsFlags[NN_pextrw] = false; // Extract Word
-SMPDefsFlags[NN_pinsrw] = false; // Insert Word
-SMPDefsFlags[NN_pmaxsw] = false; // Packed Signed Integer Word Maximum
-SMPDefsFlags[NN_pmaxub] = false; // Packed Unsigned Integer Byte Maximum
-SMPDefsFlags[NN_pminsw] = false; // Packed Signed Integer Word Minimum
-SMPDefsFlags[NN_pminub] = false; // Packed Unsigned Integer Byte Minimum
-SMPDefsFlags[NN_pmovmskb] = false; // Move Byte Mask to Integer
-SMPDefsFlags[NN_pmulhuw] = false; // Packed Multiply High Unsigned
-SMPDefsFlags[NN_psadbw] = false; // Packed Sum of Absolute Differences
-SMPDefsFlags[NN_pshufw] = false; // Packed Shuffle Word
-SMPDefsFlags[NN_maskmovq] = false; // Byte Mask write
-SMPDefsFlags[NN_movntps] = false; // Move Aligned Four Packed Single-FP Non Temporal
-SMPDefsFlags[NN_movntq] = false; // Move 64 Bits Non Temporal
-SMPDefsFlags[NN_prefetcht0] = false; // Prefetch to all cache levels
-SMPDefsFlags[NN_prefetcht1] = false; // Prefetch to all cache levels
-SMPDefsFlags[NN_prefetcht2] = false; // Prefetch to L2 cache
-SMPDefsFlags[NN_prefetchnta] = false; // Prefetch to L1 cache
-SMPDefsFlags[NN_sfence] = false; // Store Fence
-
-// Pentium III Pseudo instructions
-
-SMPDefsFlags[NN_cmpeqps] = false; // Packed Single-FP Compare EQ
-SMPDefsFlags[NN_cmpltps] = false; // Packed Single-FP Compare LT
-SMPDefsFlags[NN_cmpleps] = false; // Packed Single-FP Compare LE
-SMPDefsFlags[NN_cmpunordps] = false; // Packed Single-FP Compare UNORD
-SMPDefsFlags[NN_cmpneqps] = false; // Packed Single-FP Compare NOT EQ
-SMPDefsFlags[NN_cmpnltps] = false; // Packed Single-FP Compare NOT LT
-SMPDefsFlags[NN_cmpnleps] = false; // Packed Single-FP Compare NOT LE
-SMPDefsFlags[NN_cmpordps] = false; // Packed Single-FP Compare ORDERED
-SMPDefsFlags[NN_cmpeqss] = false; // Scalar Single-FP Compare EQ
-SMPDefsFlags[NN_cmpltss] = false; // Scalar Single-FP Compare LT
-SMPDefsFlags[NN_cmpless] = false; // Scalar Single-FP Compare LE
-SMPDefsFlags[NN_cmpunordss] = false; // Scalar Single-FP Compare UNORD
-SMPDefsFlags[NN_cmpneqss] = false; // Scalar Single-FP Compare NOT EQ
-SMPDefsFlags[NN_cmpnltss] = false; // Scalar Single-FP Compare NOT LT
-SMPDefsFlags[NN_cmpnless] = false; // Scalar Single-FP Compare NOT LE
-SMPDefsFlags[NN_cmpordss] = false; // Scalar Single-FP Compare ORDERED
-
-// AMD K7 instructions
-
-// Revisit AMD if we port to it.
-SMPDefsFlags[NN_pf2iw] = false; // Packed Floating-Point to Integer with Sign Extend
-SMPDefsFlags[NN_pfnacc] = false; // Packed Floating-Point Negative Accumulate
-SMPDefsFlags[NN_pfpnacc] = false; // Packed Floating-Point Mixed Positive-Negative Accumulate
-SMPDefsFlags[NN_pi2fw] = false; // Packed 16-bit Integer to Floating-Point
-SMPDefsFlags[NN_pswapd] = false; // Packed Swap Double Word
-
-// Undocumented FP instructions (thanks to norbert.juffa@adm.com)
-
-SMPDefsFlags[NN_fstp1] = false; // Alias of Store Real and Pop
-SMPDefsFlags[NN_fxch4] = false; // Alias of Exchange Registers
-SMPDefsFlags[NN_ffreep] = false; // Free Register and Pop
-SMPDefsFlags[NN_fxch7] = false; // Alias of Exchange Registers
-SMPDefsFlags[NN_fstp8] = false; // Alias of Store Real and Pop
-SMPDefsFlags[NN_fstp9] = false; // Alias of Store Real and Pop
-
-// Pentium 4 instructions
-
-SMPDefsFlags[NN_addpd] = false; // Add Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_addsd] = false; // Add Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_andnpd] = false; // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_andpd] = false; // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_clflush] = false; // Flush Cache Line
-SMPDefsFlags[NN_cmppd] = false; // Compare Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_cmpsd] = false; // Compare Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_cvtdq2pd] = false; // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_cvtdq2ps] = false; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_cvtpd2dq] = false; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
-SMPDefsFlags[NN_cvtpd2pi] = false; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
-SMPDefsFlags[NN_cvtpd2ps] = false; // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_cvtpi2pd] = false; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_cvtps2dq] = false; // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
-SMPDefsFlags[NN_cvtps2pd] = false; // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_cvtsd2si] = false; // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
-SMPDefsFlags[NN_cvtsd2ss] = false; // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
-SMPDefsFlags[NN_cvtsi2sd] = false; // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
-SMPDefsFlags[NN_cvtss2sd] = false; // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
-SMPDefsFlags[NN_cvttpd2dq] = false; // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
-SMPDefsFlags[NN_cvttpd2pi] = false; // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
-SMPDefsFlags[NN_cvttps2dq] = false; // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
-SMPDefsFlags[NN_cvttsd2si] = false; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
-SMPDefsFlags[NN_divpd] = false; // Divide Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_divsd] = false; // Divide Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_lfence] = false; // Load Fence
-SMPDefsFlags[NN_maskmovdqu] = false; // Store Selected Bytes of Double Quadword
-SMPDefsFlags[NN_maxpd] = false; // Return Maximum Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_maxsd] = false; // Return Maximum Scalar Double-Precision Floating-Point Value
-SMPDefsFlags[NN_mfence] = false; // Memory Fence
-SMPDefsFlags[NN_minpd] = false; // Return Minimum Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_minsd] = false; // Return Minimum Scalar Double-Precision Floating-Point Value
-SMPDefsFlags[NN_movapd] = false; // Move Aligned Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_movdq2q] = false; // Move Quadword from XMM to MMX Register
-SMPDefsFlags[NN_movdqa] = false; // Move Aligned Double Quadword
-SMPDefsFlags[NN_movdqu] = false; // Move Unaligned Double Quadword
-SMPDefsFlags[NN_movhpd] = false; // Move High Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_movlpd] = false; // Move Low Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_movmskpd] = false; // Extract Packed Double-Precision Floating-Point Sign Mask
-SMPDefsFlags[NN_movntdq] = false; // Store Double Quadword Using Non-Temporal Hint
-SMPDefsFlags[NN_movnti] = false; // Store Doubleword Using Non-Temporal Hint
-SMPDefsFlags[NN_movntpd] = false; // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
-SMPDefsFlags[NN_movq2dq] = false; // Move Quadword from MMX to XMM Register
-SMPDefsFlags[NN_movsd] = false; // Move Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_movupd] = false; // Move Unaligned Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_mulpd] = false; // Multiply Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_mulsd] = false; // Multiply Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_orpd] = false; // Bitwise Logical OR of Double-Precision Floating-Point Values
-SMPDefsFlags[NN_paddq] = false; // Add Packed Quadword Integers
-SMPDefsFlags[NN_pause] = false; // Spin Loop Hint
-SMPDefsFlags[NN_pmuludq] = false; // Multiply Packed Unsigned Doubleword Integers
-SMPDefsFlags[NN_pshufd] = false; // Shuffle Packed Doublewords
-SMPDefsFlags[NN_pshufhw] = false; // Shuffle Packed High Words
-SMPDefsFlags[NN_pshuflw] = false; // Shuffle Packed Low Words
-SMPDefsFlags[NN_pslldq] = false; // Shift Double Quadword Left Logical
-SMPDefsFlags[NN_psrldq] = false; // Shift Double Quadword Right Logical
-SMPDefsFlags[NN_psubq] = false; // Subtract Packed Quadword Integers
-SMPDefsFlags[NN_punpckhqdq] = false; // Unpack High Data
-SMPDefsFlags[NN_punpcklqdq] = false; // Unpack Low Data
-SMPDefsFlags[NN_shufpd] = false; // Shuffle Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_sqrtpd] = false; // Compute Square Roots of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_sqrtsd] = false; // Compute Square Rootof Scalar Double-Precision Floating-Point Value
-SMPDefsFlags[NN_subpd] = false; // Subtract Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_subsd] = false; // Subtract Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_unpckhpd] = false; // Unpack and Interleave High Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_unpcklpd] = false; // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_xorpd] = false; // Bitwise Logical OR of Double-Precision Floating-Point Values
-
-
-// AMD syscall/sysret instructions NOTE: not AMD, found in Intel manual
-
-
-// AMD64 instructions NOTE: not AMD, found in Intel manual
-
-SMPDefsFlags[NN_swapgs] = false; // Exchange GS base with KernelGSBase MSR
-
-// New Pentium instructions (SSE3)
-
-SMPDefsFlags[NN_movddup] = false; // Move One Double-FP and Duplicate
-SMPDefsFlags[NN_movshdup] = false; // Move Packed Single-FP High and Duplicate
-SMPDefsFlags[NN_movsldup] = false; // Move Packed Single-FP Low and Duplicate
-
-// Missing AMD64 instructions NOTE: also found in Intel manual
-
-SMPDefsFlags[NN_movsxd] = false; // Move with Sign-Extend Doubleword
-
-// SSE3 instructions
-
-SMPDefsFlags[NN_addsubpd] = false; // Add /Sub packed DP FP numbers
-SMPDefsFlags[NN_addsubps] = false; // Add /Sub packed SP FP numbers
-SMPDefsFlags[NN_haddpd] = false; // Add horizontally packed DP FP numbers
-SMPDefsFlags[NN_haddps] = false; // Add horizontally packed SP FP numbers
-SMPDefsFlags[NN_hsubpd] = false; // Sub horizontally packed DP FP numbers
-SMPDefsFlags[NN_hsubps] = false; // Sub horizontally packed SP FP numbers
-SMPDefsFlags[NN_monitor] = false; // Set up a linear address range to be monitored by hardware
-SMPDefsFlags[NN_mwait] = false; // Wait until write-back store performed within the range specified by the MONITOR instruction
-SMPDefsFlags[NN_fisttp] = false; // Store ST in intXX (chop) and pop
-SMPDefsFlags[NN_lddqu] = false; // Load unaligned integer 128-bit
-
-// SSSE3 instructions
-
-SMPDefsFlags[NN_psignb] = false; // Packed SIGN Byte
-SMPDefsFlags[NN_psignw] = false; // Packed SIGN Word
-SMPDefsFlags[NN_psignd] = false; // Packed SIGN Doubleword
-SMPDefsFlags[NN_pshufb] = false; // Packed Shuffle Bytes
-SMPDefsFlags[NN_pmulhrsw] = false; // Packed Multiply High with Round and Scale
-SMPDefsFlags[NN_pmaddubsw] = false; // Multiply and Add Packed Signed and Unsigned Bytes
-SMPDefsFlags[NN_phsubsw] = false; // Packed Horizontal Subtract and Saturate
-SMPDefsFlags[NN_phaddsw] = false; // Packed Horizontal Add and Saturate
-SMPDefsFlags[NN_phaddw] = false; // Packed Horizontal Add Word
-SMPDefsFlags[NN_phaddd] = false; // Packed Horizontal Add Doubleword
-SMPDefsFlags[NN_phsubw] = false; // Packed Horizontal Subtract Word
-SMPDefsFlags[NN_phsubd] = false; // Packed Horizontal Subtract Doubleword
-SMPDefsFlags[NN_palignr] = false; // Packed Align Right
-SMPDefsFlags[NN_pabsb] = false; // Packed Absolute Value Byte
-SMPDefsFlags[NN_pabsw] = false; // Packed Absolute Value Word
-SMPDefsFlags[NN_pabsd] = false; // Packed Absolute Value Doubleword
-
-// VMX instructions
-
-#if 599 < IDA_SDK_VERSION
-
-SMPDefsFlags[NN_ud2] = false; // Undefined Instruction
-
-// Added with x86-64
-
-SMPDefsFlags[NN_rdtscp] = false; // Read Time-Stamp Counter and Processor ID
-
-// Geode LX 3DNow! extensions
-
-SMPDefsFlags[NN_pfrcpv] = false; // Reciprocal Approximation for a Pair of 32-bit Floats
-SMPDefsFlags[NN_pfrsqrtv] = false; // Reciprocal Square Root Approximation for a Pair of 32-bit Floats
-
-// SSE2 pseudoinstructions
-
-SMPDefsFlags[NN_cmpeqpd] = false; // Packed Double-FP Compare EQ
-SMPDefsFlags[NN_cmpltpd] = false; // Packed Double-FP Compare LT
-SMPDefsFlags[NN_cmplepd] = false; // Packed Double-FP Compare LE
-SMPDefsFlags[NN_cmpunordpd] = false; // Packed Double-FP Compare UNORD
-SMPDefsFlags[NN_cmpneqpd] = false; // Packed Double-FP Compare NOT EQ
-SMPDefsFlags[NN_cmpnltpd] = false; // Packed Double-FP Compare NOT LT
-SMPDefsFlags[NN_cmpnlepd] = false; // Packed Double-FP Compare NOT LE
-SMPDefsFlags[NN_cmpordpd] = false; // Packed Double-FP Compare ORDERED
-SMPDefsFlags[NN_cmpeqsd] = false; // Scalar Double-FP Compare EQ
-SMPDefsFlags[NN_cmpltsd] = false; // Scalar Double-FP Compare LT
-SMPDefsFlags[NN_cmplesd] = false; // Scalar Double-FP Compare LE
-SMPDefsFlags[NN_cmpunordsd] = false; // Scalar Double-FP Compare UNORD
-SMPDefsFlags[NN_cmpneqsd] = false; // Scalar Double-FP Compare NOT EQ
-SMPDefsFlags[NN_cmpnltsd] = false; // Scalar Double-FP Compare NOT LT
-SMPDefsFlags[NN_cmpnlesd] = false; // Scalar Double-FP Compare NOT LE
-SMPDefsFlags[NN_cmpordsd] = false; // Scalar Double-FP Compare ORDERED
-
-// SSSE4.1 instructions
-
-SMPDefsFlags[NN_blendpd] = false; // Blend Packed Double Precision Floating-Point Values
-SMPDefsFlags[NN_blendps] = false; // Blend Packed Single Precision Floating-Point Values
-SMPDefsFlags[NN_blendvpd] = false; // Variable Blend Packed Double Precision Floating-Point Values
-SMPDefsFlags[NN_blendvps] = false; // Variable Blend Packed Single Precision Floating-Point Values
-SMPDefsFlags[NN_dppd] = false; // Dot Product of Packed Double Precision Floating-Point Values
-SMPDefsFlags[NN_dpps] = false; // Dot Product of Packed Single Precision Floating-Point Values
-SMPDefsFlags[NN_extractps] = 2; // Extract Packed Single Precision Floating-Point Value
-SMPDefsFlags[NN_insertps] = false; // Insert Packed Single Precision Floating-Point Value
-SMPDefsFlags[NN_movntdqa] = false; // Load Double Quadword Non-Temporal Aligned Hint
-SMPDefsFlags[NN_mpsadbw] = false; // Compute Multiple Packed Sums of Absolute Difference
-SMPDefsFlags[NN_packusdw] = false; // Pack with Unsigned Saturation
-SMPDefsFlags[NN_pblendvb] = false; // Variable Blend Packed Bytes
-SMPDefsFlags[NN_pblendw] = false; // Blend Packed Words
-SMPDefsFlags[NN_pcmpeqq] = false; // Compare Packed Qword Data for Equal
-SMPDefsFlags[NN_pextrb] = false; // Extract Byte
-SMPDefsFlags[NN_pextrd] = false; // Extract Dword
-SMPDefsFlags[NN_pextrq] = false; // Extract Qword
-SMPDefsFlags[NN_phminposuw] = false; // Packed Horizontal Word Minimum
-SMPDefsFlags[NN_pinsrb] = false; // Insert Byte
-SMPDefsFlags[NN_pinsrd] = false; // Insert Dword
-SMPDefsFlags[NN_pinsrq] = false; // Insert Qword
-SMPDefsFlags[NN_pmaxsb] = false; // Maximum of Packed Signed Byte Integers
-SMPDefsFlags[NN_pmaxsd] = false; // Maximum of Packed Signed Dword Integers
-SMPDefsFlags[NN_pmaxud] = false; // Maximum of Packed Unsigned Dword Integers
-SMPDefsFlags[NN_pmaxuw] = false; // Maximum of Packed Word Integers
-SMPDefsFlags[NN_pminsb] = false; // Minimum of Packed Signed Byte Integers
-SMPDefsFlags[NN_pminsd] = false; // Minimum of Packed Signed Dword Integers
-SMPDefsFlags[NN_pminud] = false; // Minimum of Packed Unsigned Dword Integers
-SMPDefsFlags[NN_pminuw] = false; // Minimum of Packed Word Integers
-SMPDefsFlags[NN_pmovsxbw] = false; // Packed Move with Sign Extend
-SMPDefsFlags[NN_pmovsxbd] = false; // Packed Move with Sign Extend
-SMPDefsFlags[NN_pmovsxbq] = false; // Packed Move with Sign Extend
-SMPDefsFlags[NN_pmovsxwd] = false; // Packed Move with Sign Extend
-SMPDefsFlags[NN_pmovsxwq] = false; // Packed Move with Sign Extend
-SMPDefsFlags[NN_pmovsxdq] = false; // Packed Move with Sign Extend
-SMPDefsFlags[NN_pmovzxbw] = false; // Packed Move with Zero Extend
-SMPDefsFlags[NN_pmovzxbd] = false; // Packed Move with Zero Extend
-SMPDefsFlags[NN_pmovzxbq] = false; // Packed Move with Zero Extend
-SMPDefsFlags[NN_pmovzxwd] = false; // Packed Move with Zero Extend
-SMPDefsFlags[NN_pmovzxwq] = false; // Packed Move with Zero Extend
-SMPDefsFlags[NN_pmovzxdq] = false; // Packed Move with Zero Extend
-SMPDefsFlags[NN_pmuldq] = false; // Multiply Packed Signed Dword Integers
-SMPDefsFlags[NN_pmulld] = false; // Multiply Packed Signed Dword Integers and Store Low Result
-SMPDefsFlags[NN_roundpd] = false; // Round Packed Double Precision Floating-Point Values
-SMPDefsFlags[NN_roundps] = false; // Round Packed Single Precision Floating-Point Values
-SMPDefsFlags[NN_roundsd] = false; // Round Scalar Double Precision Floating-Point Values
-SMPDefsFlags[NN_roundss] = false; // Round Scalar Single Precision Floating-Point Values
-
-// SSSE4.2 instructions
-SMPDefsFlags[NN_crc32] = false; // Accumulate CRC32 Value
-SMPDefsFlags[NN_pcmpgtq] = false; // Compare Packed Data for Greater Than
-
-// AMD SSE4a instructions
-
-SMPDefsFlags[NN_extrq] = false; // Extract Field From Register
-SMPDefsFlags[NN_insertq] = false; // Insert Field
-SMPDefsFlags[NN_movntsd] = false; // Move Non-Temporal Scalar Double-Precision Floating-Point
-SMPDefsFlags[NN_movntss] = false; // Move Non-Temporal Scalar Single-Precision Floating-Point
-
-// xsave/xrstor instructions
-
-SMPDefsFlags[NN_xgetbv] = false; // Get Value of Extended Control Register
-SMPDefsFlags[NN_xrstor] = false; // Restore Processor Extended States
-SMPDefsFlags[NN_xsave] = false; // Save Processor Extended States
-SMPDefsFlags[NN_xsetbv] = false; // Set Value of Extended Control Register
-
-// Intel Safer Mode Extensions (SMX)
-
-// AMD-V Virtualization ISA Extension
-
-SMPDefsFlags[NN_invlpga] = false; // Invalidate TLB Entry in a Specified ASID
-SMPDefsFlags[NN_skinit] = false; // Secure Init and Jump with Attestation
-SMPDefsFlags[NN_vmexit] = false; // Stop Executing Guest, Begin Executing Host
-SMPDefsFlags[NN_vmload] = false; // Load State from VMCB
-SMPDefsFlags[NN_vmmcall] = false; // Call VMM
-SMPDefsFlags[NN_vmrun] = false; // Run Virtual Machine
-SMPDefsFlags[NN_vmsave] = false; // Save State to VMCB
-
-// VMX+ instructions
-
-SMPDefsFlags[NN_invept] = false; // Invalidate Translations Derived from EPT
-SMPDefsFlags[NN_invvpid] = false; // Invalidate Translations Based on VPID
-
-// Intel Atom instructions
-
-SMPDefsFlags[NN_movbe] = false; // Move Data After Swapping Bytes
-
-// Intel AES instructions
-
-SMPDefsFlags[NN_aesenc] = false; // Perform One Round of an AES Encryption Flow
-SMPDefsFlags[NN_aesenclast] = false; // Perform the Last Round of an AES Encryption Flow
-SMPDefsFlags[NN_aesdec] = false; // Perform One Round of an AES Decryption Flow
-SMPDefsFlags[NN_aesdeclast] = false; // Perform the Last Round of an AES Decryption Flow
-SMPDefsFlags[NN_aesimc] = false; // Perform the AES InvMixColumn Transformation
-SMPDefsFlags[NN_aeskeygenassist] = false; // AES Round Key Generation Assist
-
-// Carryless multiplication
-
-SMPDefsFlags[NN_pclmulqdq] = false; // Carry-Less Multiplication Quadword
-
-// Returns modified by operand size prefixes
-
-SMPDefsFlags[NN_retnw] = false; // Return Near from Procedure (use16)
-SMPDefsFlags[NN_retnd] = false; // Return Near from Procedure (use32)
-SMPDefsFlags[NN_retnq] = false; // Return Near from Procedure (use64)
-SMPDefsFlags[NN_retfw] = false; // Return Far from Procedure (use16)
-SMPDefsFlags[NN_retfd] = false; // Return Far from Procedure (use32)
-SMPDefsFlags[NN_retfq] = false; // Return Far from Procedure (use64)
-
-// RDRAND support
-
-// new GPR instructions
-
-SMPDefsFlags[NN_mulx] = false; // Unsigned Multiply Without Affecting Flags
-SMPDefsFlags[NN_pdep] = false; // Parallel Bits Deposit
-SMPDefsFlags[NN_pext] = false; // Parallel Bits Extract
-SMPDefsFlags[NN_rorx] = false; // Rotate Right Logical Without Affecting Flags
-SMPDefsFlags[NN_sarx] = false; // Shift Arithmetically Right Without Affecting Flags
-SMPDefsFlags[NN_shlx] = false; // Shift Logically Left Without Affecting Flags
-SMPDefsFlags[NN_shrx] = false; // Shift Logically Right Without Affecting Flags
-
-SMPDefsFlags[NN_xsaveopt] = false; // Save Processor Extended States Optimized
-SMPDefsFlags[NN_invpcid] = false; // Invalidate Processor Context ID
-SMPDefsFlags[NN_rdseed] = false; // Read Random Seed
-SMPDefsFlags[NN_rdfsbase] = false; // Read FS Segment Base
-SMPDefsFlags[NN_rdgsbase] = false; // Read GS Segment Base
-SMPDefsFlags[NN_wrfsbase] = false; // Write FS Segment Base
-SMPDefsFlags[NN_wrgsbase] = false; // Write GS Segment Base
-
-// new AVX instructions
-
-SMPDefsFlags[NN_vaddpd] = false; // Add Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vaddps] = false; // Packed Single-FP Add
-SMPDefsFlags[NN_vaddsd] = false; // Add Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vaddss] = false; // Scalar Single-FP Add
-SMPDefsFlags[NN_vaddsubpd] = false; // Add /Sub packed DP FP numbers
-SMPDefsFlags[NN_vaddsubps] = false; // Add /Sub packed SP FP numbers
-SMPDefsFlags[NN_vaesdec] = false; // Perform One Round of an AES Decryption Flow
-SMPDefsFlags[NN_vaesdeclast] = false; // Perform the Last Round of an AES Decryption Flow
-SMPDefsFlags[NN_vaesenc] = false; // Perform One Round of an AES Encryption Flow
-SMPDefsFlags[NN_vaesenclast] = false; // Perform the Last Round of an AES Encryption Flow
-SMPDefsFlags[NN_vaesimc] = false; // Perform the AES InvMixColumn Transformation
-SMPDefsFlags[NN_vaeskeygenassist] = false; // AES Round Key Generation Assist
-SMPDefsFlags[NN_vandnpd] = false; // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vandnps] = false; // Bitwise Logical And Not for Single-FP
-SMPDefsFlags[NN_vandpd] = false; // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vandps] = false; // Bitwise Logical And for Single-FP
-SMPDefsFlags[NN_vblendpd] = false; // Blend Packed Double Precision Floating-Point Values
-SMPDefsFlags[NN_vblendps] = false; // Blend Packed Single Precision Floating-Point Values
-SMPDefsFlags[NN_vblendvpd] = false; // Variable Blend Packed Double Precision Floating-Point Values
-SMPDefsFlags[NN_vblendvps] = false; // Variable Blend Packed Single Precision Floating-Point Values
-SMPDefsFlags[NN_vbroadcastf128] = false; // Broadcast 128 Bits of Floating-Point Data
-SMPDefsFlags[NN_vbroadcasti128] = false; // Broadcast 128 Bits of Integer Data
-SMPDefsFlags[NN_vbroadcastsd] = false; // Broadcast Double-Precision Floating-Point Element
-SMPDefsFlags[NN_vbroadcastss] = false; // Broadcast Single-Precision Floating-Point Element
-SMPDefsFlags[NN_vcmppd] = false; // Compare Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vcmpps] = false; // Packed Single-FP Compare
-SMPDefsFlags[NN_vcmpsd] = false; // Compare Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vcmpss] = false; // Scalar Single-FP Compare
-SMPDefsFlags[NN_vcomisd] = false; // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
-SMPDefsFlags[NN_vcomiss] = false; // Scalar Ordered Single-FP Compare and Set EFLAGS
-SMPDefsFlags[NN_vcvtdq2pd] = false; // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vcvtdq2ps] = false; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vcvtpd2dq] = false; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
-SMPDefsFlags[NN_vcvtpd2ps] = false; // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vcvtph2ps] = false; // Convert 16-bit FP Values to Single-Precision FP Values
-SMPDefsFlags[NN_vcvtps2dq] = false; // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
-SMPDefsFlags[NN_vcvtps2pd] = false; // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vcvtps2ph] = false; // Convert Single-Precision FP value to 16-bit FP value
-SMPDefsFlags[NN_vcvtsd2si] = false; // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
-SMPDefsFlags[NN_vcvtsd2ss] = false; // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
-SMPDefsFlags[NN_vcvtsi2sd] = false; // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
-SMPDefsFlags[NN_vcvtsi2ss] = false; // Scalar signed INT32 to Single-FP conversion
-SMPDefsFlags[NN_vcvtss2sd] = false; // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
-SMPDefsFlags[NN_vcvtss2si] = false; // Scalar Single-FP to signed INT32 conversion
-SMPDefsFlags[NN_vcvttpd2dq] = false; // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
-SMPDefsFlags[NN_vcvttps2dq] = false; // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
-SMPDefsFlags[NN_vcvttsd2si] = false; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
-SMPDefsFlags[NN_vcvttss2si] = false; // Scalar Single-FP to signed INT32 conversion (truncate)
-SMPDefsFlags[NN_vdivpd] = false; // Divide Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vdivps] = false; // Packed Single-FP Divide
-SMPDefsFlags[NN_vdivsd] = false; // Divide Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vdivss] = false; // Scalar Single-FP Divide
-SMPDefsFlags[NN_vdppd] = false; // Dot Product of Packed Double Precision Floating-Point Values
-SMPDefsFlags[NN_vdpps] = false; // Dot Product of Packed Single Precision Floating-Point Values
-SMPDefsFlags[NN_vextractf128] = false; // Extract Packed Floating-Point Values
-SMPDefsFlags[NN_vextracti128] = false; // Extract Packed Integer Values
-SMPDefsFlags[NN_vextractps] = false; // Extract Packed Floating-Point Values
-SMPDefsFlags[NN_vfmadd132pd] = false; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmadd132ps] = false; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmadd132sd] = false; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmadd132ss] = false; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmadd213pd] = false; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmadd213ps] = false; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmadd213sd] = false; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmadd213ss] = false; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmadd231pd] = false; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmadd231ps] = false; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmadd231sd] = false; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmadd231ss] = false; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmaddsub132pd] = false; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmaddsub132ps] = false; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmaddsub213pd] = false; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmaddsub213ps] = false; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmaddsub231pd] = false; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmaddsub231ps] = false; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmsub132pd] = false; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmsub132ps] = false; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmsub132sd] = false; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmsub132ss] = false; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmsub213pd] = false; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmsub213ps] = false; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmsub213sd] = false; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmsub213ss] = false; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmsub231pd] = false; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmsub231ps] = false; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmsub231sd] = false; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmsub231ss] = false; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmsubadd132pd] = false; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmsubadd132ps] = false; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmsubadd213pd] = false; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmsubadd213ps] = false; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmsubadd231pd] = false; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfmsubadd231ps] = false; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmadd132pd] = false; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmadd132ps] = false; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmadd132sd] = false; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmadd132ss] = false; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmadd213pd] = false; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmadd213ps] = false; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmadd213sd] = false; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmadd213ss] = false; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmadd231pd] = false; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmadd231ps] = false; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmadd231sd] = false; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmadd231ss] = false; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmsub132pd] = false; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmsub132ps] = false; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmsub132sd] = false; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmsub132ss] = false; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmsub213pd] = false; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmsub213ps] = false; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmsub213sd] = false; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmsub213ss] = false; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmsub231pd] = false; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmsub231ps] = false; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmsub231sd] = false; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vfnmsub231ss] = false; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vgatherdps] = false; // Gather Packed SP FP Values Using Signed Dword Indices
-SMPDefsFlags[NN_vgatherdpd] = false; // Gather Packed DP FP Values Using Signed Dword Indices
-SMPDefsFlags[NN_vgatherqps] = false; // Gather Packed SP FP Values Using Signed Qword Indices
-SMPDefsFlags[NN_vgatherqpd] = false; // Gather Packed DP FP Values Using Signed Qword Indices
-SMPDefsFlags[NN_vhaddpd] = false; // Add horizontally packed DP FP numbers
-SMPDefsFlags[NN_vhaddps] = false; // Add horizontally packed SP FP numbers
-SMPDefsFlags[NN_vhsubpd] = false; // Sub horizontally packed DP FP numbers
-SMPDefsFlags[NN_vhsubps] = false; // Sub horizontally packed SP FP numbers
-SMPDefsFlags[NN_vinsertf128] = false; // Insert Packed Floating-Point Values
-SMPDefsFlags[NN_vinserti128] = false; // Insert Packed Integer Values
-SMPDefsFlags[NN_vinsertps] = false; // Insert Packed Single Precision Floating-Point Value
-SMPDefsFlags[NN_vlddqu] = false; // Load Unaligned Packed Integer Values
-SMPDefsFlags[NN_vldmxcsr] = false; // Load Streaming SIMD Extensions Technology Control/Status Register
-SMPDefsFlags[NN_vmaskmovdqu] = false; // Store Selected Bytes of Double Quadword with NT Hint
-SMPDefsFlags[NN_vmaskmovpd] = false; // Conditionally Load Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vmaskmovps] = false; // Conditionally Load Packed Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vmaxpd] = false; // Return Maximum Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vmaxps] = false; // Packed Single-FP Maximum
-SMPDefsFlags[NN_vmaxsd] = false; // Return Maximum Scalar Double-Precision Floating-Point Value
-SMPDefsFlags[NN_vmaxss] = false; // Scalar Single-FP Maximum
-SMPDefsFlags[NN_vminpd] = false; // Return Minimum Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vminps] = false; // Packed Single-FP Minimum
-SMPDefsFlags[NN_vminsd] = false; // Return Minimum Scalar Double-Precision Floating-Point Value
-SMPDefsFlags[NN_vminss] = false; // Scalar Single-FP Minimum
-SMPDefsFlags[NN_vmovapd] = false; // Move Aligned Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vmovaps] = false; // Move Aligned Four Packed Single-FP
-SMPDefsFlags[NN_vmovd] = false; // Move 32 bits
-SMPDefsFlags[NN_vmovddup] = false; // Move One Double-FP and Duplicate
-SMPDefsFlags[NN_vmovdqa] = false; // Move Aligned Double Quadword
-SMPDefsFlags[NN_vmovdqu] = false; // Move Unaligned Double Quadword
-SMPDefsFlags[NN_vmovhlps] = false; // Move High to Low Packed Single-FP
-SMPDefsFlags[NN_vmovhpd] = false; // Move High Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vmovhps] = false; // Move High Packed Single-FP
-SMPDefsFlags[NN_vmovlhps] = false; // Move Low to High Packed Single-FP
-SMPDefsFlags[NN_vmovlpd] = false; // Move Low Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vmovlps] = false; // Move Low Packed Single-FP
-SMPDefsFlags[NN_vmovmskpd] = false; // Extract Packed Double-Precision Floating-Point Sign Mask
-SMPDefsFlags[NN_vmovmskps] = false; // Move Mask to Register
-SMPDefsFlags[NN_vmovntdq] = false; // Store Double Quadword Using Non-Temporal Hint
-SMPDefsFlags[NN_vmovntdqa] = false; // Load Double Quadword Non-Temporal Aligned Hint
-SMPDefsFlags[NN_vmovntpd] = false; // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
-SMPDefsFlags[NN_vmovntps] = false; // Move Aligned Four Packed Single-FP Non Temporal
-SMPDefsFlags[NN_vmovntsd] = false; // Move Non-Temporal Scalar Double-Precision Floating-Point
-SMPDefsFlags[NN_vmovntss] = false; // Move Non-Temporal Scalar Single-Precision Floating-Point
-SMPDefsFlags[NN_vmovq] = false; // Move 64 bits
-SMPDefsFlags[NN_vmovsd] = false; // Move Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vmovshdup] = false; // Move Packed Single-FP High and Duplicate
-SMPDefsFlags[NN_vmovsldup] = false; // Move Packed Single-FP Low and Duplicate
-SMPDefsFlags[NN_vmovss] = false; // Move Scalar Single-FP
-SMPDefsFlags[NN_vmovupd] = false; // Move Unaligned Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vmovups] = false; // Move Unaligned Four Packed Single-FP
-SMPDefsFlags[NN_vmpsadbw] = false; // Compute Multiple Packed Sums of Absolute Difference
-SMPDefsFlags[NN_vmulpd] = false; // Multiply Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vmulps] = false; // Packed Single-FP Multiply
-SMPDefsFlags[NN_vmulsd] = false; // Multiply Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vmulss] = false; // Scalar Single-FP Multiply
-SMPDefsFlags[NN_vorpd] = false; // Bitwise Logical OR of Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vorps] = false; // Bitwise Logical OR for Single-FP Data
-SMPDefsFlags[NN_vpabsb] = false; // Packed Absolute Value Byte
-SMPDefsFlags[NN_vpabsd] = false; // Packed Absolute Value Doubleword
-SMPDefsFlags[NN_vpabsw] = false; // Packed Absolute Value Word
-SMPDefsFlags[NN_vpackssdw] = false; // Pack with Signed Saturation (Dword->Word)
-SMPDefsFlags[NN_vpacksswb] = false; // Pack with Signed Saturation (Word->Byte)
-SMPDefsFlags[NN_vpackusdw] = false; // Pack with Unsigned Saturation
-SMPDefsFlags[NN_vpackuswb] = false; // Pack with Unsigned Saturation (Word->Byte)
-SMPDefsFlags[NN_vpaddb] = false; // Packed Add Byte
-SMPDefsFlags[NN_vpaddd] = false; // Packed Add Dword
-SMPDefsFlags[NN_vpaddq] = false; // Add Packed Quadword Integers
-SMPDefsFlags[NN_vpaddsb] = false; // Packed Add with Saturation (Byte)
-SMPDefsFlags[NN_vpaddsw] = false; // Packed Add with Saturation (Word)
-SMPDefsFlags[NN_vpaddusb] = false; // Packed Add Unsigned with Saturation (Byte)
-SMPDefsFlags[NN_vpaddusw] = false; // Packed Add Unsigned with Saturation (Word)
-SMPDefsFlags[NN_vpaddw] = false; // Packed Add Word
-SMPDefsFlags[NN_vpalignr] = false; // Packed Align Right
-SMPDefsFlags[NN_vpand] = false; // Bitwise Logical And
-SMPDefsFlags[NN_vpandn] = false; // Bitwise Logical And Not
-SMPDefsFlags[NN_vpavgb] = false; // Packed Average (Byte)
-SMPDefsFlags[NN_vpavgw] = false; // Packed Average (Word)
-SMPDefsFlags[NN_vpblendd] = false; // Blend Packed Dwords
-SMPDefsFlags[NN_vpblendvb] = false; // Variable Blend Packed Bytes
-SMPDefsFlags[NN_vpblendw] = false; // Blend Packed Words
-SMPDefsFlags[NN_vpbroadcastb] = false; // Broadcast a Byte Integer
-SMPDefsFlags[NN_vpbroadcastd] = false; // Broadcast a Dword Integer
-SMPDefsFlags[NN_vpbroadcastq] = false; // Broadcast a Qword Integer
-SMPDefsFlags[NN_vpbroadcastw] = false; // Broadcast a Word Integer
-SMPDefsFlags[NN_vpclmulqdq] = false; // Carry-Less Multiplication Quadword
-SMPDefsFlags[NN_vpcmpeqb] = false; // Packed Compare for Equal (Byte)
-SMPDefsFlags[NN_vpcmpeqd] = false; // Packed Compare for Equal (Dword)
-SMPDefsFlags[NN_vpcmpeqq] = false; // Compare Packed Qword Data for Equal
-SMPDefsFlags[NN_vpcmpeqw] = false; // Packed Compare for Equal (Word)
-SMPDefsFlags[NN_vpcmpestri] = false; // Packed Compare Explicit Length Strings, Return Index
-SMPDefsFlags[NN_vpcmpestrm] = false; // Packed Compare Explicit Length Strings, Return Mask
-SMPDefsFlags[NN_vpcmpgtb] = false; // Packed Compare for Greater Than (Byte)
-SMPDefsFlags[NN_vpcmpgtd] = false; // Packed Compare for Greater Than (Dword)
-SMPDefsFlags[NN_vpcmpgtq] = false; // Compare Packed Data for Greater Than
-SMPDefsFlags[NN_vpcmpgtw] = false; // Packed Compare for Greater Than (Word)
-SMPDefsFlags[NN_vpcmpistri] = false; // Packed Compare Implicit Length Strings, Return Index
-SMPDefsFlags[NN_vpcmpistrm] = false; // Packed Compare Implicit Length Strings, Return Mask
-SMPDefsFlags[NN_vperm2f128] = false; // Permute Floating-Point Values
-SMPDefsFlags[NN_vperm2i128] = false; // Permute Integer Values
-SMPDefsFlags[NN_vpermd] = false; // Full Doublewords Element Permutation
-SMPDefsFlags[NN_vpermilpd] = false; // Permute Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vpermilps] = false; // Permute Single-Precision Floating-Point Values
-SMPDefsFlags[NN_vpermpd] = false; // Permute Double-Precision Floating-Point Elements
-SMPDefsFlags[NN_vpermps] = false; // Permute Single-Precision Floating-Point Elements
-SMPDefsFlags[NN_vpermq] = false; // Qwords Element Permutation
-SMPDefsFlags[NN_vpextrb] = false; // Extract Byte
-SMPDefsFlags[NN_vpextrd] = false; // Extract Dword
-SMPDefsFlags[NN_vpextrq] = false; // Extract Qword
-SMPDefsFlags[NN_vpextrw] = false; // Extract Word
-SMPDefsFlags[NN_vpgatherdd] = false; // Gather Packed Dword Values Using Signed Dword Indices
-SMPDefsFlags[NN_vpgatherdq] = false; // Gather Packed Qword Values Using Signed Dword Indices
-SMPDefsFlags[NN_vpgatherqd] = false; // Gather Packed Dword Values Using Signed Qword Indices
-SMPDefsFlags[NN_vpgatherqq] = false; // Gather Packed Qword Values Using Signed Qword Indices
-SMPDefsFlags[NN_vphaddd] = false; // Packed Horizontal Add Doubleword
-SMPDefsFlags[NN_vphaddsw] = false; // Packed Horizontal Add and Saturate
-SMPDefsFlags[NN_vphaddw] = false; // Packed Horizontal Add Word
-SMPDefsFlags[NN_vphminposuw] = false; // Packed Horizontal Word Minimum
-SMPDefsFlags[NN_vphsubd] = false; // Packed Horizontal Subtract Doubleword
-SMPDefsFlags[NN_vphsubsw] = false; // Packed Horizontal Subtract and Saturate
-SMPDefsFlags[NN_vphsubw] = false; // Packed Horizontal Subtract Word
-SMPDefsFlags[NN_vpinsrb] = false; // Insert Byte
-SMPDefsFlags[NN_vpinsrd] = false; // Insert Dword
-SMPDefsFlags[NN_vpinsrq] = false; // Insert Qword
-SMPDefsFlags[NN_vpinsrw] = false; // Insert Word
-SMPDefsFlags[NN_vpmaddubsw] = false; // Multiply and Add Packed Signed and Unsigned Bytes
-SMPDefsFlags[NN_vpmaddwd] = false; // Packed Multiply and Add
-SMPDefsFlags[NN_vpmaskmovd] = false; // Conditionally Store Dword Values Using Mask
-SMPDefsFlags[NN_vpmaskmovq] = false; // Conditionally Store Qword Values Using Mask
-SMPDefsFlags[NN_vpmaxsb] = false; // Maximum of Packed Signed Byte Integers
-SMPDefsFlags[NN_vpmaxsd] = false; // Maximum of Packed Signed Dword Integers
-SMPDefsFlags[NN_vpmaxsw] = false; // Packed Signed Integer Word Maximum
-SMPDefsFlags[NN_vpmaxub] = false; // Packed Unsigned Integer Byte Maximum
-SMPDefsFlags[NN_vpmaxud] = false; // Maximum of Packed Unsigned Dword Integers
-SMPDefsFlags[NN_vpmaxuw] = false; // Maximum of Packed Word Integers
-SMPDefsFlags[NN_vpminsb] = false; // Minimum of Packed Signed Byte Integers
-SMPDefsFlags[NN_vpminsd] = false; // Minimum of Packed Signed Dword Integers
-SMPDefsFlags[NN_vpminsw] = false; // Packed Signed Integer Word Minimum
-SMPDefsFlags[NN_vpminub] = false; // Packed Unsigned Integer Byte Minimum
-SMPDefsFlags[NN_vpminud] = false; // Minimum of Packed Unsigned Dword Integers
-SMPDefsFlags[NN_vpminuw] = false; // Minimum of Packed Word Integers
-SMPDefsFlags[NN_vpmovmskb] = false; // Move Byte Mask to Integer
-SMPDefsFlags[NN_vpmovsxbd] = false; // Packed Move with Sign Extend
-SMPDefsFlags[NN_vpmovsxbq] = false; // Packed Move with Sign Extend
-SMPDefsFlags[NN_vpmovsxbw] = false; // Packed Move with Sign Extend
-SMPDefsFlags[NN_vpmovsxdq] = false; // Packed Move with Sign Extend
-SMPDefsFlags[NN_vpmovsxwd] = false; // Packed Move with Sign Extend
-SMPDefsFlags[NN_vpmovsxwq] = false; // Packed Move with Sign Extend
-SMPDefsFlags[NN_vpmovzxbd] = false; // Packed Move with Zero Extend
-SMPDefsFlags[NN_vpmovzxbq] = false; // Packed Move with Zero Extend
-SMPDefsFlags[NN_vpmovzxbw] = false; // Packed Move with Zero Extend
-SMPDefsFlags[NN_vpmovzxdq] = false; // Packed Move with Zero Extend
-SMPDefsFlags[NN_vpmovzxwd] = false; // Packed Move with Zero Extend
-SMPDefsFlags[NN_vpmovzxwq] = false; // Packed Move with Zero Extend
-SMPDefsFlags[NN_vpmuldq] = false; // Multiply Packed Signed Dword Integers
-SMPDefsFlags[NN_vpmulhrsw] = false; // Packed Multiply High with Round and Scale
-SMPDefsFlags[NN_vpmulhuw] = false; // Packed Multiply High Unsigned
-SMPDefsFlags[NN_vpmulhw] = false; // Packed Multiply High
-SMPDefsFlags[NN_vpmulld] = false; // Multiply Packed Signed Dword Integers and Store Low Result
-SMPDefsFlags[NN_vpmullw] = false; // Packed Multiply Low
-SMPDefsFlags[NN_vpmuludq] = false; // Multiply Packed Unsigned Doubleword Integers
-SMPDefsFlags[NN_vpor] = false; // Bitwise Logical Or
-SMPDefsFlags[NN_vpsadbw] = false; // Packed Sum of Absolute Differences
-SMPDefsFlags[NN_vpshufb] = false; // Packed Shuffle Bytes
-SMPDefsFlags[NN_vpshufd] = false; // Shuffle Packed Doublewords
-SMPDefsFlags[NN_vpshufhw] = false; // Shuffle Packed High Words
-SMPDefsFlags[NN_vpshuflw] = false; // Shuffle Packed Low Words
-SMPDefsFlags[NN_vpsignb] = false; // Packed SIGN Byte
-SMPDefsFlags[NN_vpsignd] = false; // Packed SIGN Doubleword
-SMPDefsFlags[NN_vpsignw] = false; // Packed SIGN Word
-SMPDefsFlags[NN_vpslld] = false; // Packed Shift Left Logical (Dword)
-SMPDefsFlags[NN_vpslldq] = false; // Shift Double Quadword Left Logical
-SMPDefsFlags[NN_vpsllq] = false; // Packed Shift Left Logical (Qword)
-SMPDefsFlags[NN_vpsllvd] = false; // Variable Bit Shift Left Logical (Dword)
-SMPDefsFlags[NN_vpsllvq] = false; // Variable Bit Shift Left Logical (Qword)
-SMPDefsFlags[NN_vpsllw] = false; // Packed Shift Left Logical (Word)
-SMPDefsFlags[NN_vpsrad] = false; // Packed Shift Right Arithmetic (Dword)
-SMPDefsFlags[NN_vpsravd] = false; // Variable Bit Shift Right Arithmetic
-SMPDefsFlags[NN_vpsraw] = false; // Packed Shift Right Arithmetic (Word)
-SMPDefsFlags[NN_vpsrld] = false; // Packed Shift Right Logical (Dword)
-SMPDefsFlags[NN_vpsrldq] = false; // Shift Double Quadword Right Logical (Qword)
-SMPDefsFlags[NN_vpsrlq] = false; // Packed Shift Right Logical (Qword)
-SMPDefsFlags[NN_vpsrlvd] = false; // Variable Bit Shift Right Logical (Dword)
-SMPDefsFlags[NN_vpsrlvq] = false; // Variable Bit Shift Right Logical (Qword)
-SMPDefsFlags[NN_vpsrlw] = false; // Packed Shift Right Logical (Word)
-SMPDefsFlags[NN_vpsubb] = false; // Packed Subtract Byte
-SMPDefsFlags[NN_vpsubd] = false; // Packed Subtract Dword
-SMPDefsFlags[NN_vpsubq] = false; // Subtract Packed Quadword Integers
-SMPDefsFlags[NN_vpsubsb] = false; // Packed Subtract with Saturation (Byte)
-SMPDefsFlags[NN_vpsubsw] = false; // Packed Subtract with Saturation (Word)
-SMPDefsFlags[NN_vpsubusb] = false; // Packed Subtract Unsigned with Saturation (Byte)
-SMPDefsFlags[NN_vpsubusw] = false; // Packed Subtract Unsigned with Saturation (Word)
-SMPDefsFlags[NN_vpsubw] = false; // Packed Subtract Word
-SMPDefsFlags[NN_vptest] = false; // Logical Compare
-SMPDefsFlags[NN_vpunpckhbw] = false; // Unpack High Packed Data (Byte->Word)
-SMPDefsFlags[NN_vpunpckhdq] = false; // Unpack High Packed Data (Dword->Qword)
-SMPDefsFlags[NN_vpunpckhqdq] = false; // Unpack High Packed Data (Qword->Xmmword)
-SMPDefsFlags[NN_vpunpckhwd] = false; // Unpack High Packed Data (Word->Dword)
-SMPDefsFlags[NN_vpunpcklbw] = false; // Unpack Low Packed Data (Byte->Word)
-SMPDefsFlags[NN_vpunpckldq] = false; // Unpack Low Packed Data (Dword->Qword)
-SMPDefsFlags[NN_vpunpcklqdq] = false; // Unpack Low Packed Data (Qword->Xmmword)
-SMPDefsFlags[NN_vpunpcklwd] = false; // Unpack Low Packed Data (Word->Dword)
-SMPDefsFlags[NN_vpxor] = false; // Bitwise Logical Exclusive Or
-SMPDefsFlags[NN_vrcpps] = false; // Packed Single-FP Reciprocal
-SMPDefsFlags[NN_vrcpss] = false; // Scalar Single-FP Reciprocal
-SMPDefsFlags[NN_vroundpd] = false; // Round Packed Double Precision Floating-Point Values
-SMPDefsFlags[NN_vroundps] = false; // Round Packed Single Precision Floating-Point Values
-SMPDefsFlags[NN_vroundsd] = false; // Round Scalar Double Precision Floating-Point Values
-SMPDefsFlags[NN_vroundss] = false; // Round Scalar Single Precision Floating-Point Values
-SMPDefsFlags[NN_vrsqrtps] = false; // Packed Single-FP Square Root Reciprocal
-SMPDefsFlags[NN_vrsqrtss] = false; // Scalar Single-FP Square Root Reciprocal
-SMPDefsFlags[NN_vshufpd] = false; // Shuffle Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vshufps] = false; // Shuffle Single-FP
-SMPDefsFlags[NN_vsqrtpd] = false; // Compute Square Roots of Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vsqrtps] = false; // Packed Single-FP Square Root
-SMPDefsFlags[NN_vsqrtsd] = false; // Compute Square Rootof Scalar Double-Precision Floating-Point Value
-SMPDefsFlags[NN_vsqrtss] = false; // Scalar Single-FP Square Root
-SMPDefsFlags[NN_vstmxcsr] = false; // Store Streaming SIMD Extensions Technology Control/Status Register
-SMPDefsFlags[NN_vsubpd] = false; // Subtract Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vsubps] = false; // Packed Single-FP Subtract
-SMPDefsFlags[NN_vsubsd] = false; // Subtract Scalar Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vsubss] = false; // Scalar Single-FP Subtract
-SMPDefsFlags[NN_vtestpd] = false; // Packed Double-Precision Floating-Point Bit Test
-SMPDefsFlags[NN_vtestps] = false; // Packed Single-Precision Floating-Point Bit Test
-SMPDefsFlags[NN_vucomisd] = false; // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
-SMPDefsFlags[NN_vucomiss] = false; // Scalar Unordered Single-FP Compare and Set EFLAGS
-SMPDefsFlags[NN_vunpckhpd] = false; // Unpack and Interleave High Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vunpckhps] = false; // Unpack High Packed Single-FP Data
-SMPDefsFlags[NN_vunpcklpd] = false; // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vunpcklps] = false; // Unpack Low Packed Single-FP Data
-SMPDefsFlags[NN_vxorpd] = false; // Bitwise Logical OR of Double-Precision Floating-Point Values
-SMPDefsFlags[NN_vxorps] = false; // Bitwise Logical XOR for Single-FP Data
-SMPDefsFlags[NN_vzeroall] = false; // Zero All YMM Registers
-SMPDefsFlags[NN_vzeroupper] = false; // Zero Upper Bits of YMM Registers
-
-// Transactional Synchronization Extensions
-
-SMPDefsFlags[NN_xabort] = false; // Transaction Abort
-SMPDefsFlags[NN_xbegin] = false; // Transaction Begin
-SMPDefsFlags[NN_xend] = false; // Transaction End
-SMPDefsFlags[NN_xtest] = false; // Test If In Transactional Execution
-
-// Virtual PC synthetic instructions
-
-SMPDefsFlags[NN_vmgetinfo] = false; // Virtual PC - Get VM Information
-SMPDefsFlags[NN_vmsetinfo] = false; // Virtual PC - Set VM Information
-SMPDefsFlags[NN_vmdxdsbl] = false; // Virtual PC - Disable Direct Execution
-SMPDefsFlags[NN_vmdxenbl] = false; // Virtual PC - Enable Direct Execution
-SMPDefsFlags[NN_vmcpuid] = false; // Virtual PC - Virtualized CPU Information
-SMPDefsFlags[NN_vmhlt] = false; // Virtual PC - Halt
-SMPDefsFlags[NN_vmsplaf] = false; // Virtual PC - Spin Lock Acquisition Failed
-SMPDefsFlags[NN_vmpushfd] = false; // Virtual PC - Push virtualized flags register
-SMPDefsFlags[NN_vmpopfd] = false; // Virtual PC - Pop virtualized flags register
-SMPDefsFlags[NN_vmcli] = false; // Virtual PC - Clear Interrupt Flag
-SMPDefsFlags[NN_vmsti] = false; // Virtual PC - Set Interrupt Flag
-SMPDefsFlags[NN_vmiretd] = false; // Virtual PC - Return From Interrupt
-SMPDefsFlags[NN_vmsgdt] = false; // Virtual PC - Store Global Descriptor Table
-SMPDefsFlags[NN_vmsidt] = false; // Virtual PC - Store Interrupt Descriptor Table
-SMPDefsFlags[NN_vmsldt] = false; // Virtual PC - Store Local Descriptor Table
-SMPDefsFlags[NN_vmstr] = false; // Virtual PC - Store Task Register
-SMPDefsFlags[NN_vmsdte] = false; // Virtual PC - Store to Descriptor Table Entry
-SMPDefsFlags[NN_vpcext] = false; // Virtual PC - ISA extension
-
-#endif // 599 < IDA_SDK_VERSION
-
-SMPDefsFlags[NN_last] = false;
-
- return;
-
-} // end InitSMPDefsFlags()
-
-// Initialize the SMPUsesFlags[] array to define how we emit
-// optimizing annotations.
-void InitSMPUsesFlags(void) {
- // Default value is false. Few instructions use the flags.
- (void) memset(SMPUsesFlags, false, sizeof(SMPUsesFlags));
-
-SMPUsesFlags[NN_null] = true; // Unknown Operation
-SMPUsesFlags[NN_aaa] = true; // ASCII adjust after addition
-SMPUsesFlags[NN_aas] = true; // ASCII adjust after subtraction
-SMPUsesFlags[NN_adc] = true; // Add with Carry
-SMPUsesFlags[NN_cmps] = true; // Compare Strings (uses DF direction flag)
-SMPUsesFlags[NN_daa] = true; // Decimal Adjust AL after Addition
-SMPUsesFlags[NN_das] = true; // Decimal Adjust AL after Subtraction
-SMPUsesFlags[NN_ins] = true; // Input Byte(s) from Port to String
-SMPUsesFlags[NN_into] = true; // Call to Interrupt Procedure if Overflow Flag = 1
-SMPUsesFlags[NN_ja] = true; // Jump if Above (CF=0 & ZF=0)
-SMPUsesFlags[NN_jae] = true; // Jump if Above or Equal (CF=0)
-SMPUsesFlags[NN_jb] = true; // Jump if Below (CF=1)
-SMPUsesFlags[NN_jbe] = true; // Jump if Below or Equal (CF=1 | ZF=1)
-SMPUsesFlags[NN_jc] = true; // Jump if Carry (CF=1)
-SMPUsesFlags[NN_jcxz] = true; // Jump if CX is 0
-SMPUsesFlags[NN_jecxz] = true; // Jump if ECX is 0
-SMPUsesFlags[NN_jrcxz] = true; // Jump if RCX is 0
-SMPUsesFlags[NN_je] = true; // Jump if Equal (ZF=1)
-SMPUsesFlags[NN_jg] = true; // Jump if Greater (ZF=0 & SF=OF)
-SMPUsesFlags[NN_jge] = true; // Jump if Greater or Equal (SF=OF)
-SMPUsesFlags[NN_jl] = true; // Jump if Less (SF!=OF)
-SMPUsesFlags[NN_jle] = true; // Jump if Less or Equal (ZF=1 | SF!=OF)
-SMPUsesFlags[NN_jna] = true; // Jump if Not Above (CF=1 | ZF=1)
-SMPUsesFlags[NN_jnae] = true; // Jump if Not Above or Equal (CF=1)
-SMPUsesFlags[NN_jnb] = true; // Jump if Not Below (CF=0)
-SMPUsesFlags[NN_jnbe] = true; // Jump if Not Below or Equal (CF=0 & ZF=0)
-SMPUsesFlags[NN_jnc] = true; // Jump if Not Carry (CF=0)
-SMPUsesFlags[NN_jne] = true; // Jump if Not Equal (ZF=0)
-SMPUsesFlags[NN_jng] = true; // Jump if Not Greater (ZF=1 | SF!=OF)
-SMPUsesFlags[NN_jnge] = true; // Jump if Not Greater or Equal (SF!=OF)
-SMPUsesFlags[NN_jnl] = true; // Jump if Not Less (SF=OF)
-SMPUsesFlags[NN_jnle] = true; // Jump if Not Less or Equal (ZF=0 & SF=OF)
-SMPUsesFlags[NN_jno] = true; // Jump if Not Overflow (OF=0)
-SMPUsesFlags[NN_jnp] = true; // Jump if Not Parity (PF=0)
-SMPUsesFlags[NN_jns] = true; // Jump if Not Sign (SF=0)
-SMPUsesFlags[NN_jnz] = true; // Jump if Not Zero (ZF=0)
-SMPUsesFlags[NN_jo] = true; // Jump if Overflow (OF=1)
-SMPUsesFlags[NN_jp] = true; // Jump if Parity (PF=1)
-SMPUsesFlags[NN_jpe] = true; // Jump if Parity Even (PF=1)
-SMPUsesFlags[NN_jpo] = true; // Jump if Parity Odd (PF=0)
-SMPUsesFlags[NN_js] = true; // Jump if Sign (SF=1)
-SMPUsesFlags[NN_jz] = true; // Jump if Zero (ZF=1)
-SMPUsesFlags[NN_lahf] = true; // Load Flags into AH Register
-SMPUsesFlags[NN_lods] = true; // Load String
-SMPUsesFlags[NN_loopwe] = true; // Loop while CX != 0 and ZF=1
-SMPUsesFlags[NN_loope] = true; // Loop while rCX != 0 and ZF=1
-SMPUsesFlags[NN_loopde] = true; // Loop while ECX != 0 and ZF=1
-SMPUsesFlags[NN_loopqe] = true; // Loop while RCX != 0 and ZF=1
-SMPUsesFlags[NN_loopwne] = true; // Loop while CX != 0 and ZF=0
-SMPUsesFlags[NN_loopne] = true; // Loop while rCX != 0 and ZF=0
-SMPUsesFlags[NN_loopdne] = true; // Loop while ECX != 0 and ZF=0
-SMPUsesFlags[NN_loopqne] = true; // Loop while RCX != 0 and ZF=0
-SMPUsesFlags[NN_movs] = true; // Move String (uses flags if REP prefix)
-SMPUsesFlags[NN_outs] = true; // Output Byte(s) to Port
-SMPUsesFlags[NN_pushfw] = true; // Push Flags Register onto the Stack
-SMPUsesFlags[NN_pushf] = true; // Push Flags Register onto the Stack
-SMPUsesFlags[NN_pushfd] = true; // Push Flags Register onto the Stack (use32)
-SMPUsesFlags[NN_pushfq] = true; // Push Flags Register onto the Stack (use64)
-SMPUsesFlags[NN_rcl] = true; // Rotate Through Carry Left
-SMPUsesFlags[NN_rcr] = true; // Rotate Through Carry Right
-SMPUsesFlags[NN_repe] = true; // Repeat String Operation while ZF=1
-SMPUsesFlags[NN_repne] = true; // Repeat String Operation while ZF=0
-SMPUsesFlags[NN_sbb] = true; // Integer Subtraction with Borrow
-SMPUsesFlags[NN_scas] = true; // Compare String (uses DF direction flag)
-SMPUsesFlags[NN_seta] = true; // Set Byte if Above (CF=0 & ZF=0)
-SMPUsesFlags[NN_setae] = true; // Set Byte if Above or Equal (CF=0)
-SMPUsesFlags[NN_setb] = true; // Set Byte if Below (CF=1)
-SMPUsesFlags[NN_setbe] = true; // Set Byte if Below or Equal (CF=1 | ZF=1)
-SMPUsesFlags[NN_setc] = true; // Set Byte if Carry (CF=1)
-SMPUsesFlags[NN_sete] = true; // Set Byte if Equal (ZF=1)
-SMPUsesFlags[NN_setg] = true; // Set Byte if Greater (ZF=0 & SF=OF)
-SMPUsesFlags[NN_setge] = true; // Set Byte if Greater or Equal (SF=OF)
-SMPUsesFlags[NN_setl] = true; // Set Byte if Less (SF!=OF)
-SMPUsesFlags[NN_setle] = true; // Set Byte if Less or Equal (ZF=1 | SF!=OF)
-SMPUsesFlags[NN_setna] = true; // Set Byte if Not Above (CF=1 | ZF=1)
-SMPUsesFlags[NN_setnae] = true; // Set Byte if Not Above or Equal (CF=1)
-SMPUsesFlags[NN_setnb] = true; // Set Byte if Not Below (CF=0)
-SMPUsesFlags[NN_setnbe] = true; // Set Byte if Not Below or Equal (CF=0 & ZF=0)
-SMPUsesFlags[NN_setnc] = true; // Set Byte if Not Carry (CF=0)
-SMPUsesFlags[NN_setne] = true; // Set Byte if Not Equal (ZF=0)
-SMPUsesFlags[NN_setng] = true; // Set Byte if Not Greater (ZF=1 | SF!=OF)
-SMPUsesFlags[NN_setnge] = true; // Set Byte if Not Greater or Equal (SF!=OF)
-SMPUsesFlags[NN_setnl] = true; // Set Byte if Not Less (SF=OF)
-SMPUsesFlags[NN_setnle] = true; // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
-SMPUsesFlags[NN_setno] = true; // Set Byte if Not Overflow (OF=0)
-SMPUsesFlags[NN_setnp] = true; // Set Byte if Not Parity (PF=0)
-SMPUsesFlags[NN_setns] = true; // Set Byte if Not Sign (SF=0)
-SMPUsesFlags[NN_setnz] = true; // Set Byte if Not Zero (ZF=0)
-SMPUsesFlags[NN_seto] = true; // Set Byte if Overflow (OF=1)
-SMPUsesFlags[NN_setp] = true; // Set Byte if Parity (PF=1)
-SMPUsesFlags[NN_setpe] = true; // Set Byte if Parity Even (PF=1)
-SMPUsesFlags[NN_setpo] = true; // Set Byte if Parity Odd (PF=0)
-SMPUsesFlags[NN_sets] = true; // Set Byte if Sign (SF=1)
-SMPUsesFlags[NN_setz] = true; // Set Byte if Zero (ZF=1)
-SMPUsesFlags[NN_stos] = true; // Store String
-
-//
-// 486 instructions
-//
-
-//
-// Pentium instructions
-//
-
-#if 0
-SMPUsesFlags[NN_cpuid] = true; // Get CPU ID
-SMPUsesFlags[NN_cmpxchg8b] = true; // Compare and Exchange Eight Bytes
-#endif
-
-//
-// Pentium Pro instructions
-//
-
-SMPUsesFlags[NN_cmova] = true; // Move if Above (CF=0 & ZF=0)
-SMPUsesFlags[NN_cmovb] = true; // Move if Below (CF=1)
-SMPUsesFlags[NN_cmovbe] = true; // Move if Below or Equal (CF=1 | ZF=1)
-SMPUsesFlags[NN_cmovg] = true; // Move if Greater (ZF=0 & SF=OF)
-SMPUsesFlags[NN_cmovge] = true; // Move if Greater or Equal (SF=OF)
-SMPUsesFlags[NN_cmovl] = true; // Move if Less (SF!=OF)
-SMPUsesFlags[NN_cmovle] = true; // Move if Less or Equal (ZF=1 | SF!=OF)
-SMPUsesFlags[NN_cmovnb] = true; // Move if Not Below (CF=0)
-SMPUsesFlags[NN_cmovno] = true; // Move if Not Overflow (OF=0)
-SMPUsesFlags[NN_cmovnp] = true; // Move if Not Parity (PF=0)
-SMPUsesFlags[NN_cmovns] = true; // Move if Not Sign (SF=0)
-SMPUsesFlags[NN_cmovnz] = true; // Move if Not Zero (ZF=0)
-SMPUsesFlags[NN_cmovo] = true; // Move if Overflow (OF=1)
-SMPUsesFlags[NN_cmovp] = true; // Move if Parity (PF=1)
-SMPUsesFlags[NN_cmovs] = true; // Move if Sign (SF=1)
-SMPUsesFlags[NN_cmovz] = true; // Move if Zero (ZF=1)
-SMPUsesFlags[NN_fcmovb] = true; // Floating Move if Below
-SMPUsesFlags[NN_fcmove] = true; // Floating Move if Equal
-SMPUsesFlags[NN_fcmovbe] = true; // Floating Move if Below or Equal
-SMPUsesFlags[NN_fcmovu] = true; // Floating Move if Unordered
-SMPUsesFlags[NN_fcmovnb] = true; // Floating Move if Not Below
-SMPUsesFlags[NN_fcmovne] = true; // Floating Move if Not Equal
-SMPUsesFlags[NN_fcmovnbe] = true; // Floating Move if Not Below or Equal
-SMPUsesFlags[NN_fcmovnu] = true; // Floating Move if Not Unordered
-
-//
-// FPP instructions
-//
-
-
-//
-// 80387 instructions
-//
-
-
-//
-// Instructions added 28.02.96
-//
-
-SMPUsesFlags[NN_setalc] = true; // Set AL to Carry Flag
-
-//
-// MMX instructions
-//
-
-
-//
-// Undocumented Deschutes processor instructions
-//
-
-
-// Pentium II instructions
-
-
-// 3DNow! instructions
-
-
-// Pentium III instructions
-
-
-// Pentium III Pseudo instructions
-
-
-// AMD K7 instructions
-
-// Revisit AMD if we port to it.
-
-// Undocumented FP instructions (thanks to norbert.juffa@adm.com)
-
-// Pentium 4 instructions
-
-
-
-// AMD syscall/sysret instructions NOTE: not AMD, found in Intel manual
-
-// AMD64 instructions NOTE: not AMD, found in Intel manual
-
-
-// New Pentium instructions (SSE3)
-
-
-// Missing AMD64 instructions NOTE: also found in Intel manual
-
-
-// SSE3 instructions
-
-
-// SSSE3 instructions
-
-
-// VMX instructions
-
-// Added with x86-64
-
-// Geode LX 3DNow! extensions
-
-// SSE2 pseudoinstructions
-
-// SSSE4.1 instructions
-
-// SSSE4.2 instructions
-
-// AMD SSE4a instructions
-
-// xsave/xrstor instructions
-
-// Intel Safer Mode Extensions (SMX)
-
-// AMD-V Virtualization ISA Extension
-
-// VMX+ instructions
-
-// Intel Atom instructions
-
-// Intel AES instructions
-
-// Carryless multiplication
-
-// Returns modified by operand size prefixes
-
-// RDRAND support
-
-// new GPR instructions
-
-SMPUsesFlags[NN_adcx] = true; // Unsigned Integer Addition of Two Operands with Carry Flag
-SMPUsesFlags[NN_adox] = true; // Unsigned Integer Addition of Two Operands with Overflow Flag
-
-// new AVX instructions
-
-// Transactional Synchronization Extensions
-
-// Virtual PC synthetic instructions
-
-SMPUsesFlags[NN_last] = false;
-
- return;
-
-} // end InitSMPUsesFlags()
-
-
-// Initialize the SMPTypeCategory[] array to define how we infer
-// numeric or pointer operand types for optimizing annotations.
-void InitTypeCategory(void) {
- // Default category is 0, no type inference without knowing context.
- (void) memset(SMPTypeCategory, 0, sizeof(SMPTypeCategory));
- // Category 1 instructions will need no mmStrata instrumentation
- // and are irrelevant to our type system, so we do not attempt
- // to make type inferences. Many of these operate on numeric
- // operands such as floating point or MMX/SSE registers. mmStrata
- // assumes that such registers are always numeric, so we do not
- // need annotations informing mmStrata that FP/MMX/SSE regs are numeric.
- // Category 2 instructions always have a result type of 'n' (number).
- // Category 3 instructions have a result type of 'n' (number)
- // whenever the second source operand is an operand of type 'n'.
- // NOTE: MOV is the only current example, and this will take some thought if
- // other examples arise.
- // Category 4 instructions have a result type identical to the 1st source operand type.
- // NOTE: This is currently set for single-operand instructions such as
- // INC, DEC. As a result, these are treated pretty much as if
- // they were category 1 instructions, as there is no metadata update,
- // even if the operand is a memory operand.
- // If new instructions are added to this category that are not single
- // operand and do require some updating, the category should be split.
- // Category 5 instructions have a result type identical to the 1st source operand
- // type whenever the 2nd source operand is an operand of type 'n' & vice versa.
- // Examples are add, sub, adc, and sbb. There are subtle exceptions
- // handled in the SMPInstr::EmitTypeAnnotations() method.
- // Category 6 instructions always have a result type of 'p' (pointer).
- // Category 7 instructions are category 2 instructions with two destinations,
- // such as multiply and divide instructions that affect EDX:EAX. There are
- // forms of these instructions that only have one destination, so they have
- // to be distinguished via the operand info.
- // Category 8 instructions implicitly write a numeric value to EDX:EAX, but
- // EDX and EAX are not listed as operands. RDTSC, RDPMC, RDMSR, and other
- // instructions that copy machine registers into EDX:EAX are category 8.
- // Some instructions in category 8 also write to ECX.
- // Category 9 instructions are floating point instructions that either
- // have a memory destination (treat as category 13) or a FP reg destination
- // (treat as category 1, as FP regs are always 'n' and ignored in our system).
- // Category 10 instructions have 'n' results if the sources are all 'n';
- // we cannot infer the type of the result if the sources are of mixed types.
- // Bitwise OR and AND and LEA (load effective address) are examples.
- // Category 11 instructions need to have their types and locations on the stack
- // frame tracked, e.g. push and pop instructions. No direct type inference.
- // Category 12 instructions are similar to category 10, except that we do not
- // output 'n' annotations when all sources are 'n'; rather, the instruction can
- // be simply ignored (not instrumented by mmStrata) in that case. Conditional
- // exchange instructions are examples; we do or do not
- // move a numeric value into a register that already has numeric metadata.
- // Category 13 instructions imply that their memory destination is 'n'.
- // Category 14 instructions imply that their reg or memory source operand is 'n';
- // if source is not memory, they are category 1 (inferences, but no instrumentation).
- // There should never be a memory destination (usual destination is fpreg or flags).
- // Category 15 instructions always have 'n' source AND destination operands;
- // if addressed using indirect or indexed addressing, they are a subset of category 0
- // (must be instrumented by mmStrata to keep index in bounds). Memory destinations
- // are common in this category.
-
- // NOTE: The Memory Monitor SDT needs just three categories, corresponding
- // to categories 0, 1, and all others. For all categories > 1, the
- // annotation should tell the SDT exactly how to update its metadata.
- // For example, a division instruction will write type 'n' (NUM) as
- // the metadata for result registers EDX:EAX. So, the annotation should
- // list 'n', EDX, EAX, and a terminator of ZZ. CWD (convert word to
- // doubleword) should have a list of n EAX ZZ.
-
-SMPTypeCategory[NN_null] = 0; // Unknown Operation
-SMPTypeCategory[NN_aaa] = 2; // ASCII Adjust after Addition
-SMPTypeCategory[NN_aad] = 2; // ASCII Adjust AX before Division
-SMPTypeCategory[NN_aam] = 2; // ASCII Adjust AX after Multiply
-SMPTypeCategory[NN_aas] = 2; // ASCII Adjust AL after Subtraction
-SMPTypeCategory[NN_adc] = 5; // Add with Carry
-SMPTypeCategory[NN_add] = 5; // Add
-SMPTypeCategory[NN_and] = 10; // Logical AND
-SMPTypeCategory[NN_arpl] = 1; // Adjust RPL Field of Selector
-SMPTypeCategory[NN_bound] = 1; // Check Array Index Against Bounds
-SMPTypeCategory[NN_bsf] = 2; // Bit Scan Forward
-SMPTypeCategory[NN_bsr] = 2; // Bit Scan Reverse
-SMPTypeCategory[NN_bt] = 10; // Bit Test
-SMPTypeCategory[NN_btc] = 10; // Bit Test and Complement
-SMPTypeCategory[NN_btr] = 10; // Bit Test and Reset
-SMPTypeCategory[NN_bts] = 10; // Bit Test and Set
-SMPTypeCategory[NN_call] = 1; // Call Procedure
-SMPTypeCategory[NN_callfi] = 1; // Indirect Call Far Procedure
-SMPTypeCategory[NN_callni] = 1; // Indirect Call Near Procedure
-SMPTypeCategory[NN_cbw] = 2; // AL -> AX (with sign) ** No ops?
-SMPTypeCategory[NN_cwde] = 2; // AX -> EAX (with sign) **
-SMPTypeCategory[NN_cdqe] = 2; // EAX -> RAX (with sign) **
-SMPTypeCategory[NN_clc] = 1; // Clear Carry Flag
-SMPTypeCategory[NN_cld] = 1; // Clear Direction Flag
-SMPTypeCategory[NN_cli] = 1; // Clear Interrupt Flag
-SMPTypeCategory[NN_clts] = 1; // Clear Task-Switched Flag in CR0
-SMPTypeCategory[NN_cmc] = 1; // Complement Carry Flag
-SMPTypeCategory[NN_cmp] = 1; // Compare Two Operands
-SMPTypeCategory[NN_cmps] = 14; // Compare Strings
-SMPTypeCategory[NN_cwd] = 2; // AX -> DX:AX (with sign)
-SMPTypeCategory[NN_cdq] = 2; // EAX -> EDX:EAX (with sign)
-SMPTypeCategory[NN_cqo] = 2; // RAX -> RDX:RAX (with sign)
-SMPTypeCategory[NN_daa] = 2; // Decimal Adjust AL after Addition
-SMPTypeCategory[NN_das] = 2; // Decimal Adjust AL after Subtraction
-SMPTypeCategory[NN_dec] = 4; // Decrement by 1
-SMPTypeCategory[NN_div] = 7; // Unsigned Divide
-SMPTypeCategory[NN_enterw] = 0; // Make Stack Frame for Procedure Parameters **
-SMPTypeCategory[NN_enter] = 0; // Make Stack Frame for Procedure Parameters **
-SMPTypeCategory[NN_enterd] = 0; // Make Stack Frame for Procedure Parameters **
-SMPTypeCategory[NN_enterq] = 0; // Make Stack Frame for Procedure Parameters **
-SMPTypeCategory[NN_hlt] = 0; // Halt
-SMPTypeCategory[NN_idiv] = 7; // Signed Divide
-SMPTypeCategory[NN_imul] = 7; // Signed Multiply
-SMPTypeCategory[NN_in] = 0; // Input from Port **
-SMPTypeCategory[NN_inc] = 4; // Increment by 1
-SMPTypeCategory[NN_ins] = 2; // Input Byte(s) from Port to String **
-SMPTypeCategory[NN_int] = 0; // Call to Interrupt Procedure
-SMPTypeCategory[NN_into] = 0; // Call to Interrupt Procedure if Overflow Flag = 1
-SMPTypeCategory[NN_int3] = 0; // Trap to Debugger
-SMPTypeCategory[NN_iretw] = 0; // Interrupt Return
-SMPTypeCategory[NN_iret] = 0; // Interrupt Return
-SMPTypeCategory[NN_iretd] = 0; // Interrupt Return (use32)
-SMPTypeCategory[NN_iretq] = 0; // Interrupt Return (use64)
-SMPTypeCategory[NN_ja] = 1; // Jump if Above (CF=0 & ZF=0)
-SMPTypeCategory[NN_jae] = 1; // Jump if Above or Equal (CF=0)
-SMPTypeCategory[NN_jb] = 1; // Jump if Below (CF=1)
-SMPTypeCategory[NN_jbe] = 1; // Jump if Below or Equal (CF=1 | ZF=1)
-SMPTypeCategory[NN_jc] = 1; // Jump if Carry (CF=1)
-SMPTypeCategory[NN_jcxz] = 1; // Jump if CX is 0
-SMPTypeCategory[NN_jecxz] = 1; // Jump if ECX is 0
-SMPTypeCategory[NN_jrcxz] = 1; // Jump if RCX is 0
-SMPTypeCategory[NN_je] = 1; // Jump if Equal (ZF=1)
-SMPTypeCategory[NN_jg] = 1; // Jump if Greater (ZF=0 & SF=OF)
-SMPTypeCategory[NN_jge] = 1; // Jump if Greater or Equal (SF=OF)
-SMPTypeCategory[NN_jl] = 1; // Jump if Less (SF!=OF)
-SMPTypeCategory[NN_jle] = 1; // Jump if Less or Equal (ZF=1 | SF!=OF)
-SMPTypeCategory[NN_jna] = 1; // Jump if Not Above (CF=1 | ZF=1)
-SMPTypeCategory[NN_jnae] = 1; // Jump if Not Above or Equal (CF=1)
-SMPTypeCategory[NN_jnb] = 1; // Jump if Not Below (CF=0)
-SMPTypeCategory[NN_jnbe] = 1; // Jump if Not Below or Equal (CF=0 & ZF=0)
-SMPTypeCategory[NN_jnc] = 1; // Jump if Not Carry (CF=0)
-SMPTypeCategory[NN_jne] = 1; // Jump if Not Equal (ZF=0)
-SMPTypeCategory[NN_jng] = 1; // Jump if Not Greater (ZF=1 | SF!=OF)
-SMPTypeCategory[NN_jnge] = 1; // Jump if Not Greater or Equal (SF!=OF)
-SMPTypeCategory[NN_jnl] = 1; // Jump if Not Less (SF=OF)
-SMPTypeCategory[NN_jnle] = 1; // Jump if Not Less or Equal (ZF=0 & SF=OF)
-SMPTypeCategory[NN_jno] = 1; // Jump if Not Overflow (OF=0)
-SMPTypeCategory[NN_jnp] = 1; // Jump if Not Parity (PF=0)
-SMPTypeCategory[NN_jns] = 1; // Jump if Not Sign (SF=0)
-SMPTypeCategory[NN_jnz] = 1; // Jump if Not Zero (ZF=0)
-SMPTypeCategory[NN_jo] = 1; // Jump if Overflow (OF=1)
-SMPTypeCategory[NN_jp] = 1; // Jump if Parity (PF=1)
-SMPTypeCategory[NN_jpe] = 1; // Jump if Parity Even (PF=1)
-SMPTypeCategory[NN_jpo] = 1; // Jump if Parity Odd (PF=0)
-SMPTypeCategory[NN_js] = 1; // Jump if Sign (SF=1)
-SMPTypeCategory[NN_jz] = 1; // Jump if Zero (ZF=1)
-SMPTypeCategory[NN_jmp] = 1; // Jump
-SMPTypeCategory[NN_jmpfi] = 1; // Indirect Far Jump
-SMPTypeCategory[NN_jmpni] = 1; // Indirect Near Jump
-SMPTypeCategory[NN_jmpshort] = 1; // Jump Short (not used)
-SMPTypeCategory[NN_lahf] = 2; // Load Flags into AH Register
-SMPTypeCategory[NN_lar] = 2; // Load Access Rights Byte
-SMPTypeCategory[NN_lea] = 10; // Load Effective Address **
-SMPTypeCategory[NN_leavew] = 0; // High Level Procedure Exit **
-SMPTypeCategory[NN_leave] = 0; // High Level Procedure Exit **
-SMPTypeCategory[NN_leaved] = 0; // High Level Procedure Exit **
-SMPTypeCategory[NN_leaveq] = 0; // High Level Procedure Exit **
-SMPTypeCategory[NN_lgdt] = 0; // Load Global Descriptor Table Register
-SMPTypeCategory[NN_lidt] = 0; // Load Interrupt Descriptor Table Register
-SMPTypeCategory[NN_lgs] = 6; // Load Full Pointer to GS:xx
-SMPTypeCategory[NN_lss] = 6; // Load Full Pointer to SS:xx
-SMPTypeCategory[NN_lds] = 6; // Load Full Pointer to DS:xx
-SMPTypeCategory[NN_les] = 6; // Load Full Pointer to ES:xx
-SMPTypeCategory[NN_lfs] = 6; // Load Full Pointer to FS:xx
-SMPTypeCategory[NN_lldt] = 0; // Load Local Descriptor Table Register
-SMPTypeCategory[NN_lmsw] = 1; // Load Machine Status Word
-SMPTypeCategory[NN_lock] = 1; // Assert LOCK# Signal Prefix
-SMPTypeCategory[NN_lods] = 0; // Load String
-SMPTypeCategory[NN_loopw] = 1; // Loop while ECX != 0
-SMPTypeCategory[NN_loop] = 1; // Loop while CX != 0
-SMPTypeCategory[NN_loopd] = 1; // Loop while ECX != 0
-SMPTypeCategory[NN_loopq] = 1; // Loop while RCX != 0
-SMPTypeCategory[NN_loopwe] = 1; // Loop while CX != 0 and ZF=1
-SMPTypeCategory[NN_loope] = 1; // Loop while rCX != 0 and ZF=1
-SMPTypeCategory[NN_loopde] = 1; // Loop while ECX != 0 and ZF=1
-SMPTypeCategory[NN_loopqe] = 1; // Loop while RCX != 0 and ZF=1
-SMPTypeCategory[NN_loopwne] = 1; // Loop while CX != 0 and ZF=0
-SMPTypeCategory[NN_loopne] = 1; // Loop while rCX != 0 and ZF=0
-SMPTypeCategory[NN_loopdne] = 1; // Loop while ECX != 0 and ZF=0
-SMPTypeCategory[NN_loopqne] = 1; // Loop while RCX != 0 and ZF=0
-SMPTypeCategory[NN_lsl] = 6; // Load Segment Limit
-SMPTypeCategory[NN_ltr] = 1; // Load Task Register
-SMPTypeCategory[NN_mov] = 3; // Move Data
-SMPTypeCategory[NN_movsp] = 3; // Move to/from Special Registers
-SMPTypeCategory[NN_movs] = 0; // Move Byte(s) from String to String
-SMPTypeCategory[NN_movsx] = 3; // Move with Sign-Extend
-SMPTypeCategory[NN_movzx] = 3; // Move with Zero-Extend
-SMPTypeCategory[NN_mul] = 7; // Unsigned Multiplication of AL or AX
-SMPTypeCategory[NN_neg] = 2; // Two's Complement Negation !!!!****!!!! Change this when mmStrata handles NEGATEDPTR type.
-SMPTypeCategory[NN_nop] = 1; // No Operation
-SMPTypeCategory[NN_not] = 2; // One's Complement Negation
-SMPTypeCategory[NN_or] = 10; // Logical Inclusive OR
-SMPTypeCategory[NN_out] = 0; // Output to Port
-SMPTypeCategory[NN_outs] = 0; // Output Byte(s) to Port
-SMPTypeCategory[NN_pop] = 11; // Pop a word from the Stack
-SMPTypeCategory[NN_popaw] = 11; // Pop all General Registers
-SMPTypeCategory[NN_popa] = 11; // Pop all General Registers
-SMPTypeCategory[NN_popad] = 11; // Pop all General Registers (use32)
-SMPTypeCategory[NN_popaq] = 11; // Pop all General Registers (use64)
-SMPTypeCategory[NN_popfw] = 11; // Pop Stack into Flags Register **
-SMPTypeCategory[NN_popf] = 11; // Pop Stack into Flags Register **
-SMPTypeCategory[NN_popfd] = 11; // Pop Stack into Eflags Register **
-SMPTypeCategory[NN_popfq] = 11; // Pop Stack into Rflags Register **
-SMPTypeCategory[NN_push] = 11; // Push Operand onto the Stack
-SMPTypeCategory[NN_pushaw] = 11; // Push all General Registers
-SMPTypeCategory[NN_pusha] = 11; // Push all General Registers
-SMPTypeCategory[NN_pushad] = 11; // Push all General Registers (use32)
-SMPTypeCategory[NN_pushaq] = 11; // Push all General Registers (use64)
-SMPTypeCategory[NN_pushfw] = 11; // Push Flags Register onto the Stack
-SMPTypeCategory[NN_pushf] = 11; // Push Flags Register onto the Stack
-SMPTypeCategory[NN_pushfd] = 11; // Push Flags Register onto the Stack (use32)
-SMPTypeCategory[NN_pushfq] = 11; // Push Flags Register onto the Stack (use64)
-SMPTypeCategory[NN_rcl] = 2; // Rotate Through Carry Left
-SMPTypeCategory[NN_rcr] = 2; // Rotate Through Carry Right
-SMPTypeCategory[NN_rol] = 2; // Rotate Left
-SMPTypeCategory[NN_ror] = 2; // Rotate Right
-SMPTypeCategory[NN_rep] = 0; // Repeat String Operation
-SMPTypeCategory[NN_repe] = 0; // Repeat String Operation while ZF=1
-SMPTypeCategory[NN_repne] = 0; // Repeat String Operation while ZF=0
-SMPTypeCategory[NN_retn] = 0; // Return Near from Procedure
-SMPTypeCategory[NN_retf] = 0; // Return Far from Procedure
-SMPTypeCategory[NN_sahf] = 14; // Store AH into Flags Register
-SMPTypeCategory[NN_sal] = 2; // Shift Arithmetic Left
-SMPTypeCategory[NN_sar] = 2; // Shift Arithmetic Right
-SMPTypeCategory[NN_shl] = 2; // Shift Logical Left
-SMPTypeCategory[NN_shr] = 2; // Shift Logical Right
-SMPTypeCategory[NN_sbb] = 5; // Integer Subtraction with Borrow
-SMPTypeCategory[NN_scas] = 14; // Compare String
-SMPTypeCategory[NN_seta] = 2; // Set Byte if Above (CF=0 & ZF=0)
-SMPTypeCategory[NN_setae] = 2; // Set Byte if Above or Equal (CF=0)
-SMPTypeCategory[NN_setb] = 2; // Set Byte if Below (CF=1)
-SMPTypeCategory[NN_setbe] = 2; // Set Byte if Below or Equal (CF=1 | ZF=1)
-SMPTypeCategory[NN_setc] = 2; // Set Byte if Carry (CF=1)
-SMPTypeCategory[NN_sete] = 2; // Set Byte if Equal (ZF=1)
-SMPTypeCategory[NN_setg] = 2; // Set Byte if Greater (ZF=0 & SF=OF)
-SMPTypeCategory[NN_setge] = 2; // Set Byte if Greater or Equal (SF=OF)
-SMPTypeCategory[NN_setl] = 2; // Set Byte if Less (SF!=OF)
-SMPTypeCategory[NN_setle] = 2; // Set Byte if Less or Equal (ZF=1 | SF!=OF)
-SMPTypeCategory[NN_setna] = 2; // Set Byte if Not Above (CF=1 | ZF=1)
-SMPTypeCategory[NN_setnae] = 2; // Set Byte if Not Above or Equal (CF=1)
-SMPTypeCategory[NN_setnb] = 2; // Set Byte if Not Below (CF=0)
-SMPTypeCategory[NN_setnbe] = 2; // Set Byte if Not Below or Equal (CF=0 & ZF=0)
-SMPTypeCategory[NN_setnc] = 2; // Set Byte if Not Carry (CF=0)
-SMPTypeCategory[NN_setne] = 2; // Set Byte if Not Equal (ZF=0)
-SMPTypeCategory[NN_setng] = 2; // Set Byte if Not Greater (ZF=1 | SF!=OF)
-SMPTypeCategory[NN_setnge] = 2; // Set Byte if Not Greater or Equal (SF!=OF)
-SMPTypeCategory[NN_setnl] = 2; // Set Byte if Not Less (SF=OF)
-SMPTypeCategory[NN_setnle] = 2; // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
-SMPTypeCategory[NN_setno] = 2; // Set Byte if Not Overflow (OF=0)
-SMPTypeCategory[NN_setnp] = 2; // Set Byte if Not Parity (PF=0)
-SMPTypeCategory[NN_setns] = 2; // Set Byte if Not Sign (SF=0)
-SMPTypeCategory[NN_setnz] = 2; // Set Byte if Not Zero (ZF=0)
-SMPTypeCategory[NN_seto] = 2; // Set Byte if Overflow (OF=1)
-SMPTypeCategory[NN_setp] = 2; // Set Byte if Parity (PF=1)
-SMPTypeCategory[NN_setpe] = 2; // Set Byte if Parity Even (PF=1)
-SMPTypeCategory[NN_setpo] = 2; // Set Byte if Parity Odd (PF=0)
-SMPTypeCategory[NN_sets] = 2; // Set Byte if Sign (SF=1)
-SMPTypeCategory[NN_setz] = 2; // Set Byte if Zero (ZF=1)
-SMPTypeCategory[NN_sgdt] = 0; // Store Global Descriptor Table Register
-SMPTypeCategory[NN_sidt] = 0; // Store Interrupt Descriptor Table Register
-SMPTypeCategory[NN_shld] = 2; // Double Precision Shift Left
-SMPTypeCategory[NN_shrd] = 2; // Double Precision Shift Right
-SMPTypeCategory[NN_sldt] = 6; // Store Local Descriptor Table Register
-SMPTypeCategory[NN_smsw] = 2; // Store Machine Status Word
-SMPTypeCategory[NN_stc] = 1; // Set Carry Flag
-SMPTypeCategory[NN_std] = 1; // Set Direction Flag
-SMPTypeCategory[NN_sti] = 1; // Set Interrupt Flag
-SMPTypeCategory[NN_stos] = 0; // Store String
-SMPTypeCategory[NN_str] = 6; // Store Task Register
-SMPTypeCategory[NN_sub] = 5; // Integer Subtraction
-SMPTypeCategory[NN_test] = 1; // Logical Compare
-SMPTypeCategory[NN_verr] = 1; // Verify a Segment for Reading
-SMPTypeCategory[NN_verw] = 1; // Verify a Segment for Writing
-SMPTypeCategory[NN_wait] = 1; // Wait until BUSY# Pin is Inactive (HIGH)
-SMPTypeCategory[NN_xchg] = 12; // Exchange Register/Memory with Register
-SMPTypeCategory[NN_xlat] = 0; // Table Lookup Translation
-SMPTypeCategory[NN_xor] = 2; // Logical Exclusive OR
-
-//
-// 486 instructions
-//
-
-SMPTypeCategory[NN_cmpxchg] = 12; // Compare and Exchange
-SMPTypeCategory[NN_bswap] = 1; // Swap bytes in register
-SMPTypeCategory[NN_xadd] = 12; // t<-dest; dest<-src+dest; src<-t
-SMPTypeCategory[NN_invd] = 1; // Invalidate Data Cache
-SMPTypeCategory[NN_wbinvd] = 1; // Invalidate Data Cache (write changes)
-SMPTypeCategory[NN_invlpg] = 1; // Invalidate TLB entry
-
-//
-// Pentium instructions
-//
-
-SMPTypeCategory[NN_rdmsr] = 8; // Read Machine Status Register
-SMPTypeCategory[NN_wrmsr] = 1; // Write Machine Status Register
-SMPTypeCategory[NN_cpuid] = 8; // Get CPU ID
-SMPTypeCategory[NN_cmpxchg8b] = 12; // Compare and Exchange Eight Bytes
-SMPTypeCategory[NN_rdtsc] = 8; // Read Time Stamp Counter
-SMPTypeCategory[NN_rsm] = 1; // Resume from System Management Mode
-
-//
-// Pentium Pro instructions
-//
-
-SMPTypeCategory[NN_cmova] = 0; // Move if Above (CF=0 & ZF=0)
-SMPTypeCategory[NN_cmovb] = 0; // Move if Below (CF=1)
-SMPTypeCategory[NN_cmovbe] = 0; // Move if Below or Equal (CF=1 | ZF=1)
-SMPTypeCategory[NN_cmovg] = 0; // Move if Greater (ZF=0 & SF=OF)
-SMPTypeCategory[NN_cmovge] = 0; // Move if Greater or Equal (SF=OF)
-SMPTypeCategory[NN_cmovl] = 0; // Move if Less (SF!=OF)
-SMPTypeCategory[NN_cmovle] = 0; // Move if Less or Equal (ZF=1 | SF!=OF)
-SMPTypeCategory[NN_cmovnb] = 0; // Move if Not Below (CF=0)
-SMPTypeCategory[NN_cmovno] = 0; // Move if Not Overflow (OF=0)
-SMPTypeCategory[NN_cmovnp] = 0; // Move if Not Parity (PF=0)
-SMPTypeCategory[NN_cmovns] = 0; // Move if Not Sign (SF=0)
-SMPTypeCategory[NN_cmovnz] = 0; // Move if Not Zero (ZF=0)
-SMPTypeCategory[NN_cmovo] = 0; // Move if Overflow (OF=1)
-SMPTypeCategory[NN_cmovp] = 0; // Move if Parity (PF=1)
-SMPTypeCategory[NN_cmovs] = 0; // Move if Sign (SF=1)
-SMPTypeCategory[NN_cmovz] = 0; // Move if Zero (ZF=1)
-SMPTypeCategory[NN_fcmovb] = 1; // Floating Move if Below
-SMPTypeCategory[NN_fcmove] = 1; // Floating Move if Equal
-SMPTypeCategory[NN_fcmovbe] = 1; // Floating Move if Below or Equal
-SMPTypeCategory[NN_fcmovu] = 1; // Floating Move if Unordered
-SMPTypeCategory[NN_fcmovnb] = 1; // Floating Move if Not Below
-SMPTypeCategory[NN_fcmovne] = 1; // Floating Move if Not Equal
-SMPTypeCategory[NN_fcmovnbe] = 1; // Floating Move if Not Below or Equal
-SMPTypeCategory[NN_fcmovnu] = 1; // Floating Move if Not Unordered
-SMPTypeCategory[NN_fcomi] = 1; // FP Compare, result in EFLAGS
-SMPTypeCategory[NN_fucomi] = 1; // FP Unordered Compare, result in EFLAGS
-SMPTypeCategory[NN_fcomip] = 1; // FP Compare, result in EFLAGS, pop stack
-SMPTypeCategory[NN_fucomip] = 1; // FP Unordered Compare, result in EFLAGS, pop stack
-SMPTypeCategory[NN_rdpmc] = 8; // Read Performance Monitor Counter
-
-//
-// FPP instructions
-//
-
-SMPTypeCategory[NN_fld] = 14; // Load Real ** Infer src is 'n'
-SMPTypeCategory[NN_fst] = 9; // Store Real
-SMPTypeCategory[NN_fstp] = 9; // Store Real and Pop
-SMPTypeCategory[NN_fxch] = 1; // Exchange Registers
-SMPTypeCategory[NN_fild] = 14; // Load Integer ** Infer src is 'n'
-SMPTypeCategory[NN_fist] = 13; // Store Integer
-SMPTypeCategory[NN_fistp] = 13; // Store Integer and Pop
-SMPTypeCategory[NN_fbld] = 1; // Load BCD
-SMPTypeCategory[NN_fbstp] = 13; // Store BCD and Pop
-SMPTypeCategory[NN_fadd] = 14; // Add Real
-SMPTypeCategory[NN_faddp] = 14; // Add Real and Pop
-SMPTypeCategory[NN_fiadd] = 14; // Add Integer
-SMPTypeCategory[NN_fsub] = 14; // Subtract Real
-SMPTypeCategory[NN_fsubp] = 14; // Subtract Real and Pop
-SMPTypeCategory[NN_fisub] = 14; // Subtract Integer
-SMPTypeCategory[NN_fsubr] = 14; // Subtract Real Reversed
-SMPTypeCategory[NN_fsubrp] = 14; // Subtract Real Reversed and Pop
-SMPTypeCategory[NN_fisubr] = 14; // Subtract Integer Reversed
-SMPTypeCategory[NN_fmul] = 14; // Multiply Real
-SMPTypeCategory[NN_fmulp] = 14; // Multiply Real and Pop
-SMPTypeCategory[NN_fimul] = 14; // Multiply Integer
-SMPTypeCategory[NN_fdiv] = 14; // Divide Real
-SMPTypeCategory[NN_fdivp] = 14; // Divide Real and Pop
-SMPTypeCategory[NN_fidiv] = 14; // Divide Integer
-SMPTypeCategory[NN_fdivr] = 14; // Divide Real Reversed
-SMPTypeCategory[NN_fdivrp] = 14; // Divide Real Reversed and Pop
-SMPTypeCategory[NN_fidivr] = 14; // Divide Integer Reversed
-SMPTypeCategory[NN_fsqrt] = 1; // Square Root
-SMPTypeCategory[NN_fscale] = 1; // Scale: st(0) <- st(0) * 2^st(1)
-SMPTypeCategory[NN_fprem] = 1; // Partial Remainder
-SMPTypeCategory[NN_frndint] = 1; // Round to Integer
-SMPTypeCategory[NN_fxtract] = 1; // Extract exponent and significand
-SMPTypeCategory[NN_fabs] = 1; // Absolute value
-SMPTypeCategory[NN_fchs] = 1; // Change Sign
-SMPTypeCategory[NN_fcom] = 1; // Compare Real
-SMPTypeCategory[NN_fcomp] = 1; // Compare Real and Pop
-SMPTypeCategory[NN_fcompp] = 1; // Compare Real and Pop Twice
-SMPTypeCategory[NN_ficom] = 1; // Compare Integer
-SMPTypeCategory[NN_ficomp] = 1; // Compare Integer and Pop
-SMPTypeCategory[NN_ftst] = 1; // Test
-SMPTypeCategory[NN_fxam] = 1; // Examine
-SMPTypeCategory[NN_fptan] = 1; // Partial tangent
-SMPTypeCategory[NN_fpatan] = 1; // Partial arctangent
-SMPTypeCategory[NN_f2xm1] = 1; // 2^x - 1
-SMPTypeCategory[NN_fyl2x] = 1; // Y * lg2(X)
-SMPTypeCategory[NN_fyl2xp1] = 1; // Y * lg2(X+1)
-SMPTypeCategory[NN_fldz] = 1; // Load +0.0
-SMPTypeCategory[NN_fld1] = 1; // Load +1.0
-SMPTypeCategory[NN_fldpi] = 1; // Load PI=3.14...
-SMPTypeCategory[NN_fldl2t] = 1; // Load lg2(10)
-SMPTypeCategory[NN_fldl2e] = 1; // Load lg2(e)
-SMPTypeCategory[NN_fldlg2] = 1; // Load lg10(2)
-SMPTypeCategory[NN_fldln2] = 1; // Load ln(2)
-SMPTypeCategory[NN_finit] = 1; // Initialize Processor
-SMPTypeCategory[NN_fninit] = 1; // Initialize Processor (no wait)
-SMPTypeCategory[NN_fsetpm] = 1; // Set Protected Mode
-SMPTypeCategory[NN_fldcw] = 14; // Load Control Word
-SMPTypeCategory[NN_fstcw] = 13; // Store Control Word
-SMPTypeCategory[NN_fnstcw] = 13; // Store Control Word (no wait)
-SMPTypeCategory[NN_fstsw] = 2; // Store Status Word to memory or AX
-SMPTypeCategory[NN_fnstsw] = 2; // Store Status Word (no wait) to memory or AX
-SMPTypeCategory[NN_fclex] = 1; // Clear Exceptions
-SMPTypeCategory[NN_fnclex] = 1; // Clear Exceptions (no wait)
-SMPTypeCategory[NN_fstenv] = 13; // Store Environment
-SMPTypeCategory[NN_fnstenv] = 13; // Store Environment (no wait)
-SMPTypeCategory[NN_fldenv] = 14; // Load Environment
-SMPTypeCategory[NN_fsave] = 13; // Save State
-SMPTypeCategory[NN_fnsave] = 13; // Save State (no wait)
-SMPTypeCategory[NN_frstor] = 14; // Restore State ** infer src is 'n'
-SMPTypeCategory[NN_fincstp] = 1; // Increment Stack Pointer
-SMPTypeCategory[NN_fdecstp] = 1; // Decrement Stack Pointer
-SMPTypeCategory[NN_ffree] = 1; // Free Register
-SMPTypeCategory[NN_fnop] = 1; // No Operation
-SMPTypeCategory[NN_feni] = 1; // (8087 only)
-SMPTypeCategory[NN_fneni] = 1; // (no wait) (8087 only)
-SMPTypeCategory[NN_fdisi] = 1; // (8087 only)
-SMPTypeCategory[NN_fndisi] = 1; // (no wait) (8087 only)
-
-//
-// 80387 instructions
-//
-
-SMPTypeCategory[NN_fprem1] = 1; // Partial Remainder ( < half )
-SMPTypeCategory[NN_fsincos] = 1; // t<-cos(st); st<-sin(st); push t
-SMPTypeCategory[NN_fsin] = 1; // Sine
-SMPTypeCategory[NN_fcos] = 1; // Cosine
-SMPTypeCategory[NN_fucom] = 1; // Compare Unordered Real
-SMPTypeCategory[NN_fucomp] = 1; // Compare Unordered Real and Pop
-SMPTypeCategory[NN_fucompp] = 1; // Compare Unordered Real and Pop Twice
-
-//
-// Instructions added 28.02.96
-//
-
-SMPTypeCategory[NN_setalc] = 2; // Set AL to Carry Flag **
-SMPTypeCategory[NN_svdc] = 0; // Save Register and Descriptor
-SMPTypeCategory[NN_rsdc] = 0; // Restore Register and Descriptor
-SMPTypeCategory[NN_svldt] = 0; // Save LDTR and Descriptor
-SMPTypeCategory[NN_rsldt] = 0; // Restore LDTR and Descriptor
-SMPTypeCategory[NN_svts] = 1; // Save TR and Descriptor
-SMPTypeCategory[NN_rsts] = 1; // Restore TR and Descriptor
-SMPTypeCategory[NN_icebp] = 1; // ICE Break Point
-SMPTypeCategory[NN_loadall] = 0; // Load the entire CPU state from ES:EDI ???
-
-//
-// MMX instructions
-//
-
-SMPTypeCategory[NN_emms] = 1; // Empty MMX state
-SMPTypeCategory[NN_movd] = 15; // Move 32 bits
-SMPTypeCategory[NN_movq] = 15; // Move 64 bits
-SMPTypeCategory[NN_packsswb] = 14; // Pack with Signed Saturation (Word->Byte)
-SMPTypeCategory[NN_packssdw] = 14; // Pack with Signed Saturation (Dword->Word)
-SMPTypeCategory[NN_packuswb] = 14; // Pack with Unsigned Saturation (Word->Byte)
-SMPTypeCategory[NN_paddb] = 14; // Packed Add Byte
-SMPTypeCategory[NN_paddw] = 14; // Packed Add Word
-SMPTypeCategory[NN_paddd] = 14; // Packed Add Dword
-SMPTypeCategory[NN_paddsb] = 14; // Packed Add with Saturation (Byte)
-SMPTypeCategory[NN_paddsw] = 14; // Packed Add with Saturation (Word)
-SMPTypeCategory[NN_paddusb] = 14; // Packed Add Unsigned with Saturation (Byte)
-SMPTypeCategory[NN_paddusw] = 14; // Packed Add Unsigned with Saturation (Word)
-SMPTypeCategory[NN_pand] = 14; // Bitwise Logical And
-SMPTypeCategory[NN_pandn] = 14; // Bitwise Logical And Not
-SMPTypeCategory[NN_pcmpeqb] = 14; // Packed Compare for Equal (Byte)
-SMPTypeCategory[NN_pcmpeqw] = 14; // Packed Compare for Equal (Word)
-SMPTypeCategory[NN_pcmpeqd] = 14; // Packed Compare for Equal (Dword)
-SMPTypeCategory[NN_pcmpgtb] = 14; // Packed Compare for Greater Than (Byte)
-SMPTypeCategory[NN_pcmpgtw] = 14; // Packed Compare for Greater Than (Word)
-SMPTypeCategory[NN_pcmpgtd] = 14; // Packed Compare for Greater Than (Dword)
-SMPTypeCategory[NN_pmaddwd] = 14; // Packed Multiply and Add
-SMPTypeCategory[NN_pmulhw] = 14; // Packed Multiply High
-SMPTypeCategory[NN_pmullw] = 14; // Packed Multiply Low
-SMPTypeCategory[NN_por] = 14; // Bitwise Logical Or
-SMPTypeCategory[NN_psllw] = 14; // Packed Shift Left Logical (Word)
-SMPTypeCategory[NN_pslld] = 14; // Packed Shift Left Logical (Dword)
-SMPTypeCategory[NN_psllq] = 14; // Packed Shift Left Logical (Qword)
-SMPTypeCategory[NN_psraw] = 14; // Packed Shift Right Arithmetic (Word)
-SMPTypeCategory[NN_psrad] = 14; // Packed Shift Right Arithmetic (Dword)
-SMPTypeCategory[NN_psrlw] = 14; // Packed Shift Right Logical (Word)
-SMPTypeCategory[NN_psrld] = 14; // Packed Shift Right Logical (Dword)
-SMPTypeCategory[NN_psrlq] = 14; // Packed Shift Right Logical (Qword)
-SMPTypeCategory[NN_psubb] = 14; // Packed Subtract Byte
-SMPTypeCategory[NN_psubw] = 14; // Packed Subtract Word
-SMPTypeCategory[NN_psubd] = 14; // Packed Subtract Dword
-SMPTypeCategory[NN_psubsb] = 14; // Packed Subtract with Saturation (Byte)
-SMPTypeCategory[NN_psubsw] = 14; // Packed Subtract with Saturation (Word)
-SMPTypeCategory[NN_psubusb] = 14; // Packed Subtract Unsigned with Saturation (Byte)
-SMPTypeCategory[NN_psubusw] = 14; // Packed Subtract Unsigned with Saturation (Word)
-SMPTypeCategory[NN_punpckhbw] = 14; // Unpack High Packed Data (Byte->Word)
-SMPTypeCategory[NN_punpckhwd] = 14; // Unpack High Packed Data (Word->Dword)
-SMPTypeCategory[NN_punpckhdq] = 14; // Unpack High Packed Data (Dword->Qword)
-SMPTypeCategory[NN_punpcklbw] = 14; // Unpack Low Packed Data (Byte->Word)
-SMPTypeCategory[NN_punpcklwd] = 14; // Unpack Low Packed Data (Word->Dword)
-SMPTypeCategory[NN_punpckldq] = 14; // Unpack Low Packed Data (Dword->Qword)
-SMPTypeCategory[NN_pxor] = 14; // Bitwise Logical Exclusive Or
-
-//
-// Undocumented Deschutes processor instructions
-//
-
-SMPTypeCategory[NN_fxsave] = 1; // Fast save FP context ** to where?
-SMPTypeCategory[NN_fxrstor] = 1; // Fast restore FP context ** from where?
-
-// Pentium II instructions
-
-SMPTypeCategory[NN_sysenter] = 1; // Fast Transition to System Call Entry Point
-SMPTypeCategory[NN_sysexit] = 1; // Fast Transition from System Call Entry Point
-
-// 3DNow! instructions
-
-SMPTypeCategory[NN_pavgusb] = 14; // Packed 8-bit Unsigned Integer Averaging
-SMPTypeCategory[NN_pfadd] = 14; // Packed Floating-Point Addition
-SMPTypeCategory[NN_pfsub] = 14; // Packed Floating-Point Subtraction
-SMPTypeCategory[NN_pfsubr] = 14; // Packed Floating-Point Reverse Subtraction
-SMPTypeCategory[NN_pfacc] = 14; // Packed Floating-Point Accumulate
-SMPTypeCategory[NN_pfcmpge] = 14; // Packed Floating-Point Comparison, Greater or Equal
-SMPTypeCategory[NN_pfcmpgt] = 14; // Packed Floating-Point Comparison, Greater
-SMPTypeCategory[NN_pfcmpeq] = 14; // Packed Floating-Point Comparison, Equal
-SMPTypeCategory[NN_pfmin] = 14; // Packed Floating-Point Minimum
-SMPTypeCategory[NN_pfmax] = 14; // Packed Floating-Point Maximum
-SMPTypeCategory[NN_pi2fd] = 14; // Packed 32-bit Integer to Floating-Point
-SMPTypeCategory[NN_pf2id] = 14; // Packed Floating-Point to 32-bit Integer
-SMPTypeCategory[NN_pfrcp] = 14; // Packed Floating-Point Reciprocal Approximation
-SMPTypeCategory[NN_pfrsqrt] = 14; // Packed Floating-Point Reciprocal Square Root Approximation
-SMPTypeCategory[NN_pfmul] = 14; // Packed Floating-Point Multiplication
-SMPTypeCategory[NN_pfrcpit1] = 14; // Packed Floating-Point Reciprocal First Iteration Step
-SMPTypeCategory[NN_pfrsqit1] = 14; // Packed Floating-Point Reciprocal Square Root First Iteration Step
-SMPTypeCategory[NN_pfrcpit2] = 14; // Packed Floating-Point Reciprocal Second Iteration Step
-SMPTypeCategory[NN_pmulhrw] = 14; // Packed Floating-Point 16-bit Integer Multiply with rounding
-SMPTypeCategory[NN_femms] = 1; // Faster entry/exit of the MMX or floating-point state
-SMPTypeCategory[NN_prefetch] = 1; // Prefetch at least a 32-byte line into L1 data cache
-SMPTypeCategory[NN_prefetchw] = 1; // Prefetch processor cache line into L1 data cache (mark as modified)
-
-
-// Pentium III instructions
-
-SMPTypeCategory[NN_addps] = 14; // Packed Single-FP Add
-SMPTypeCategory[NN_addss] = 14; // Scalar Single-FP Add
-SMPTypeCategory[NN_andnps] = 14; // Bitwise Logical And Not for Single-FP
-SMPTypeCategory[NN_andps] = 14; // Bitwise Logical And for Single-FP
-SMPTypeCategory[NN_cmpps] = 14; // Packed Single-FP Compare
-SMPTypeCategory[NN_cmpss] = 14; // Scalar Single-FP Compare
-SMPTypeCategory[NN_comiss] = 14; // Scalar Ordered Single-FP Compare and Set EFLAGS
-SMPTypeCategory[NN_cvtpi2ps] = 14; // Packed signed INT32 to Packed Single-FP conversion
-SMPTypeCategory[NN_cvtps2pi] = 14; // Packed Single-FP to Packed INT32 conversion
-SMPTypeCategory[NN_cvtsi2ss] = 14; // Scalar signed INT32 to Single-FP conversion
-SMPTypeCategory[NN_cvtss2si] = 14; // Scalar Single-FP to signed INT32 conversion
-SMPTypeCategory[NN_cvttps2pi] = 14; // Packed Single-FP to Packed INT32 conversion (truncate)
-SMPTypeCategory[NN_cvttss2si] = 14; // Scalar Single-FP to signed INT32 conversion (truncate)
-SMPTypeCategory[NN_divps] = 14; // Packed Single-FP Divide
-SMPTypeCategory[NN_divss] = 14; // Scalar Single-FP Divide
-SMPTypeCategory[NN_ldmxcsr] = 14; // Load Streaming SIMD Extensions Technology Control/Status Register
-SMPTypeCategory[NN_maxps] = 14; // Packed Single-FP Maximum
-SMPTypeCategory[NN_maxss] = 14; // Scalar Single-FP Maximum
-SMPTypeCategory[NN_minps] = 14; // Packed Single-FP Minimum
-SMPTypeCategory[NN_minss] = 14; // Scalar Single-FP Minimum
-SMPTypeCategory[NN_movaps] = 15; // Move Aligned Four Packed Single-FP ** infer memsrc 'n'?
-SMPTypeCategory[NN_movhlps] = 15; // Move High to Low Packed Single-FP
-SMPTypeCategory[NN_movhps] = 15; // Move High Packed Single-FP
-SMPTypeCategory[NN_movlhps] = 15; // Move Low to High Packed Single-FP
-SMPTypeCategory[NN_movlps] = 15; // Move Low Packed Single-FP
-SMPTypeCategory[NN_movmskps] = 15; // Move Mask to Register
-SMPTypeCategory[NN_movss] = 15; // Move Scalar Single-FP
-SMPTypeCategory[NN_movups] = 15; // Move Unaligned Four Packed Single-FP
-SMPTypeCategory[NN_mulps] = 14; // Packed Single-FP Multiply
-SMPTypeCategory[NN_mulss] = 14; // Scalar Single-FP Multiply
-SMPTypeCategory[NN_orps] = 14; // Bitwise Logical OR for Single-FP Data
-SMPTypeCategory[NN_rcpps] = 14; // Packed Single-FP Reciprocal
-SMPTypeCategory[NN_rcpss] = 14; // Scalar Single-FP Reciprocal
-SMPTypeCategory[NN_rsqrtps] = 14; // Packed Single-FP Square Root Reciprocal
-SMPTypeCategory[NN_rsqrtss] = 14; // Scalar Single-FP Square Root Reciprocal
-SMPTypeCategory[NN_shufps] = 14; // Shuffle Single-FP
-SMPTypeCategory[NN_sqrtps] = 14; // Packed Single-FP Square Root
-SMPTypeCategory[NN_sqrtss] = 14; // Scalar Single-FP Square Root
-SMPTypeCategory[NN_stmxcsr] = 15; // Store Streaming SIMD Extensions Technology Control/Status Register ** Infer dest is 'n'
-SMPTypeCategory[NN_subps] = 14; // Packed Single-FP Subtract
-SMPTypeCategory[NN_subss] = 14; // Scalar Single-FP Subtract
-SMPTypeCategory[NN_ucomiss] = 14; // Scalar Unordered Single-FP Compare and Set EFLAGS
-SMPTypeCategory[NN_unpckhps] = 14; // Unpack High Packed Single-FP Data
-SMPTypeCategory[NN_unpcklps] = 14; // Unpack Low Packed Single-FP Data
-SMPTypeCategory[NN_xorps] = 14; // Bitwise Logical XOR for Single-FP Data
-SMPTypeCategory[NN_pavgb] = 14; // Packed Average (Byte)
-SMPTypeCategory[NN_pavgw] = 14; // Packed Average (Word)
-SMPTypeCategory[NN_pextrw] = 15; // Extract Word
-SMPTypeCategory[NN_pinsrw] = 14; // Insert Word
-SMPTypeCategory[NN_pmaxsw] = 14; // Packed Signed Integer Word Maximum
-SMPTypeCategory[NN_pmaxub] = 14; // Packed Unsigned Integer Byte Maximum
-SMPTypeCategory[NN_pminsw] = 14; // Packed Signed Integer Word Minimum
-SMPTypeCategory[NN_pminub] = 14; // Packed Unsigned Integer Byte Minimum
-SMPTypeCategory[NN_pmovmskb] = 2; // Move Byte Mask to Integer
-SMPTypeCategory[NN_pmulhuw] = 14; // Packed Multiply High Unsigned
-SMPTypeCategory[NN_psadbw] = 14; // Packed Sum of Absolute Differences
-SMPTypeCategory[NN_pshufw] = 14; // Packed Shuffle Word
-SMPTypeCategory[NN_maskmovq] = 15; // Byte Mask write ** Infer dest is 'n'
-SMPTypeCategory[NN_movntps] = 13; // Move Aligned Four Packed Single-FP Non Temporal * infer dest is 'n'
-SMPTypeCategory[NN_movntq] = 13; // Move 64 Bits Non Temporal ** Infer dest is 'n'
-SMPTypeCategory[NN_prefetcht0] = 1; // Prefetch to all cache levels
-SMPTypeCategory[NN_prefetcht1] = 1; // Prefetch to all cache levels
-SMPTypeCategory[NN_prefetcht2] = 1; // Prefetch to L2 cache
-SMPTypeCategory[NN_prefetchnta] = 1; // Prefetch to L1 cache
-SMPTypeCategory[NN_sfence] = 1; // Store Fence
-
-// Pentium III Pseudo instructions
-
-SMPTypeCategory[NN_cmpeqps] = 14; // Packed Single-FP Compare EQ
-SMPTypeCategory[NN_cmpltps] = 14; // Packed Single-FP Compare LT
-SMPTypeCategory[NN_cmpleps] = 14; // Packed Single-FP Compare LE
-SMPTypeCategory[NN_cmpunordps] = 14; // Packed Single-FP Compare UNORD
-SMPTypeCategory[NN_cmpneqps] = 14; // Packed Single-FP Compare NOT EQ
-SMPTypeCategory[NN_cmpnltps] = 14; // Packed Single-FP Compare NOT LT
-SMPTypeCategory[NN_cmpnleps] = 14; // Packed Single-FP Compare NOT LE
-SMPTypeCategory[NN_cmpordps] = 14; // Packed Single-FP Compare ORDERED
-SMPTypeCategory[NN_cmpeqss] = 14; // Scalar Single-FP Compare EQ
-SMPTypeCategory[NN_cmpltss] = 14; // Scalar Single-FP Compare LT
-SMPTypeCategory[NN_cmpless] = 14; // Scalar Single-FP Compare LE
-SMPTypeCategory[NN_cmpunordss] = 14; // Scalar Single-FP Compare UNORD
-SMPTypeCategory[NN_cmpneqss] = 14; // Scalar Single-FP Compare NOT EQ
-SMPTypeCategory[NN_cmpnltss] = 14; // Scalar Single-FP Compare NOT LT
-SMPTypeCategory[NN_cmpnless] = 14; // Scalar Single-FP Compare NOT LE
-SMPTypeCategory[NN_cmpordss] = 14; // Scalar Single-FP Compare ORDERED
-
-// AMD K7 instructions
-
-// Revisit AMD if we port to it.
-SMPTypeCategory[NN_pf2iw] = 15; // Packed Floating-Point to Integer with Sign Extend
-SMPTypeCategory[NN_pfnacc] = 15; // Packed Floating-Point Negative Accumulate
-SMPTypeCategory[NN_pfpnacc] = 15; // Packed Floating-Point Mixed Positive-Negative Accumulate
-SMPTypeCategory[NN_pi2fw] = 15; // Packed 16-bit Integer to Floating-Point
-SMPTypeCategory[NN_pswapd] = 15; // Packed Swap Double Word
-
-// Undocumented FP instructions (thanks to norbert.juffa@adm.com)
-
-SMPTypeCategory[NN_fstp1] = 9; // Alias of Store Real and Pop
-SMPTypeCategory[NN_fcom2] = 1; // Alias of Compare Real
-SMPTypeCategory[NN_fcomp3] = 1; // Alias of Compare Real and Pop
-SMPTypeCategory[NN_fxch4] = 1; // Alias of Exchange Registers
-SMPTypeCategory[NN_fcomp5] = 1; // Alias of Compare Real and Pop
-SMPTypeCategory[NN_ffreep] = 1; // Free Register and Pop
-SMPTypeCategory[NN_fxch7] = 1; // Alias of Exchange Registers
-SMPTypeCategory[NN_fstp8] = 9; // Alias of Store Real and Pop
-SMPTypeCategory[NN_fstp9] = 9; // Alias of Store Real and Pop
-
-// Pentium 4 instructions
-
-SMPTypeCategory[NN_addpd] = 14; // Add Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_addsd] = 14; // Add Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_andnpd] = 14; // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_andpd] = 14; // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_clflush] = 1; // Flush Cache Line
-SMPTypeCategory[NN_cmppd] = 14; // Compare Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_cmpsd] = 14; // Compare Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_comisd] = 14; // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
-SMPTypeCategory[NN_cvtdq2pd] = 14; // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_cvtdq2ps] = 14; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_cvtpd2dq] = 14; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
-SMPTypeCategory[NN_cvtpd2pi] = 14; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
-SMPTypeCategory[NN_cvtpd2ps] = 14; // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_cvtpi2pd] = 14; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_cvtps2dq] = 14; // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
-SMPTypeCategory[NN_cvtps2pd] = 14; // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_cvtsd2si] = 14; // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
-SMPTypeCategory[NN_cvtsd2ss] = 14; // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
-SMPTypeCategory[NN_cvtsi2sd] = 14; // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
-SMPTypeCategory[NN_cvtss2sd] = 14; // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
-SMPTypeCategory[NN_cvttpd2dq] = 14; // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
-SMPTypeCategory[NN_cvttpd2pi] = 14; // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
-SMPTypeCategory[NN_cvttps2dq] = 14; // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
-SMPTypeCategory[NN_cvttsd2si] = 14; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
-SMPTypeCategory[NN_divpd] = 14; // Divide Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_divsd] = 14; // Divide Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_lfence] = 1; // Load Fence
-SMPTypeCategory[NN_maskmovdqu] = 13; // Store Selected Bytes of Double Quadword ** Infer dest is 'n'
-SMPTypeCategory[NN_maxpd] = 14; // Return Maximum Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_maxsd] = 14; // Return Maximum Scalar Double-Precision Floating-Point Value
-SMPTypeCategory[NN_mfence] = 1; // Memory Fence
-SMPTypeCategory[NN_minpd] = 14; // Return Minimum Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_minsd] = 14; // Return Minimum Scalar Double-Precision Floating-Point Value
-SMPTypeCategory[NN_movapd] = 15; // Move Aligned Packed Double-Precision Floating-Point Values ** Infer dest is 'n'
-SMPTypeCategory[NN_movdq2q] = 15; // Move Quadword from XMM to MMX Register
-SMPTypeCategory[NN_movdqa] = 15; // Move Aligned Double Quadword ** Infer dest is 'n'
-SMPTypeCategory[NN_movdqu] = 15; // Move Unaligned Double Quadword ** Infer dest is 'n'
-SMPTypeCategory[NN_movhpd] = 15; // Move High Packed Double-Precision Floating-Point Values ** Infer dest is 'n'
-SMPTypeCategory[NN_movlpd] = 15; // Move Low Packed Double-Precision Floating-Point Values ** Infer dest is 'n'
-SMPTypeCategory[NN_movmskpd] = 15; // Extract Packed Double-Precision Floating-Point Sign Mask
-SMPTypeCategory[NN_movntdq] = 13; // Store Double Quadword Using Non-Temporal Hint
-SMPTypeCategory[NN_movnti] = 13; // Store Doubleword Using Non-Temporal Hint
-SMPTypeCategory[NN_movntpd] = 13; // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
-SMPTypeCategory[NN_movq2dq] = 1; // Move Quadword from MMX to XMM Register
-SMPTypeCategory[NN_movsd] = 15; // Move Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_movupd] = 15; // Move Unaligned Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_mulpd] = 14; // Multiply Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_mulsd] = 14; // Multiply Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_orpd] = 14; // Bitwise Logical OR of Double-Precision Floating-Point Values
-SMPTypeCategory[NN_paddq] = 14; // Add Packed Quadword Integers
-SMPTypeCategory[NN_pause] = 1; // Spin Loop Hint
-SMPTypeCategory[NN_pmuludq] = 14; // Multiply Packed Unsigned Doubleword Integers
-SMPTypeCategory[NN_pshufd] = 14; // Shuffle Packed Doublewords
-SMPTypeCategory[NN_pshufhw] = 14; // Shuffle Packed High Words
-SMPTypeCategory[NN_pshuflw] = 14; // Shuffle Packed Low Words
-SMPTypeCategory[NN_pslldq] = 14; // Shift Double Quadword Left Logical
-SMPTypeCategory[NN_psrldq] = 14; // Shift Double Quadword Right Logical
-SMPTypeCategory[NN_psubq] = 14; // Subtract Packed Quadword Integers
-SMPTypeCategory[NN_punpckhqdq] = 14; // Unpack High Data
-SMPTypeCategory[NN_punpcklqdq] = 14; // Unpack Low Data
-SMPTypeCategory[NN_shufpd] = 14; // Shuffle Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_sqrtpd] = 1; // Compute Square Roots of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_sqrtsd] = 14; // Compute Square Rootof Scalar Double-Precision Floating-Point Value
-SMPTypeCategory[NN_subpd] = 14; // Subtract Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_subsd] = 14; // Subtract Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_ucomisd] = 14; // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
-SMPTypeCategory[NN_unpckhpd] = 14; // Unpack and Interleave High Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_unpcklpd] = 14; // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_xorpd] = 14; // Bitwise Logical OR of Double-Precision Floating-Point Values
-
-
-// AMD syscall/sysret instructions NOTE: not AMD, found in Intel manual
-
-SMPTypeCategory[NN_syscall] = 1; // Low latency system call
-SMPTypeCategory[NN_sysret] = 1; // Return from system call
-
-// AMD64 instructions NOTE: not AMD, found in Intel manual
-
-SMPTypeCategory[NN_swapgs] = 1; // Exchange GS base with KernelGSBase MSR
-
-// New Pentium instructions (SSE3)
-
-SMPTypeCategory[NN_movddup] = 14; // Move One Double-FP and Duplicate
-SMPTypeCategory[NN_movshdup] = 14; // Move Packed Single-FP High and Duplicate
-SMPTypeCategory[NN_movsldup] = 14; // Move Packed Single-FP Low and Duplicate
-
-// Missing AMD64 instructions NOTE: also found in Intel manual
-
-SMPTypeCategory[NN_movsxd] = 2; // Move with Sign-Extend Doubleword
-SMPTypeCategory[NN_cmpxchg16b] = 0; // Compare and Exchange 16 Bytes
-
-// SSE3 instructions
-
-SMPTypeCategory[NN_addsubpd] = 14; // Add /Sub packed DP FP numbers
-SMPTypeCategory[NN_addsubps] = 14; // Add /Sub packed SP FP numbers
-SMPTypeCategory[NN_haddpd] = 14; // Add horizontally packed DP FP numbers
-SMPTypeCategory[NN_haddps] = 14; // Add horizontally packed SP FP numbers
-SMPTypeCategory[NN_hsubpd] = 14; // Sub horizontally packed DP FP numbers
-SMPTypeCategory[NN_hsubps] = 14; // Sub horizontally packed SP FP numbers
-SMPTypeCategory[NN_monitor] = 1; // Set up a linear address range to be monitored by hardware
-SMPTypeCategory[NN_mwait] = 1; // Wait until write-back store performed within the range specified by the MONITOR instruction
-SMPTypeCategory[NN_fisttp] = 13; // Store ST in intXX (chop) and pop
-SMPTypeCategory[NN_lddqu] = 14; // Load unaligned integer 128-bit
-
-// SSSE3 instructions
-
-SMPTypeCategory[NN_psignb] = 14; // Packed SIGN Byte
-SMPTypeCategory[NN_psignw] = 14; // Packed SIGN Word
-SMPTypeCategory[NN_psignd] = 14; // Packed SIGN Doubleword
-SMPTypeCategory[NN_pshufb] = 14; // Packed Shuffle Bytes
-SMPTypeCategory[NN_pmulhrsw] = 14; // Packed Multiply High with Round and Scale
-SMPTypeCategory[NN_pmaddubsw] = 14; // Multiply and Add Packed Signed and Unsigned Bytes
-SMPTypeCategory[NN_phsubsw] = 14; // Packed Horizontal Subtract and Saturate
-SMPTypeCategory[NN_phaddsw] = 14; // Packed Horizontal Add and Saturate
-SMPTypeCategory[NN_phaddw] = 14; // Packed Horizontal Add Word
-SMPTypeCategory[NN_phaddd] = 14; // Packed Horizontal Add Doubleword
-SMPTypeCategory[NN_phsubw] = 14; // Packed Horizontal Subtract Word
-SMPTypeCategory[NN_phsubd] = 14; // Packed Horizontal Subtract Doubleword
-SMPTypeCategory[NN_palignr] = 15; // Packed Align Right
-SMPTypeCategory[NN_pabsb] = 14; // Packed Absolute Value Byte
-SMPTypeCategory[NN_pabsw] = 14; // Packed Absolute Value Word
-SMPTypeCategory[NN_pabsd] = 14; // Packed Absolute Value Doubleword
-
-// VMX instructions
-
-SMPTypeCategory[NN_vmcall] = 1; // Call to VM Monitor
-SMPTypeCategory[NN_vmclear] = 0; // Clear Virtual Machine Control Structure
-SMPTypeCategory[NN_vmlaunch] = 1; // Launch Virtual Machine
-SMPTypeCategory[NN_vmresume] = 1; // Resume Virtual Machine
-SMPTypeCategory[NN_vmptrld] = 6; // Load Pointer to Virtual Machine Control Structure
-SMPTypeCategory[NN_vmptrst] = 0; // Store Pointer to Virtual Machine Control Structure
-SMPTypeCategory[NN_vmread] = 0; // Read Field from Virtual Machine Control Structure
-SMPTypeCategory[NN_vmwrite] = 0; // Write Field from Virtual Machine Control Structure
-SMPTypeCategory[NN_vmxoff] = 1; // Leave VMX Operation
-SMPTypeCategory[NN_vmxon] = 1; // Enter VMX Operation
-
-#if 599 < IDA_SDK_VERSION
-
-SMPTypeCategory[NN_ud2] = 1; // Undefined Instruction
-
-// Added with x86-64
-
-SMPTypeCategory[NN_rdtscp] = 8; // Read Time-Stamp Counter and Processor ID
-
-// Geode LX 3DNow! extensions
-
-SMPTypeCategory[NN_pfrcpv] = 1; // Reciprocal Approximation for a Pair of 32-bit Floats
-SMPTypeCategory[NN_pfrsqrtv] = 1; // Reciprocal Square Root Approximation for a Pair of 32-bit Floats
-
-// SSE2 pseudoinstructions
-
-SMPTypeCategory[NN_cmpeqpd] = 1; // Packed Double-FP Compare EQ
-SMPTypeCategory[NN_cmpltpd] = 1; // Packed Double-FP Compare LT
-SMPTypeCategory[NN_cmplepd] = 1; // Packed Double-FP Compare LE
-SMPTypeCategory[NN_cmpunordpd] = 1; // Packed Double-FP Compare UNORD
-SMPTypeCategory[NN_cmpneqpd] = 1; // Packed Double-FP Compare NOT EQ
-SMPTypeCategory[NN_cmpnltpd] = 1; // Packed Double-FP Compare NOT LT
-SMPTypeCategory[NN_cmpnlepd] = 1; // Packed Double-FP Compare NOT LE
-SMPTypeCategory[NN_cmpordpd] = 1; // Packed Double-FP Compare ORDERED
-SMPTypeCategory[NN_cmpeqsd] = 1; // Scalar Double-FP Compare EQ
-SMPTypeCategory[NN_cmpltsd] = 1; // Scalar Double-FP Compare LT
-SMPTypeCategory[NN_cmplesd] = 1; // Scalar Double-FP Compare LE
-SMPTypeCategory[NN_cmpunordsd] = 1; // Scalar Double-FP Compare UNORD
-SMPTypeCategory[NN_cmpneqsd] = 1; // Scalar Double-FP Compare NOT EQ
-SMPTypeCategory[NN_cmpnltsd] = 1; // Scalar Double-FP Compare NOT LT
-SMPTypeCategory[NN_cmpnlesd] = 1; // Scalar Double-FP Compare NOT LE
-SMPTypeCategory[NN_cmpordsd] = 1; // Scalar Double-FP Compare ORDERED
-
-// SSSE4.1 instructions
-
-SMPTypeCategory[NN_blendpd] = 14; // Blend Packed Double Precision Floating-Point Values
-SMPTypeCategory[NN_blendps] = 14; // Blend Packed Single Precision Floating-Point Values
-SMPTypeCategory[NN_blendvpd] = 14; // Variable Blend Packed Double Precision Floating-Point Values
-SMPTypeCategory[NN_blendvps] = 14; // Variable Blend Packed Single Precision Floating-Point Values
-SMPTypeCategory[NN_dppd] = 14; // Dot Product of Packed Double Precision Floating-Point Values
-SMPTypeCategory[NN_dpps] = 14; // Dot Product of Packed Single Precision Floating-Point Values
-SMPTypeCategory[NN_extractps] = 15; // Extract Packed Single Precision Floating-Point Value
-SMPTypeCategory[NN_insertps] = 14; // Insert Packed Single Precision Floating-Point Value
-SMPTypeCategory[NN_movntdqa] = 0; // Load Double Quadword Non-Temporal Aligned Hint
-SMPTypeCategory[NN_mpsadbw] = 1; // Compute Multiple Packed Sums of Absolute Difference
-SMPTypeCategory[NN_packusdw] = 14; // Pack with Unsigned Saturation
-SMPTypeCategory[NN_pblendvb] = 14; // Variable Blend Packed Bytes
-SMPTypeCategory[NN_pblendw] = 14; // Blend Packed Words
-SMPTypeCategory[NN_pcmpeqq] = 14; // Compare Packed Qword Data for Equal
-SMPTypeCategory[NN_pextrb] = 15; // Extract Byte
-SMPTypeCategory[NN_pextrd] = 15; // Extract Dword
-SMPTypeCategory[NN_pextrq] = 15; // Extract Qword
-SMPTypeCategory[NN_phminposuw] = 14; // Packed Horizontal Word Minimum
-SMPTypeCategory[NN_pinsrb] = 14; // Insert Byte !!! Could this be used as a generic move???
-SMPTypeCategory[NN_pinsrd] = 14; // Insert Dword !!! Could this be used as a generic move???
-SMPTypeCategory[NN_pinsrq] = 14; // Insert Qword !!! Could this be used as a generic move???
-SMPTypeCategory[NN_pmaxsb] = 14; // Maximum of Packed Signed Byte Integers
-SMPTypeCategory[NN_pmaxsd] = 14; // Maximum of Packed Signed Dword Integers
-SMPTypeCategory[NN_pmaxud] = 14; // Maximum of Packed Unsigned Dword Integers
-SMPTypeCategory[NN_pmaxuw] = 14; // Maximum of Packed Word Integers
-SMPTypeCategory[NN_pminsb] = 14; // Minimum of Packed Signed Byte Integers
-SMPTypeCategory[NN_pminsd] = 14; // Minimum of Packed Signed Dword Integers
-SMPTypeCategory[NN_pminud] = 14; // Minimum of Packed Unsigned Dword Integers
-SMPTypeCategory[NN_pminuw] = 14; // Minimum of Packed Word Integers
-SMPTypeCategory[NN_pmovsxbw] = 14; // Packed Move with Sign Extend
-SMPTypeCategory[NN_pmovsxbd] = 14; // Packed Move with Sign Extend
-SMPTypeCategory[NN_pmovsxbq] = 14; // Packed Move with Sign Extend
-SMPTypeCategory[NN_pmovsxwd] = 14; // Packed Move with Sign Extend
-SMPTypeCategory[NN_pmovsxwq] = 14; // Packed Move with Sign Extend
-SMPTypeCategory[NN_pmovsxdq] = 14; // Packed Move with Sign Extend
-SMPTypeCategory[NN_pmovzxbw] = 14; // Packed Move with Zero Extend
-SMPTypeCategory[NN_pmovzxbd] = 14; // Packed Move with Zero Extend
-SMPTypeCategory[NN_pmovzxbq] = 14; // Packed Move with Zero Extend
-SMPTypeCategory[NN_pmovzxwd] = 14; // Packed Move with Zero Extend
-SMPTypeCategory[NN_pmovzxwq] = 14; // Packed Move with Zero Extend
-SMPTypeCategory[NN_pmovzxdq] = 14; // Packed Move with Zero Extend
-SMPTypeCategory[NN_pmuldq] = 14; // Multiply Packed Signed Dword Integers
-SMPTypeCategory[NN_pmulld] = 14; // Multiply Packed Signed Dword Integers and Store Low Result
-SMPTypeCategory[NN_ptest] = 1; // Logical Compare
-SMPTypeCategory[NN_roundpd] = 14; // Round Packed Double Precision Floating-Point Values
-SMPTypeCategory[NN_roundps] = 14; // Round Packed Single Precision Floating-Point Values
-SMPTypeCategory[NN_roundsd] = 14; // Round Scalar Double Precision Floating-Point Values
-SMPTypeCategory[NN_roundss] = 14; // Round Scalar Single Precision Floating-Point Values
-
-// SSSE4.2 instructions
-SMPTypeCategory[NN_crc32] = 14; // Accumulate CRC32 Value
-SMPTypeCategory[NN_pcmpestri] = 2; // Packed Compare Explicit Length Strings, Return Index
-SMPTypeCategory[NN_pcmpestrm] = 2; // Packed Compare Explicit Length Strings, Return Mask
-SMPTypeCategory[NN_pcmpistri] = 2; // Packed Compare Implicit Length Strings, Return Index
-SMPTypeCategory[NN_pcmpistrm] = 2; // Packed Compare Implicit Length Strings, Return Mask
-SMPTypeCategory[NN_pcmpgtq] = 14; // Compare Packed Data for Greater Than
-SMPTypeCategory[NN_popcnt] = 2; // Return the Count of Number of Bits Set to 1
-
-// AMD SSE4a instructions
-
-SMPTypeCategory[NN_extrq] = 1; // Extract Field From Register
-SMPTypeCategory[NN_insertq] = 1; // Insert Field
-SMPTypeCategory[NN_movntsd] = 13; // Move Non-Temporal Scalar Double-Precision Floating-Point !!! Could this be used as a generic move???
-SMPTypeCategory[NN_movntss] = 13; // Move Non-Temporal Scalar Single-Precision Floating-Point !!! Could this be used as a generic move???
-SMPTypeCategory[NN_lzcnt] = 2; // Leading Zero Count
-
-// xsave/xrstor instructions
-
-SMPTypeCategory[NN_xgetbv] = 8; // Get Value of Extended Control Register
-SMPTypeCategory[NN_xrstor] = 0; // Restore Processor Extended States
-SMPTypeCategory[NN_xsave] = 1; // Save Processor Extended States
-SMPTypeCategory[NN_xsetbv] = 1; // Set Value of Extended Control Register
-
-// Intel Safer Mode Extensions (SMX)
-
-SMPTypeCategory[NN_getsec] = 1; // Safer Mode Extensions (SMX) Instruction
-
-// AMD-V Virtualization ISA Extension
-
-SMPTypeCategory[NN_clgi] = 0; // Clear Global Interrupt Flag
-SMPTypeCategory[NN_invlpga] = 1; // Invalidate TLB Entry in a Specified ASID
-SMPTypeCategory[NN_skinit] = 1; // Secure Init and Jump with Attestation
-SMPTypeCategory[NN_stgi] = 0; // Set Global Interrupt Flag
-SMPTypeCategory[NN_vmexit] = 1; // Stop Executing Guest, Begin Executing Host
-SMPTypeCategory[NN_vmload] = 0; // Load State from VMCB
-SMPTypeCategory[NN_vmmcall] = 1; // Call VMM
-SMPTypeCategory[NN_vmrun] = 1; // Run Virtual Machine
-SMPTypeCategory[NN_vmsave] = 0; // Save State to VMCB
-
-// VMX+ instructions
-
-SMPTypeCategory[NN_invept] = 1; // Invalidate Translations Derived from EPT
-SMPTypeCategory[NN_invvpid] = 1; // Invalidate Translations Based on VPID
-
-// Intel Atom instructions
-
-// !!!! continue work here
-SMPTypeCategory[NN_movbe] = 3; // Move Data After Swapping Bytes
-
-// Intel AES instructions
-
-SMPTypeCategory[NN_aesenc] = 14; // Perform One Round of an AES Encryption Flow
-SMPTypeCategory[NN_aesenclast] = 14; // Perform the Last Round of an AES Encryption Flow
-SMPTypeCategory[NN_aesdec] = 14; // Perform One Round of an AES Decryption Flow
-SMPTypeCategory[NN_aesdeclast] = 14; // Perform the Last Round of an AES Decryption Flow
-SMPTypeCategory[NN_aesimc] = 14; // Perform the AES InvMixColumn Transformation
-SMPTypeCategory[NN_aeskeygenassist] = 14; // AES Round Key Generation Assist
-
-// Carryless multiplication
-
-SMPTypeCategory[NN_pclmulqdq] = 14; // Carry-Less Multiplication Quadword
-
-// Returns modified by operand size prefixes
-
-SMPTypeCategory[NN_retnw] = 0; // Return Near from Procedure (use16)
-SMPTypeCategory[NN_retnd] = 0; // Return Near from Procedure (use32)
-SMPTypeCategory[NN_retnq] = 0; // Return Near from Procedure (use64)
-SMPTypeCategory[NN_retfw] = 0; // Return Far from Procedure (use16)
-SMPTypeCategory[NN_retfd] = 0; // Return Far from Procedure (use32)
-SMPTypeCategory[NN_retfq] = 0; // Return Far from Procedure (use64)
-
-// RDRAND support
-
-SMPTypeCategory[NN_rdrand] = 2; // Read Random Number
-
-// new GPR instructions
-
-SMPTypeCategory[NN_adcx] = 5; // Unsigned Integer Addition of Two Operands with Carry Flag
-SMPTypeCategory[NN_adox] = 5; // Unsigned Integer Addition of Two Operands with Overflow Flag
-SMPTypeCategory[NN_andn] = 10; // Logical AND NOT
-SMPTypeCategory[NN_bextr] = 14; // Bit Field Extract
-SMPTypeCategory[NN_blsi] = 14; // Extract Lowest Set Isolated Bit
-SMPTypeCategory[NN_blsmsk] = 2; // Get Mask Up to Lowest Set Bit
-SMPTypeCategory[NN_blsr] = 2; // Reset Lowest Set Bit
-SMPTypeCategory[NN_bzhi] = 2; // Zero High Bits Starting with Specified Bit Position
-SMPTypeCategory[NN_clac] = 1; // Clear AC Flag in EFLAGS Register
-SMPTypeCategory[NN_mulx] = 2; // Unsigned Multiply Without Affecting Flags
-SMPTypeCategory[NN_pdep] = 2; // Parallel Bits Deposit
-SMPTypeCategory[NN_pext] = 2; // Parallel Bits Extract
-SMPTypeCategory[NN_rorx] = 2; // Rotate Right Logical Without Affecting Flags
-SMPTypeCategory[NN_sarx] = 2; // Shift Arithmetically Right Without Affecting Flags
-SMPTypeCategory[NN_shlx] = 2; // Shift Logically Left Without Affecting Flags
-SMPTypeCategory[NN_shrx] = 2; // Shift Logically Right Without Affecting Flags
-SMPTypeCategory[NN_stac] = 1; // Set AC Flag in EFLAGS Register
-SMPTypeCategory[NN_tzcnt] = 2; // Count the Number of Trailing Zero Bits
-SMPTypeCategory[NN_xsaveopt] = 1; // Save Processor Extended States Optimized
-SMPTypeCategory[NN_invpcid] = 1; // Invalidate Processor Context ID
-SMPTypeCategory[NN_rdseed] = 2; // Read Random Seed
-SMPTypeCategory[NN_rdfsbase] = 6; // Read FS Segment Base
-SMPTypeCategory[NN_rdgsbase] = 6; // Read GS Segment Base
-SMPTypeCategory[NN_wrfsbase] = 6; // Write FS Segment Base
-SMPTypeCategory[NN_wrgsbase] = 6; // Write GS Segment Base
-
-// new AVX instructions
-
-SMPTypeCategory[NN_vaddpd] = 14; // Add Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vaddps] = 14; // Packed Single-FP Add
-SMPTypeCategory[NN_vaddsd] = 14; // Add Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vaddss] = 14; // Scalar Single-FP Add
-SMPTypeCategory[NN_vaddsubpd] = 14; // Add /Sub packed DP FP numbers
-SMPTypeCategory[NN_vaddsubps] = 14; // Add /Sub packed SP FP numbers
-SMPTypeCategory[NN_vaesdec] = 14; // Perform One Round of an AES Decryption Flow
-SMPTypeCategory[NN_vaesdeclast] = 14; // Perform the Last Round of an AES Decryption Flow
-SMPTypeCategory[NN_vaesenc] = 14; // Perform One Round of an AES Encryption Flow
-SMPTypeCategory[NN_vaesenclast] = 14; // Perform the Last Round of an AES Encryption Flow
-SMPTypeCategory[NN_vaesimc] = 14; // Perform the AES InvMixColumn Transformation
-SMPTypeCategory[NN_vaeskeygenassist] = 14; // AES Round Key Generation Assist
-SMPTypeCategory[NN_vandnpd] = 14; // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vandnps] = 14; // Bitwise Logical And Not for Single-FP
-SMPTypeCategory[NN_vandpd] = 14; // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vandps] = 14; // Bitwise Logical And for Single-FP
-SMPTypeCategory[NN_vblendpd] = 14; // Blend Packed Double Precision Floating-Point Values
-SMPTypeCategory[NN_vblendps] = 14; // Blend Packed Single Precision Floating-Point Values
-SMPTypeCategory[NN_vblendvpd] = 14; // Variable Blend Packed Double Precision Floating-Point Values
-SMPTypeCategory[NN_vblendvps] = 14; // Variable Blend Packed Single Precision Floating-Point Values
-SMPTypeCategory[NN_vbroadcastf128] = 14; // Broadcast 128 Bits of Floating-Point Data
-SMPTypeCategory[NN_vbroadcasti128] = 14; // Broadcast 128 Bits of Integer Data
-SMPTypeCategory[NN_vbroadcastsd] = 14; // Broadcast Double-Precision Floating-Point Element
-SMPTypeCategory[NN_vbroadcastss] = 14; // Broadcast Single-Precision Floating-Point Element
-SMPTypeCategory[NN_vcmppd] = 14; // Compare Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vcmpps] = 14; // Packed Single-FP Compare
-SMPTypeCategory[NN_vcmpsd] = 14; // Compare Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vcmpss] = 14; // Scalar Single-FP Compare
-SMPTypeCategory[NN_vcomisd] = 14; // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
-SMPTypeCategory[NN_vcomiss] = 14; // Scalar Ordered Single-FP Compare and Set EFLAGS
-SMPTypeCategory[NN_vcvtdq2pd] = 14; // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vcvtdq2ps] = 14; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vcvtpd2dq] = 14; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
-SMPTypeCategory[NN_vcvtpd2ps] = 14; // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vcvtph2ps] = 14; // Convert 16-bit FP Values to Single-Precision FP Values
-SMPTypeCategory[NN_vcvtps2dq] = 14; // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
-SMPTypeCategory[NN_vcvtps2pd] = 14; // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vcvtps2ph] = 14; // Convert Single-Precision FP value to 16-bit FP value
-SMPTypeCategory[NN_vcvtsd2si] = 14; // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
-SMPTypeCategory[NN_vcvtsd2ss] = 14; // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
-SMPTypeCategory[NN_vcvtsi2sd] = 14; // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
-SMPTypeCategory[NN_vcvtsi2ss] = 14; // Scalar signed INT32 to Single-FP conversion
-SMPTypeCategory[NN_vcvtss2sd] = 14; // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
-SMPTypeCategory[NN_vcvtss2si] = 14; // Scalar Single-FP to signed INT32 conversion
-SMPTypeCategory[NN_vcvttpd2dq] = 14; // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
-SMPTypeCategory[NN_vcvttps2dq] = 14; // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
-SMPTypeCategory[NN_vcvttsd2si] = 14; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
-SMPTypeCategory[NN_vcvttss2si] = 14; // Scalar Single-FP to signed INT32 conversion (truncate)
-SMPTypeCategory[NN_vdivpd] = 14; // Divide Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vdivps] = 14; // Packed Single-FP Divide
-SMPTypeCategory[NN_vdivsd] = 14; // Divide Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vdivss] = 14; // Scalar Single-FP Divide
-SMPTypeCategory[NN_vdppd] = 14; // Dot Product of Packed Double Precision Floating-Point Values
-SMPTypeCategory[NN_vdpps] = 14; // Dot Product of Packed Single Precision Floating-Point Values
-SMPTypeCategory[NN_vextractf128] = 14; // Extract Packed Floating-Point Values
-SMPTypeCategory[NN_vextracti128] = 14; // Extract Packed Integer Values
-SMPTypeCategory[NN_vextractps] = 14; // Extract Packed Floating-Point Values
-SMPTypeCategory[NN_vfmadd132pd] = 14; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmadd132ps] = 14; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmadd132sd] = 14; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmadd132ss] = 14; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmadd213pd] = 14; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmadd213ps] = 14; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmadd213sd] = 14; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmadd213ss] = 14; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmadd231pd] = 14; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmadd231ps] = 14; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmadd231sd] = 14; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmadd231ss] = 14; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmaddsub132pd] = 14; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmaddsub132ps] = 14; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmaddsub213pd] = 14; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmaddsub213ps] = 14; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmaddsub231pd] = 14; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmaddsub231ps] = 14; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmsub132pd] = 14; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmsub132ps] = 14; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmsub132sd] = 14; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmsub132ss] = 14; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmsub213pd] = 14; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmsub213ps] = 14; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmsub213sd] = 14; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmsub213ss] = 14; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmsub231pd] = 14; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmsub231ps] = 14; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmsub231sd] = 14; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmsub231ss] = 14; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmsubadd132pd] = 14; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmsubadd132ps] = 14; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmsubadd213pd] = 14; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmsubadd213ps] = 14; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmsubadd231pd] = 14; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfmsubadd231ps] = 14; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmadd132pd] = 14; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmadd132ps] = 14; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmadd132sd] = 14; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmadd132ss] = 14; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmadd213pd] = 14; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmadd213ps] = 14; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmadd213sd] = 14; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmadd213ss] = 14; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmadd231pd] = 14; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmadd231ps] = 14; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmadd231sd] = 14; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmadd231ss] = 14; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmsub132pd] = 14; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmsub132ps] = 14; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmsub132sd] = 14; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmsub132ss] = 14; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmsub213pd] = 14; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmsub213ps] = 14; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmsub213sd] = 14; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmsub213ss] = 14; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmsub231pd] = 14; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmsub231ps] = 14; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmsub231sd] = 14; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vfnmsub231ss] = 14; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vgatherdps] = 14; // Gather Packed SP FP Values Using Signed Dword Indices
-SMPTypeCategory[NN_vgatherdpd] = 14; // Gather Packed DP FP Values Using Signed Dword Indices
-SMPTypeCategory[NN_vgatherqps] = 14; // Gather Packed SP FP Values Using Signed Qword Indices
-SMPTypeCategory[NN_vgatherqpd] = 14; // Gather Packed DP FP Values Using Signed Qword Indices
-SMPTypeCategory[NN_vhaddpd] = 14; // Add horizontally packed DP FP numbers
-SMPTypeCategory[NN_vhaddps] = 14; // Add horizontally packed SP FP numbers
-SMPTypeCategory[NN_vhsubpd] = 14; // Sub horizontally packed DP FP numbers
-SMPTypeCategory[NN_vhsubps] = 14; // Sub horizontally packed SP FP numbers
-SMPTypeCategory[NN_vinsertf128] = 14; // Insert Packed Floating-Point Values
-SMPTypeCategory[NN_vinserti128] = 14; // Insert Packed Integer Values
-SMPTypeCategory[NN_vinsertps] = 14; // Insert Packed Single Precision Floating-Point Value
-SMPTypeCategory[NN_vlddqu] = 14; // Load Unaligned Packed Integer Values
-SMPTypeCategory[NN_vldmxcsr] = 14; // Load Streaming SIMD Extensions Technology Control/Status Register
-SMPTypeCategory[NN_vmaskmovdqu] = 15; // Store Selected Bytes of Double Quadword with NT Hint
-SMPTypeCategory[NN_vmaskmovpd] = 15; // Conditionally Load Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vmaskmovps] = 15; // Conditionally Load Packed Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vmaxpd] = 14; // Return Maximum Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vmaxps] = 14; // Packed Single-FP Maximum
-SMPTypeCategory[NN_vmaxsd] = 14; // Return Maximum Scalar Double-Precision Floating-Point Value
-SMPTypeCategory[NN_vmaxss] = 14; // Scalar Single-FP Maximum
-SMPTypeCategory[NN_vminpd] = 14; // Return Minimum Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vminps] = 14; // Packed Single-FP Minimum
-SMPTypeCategory[NN_vminsd] = 14; // Return Minimum Scalar Double-Precision Floating-Point Value
-SMPTypeCategory[NN_vminss] = 14; // Scalar Single-FP Minimum
-SMPTypeCategory[NN_vmovapd] = 15; // Move Aligned Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vmovaps] = 15; // Move Aligned Four Packed Single-FP
-SMPTypeCategory[NN_vmovd] = 15; // Move 32 bits
-SMPTypeCategory[NN_vmovddup] = 15; // Move One Double-FP and Duplicate
-SMPTypeCategory[NN_vmovdqa] = 15; // Move Aligned Double Quadword
-SMPTypeCategory[NN_vmovdqu] = 15; // Move Unaligned Double Quadword
-SMPTypeCategory[NN_vmovhlps] = 15; // Move High to Low Packed Single-FP
-SMPTypeCategory[NN_vmovhpd] = 15; // Move High Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vmovhps] = 15; // Move High Packed Single-FP
-SMPTypeCategory[NN_vmovlhps] = 15; // Move Low to High Packed Single-FP
-SMPTypeCategory[NN_vmovlpd] = 15; // Move Low Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vmovlps] = 15; // Move Low Packed Single-FP
-SMPTypeCategory[NN_vmovmskpd] = 15; // Extract Packed Double-Precision Floating-Point Sign Mask
-SMPTypeCategory[NN_vmovmskps] = 15; // Move Mask to Register
-SMPTypeCategory[NN_vmovntdq] = 15; // Store Double Quadword Using Non-Temporal Hint
-SMPTypeCategory[NN_vmovntdqa] = 15; // Load Double Quadword Non-Temporal Aligned Hint
-SMPTypeCategory[NN_vmovntpd] = 15; // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
-SMPTypeCategory[NN_vmovntps] = 15; // Move Aligned Four Packed Single-FP Non Temporal
-SMPTypeCategory[NN_vmovntsd] = 15; // Move Non-Temporal Scalar Double-Precision Floating-Point
-SMPTypeCategory[NN_vmovntss] = 15; // Move Non-Temporal Scalar Single-Precision Floating-Point
-SMPTypeCategory[NN_vmovq] = 15; // Move 64 bits
-SMPTypeCategory[NN_vmovsd] = 15; // Move Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vmovshdup] = 15; // Move Packed Single-FP High and Duplicate
-SMPTypeCategory[NN_vmovsldup] = 15; // Move Packed Single-FP Low and Duplicate
-SMPTypeCategory[NN_vmovss] = 15; // Move Scalar Single-FP
-SMPTypeCategory[NN_vmovupd] = 15; // Move Unaligned Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vmovups] = 15; // Move Unaligned Four Packed Single-FP
-SMPTypeCategory[NN_vmpsadbw] = 14; // Compute Multiple Packed Sums of Absolute Difference
-SMPTypeCategory[NN_vmulpd] = 14; // Multiply Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vmulps] = 14; // Packed Single-FP Multiply
-SMPTypeCategory[NN_vmulsd] = 14; // Multiply Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vmulss] = 14; // Scalar Single-FP Multiply
-SMPTypeCategory[NN_vorpd] = 14; // Bitwise Logical OR of Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vorps] = 14; // Bitwise Logical OR for Single-FP Data
-SMPTypeCategory[NN_vpabsb] = 14; // Packed Absolute Value Byte
-SMPTypeCategory[NN_vpabsd] = 14; // Packed Absolute Value Doubleword
-SMPTypeCategory[NN_vpabsw] = 14; // Packed Absolute Value Word
-SMPTypeCategory[NN_vpackssdw] = 14; // Pack with Signed Saturation (Dword->Word)
-SMPTypeCategory[NN_vpacksswb] = 14; // Pack with Signed Saturation (Word->Byte)
-SMPTypeCategory[NN_vpackusdw] = 14; // Pack with Unsigned Saturation
-SMPTypeCategory[NN_vpackuswb] = 14; // Pack with Unsigned Saturation (Word->Byte)
-SMPTypeCategory[NN_vpaddb] = 14; // Packed Add Byte
-SMPTypeCategory[NN_vpaddd] = 14; // Packed Add Dword
-SMPTypeCategory[NN_vpaddq] = 14; // Add Packed Quadword Integers
-SMPTypeCategory[NN_vpaddsb] = 14; // Packed Add with Saturation (Byte)
-SMPTypeCategory[NN_vpaddsw] = 14; // Packed Add with Saturation (Word)
-SMPTypeCategory[NN_vpaddusb] = 14; // Packed Add Unsigned with Saturation (Byte)
-SMPTypeCategory[NN_vpaddusw] = 14; // Packed Add Unsigned with Saturation (Word)
-SMPTypeCategory[NN_vpaddw] = 14; // Packed Add Word
-SMPTypeCategory[NN_vpalignr] = 14; // Packed Align Right
-SMPTypeCategory[NN_vpand] = 14; // Bitwise Logical And
-SMPTypeCategory[NN_vpandn] = 14; // Bitwise Logical And Not
-SMPTypeCategory[NN_vpavgb] = 14; // Packed Average (Byte)
-SMPTypeCategory[NN_vpavgw] = 14; // Packed Average (Word)
-SMPTypeCategory[NN_vpblendd] = 14; // Blend Packed Dwords
-SMPTypeCategory[NN_vpblendvb] = 14; // Variable Blend Packed Bytes
-SMPTypeCategory[NN_vpblendw] = 14; // Blend Packed Words
-SMPTypeCategory[NN_vpbroadcastb] = 14; // Broadcast a Byte Integer
-SMPTypeCategory[NN_vpbroadcastd] = 14; // Broadcast a Dword Integer
-SMPTypeCategory[NN_vpbroadcastq] = 14; // Broadcast a Qword Integer
-SMPTypeCategory[NN_vpbroadcastw] = 14; // Broadcast a Word Integer
-SMPTypeCategory[NN_vpclmulqdq] = 14; // Carry-Less Multiplication Quadword
-SMPTypeCategory[NN_vpcmpeqb] = 14; // Packed Compare for Equal (Byte)
-SMPTypeCategory[NN_vpcmpeqd] = 14; // Packed Compare for Equal (Dword)
-SMPTypeCategory[NN_vpcmpeqq] = 14; // Compare Packed Qword Data for Equal
-SMPTypeCategory[NN_vpcmpeqw] = 14; // Packed Compare for Equal (Word)
-SMPTypeCategory[NN_vpcmpestri] = 14; // Packed Compare Explicit Length Strings, Return Index
-SMPTypeCategory[NN_vpcmpestrm] = 14; // Packed Compare Explicit Length Strings, Return Mask
-SMPTypeCategory[NN_vpcmpgtb] = 14; // Packed Compare for Greater Than (Byte)
-SMPTypeCategory[NN_vpcmpgtd] = 14; // Packed Compare for Greater Than (Dword)
-SMPTypeCategory[NN_vpcmpgtq] = 14; // Compare Packed Data for Greater Than
-SMPTypeCategory[NN_vpcmpgtw] = 14; // Packed Compare for Greater Than (Word)
-SMPTypeCategory[NN_vpcmpistri] = 14; // Packed Compare Implicit Length Strings, Return Index
-SMPTypeCategory[NN_vpcmpistrm] = 14; // Packed Compare Implicit Length Strings, Return Mask
-SMPTypeCategory[NN_vperm2f128] = 14; // Permute Floating-Point Values
-SMPTypeCategory[NN_vperm2i128] = 14; // Permute Integer Values
-SMPTypeCategory[NN_vpermd] = 14; // Full Doublewords Element Permutation
-SMPTypeCategory[NN_vpermilpd] = 14; // Permute Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vpermilps] = 14; // Permute Single-Precision Floating-Point Values
-SMPTypeCategory[NN_vpermpd] = 14; // Permute Double-Precision Floating-Point Elements
-SMPTypeCategory[NN_vpermps] = 14; // Permute Single-Precision Floating-Point Elements
-SMPTypeCategory[NN_vpermq] = 14; // Qwords Element Permutation
-SMPTypeCategory[NN_vpextrb] = 14; // Extract Byte
-SMPTypeCategory[NN_vpextrd] = 14; // Extract Dword
-SMPTypeCategory[NN_vpextrq] = 14; // Extract Qword
-SMPTypeCategory[NN_vpextrw] = 14; // Extract Word
-SMPTypeCategory[NN_vpgatherdd] = 14; // Gather Packed Dword Values Using Signed Dword Indices
-SMPTypeCategory[NN_vpgatherdq] = 14; // Gather Packed Qword Values Using Signed Dword Indices
-SMPTypeCategory[NN_vpgatherqd] = 14; // Gather Packed Dword Values Using Signed Qword Indices
-SMPTypeCategory[NN_vpgatherqq] = 14; // Gather Packed Qword Values Using Signed Qword Indices
-SMPTypeCategory[NN_vphaddd] = 14; // Packed Horizontal Add Doubleword
-SMPTypeCategory[NN_vphaddsw] = 14; // Packed Horizontal Add and Saturate
-SMPTypeCategory[NN_vphaddw] = 14; // Packed Horizontal Add Word
-SMPTypeCategory[NN_vphminposuw] = 14; // Packed Horizontal Word Minimum
-SMPTypeCategory[NN_vphsubd] = 14; // Packed Horizontal Subtract Doubleword
-SMPTypeCategory[NN_vphsubsw] = 14; // Packed Horizontal Subtract and Saturate
-SMPTypeCategory[NN_vphsubw] = 14; // Packed Horizontal Subtract Word
-SMPTypeCategory[NN_vpinsrb] = 14; // Insert Byte
-SMPTypeCategory[NN_vpinsrd] = 14; // Insert Dword
-SMPTypeCategory[NN_vpinsrq] = 14; // Insert Qword
-SMPTypeCategory[NN_vpinsrw] = 14; // Insert Word
-SMPTypeCategory[NN_vpmaddubsw] = 14; // Multiply and Add Packed Signed and Unsigned Bytes
-SMPTypeCategory[NN_vpmaddwd] = 14; // Packed Multiply and Add
-SMPTypeCategory[NN_vpmaskmovd] = 15; // Conditionally Store Dword Values Using Mask
-SMPTypeCategory[NN_vpmaskmovq] = 15; // Conditionally Store Qword Values Using Mask
-SMPTypeCategory[NN_vpmaxsb] = 14; // Maximum of Packed Signed Byte Integers
-SMPTypeCategory[NN_vpmaxsd] = 14; // Maximum of Packed Signed Dword Integers
-SMPTypeCategory[NN_vpmaxsw] = 14; // Packed Signed Integer Word Maximum
-SMPTypeCategory[NN_vpmaxub] = 14; // Packed Unsigned Integer Byte Maximum
-SMPTypeCategory[NN_vpmaxud] = 14; // Maximum of Packed Unsigned Dword Integers
-SMPTypeCategory[NN_vpmaxuw] = 14; // Maximum of Packed Word Integers
-SMPTypeCategory[NN_vpminsb] = 14; // Minimum of Packed Signed Byte Integers
-SMPTypeCategory[NN_vpminsd] = 14; // Minimum of Packed Signed Dword Integers
-SMPTypeCategory[NN_vpminsw] = 14; // Packed Signed Integer Word Minimum
-SMPTypeCategory[NN_vpminub] = 14; // Packed Unsigned Integer Byte Minimum
-SMPTypeCategory[NN_vpminud] = 14; // Minimum of Packed Unsigned Dword Integers
-SMPTypeCategory[NN_vpminuw] = 14; // Minimum of Packed Word Integers
-SMPTypeCategory[NN_vpmovmskb] = 15; // Move Byte Mask to Integer
-SMPTypeCategory[NN_vpmovsxbd] = 15; // Packed Move with Sign Extend
-SMPTypeCategory[NN_vpmovsxbq] = 15; // Packed Move with Sign Extend
-SMPTypeCategory[NN_vpmovsxbw] = 15; // Packed Move with Sign Extend
-SMPTypeCategory[NN_vpmovsxdq] = 15; // Packed Move with Sign Extend
-SMPTypeCategory[NN_vpmovsxwd] = 15; // Packed Move with Sign Extend
-SMPTypeCategory[NN_vpmovsxwq] = 15; // Packed Move with Sign Extend
-SMPTypeCategory[NN_vpmovzxbd] = 15; // Packed Move with Zero Extend
-SMPTypeCategory[NN_vpmovzxbq] = 15; // Packed Move with Zero Extend
-SMPTypeCategory[NN_vpmovzxbw] = 15; // Packed Move with Zero Extend
-SMPTypeCategory[NN_vpmovzxdq] = 15; // Packed Move with Zero Extend
-SMPTypeCategory[NN_vpmovzxwd] = 15; // Packed Move with Zero Extend
-SMPTypeCategory[NN_vpmovzxwq] = 15; // Packed Move with Zero Extend
-SMPTypeCategory[NN_vpmuldq] = 14; // Multiply Packed Signed Dword Integers
-SMPTypeCategory[NN_vpmulhrsw] = 14; // Packed Multiply High with Round and Scale
-SMPTypeCategory[NN_vpmulhuw] = 14; // Packed Multiply High Unsigned
-SMPTypeCategory[NN_vpmulhw] = 14; // Packed Multiply High
-SMPTypeCategory[NN_vpmulld] = 14; // Multiply Packed Signed Dword Integers and Store Low Result
-SMPTypeCategory[NN_vpmullw] = 14; // Packed Multiply Low
-SMPTypeCategory[NN_vpmuludq] = 14; // Multiply Packed Unsigned Doubleword Integers
-SMPTypeCategory[NN_vpor] = 14; // Bitwise Logical Or
-SMPTypeCategory[NN_vpsadbw] = 14; // Packed Sum of Absolute Differences
-SMPTypeCategory[NN_vpshufb] = 14; // Packed Shuffle Bytes
-SMPTypeCategory[NN_vpshufd] = 14; // Shuffle Packed Doublewords
-SMPTypeCategory[NN_vpshufhw] = 14; // Shuffle Packed High Words
-SMPTypeCategory[NN_vpshuflw] = 14; // Shuffle Packed Low Words
-SMPTypeCategory[NN_vpsignb] = 14; // Packed SIGN Byte
-SMPTypeCategory[NN_vpsignd] = 14; // Packed SIGN Doubleword
-SMPTypeCategory[NN_vpsignw] = 14; // Packed SIGN Word
-SMPTypeCategory[NN_vpslld] = 14; // Packed Shift Left Logical (Dword)
-SMPTypeCategory[NN_vpslldq] = 14; // Shift Double Quadword Left Logical
-SMPTypeCategory[NN_vpsllq] = 14; // Packed Shift Left Logical (Qword)
-SMPTypeCategory[NN_vpsllvd] = 14; // Variable Bit Shift Left Logical (Dword)
-SMPTypeCategory[NN_vpsllvq] = 14; // Variable Bit Shift Left Logical (Qword)
-SMPTypeCategory[NN_vpsllw] = 14; // Packed Shift Left Logical (Word)
-SMPTypeCategory[NN_vpsrad] = 14; // Packed Shift Right Arithmetic (Dword)
-SMPTypeCategory[NN_vpsravd] = 14; // Variable Bit Shift Right Arithmetic
-SMPTypeCategory[NN_vpsraw] = 14; // Packed Shift Right Arithmetic (Word)
-SMPTypeCategory[NN_vpsrld] = 14; // Packed Shift Right Logical (Dword)
-SMPTypeCategory[NN_vpsrldq] = 14; // Shift Double Quadword Right Logical (Qword)
-SMPTypeCategory[NN_vpsrlq] = 14; // Packed Shift Right Logical (Qword)
-SMPTypeCategory[NN_vpsrlvd] = 14; // Variable Bit Shift Right Logical (Dword)
-SMPTypeCategory[NN_vpsrlvq] = 14; // Variable Bit Shift Right Logical (Qword)
-SMPTypeCategory[NN_vpsrlw] = 14; // Packed Shift Right Logical (Word)
-SMPTypeCategory[NN_vpsubb] = 14; // Packed Subtract Byte
-SMPTypeCategory[NN_vpsubd] = 14; // Packed Subtract Dword
-SMPTypeCategory[NN_vpsubq] = 14; // Subtract Packed Quadword Integers
-SMPTypeCategory[NN_vpsubsb] = 14; // Packed Subtract with Saturation (Byte)
-SMPTypeCategory[NN_vpsubsw] = 14; // Packed Subtract with Saturation (Word)
-SMPTypeCategory[NN_vpsubusb] = 14; // Packed Subtract Unsigned with Saturation (Byte)
-SMPTypeCategory[NN_vpsubusw] = 14; // Packed Subtract Unsigned with Saturation (Word)
-SMPTypeCategory[NN_vpsubw] = 14; // Packed Subtract Word
-SMPTypeCategory[NN_vptest] = 14; // Logical Compare
-SMPTypeCategory[NN_vpunpckhbw] = 14; // Unpack High Packed Data (Byte->Word)
-SMPTypeCategory[NN_vpunpckhdq] = 14; // Unpack High Packed Data (Dword->Qword)
-SMPTypeCategory[NN_vpunpckhqdq] = 14; // Unpack High Packed Data (Qword->Xmmword)
-SMPTypeCategory[NN_vpunpckhwd] = 14; // Unpack High Packed Data (Word->Dword)
-SMPTypeCategory[NN_vpunpcklbw] = 14; // Unpack Low Packed Data (Byte->Word)
-SMPTypeCategory[NN_vpunpckldq] = 14; // Unpack Low Packed Data (Dword->Qword)
-SMPTypeCategory[NN_vpunpcklqdq] = 14; // Unpack Low Packed Data (Qword->Xmmword)
-SMPTypeCategory[NN_vpunpcklwd] = 14; // Unpack Low Packed Data (Word->Dword)
-SMPTypeCategory[NN_vpxor] = 14; // Bitwise Logical Exclusive Or
-SMPTypeCategory[NN_vrcpps] = 14; // Packed Single-FP Reciprocal
-SMPTypeCategory[NN_vrcpss] = 14; // Scalar Single-FP Reciprocal
-SMPTypeCategory[NN_vroundpd] = 14; // Round Packed Double Precision Floating-Point Values
-SMPTypeCategory[NN_vroundps] = 14; // Round Packed Single Precision Floating-Point Values
-SMPTypeCategory[NN_vroundsd] = 14; // Round Scalar Double Precision Floating-Point Values
-SMPTypeCategory[NN_vroundss] = 14; // Round Scalar Single Precision Floating-Point Values
-SMPTypeCategory[NN_vrsqrtps] = 14; // Packed Single-FP Square Root Reciprocal
-SMPTypeCategory[NN_vrsqrtss] = 14; // Scalar Single-FP Square Root Reciprocal
-SMPTypeCategory[NN_vshufpd] = 14; // Shuffle Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vshufps] = 14; // Shuffle Single-FP
-SMPTypeCategory[NN_vsqrtpd] = 14; // Compute Square Roots of Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vsqrtps] = 14; // Packed Single-FP Square Root
-SMPTypeCategory[NN_vsqrtsd] = 14; // Compute Square Rootof Scalar Double-Precision Floating-Point Value
-SMPTypeCategory[NN_vsqrtss] = 14; // Scalar Single-FP Square Root
-SMPTypeCategory[NN_vstmxcsr] = 14; // Store Streaming SIMD Extensions Technology Control/Status Register
-SMPTypeCategory[NN_vsubpd] = 14; // Subtract Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vsubps] = 14; // Packed Single-FP Subtract
-SMPTypeCategory[NN_vsubsd] = 14; // Subtract Scalar Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vsubss] = 14; // Scalar Single-FP Subtract
-SMPTypeCategory[NN_vtestpd] = 14; // Packed Double-Precision Floating-Point Bit Test
-SMPTypeCategory[NN_vtestps] = 14; // Packed Single-Precision Floating-Point Bit Test
-SMPTypeCategory[NN_vucomisd] = 14; // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
-SMPTypeCategory[NN_vucomiss] = 14; // Scalar Unordered Single-FP Compare and Set EFLAGS
-SMPTypeCategory[NN_vunpckhpd] = 14; // Unpack and Interleave High Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vunpckhps] = 14; // Unpack High Packed Single-FP Data
-SMPTypeCategory[NN_vunpcklpd] = 14; // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vunpcklps] = 14; // Unpack Low Packed Single-FP Data
-SMPTypeCategory[NN_vxorpd] = 14; // Bitwise Logical OR of Double-Precision Floating-Point Values
-SMPTypeCategory[NN_vxorps] = 14; // Bitwise Logical XOR for Single-FP Data
-SMPTypeCategory[NN_vzeroall] = 14; // Zero All YMM Registers
-SMPTypeCategory[NN_vzeroupper] = 14; // Zero Upper Bits of YMM Registers
-
-// Transactional Synchronization Extensions
-
-SMPTypeCategory[NN_xabort] = 1; // Transaction Abort
-SMPTypeCategory[NN_xbegin] = 1; // Transaction Begin
-SMPTypeCategory[NN_xend] = 1; // Transaction End
-SMPTypeCategory[NN_xtest] = 1; // Test If In Transactional Execution
-
-// Virtual PC synthetic instructions
-
-SMPTypeCategory[NN_vmgetinfo] = 1; // Virtual PC - Get VM Information
-SMPTypeCategory[NN_vmsetinfo] = 1; // Virtual PC - Set VM Information
-SMPTypeCategory[NN_vmdxdsbl] = 1; // Virtual PC - Disable Direct Execution
-SMPTypeCategory[NN_vmdxenbl] = 1; // Virtual PC - Enable Direct Execution
-SMPTypeCategory[NN_vmcpuid] = 1; // Virtual PC - Virtualized CPU Information
-SMPTypeCategory[NN_vmhlt] = 1; // Virtual PC - Halt
-SMPTypeCategory[NN_vmsplaf] = 1; // Virtual PC - Spin Lock Acquisition Failed
-SMPTypeCategory[NN_vmpushfd] = 1; // Virtual PC - Push virtualized flags register
-SMPTypeCategory[NN_vmpopfd] = 1; // Virtual PC - Pop virtualized flags register
-SMPTypeCategory[NN_vmcli] = 1; // Virtual PC - Clear Interrupt Flag
-SMPTypeCategory[NN_vmsti] = 1; // Virtual PC - Set Interrupt Flag
-SMPTypeCategory[NN_vmiretd] = 1; // Virtual PC - Return From Interrupt
-SMPTypeCategory[NN_vmsgdt] = 1; // Virtual PC - Store Global Descriptor Table
-SMPTypeCategory[NN_vmsidt] = 1; // Virtual PC - Store Interrupt Descriptor Table
-SMPTypeCategory[NN_vmsldt] = 1; // Virtual PC - Store Local Descriptor Table
-SMPTypeCategory[NN_vmstr] = 1; // Virtual PC - Store Task Register
-SMPTypeCategory[NN_vmsdte] = 1; // Virtual PC - Store to Descriptor Table Entry
-SMPTypeCategory[NN_vpcext] = 1; // Virtual PC - ISA extension
-
-#endif // 599 < IDA_SDK_VERSION
-
-SMPTypeCategory[NN_last] = 1;
-
- return;
-
-} // end InitTypeCategory()
diff --git a/src/base/SMPFunction.cpp b/src/base/SMPFunction.cpp
index 6d4a8f8a..00c785e2 100644
--- a/src/base/SMPFunction.cpp
+++ b/src/base/SMPFunction.cpp
@@ -19,7 +19,7 @@
* e-mail: jwd@virginia.com
* URL : http://www.cs.virginia.edu/
*
- * Additional copyrights 2010, 2011, 2012, 2013, 2014 by Zephyr Software LLC
+ * Additional copyrights 2010, 2011, 2012, 2013, 2014, 2015 by Zephyr Software LLC
* e-mail: {clc,jwd}@zephyr-software.com
* URL : http://www.zephyr-software.com/
*
@@ -42,26 +42,28 @@ using namespace std;
#include <cstring>
#include <cstdlib>
+#include <cassert>
#include <pro.h>
-#include <assert.h>
-#include <ida.hpp>
#include <ua.hpp>
+#include <intel.hpp>
+
+#if 0
+#include <ida.hpp>
#include <idp.hpp>
#include <auto.hpp>
#include <bytes.hpp>
#include <funcs.hpp>
-#include <intel.hpp>
#include <name.hpp>
#include <struct.hpp>
+#endif
-#include "SMPDBInterface.h"
-#include "SMPDataFlowAnalysis.h"
-#include "SMPStaticAnalyzer.h"
-#include "SMPFunction.h"
-#include "SMPBasicBlock.h"
-#include "SMPInstr.h"
-#include "SMPProgram.h"
+#include "interfaces/SMPDBInterface.h"
+#include "base/SMPDataFlowAnalysis.h"
+#include "base/SMPFunction.h"
+#include "base/SMPBasicBlock.h"
+#include "base/SMPInstr.h"
+#include "base/SMPProgram.h"
// Set to 1 for debugging output
#define SMP_DEBUG 1
@@ -270,7 +272,7 @@ SMPFunction::SMPFunction(STARS_Function_t *Info, SMPProgram* pgm) {
struct FineGrainedInfo TempFG;
TempFG.SignMiscInfo = 0;
TempFG.SizeInfo = 0;
- for (int RegIndex = R_ax; RegIndex <= STARS_MD_LAST_SAVED_REG_NUM; ++RegIndex) {
+ for (int RegIndex = STARS_x86_R_ax; RegIndex <= global_STARS_program->GetSTARS_MD_LAST_SAVED_REG_NUM(); ++RegIndex) {
this->SavedRegLoc.push_back(0); // zero offset means reg not saved
this->ReturnRegTypes.push_back(UNINIT);
this->ReturnRegFGInfo.push_back(TempFG);
@@ -302,9 +304,9 @@ STARS_Function_t *SMPFunction::GetFuncInfo(void) const {
return myPtr;
}
-uint16_t SMPFunction::GetJumpToFollowNodeCounter(ea_t InstAddr) const {
+uint16_t SMPFunction::GetJumpToFollowNodeCounter(STARS_ea_t InstAddr) const {
uint16_t Counter = 0;
- map<ea_t, uint16_t>::const_iterator MapIter = this->JumpToFollowNodeCounterMap.find(InstAddr);
+ map<STARS_ea_t, uint16_t>::const_iterator MapIter = this->JumpToFollowNodeCounterMap.find(InstAddr);
if (MapIter != this->JumpToFollowNodeCounterMap.end()) {
Counter = MapIter->second;
}
@@ -393,8 +395,8 @@ unsigned short SMPFunction::GetDefSignMiscInfo(int DefHashValue) {
return 0;
} // end of SMPFunction::GetDefSignMiscInfo()
-unsigned short SMPFunction::GetStackDefSignMiscInfo(ea_t InstAddr) {
- map<ea_t, struct FineGrainedInfo>::iterator MapIter;
+unsigned short SMPFunction::GetStackDefSignMiscInfo(STARS_ea_t InstAddr) {
+ map<STARS_ea_t, struct FineGrainedInfo>::iterator MapIter;
MapIter = this->StackDefFGInfo.find(InstAddr);
assert(MapIter != this->StackDefFGInfo.end());
@@ -412,8 +414,8 @@ unsigned short SMPFunction::GetUseSignMiscInfo(int UseHashValue) {
return 0;
} // end of SMPFunction::GetUseSignMiscInfo()
-unsigned short SMPFunction::GetStackUseSignMiscInfo(ea_t InstAddr) {
- map<ea_t, struct FineGrainedInfo>::iterator MapIter;
+unsigned short SMPFunction::GetStackUseSignMiscInfo(STARS_ea_t InstAddr) {
+ map<STARS_ea_t, struct FineGrainedInfo>::iterator MapIter;
MapIter = this->StackUseFGInfo.find(InstAddr);
assert(MapIter != this->StackUseFGInfo.end());
@@ -470,9 +472,9 @@ struct FineGrainedInfo SMPFunction::GetUseFGInfo(int UseHashValue) {
} // end of SMPFunction::GetUseFGInfo()
// Fetch SPARK Ada control flow type for jump at InstAddr; return FALL_THROUGH if none found.
-ControlFlowType SMPFunction::GetControlFlowType(ea_t InstAddr) {
+ControlFlowType SMPFunction::GetControlFlowType(STARS_ea_t InstAddr) {
ControlFlowType JumpTypeCode = FALL_THROUGH;
- map<ea_t, unsigned short>::iterator MapIter = this->ControlFlowMap.find(InstAddr);
+ map<STARS_ea_t, unsigned short>::iterator MapIter = this->ControlFlowMap.find(InstAddr);
if (MapIter != this->ControlFlowMap.end()) {
JumpTypeCode = (ControlFlowType) MapIter->second;
}
@@ -480,42 +482,42 @@ ControlFlowType SMPFunction::GetControlFlowType(ea_t InstAddr) {
} // end of SMPFunction::GetControlFlowType()
// Set counter to zero, or insert zero counter if none found
-void SMPFunction::ResetJumpToFollowNodeCounter(ea_t InstAddr) {
- map<ea_t, uint16_t>::iterator MapIter = this->JumpToFollowNodeCounterMap.find(InstAddr);
+void SMPFunction::ResetJumpToFollowNodeCounter(STARS_ea_t InstAddr) {
+ map<STARS_ea_t, uint16_t>::iterator MapIter = this->JumpToFollowNodeCounterMap.find(InstAddr);
if (MapIter != this->JumpToFollowNodeCounterMap.end()) { // found it
MapIter->second = 0;
}
else {
- pair<ea_t, uint16_t> CounterItem(InstAddr, 0);
- pair<map<ea_t, uint16_t>::iterator, bool> InsertResult = this->JumpToFollowNodeCounterMap.insert(CounterItem);
+ pair<STARS_ea_t, uint16_t> CounterItem(InstAddr, 0);
+ pair<map<STARS_ea_t, uint16_t>::iterator, bool> InsertResult = this->JumpToFollowNodeCounterMap.insert(CounterItem);
assert(InsertResult.second);
}
return;
} // end of SMPFunction::ResetJumpToFollowNodeCounter()
// Increment counter, or insert count of 1 if none found
-void SMPFunction::IncrementJumpToFollowNodeCounter(ea_t InstAddr) {
- map<ea_t, uint16_t>::iterator MapIter = this->JumpToFollowNodeCounterMap.find(InstAddr);
+void SMPFunction::IncrementJumpToFollowNodeCounter(STARS_ea_t InstAddr) {
+ map<STARS_ea_t, uint16_t>::iterator MapIter = this->JumpToFollowNodeCounterMap.find(InstAddr);
if (MapIter != this->JumpToFollowNodeCounterMap.end()) { // found it
++MapIter->second;
}
else {
- pair<ea_t, uint16_t> CounterItem(InstAddr, 1);
- pair<map<ea_t, uint16_t>::iterator, bool> InsertResult = this->JumpToFollowNodeCounterMap.insert(CounterItem);
+ pair<STARS_ea_t, uint16_t> CounterItem(InstAddr, 1);
+ pair<map<STARS_ea_t, uint16_t>::iterator, bool> InsertResult = this->JumpToFollowNodeCounterMap.insert(CounterItem);
assert(InsertResult.second);
}
return;
}
// Add a caller to the list of all callers of this function.
-void SMPFunction::AddCallSource(ea_t addr) {
+void SMPFunction::AddCallSource(STARS_ea_t addr) {
// Convert call instruction address to beginning address of the caller.
STARS_Function_t *FuncInfo = SMP_get_func(addr);
if (NULL == FuncInfo) {
SMP_msg("SERIOUS WARNING: Call location %lx not in a function.\n", (unsigned long) addr);
return;
}
- ea_t FirstAddr = FuncInfo->get_startEA();
+ STARS_ea_t FirstAddr = FuncInfo->get_startEA();
assert(BADADDR != FirstAddr);
this->AllCallSources.insert(FirstAddr);
this->AllCallSites.insert(addr);
@@ -523,8 +525,8 @@ void SMPFunction::AddCallSource(ea_t addr) {
} // end of SMPFunction::AddCallSource()
// Add a direct call target; return true if new target, false if target already added
-bool SMPFunction::AddDirectCallTarget(ea_t addr) {
- pair<set<ea_t>::iterator, bool> InsertResult = this->DirectCallTargets.insert(addr);
+bool SMPFunction::AddDirectCallTarget(STARS_ea_t addr) {
+ pair<set<STARS_ea_t>::iterator, bool> InsertResult = this->DirectCallTargets.insert(addr);
if (InsertResult.second) { // new call target
this->AllCallTargets.push_back(addr);
}
@@ -532,8 +534,8 @@ bool SMPFunction::AddDirectCallTarget(ea_t addr) {
}
// Remove TargetAddr from DirectCallTargets and AllCallTargets.
-bool SMPFunction::RemoveDirectCallTarget(ea_t TargetAddr) {
- set<ea_t>::iterator TargetIter = this->DirectCallTargets.find(TargetAddr);
+bool SMPFunction::RemoveDirectCallTarget(STARS_ea_t TargetAddr) {
+ set<STARS_ea_t>::iterator TargetIter = this->DirectCallTargets.find(TargetAddr);
bool RemovedTarget = false;
if (TargetIter != this->DirectCallTargets.end()) {
this->DirectCallTargets.erase(TargetIter);
@@ -544,8 +546,8 @@ bool SMPFunction::RemoveDirectCallTarget(ea_t TargetAddr) {
}
// Remove TargetAddr from IndirectCallTargets and AllCallTargets.
-bool SMPFunction::RemoveIndirectCallTarget(ea_t TargetAddr) {
- set<ea_t>::iterator TargetIter = this->IndirectCallTargets.find(TargetAddr);
+bool SMPFunction::RemoveIndirectCallTarget(STARS_ea_t TargetAddr) {
+ set<STARS_ea_t>::iterator TargetIter = this->IndirectCallTargets.find(TargetAddr);
bool RemovedTarget = false;
if (TargetIter != this->IndirectCallTargets.end()) {
this->IndirectCallTargets.erase(TargetIter);
@@ -556,12 +558,12 @@ bool SMPFunction::RemoveIndirectCallTarget(ea_t TargetAddr) {
}
// add map entry to LeaInstOpMap
-void SMPFunction::AddLeaOperand(ea_t addr, STARSOpndTypePtr LeaOperand) {
- pair<ea_t, STARSOpndTypePtr> InsertValue(addr, LeaOperand);
- pair<map<ea_t, STARSOpndTypePtr>::iterator, bool> InsertResult;
+void SMPFunction::AddLeaOperand(STARS_ea_t addr, STARSOpndTypePtr LeaOperand) {
+ pair<STARS_ea_t, STARSOpndTypePtr> InsertValue(addr, LeaOperand);
+ pair<map<STARS_ea_t, STARSOpndTypePtr>::iterator, bool> InsertResult;
InsertResult = this->LeaInstOpMap.insert(InsertValue);
if (!(InsertResult.second)) { // already existed; replace
- map<ea_t, STARSOpndTypePtr>::iterator FindIter = this->LeaInstOpMap.find(addr);
+ map<STARS_ea_t, STARSOpndTypePtr>::iterator FindIter = this->LeaInstOpMap.find(addr);
assert(FindIter != this->GetLastLeaOperand());
FindIter->second = LeaOperand;
}
@@ -569,18 +571,18 @@ void SMPFunction::AddLeaOperand(ea_t addr, STARSOpndTypePtr LeaOperand) {
}
// Add input arguments to the NormalizedStackOpsMap.
-void SMPFunction::AddNormalizedStackOperand(STARSOpndTypePtr OldOp, ea_t InstAddr, STARSOpndTypePtr NormalizedOp) {
+void SMPFunction::AddNormalizedStackOperand(STARSOpndTypePtr OldOp, STARS_ea_t InstAddr, STARSOpndTypePtr NormalizedOp) {
bool DuplicateCase = false; // e.g. inc [esp+8] will have [esp+8] as a DEF and a USE and maps will see [esp+8] twice
bool DebugFlag = (InstAddr == 0x8048463);
- pair<map<pair<STARSOpndTypePtr, ea_t>, STARSOpndTypePtr, LessDefinition>::iterator, bool> InsertResult;
- pair<map<pair<STARSOpndTypePtr, ea_t>, map<pair<STARSOpndTypePtr, ea_t>, STARSOpndTypePtr, LessDefinition>::iterator, LessDefinition>::iterator, bool> InverseInsertResult;
- pair<STARSOpndTypePtr, ea_t> OldValue(OldOp, InstAddr);
- pair<STARSOpndTypePtr, ea_t> InverseValue(OldOp, InstAddr); // OldOp was NormalizedOp when it was inserted previously
- pair<pair<STARSOpndTypePtr, ea_t>, STARSOpndTypePtr> InsertValue(OldValue, NormalizedOp);
- pair<STARSOpndTypePtr, ea_t> InverseInsertValue(NormalizedOp, InstAddr);
- map<pair<STARSOpndTypePtr, ea_t>, STARSOpndTypePtr, LessDefinition>::iterator OldIter = this->NormalizedStackOpsMap.begin();
- pair<pair<STARSOpndTypePtr, ea_t>, map<pair<STARSOpndTypePtr, ea_t>, STARSOpndTypePtr, LessDefinition>::iterator> InverseInsertTriple(InverseInsertValue, OldIter);
- map<pair<STARSOpndTypePtr, ea_t>, map<pair<STARSOpndTypePtr, ea_t>, STARSOpndTypePtr, LessDefinition>::iterator>::iterator InverseIter;
+ pair<map<pair<STARSOpndTypePtr, STARS_ea_t>, STARSOpndTypePtr, LessDefinition>::iterator, bool> InsertResult;
+ pair<map<pair<STARSOpndTypePtr, STARS_ea_t>, map<pair<STARSOpndTypePtr, STARS_ea_t>, STARSOpndTypePtr, LessDefinition>::iterator, LessDefinition>::iterator, bool> InverseInsertResult;
+ pair<STARSOpndTypePtr, STARS_ea_t> OldValue(OldOp, InstAddr);
+ pair<STARSOpndTypePtr, STARS_ea_t> InverseValue(OldOp, InstAddr); // OldOp was NormalizedOp when it was inserted previously
+ pair<pair<STARSOpndTypePtr, STARS_ea_t>, STARSOpndTypePtr> InsertValue(OldValue, NormalizedOp);
+ pair<STARSOpndTypePtr, STARS_ea_t> InverseInsertValue(NormalizedOp, InstAddr);
+ map<pair<STARSOpndTypePtr, STARS_ea_t>, STARSOpndTypePtr, LessDefinition>::iterator OldIter = this->NormalizedStackOpsMap.begin();
+ pair<pair<STARSOpndTypePtr, STARS_ea_t>, map<pair<STARSOpndTypePtr, STARS_ea_t>, STARSOpndTypePtr, LessDefinition>::iterator> InverseInsertTriple(InverseInsertValue, OldIter);
+ map<pair<STARSOpndTypePtr, STARS_ea_t>, map<pair<STARSOpndTypePtr, STARS_ea_t>, STARSOpndTypePtr, LessDefinition>::iterator>::iterator InverseIter;
// If this function calls alloca(), stack operands could be normalized more than once.
// Before we proceed, we update an old entry instead of inserting a new entry.
@@ -614,13 +616,13 @@ void SMPFunction::AddNormalizedStackOperand(STARSOpndTypePtr OldOp, ea_t InstAdd
// fourth call to this method, we will not find a reverse mapping B->A any more, so the if-clause
// does not execute. We can only detect this case by finding an existing C->A reverse mapping
// and an existing A->C mapping to confirm our inference.
- pair<STARSOpndTypePtr, ea_t> TestInverseValue(NormalizedOp, InstAddr);
+ pair<STARSOpndTypePtr, STARS_ea_t> TestInverseValue(NormalizedOp, InstAddr);
InverseIter = this->InverseNormalizedStackOpsMap.find(TestInverseValue);
if (InverseIter != this->InverseNormalizedStackOpsMap.end()) {
// Found existing C->A inverse mapping. Is there an A->C mapping to confirm
// our interpretation of the situation?
- pair<STARSOpndTypePtr, ea_t> TestOldValue(InverseIter->second->first.first, InstAddr);
- map<pair<STARSOpndTypePtr, ea_t>, STARSOpndTypePtr, LessDefinition>::iterator TestOldIter;
+ pair<STARSOpndTypePtr, STARS_ea_t> TestOldValue(InverseIter->second->first.first, InstAddr);
+ map<pair<STARSOpndTypePtr, STARS_ea_t>, STARSOpndTypePtr, LessDefinition>::iterator TestOldIter;
TestOldIter = this->NormalizedStackOpsMap.find(TestOldValue);
if (TestOldIter != this->NormalizedStackOpsMap.end()) {
// We found a mapping from <A, InstAddr>.
@@ -653,11 +655,11 @@ void SMPFunction::AddNormalizedStackOperand(STARSOpndTypePtr OldOp, ea_t InstAdd
assert(InverseInsertResult.second || DuplicateCase);
}
if (DebugFlag) {
- map<pair<STARSOpndTypePtr, ea_t>, STARSOpndTypePtr, LessDefinition>::iterator StackMapIter;
+ map<pair<STARSOpndTypePtr, STARS_ea_t>, STARSOpndTypePtr, LessDefinition>::iterator StackMapIter;
SMP_msg("DEBUG: NormalizedStackOpsMap size: %zd\n", this->NormalizedStackOpsMap.size());
for (StackMapIter = this->NormalizedStackOpsMap.begin(); StackMapIter != this->NormalizedStackOpsMap.end(); ++ StackMapIter) {
STARSOpndTypePtr OldOp = StackMapIter->first.first;
- ea_t InstAddr = StackMapIter->first.second;
+ STARS_ea_t InstAddr = StackMapIter->first.second;
SMP_msg("DEBUG: NormalizedStackOps: ");
PrintOperand(OldOp);
SMP_msg(" addr: %lx\n", (unsigned long) InstAddr);
@@ -676,11 +678,11 @@ void SMPFunction::UpdateMaxDirectStackAccessOffset(sval_t NewOffset) {
// insert jump type into ControlFlowMap
-void SMPFunction::SetControlFlowType(ea_t InstAddr, ControlFlowType JumpTypeCode) {
- map<ea_t, unsigned short>::iterator MapIter = this->ControlFlowMap.find(InstAddr);
+void SMPFunction::SetControlFlowType(STARS_ea_t InstAddr, ControlFlowType JumpTypeCode) {
+ map<STARS_ea_t, unsigned short>::iterator MapIter = this->ControlFlowMap.find(InstAddr);
if (MapIter == this->ControlFlowMap.end()) { // no old entry; insert
- pair<ea_t, unsigned short> InsertPair(InstAddr, (unsigned short) JumpTypeCode);
- pair<map<ea_t, unsigned short>::iterator, bool> InsertResult = this->ControlFlowMap.insert(InsertPair);
+ pair<STARS_ea_t, unsigned short> InsertPair(InstAddr, (unsigned short) JumpTypeCode);
+ pair<map<STARS_ea_t, unsigned short>::iterator, bool> InsertResult = this->ControlFlowMap.insert(InsertPair);
assert(InsertResult.second);
MapIter = InsertResult.first;
}
@@ -708,15 +710,15 @@ map<int, struct STARS_SCCP_Const_Struct>::iterator SMPFunction::InsertGlobalCons
// Return RTLop if not stack opnd; return normalized RTLop otherwise.
-STARSOpndTypePtr SMPFunction::GetNormalizedOperand(ea_t InstAddr, STARSOpndTypePtr RTLop) {
+STARSOpndTypePtr SMPFunction::GetNormalizedOperand(STARS_ea_t InstAddr, STARSOpndTypePtr RTLop) {
STARSOpndTypePtr NormOp = nullptr;
bool DebugFlag = (0x8048463 == InstAddr);
if (DebugFlag) {
- map<pair<STARSOpndTypePtr, ea_t>, STARSOpndTypePtr, LessDefinition>::iterator StackMapIter;
+ map<pair<STARSOpndTypePtr, STARS_ea_t>, STARSOpndTypePtr, LessDefinition>::iterator StackMapIter;
SMP_msg("DEBUG: NormalizedStackOpsMap size: %zd\n", this->NormalizedStackOpsMap.size());
for (StackMapIter = this->NormalizedStackOpsMap.begin(); StackMapIter != this->NormalizedStackOpsMap.end(); ++ StackMapIter) {
STARSOpndTypePtr OldOp = StackMapIter->first.first;
- ea_t InstAddr = StackMapIter->first.second;
+ STARS_ea_t InstAddr = StackMapIter->first.second;
SMP_msg("DEBUG: NormalizedStackOps: ");
PrintOperand(OldOp);
SMP_msg(" addr: %lx\n", (unsigned long) InstAddr);
@@ -725,8 +727,8 @@ STARSOpndTypePtr SMPFunction::GetNormalizedOperand(ea_t InstAddr, STARSOpndTypeP
PrintOperand(RTLop);
}
if (MDIsStackAccessOpnd(RTLop, this->UsesFramePointer())) {
- pair<STARSOpndTypePtr, ea_t> OldDefn(RTLop, InstAddr);
- map<pair<STARSOpndTypePtr, ea_t>, STARSOpndTypePtr, LessDefinition>::iterator FindIter = this->NormalizedStackOpsMap.find(OldDefn);
+ pair<STARSOpndTypePtr, STARS_ea_t> OldDefn(RTLop, InstAddr);
+ map<pair<STARSOpndTypePtr, STARS_ea_t>, STARSOpndTypePtr, LessDefinition>::iterator FindIter = this->NormalizedStackOpsMap.find(OldDefn);
assert(this->NormalizedStackOpsMap.end() != FindIter);
NormOp = FindIter->second;
}
@@ -768,8 +770,8 @@ void SMPFunction::UpdateDefSignMiscInfo(int DefHashValue, unsigned short NewInfo
return;
} // end of SMPFunction::UpdateDefSignMiscInfo()
-void SMPFunction::UpdateStackDefSignMiscInfo(ea_t InstAddr, unsigned short NewInfo) {
- map<ea_t, struct FineGrainedInfo>::iterator MapIter;
+void SMPFunction::UpdateStackDefSignMiscInfo(STARS_ea_t InstAddr, unsigned short NewInfo) {
+ map<STARS_ea_t, struct FineGrainedInfo>::iterator MapIter;
MapIter = this->StackDefFGInfo.find(InstAddr);
assert(MapIter != this->StackDefFGInfo.end());
@@ -800,8 +802,8 @@ void SMPFunction::UpdateUseSignMiscInfo(int UseHashValue, unsigned short NewInfo
return;
} // end of SMPFunction::UpdateUseSignMiscInfo()
-void SMPFunction::UpdateStackUseSignMiscInfo(ea_t InstAddr, unsigned short NewInfo) {
- map<ea_t, struct FineGrainedInfo>::iterator MapIter;
+void SMPFunction::UpdateStackUseSignMiscInfo(STARS_ea_t InstAddr, unsigned short NewInfo) {
+ map<STARS_ea_t, struct FineGrainedInfo>::iterator MapIter;
MapIter = this->StackUseFGInfo.find(InstAddr);
assert(MapIter != this->StackUseFGInfo.end());
@@ -904,10 +906,10 @@ void SMPFunction::ClearDefSignedness(int DefHashValue) {
// Erase a range of instructions from the Instrs list, usually corresponding
// the the range of a basic block.
-void SMPFunction::EraseInstRange(ea_t FirstAddr, ea_t LastAddr) {
+void SMPFunction::EraseInstRange(STARS_ea_t FirstAddr, STARS_ea_t LastAddr) {
list<SMPInstr *>::iterator InstIter = this->Instrs.begin();
SMPInstr *CurrInst;
- ea_t InstAddr;
+ STARS_ea_t InstAddr;
while (InstIter != this->Instrs.end()) {
CurrInst = (*InstIter);
@@ -923,16 +925,16 @@ void SMPFunction::EraseInstRange(ea_t FirstAddr, ea_t LastAddr) {
// For instruction address UseAddr, compute the reaching defs for operand TempOp,
// placing them into the TempReachingDefs list.
-void SMPFunction::ComputeTempReachingDefs(STARSOpndTypePtr TempOp, ea_t UseAddr) {
+void SMPFunction::ComputeTempReachingDefs(STARSOpndTypePtr TempOp, STARS_ea_t UseAddr) {
this->TempReachingDefs.clear();
SMPBasicBlock *CurrBlock = this->GetBlockFromInstAddr(UseAddr);
assert(NULL != CurrBlock);
- set<pair<STARSOpndTypePtr, ea_t>, LessDefinition>::iterator ReachesInIter;
- pair<set<ea_t, LessAddr>::iterator, bool> InsertResult;
+ set<pair<STARSOpndTypePtr, STARS_ea_t>, LessDefinition>::iterator ReachesInIter;
+ pair<set<STARS_ea_t, LessAddr>::iterator, bool> InsertResult;
// Start with the matching members of the ReachesIn set for the current basic block.
for (ReachesInIter = CurrBlock->GetFirstReachesIn(); ReachesInIter != CurrBlock->GetLastReachesIn(); ++ReachesInIter) {
- pair<STARSOpndTypePtr, ea_t> ReachesInDef = *ReachesInIter;
+ pair<STARSOpndTypePtr, STARS_ea_t> ReachesInDef = *ReachesInIter;
if (IsEqOp(TempOp, ReachesInDef.first)) {
InsertResult = this->TempReachingDefs.insert(ReachesInDef.second);
assert(InsertResult.second);
@@ -943,7 +945,7 @@ void SMPFunction::ComputeTempReachingDefs(STARSOpndTypePtr TempOp, ea_t UseAddr)
vector<SMPInstr *>::iterator InstIter;
for (InstIter = CurrBlock->GetFirstInst(); InstIter != CurrBlock->GetLastInst(); ++InstIter) {
SMPInstr *CurrInst = *InstIter;
- ea_t InstAddr = CurrInst->GetAddr();
+ STARS_ea_t InstAddr = CurrInst->GetAddr();
if (CurrInst->IsMarkerInst())
continue;
if (InstAddr >= UseAddr)
@@ -963,12 +965,12 @@ void SMPFunction::ComputeTempReachingDefs(STARSOpndTypePtr TempOp, ea_t UseAddr)
// Put the entries matching TempOp into TempStackDeltaReachesList.
void SMPFunction::ComputeTempStackDeltaReachesList(STARSOpndTypePtr TempOp) {
bool FoundOperand = false;
- set<pair<STARSOpndTypePtr, pair<ea_t, sval_t> >, LessStackDeltaCopy>::iterator CopyIter;
+ set<pair<STARSOpndTypePtr, pair<STARS_ea_t, sval_t> >, LessStackDeltaCopy>::iterator CopyIter;
this->TempStackDeltaReachesList.clear();
for (CopyIter = this->StackPtrCopySet.begin(); CopyIter != this->StackPtrCopySet.end(); ++CopyIter) {
- pair<STARSOpndTypePtr, pair<ea_t, sval_t> > CopyEntry = *CopyIter;
+ pair<STARSOpndTypePtr, pair<STARS_ea_t, sval_t> > CopyEntry = *CopyIter;
if (IsEqOp(TempOp, CopyEntry.first)) {
- set<ea_t, LessAddr>::iterator FindReachDefIter;
+ set<STARS_ea_t, LessAddr>::iterator FindReachDefIter;
FoundOperand = true; // help us save time later by exiting loop
// Match address at which stack ptr copy was made to a reaching def address for TempOp.
FindReachDefIter = this->TempReachingDefs.find(CopyEntry.second.first);
@@ -1000,7 +1002,7 @@ bool SMPFunction::FindReachingStackDelta(sval_t &StackDelta) {
StackDelta = this->TempStackDeltaReachesList.front().second;
}
- list<pair<ea_t, sval_t> >::iterator DeltaIter;
+ list<pair<STARS_ea_t, sval_t> >::iterator DeltaIter;
for (DeltaIter = this->TempStackDeltaReachesList.begin(); DeltaIter != this->TempStackDeltaReachesList.end(); ++DeltaIter) {
sval_t NewDelta = DeltaIter->second;
if (NewDelta != StackDelta) {
@@ -1015,7 +1017,7 @@ bool SMPFunction::FindReachingStackDelta(sval_t &StackDelta) {
// Find any apparent stack adjustment after the call instruction at CallAddr,
// confining our search to the basic block containing CallAddr.
-sval_t SMPFunction::GetStackAdjustmentForCallee(ea_t CallAddr) {
+sval_t SMPFunction::GetStackAdjustmentForCallee(STARS_ea_t CallAddr) {
sval_t CalleeAdjustment = 0;
SMPBasicBlock *CallBlock = this->GetBlockFromInstAddr(CallAddr);
@@ -1037,7 +1039,7 @@ sval_t SMPFunction::GetStackAdjustmentForCallee(ea_t CallAddr) {
// detect a stack adjustment after the call instruction, from which we could infer
// the stack delta of the callee. We choose the latter approach, and find the smallest
// adjustment among all call sites for the callee.
-sval_t SMPFunction::GetStackDeltaForCallee(ea_t CallTargetAddr) {
+sval_t SMPFunction::GetStackDeltaForCallee(STARS_ea_t CallTargetAddr) {
sval_t CalleeDelta = CALLING_CONVENTION_DEFAULT_FUNCTION_STACK_DELTA;
SMPFunction *CalleeFunc = this->GetProg()->FindFunction(CallTargetAddr);
@@ -1068,12 +1070,12 @@ sval_t SMPFunction::ComputeGlobalStackAdjustment(void) {
}
if (1 < NumCallSites) { // if only one call site, it is dangerous to draw conclusions about seeming "adjustments."
- set<ea_t>::iterator CallSiteIter;
+ set<STARS_ea_t>::iterator CallSiteIter;
for (CallSiteIter = this->AllCallSites.begin(); CallSiteIter != this->AllCallSites.end(); ++CallSiteIter) {
- ea_t CallSiteAddr = (*CallSiteIter);
+ STARS_ea_t CallSiteAddr = (*CallSiteIter);
STARS_Function_t *CurrFunc = SMP_get_func(CallSiteAddr);
assert(NULL != CurrFunc);
- ea_t CallerFirstAddr = CurrFunc->get_startEA();
+ STARS_ea_t CallerFirstAddr = CurrFunc->get_startEA();
SMPFunction *CallerFunc = this->GetProg()->FindFunction(CallerFirstAddr);
assert(NULL != CallerFunc);
sval_t CurrentAdjustment = CallerFunc->GetStackAdjustmentForCallee(CallSiteAddr);
@@ -1371,7 +1373,7 @@ bool SMPFunction::AnalyzeStackPointerDeltas(void) {
if (CurrInst->IsMarkerInst()) {
continue; // skip marker instruction
}
- ea_t InstAddr = CurrInst->GetAddr();
+ STARS_ea_t InstAddr = CurrInst->GetAddr();
if (InstAddr == this->GetFirstFrameAllocInstAddr()) {
// Record the reset point for frame deallocations
this->PreAllocStackDelta = IncomingDelta;
@@ -1641,12 +1643,12 @@ bool SMPFunction::AnalyzeStackPointerDeltas(void) {
// Insert the arguments into the StackPtrCopySet; or, if a matching entry already exists
// with a StackDelta of greater magnitude than StackDelta, update just the StackDelta.
// Return true if StackDelta was inserted, false if it was used to update an old entry.
-bool SMPFunction::AddToStackPtrCopySet(STARSOpndTypePtr CopyOp, ea_t InstAddr, sval_t StackDelta) {
+bool SMPFunction::AddToStackPtrCopySet(STARSOpndTypePtr CopyOp, STARS_ea_t InstAddr, sval_t StackDelta) {
bool NewInsertion;
- pair<ea_t, sval_t> InsertStackDefn(InstAddr, StackDelta);
- pair<STARSOpndTypePtr, pair<ea_t, sval_t> > InsertStackDefnOp(CopyOp, InsertStackDefn);
- set<pair<STARSOpndTypePtr, pair<ea_t, sval_t> >, LessStackDeltaCopy>::iterator FindIter;
- pair<set<pair<STARSOpndTypePtr, pair<ea_t, sval_t> >, LessStackDeltaCopy>::iterator, bool> InsertResult;
+ pair<STARS_ea_t, sval_t> InsertStackDefn(InstAddr, StackDelta);
+ pair<STARSOpndTypePtr, pair<STARS_ea_t, sval_t> > InsertStackDefnOp(CopyOp, InsertStackDefn);
+ set<pair<STARSOpndTypePtr, pair<STARS_ea_t, sval_t> >, LessStackDeltaCopy>::iterator FindIter;
+ pair<set<pair<STARSOpndTypePtr, pair<STARS_ea_t, sval_t> >, LessStackDeltaCopy>::iterator, bool> InsertResult;
FindIter = this->StackPtrCopySet.find(InsertStackDefnOp);
if (FindIter == this->StackPtrCopySet.end()) {
@@ -1658,7 +1660,7 @@ bool SMPFunction::AddToStackPtrCopySet(STARSOpndTypePtr CopyOp, ea_t InstAddr, s
else {
// Already there; see if delta needs to be updated.
NewInsertion = false;
- pair<STARSOpndTypePtr, pair<ea_t, sval_t> > OldStackDefnOp(*FindIter);
+ pair<STARSOpndTypePtr, pair<STARS_ea_t, sval_t> > OldStackDefnOp(*FindIter);
// Favor a smaller stack frame for the alloca-calling functions, e.g. favor -24 over -32 as a delta.
if (StackDelta > OldStackDefnOp.second.second) {
// Replace the old entry with a new one.
@@ -1763,7 +1765,7 @@ void SMPFunction::FindAllAllocsAndDeallocs(void) {
#endif
for ( ; InstIter != this->Instrs.end(); ++InstIter) {
SMPInstr *CurrInst = (*InstIter);
- ea_t addr = CurrInst->GetAddr();
+ STARS_ea_t addr = CurrInst->GetAddr();
// Keep the most recent instruction in the DeallocInstr
// in case we reach the return without seeing a dealloc.
@@ -1857,15 +1859,15 @@ void SMPFunction::FindAllAllocsAndDeallocs(void) {
// THE ASSUMPTION THAT WE HAVE ONLY PUSH INSTRUCTIONS BEFORE
// THE ALLOCATING INSTR IS ONLY TRUE WHEN LOCALVARSSIZE == 0;
else {
- ea_t SaveAddr = this->FuncInfo->get_startEA();
+ STARS_ea_t SaveAddr = this->FuncInfo->get_startEA();
list<SMPInstr *>::iterator InstIter = this->Instrs.begin();
#if SMP_USE_SSA_FNOP_MARKER
++InstIter; // skip marker instruction
#endif
for ( ; InstIter != this->Instrs.end(); ++InstIter) {
SMPInstr *CurrInst = (*InstIter);
- ea_t addr = CurrInst->GetAddr();
- if (CurrInst->GetIDAOpcode() == NN_push)
+ STARS_ea_t addr = CurrInst->GetAddr();
+ if (CurrInst->GetIDAOpcode() == STARS_NN_push)
SaveAddr = addr;
else
break;
@@ -2184,7 +2186,7 @@ bool SMPFunction::MDFixFrameInfo(void) {
// that IDA is expecting for the local vars region.
// If so, we return the address of the instruction at which ESP reaches its value, else
// we return BADADDR.
-ea_t SMPFunction::FindAllocPoint(STARS_asize_t OriginalLocSize) {
+STARS_ea_t SMPFunction::FindAllocPoint(STARS_asize_t OriginalLocSize) {
sval_t TargetSize = - ((sval_t) OriginalLocSize); // negate; stack grows down
#if SMP_DEBUG_FRAMEFIXUP
@@ -2201,7 +2203,7 @@ ea_t SMPFunction::FindAllocPoint(STARS_asize_t OriginalLocSize) {
#endif
for ( ; InstIter != this->Instrs.end(); ++InstIter) {
SMPInstr *CurrInst = (*InstIter);
- ea_t addr = CurrInst->GetAddr();
+ STARS_ea_t addr = CurrInst->GetAddr();
// get_spd() returns a cumulative delta of ESP
sval_t sp_delta = SMP_get_spd(this->GetFuncInfo(), addr);
#if SMP_DEBUG_FRAMEFIXUP
@@ -2214,7 +2216,7 @@ ea_t SMPFunction::FindAllocPoint(STARS_asize_t OriginalLocSize) {
return BADADDR; // cannot back up from first instruction
}
else {
- ea_t PrevAddr = (*(--InstIter))->GetAddr();
+ STARS_ea_t PrevAddr = (*(--InstIter))->GetAddr();
#if SMP_USE_SSA_FNOP_MARKER
if ((*(this->Instrs.begin()))->GetAddr() == PrevAddr)
return BADADDR; // don't return marker instruction
@@ -2285,7 +2287,7 @@ bool SMPFunction::MDFixUseFP(void) {
bool OldUseFP = this->UsesFramePointer();
bool HasLocals = (0 < this->LocalVarsSize);
list<SMPInstr *>::iterator InstIter = this->Instrs.begin();
- ea_t addr;
+ STARS_ea_t addr;
#if SMP_USE_SSA_FNOP_MARKER
++InstIter; // skip marker instruction
@@ -2311,7 +2313,7 @@ bool SMPFunction::MDFixUseFP(void) {
}
}
else if (!ESPintoEBP) { // found "push ebp", looking for "mov ebp,esp"
- if ((CurrInst->GetIDAOpcode() == NN_mov)
+ if ((CurrInst->GetIDAOpcode() == STARS_NN_mov)
&& (CurrInst->GetFirstDef()->GetOp()->MatchesReg(MD_FRAME_POINTER_REG))
&& (CurrInst->GetFirstUse()->GetOp()->MatchesReg(MD_STACK_POINTER_REG))) {
ESPintoEBP = true;
@@ -2377,11 +2379,11 @@ void SMPFunction::MDFindSavedRegs(void) {
continue;
sval_t CurrOffset = SMP_get_spd(CurrFunc, CurrInst->GetAddr());
- if (CurrInst->GetIDAOpcode() == NN_push) {
+ if (CurrInst->GetIDAOpcode() == STARS_NN_push) {
STARSOpndTypePtr PushedReg = CurrInst->GetPushedOpnd();
if (PushedReg->IsRegOp()) {
RegIndex = (int) PushedReg->GetReg();
- if (RegIndex > STARS_MD_LAST_SAVED_REG_NUM) {
+ if (RegIndex > global_STARS_program->GetSTARS_MD_LAST_SAVED_REG_NUM()) {
SMP_msg("WARNING: Skipping save of register %d\n", RegIndex);
continue;
}
@@ -2393,20 +2395,20 @@ void SMPFunction::MDFindSavedRegs(void) {
}
} // end if register push operand
} // end if PUSH instruction
- else if (NN_pusha == CurrInst->GetIDAOpcode()) {
+ else if (STARS_NN_pusha == CurrInst->GetIDAOpcode()) {
// **!!** Handle pushes of all regs.
- this->SavedRegLoc[(std::size_t) R_ax] = CurrOffset - 4;
- this->SavedRegLoc[(std::size_t) R_cx] = CurrOffset - 8;
- this->SavedRegLoc[(std::size_t) R_dx] = CurrOffset - 12;
- this->SavedRegLoc[(std::size_t) R_bx] = CurrOffset - 16;
- this->SavedRegLoc[(std::size_t) R_sp] = CurrOffset - 20;
- this->SavedRegLoc[(std::size_t) R_bp] = CurrOffset - 24;
- this->SavedRegLoc[(std::size_t) R_si] = CurrOffset - 28;
- this->SavedRegLoc[(std::size_t) R_di] = CurrOffset - 32;
+ this->SavedRegLoc[(std::size_t) STARS_x86_R_ax] = CurrOffset - 4;
+ this->SavedRegLoc[(std::size_t) STARS_x86_R_cx] = CurrOffset - 8;
+ this->SavedRegLoc[(std::size_t) STARS_x86_R_dx] = CurrOffset - 12;
+ this->SavedRegLoc[(std::size_t) STARS_x86_R_bx] = CurrOffset - 16;
+ this->SavedRegLoc[(std::size_t) STARS_x86_R_sp] = CurrOffset - 20;
+ this->SavedRegLoc[(std::size_t) STARS_x86_R_bp] = CurrOffset - 24;
+ this->SavedRegLoc[(std::size_t) STARS_x86_R_si] = CurrOffset - 28;
+ this->SavedRegLoc[(std::size_t) STARS_x86_R_di] = CurrOffset - 32;
break; // all regs accounted for
}
else if (CurrInst->MDIsEnterInstr()) {
- this->SavedRegLoc[(std::size_t) R_bp] = CurrOffset - 4;
+ this->SavedRegLoc[(std::size_t) STARS_x86_R_bp] = CurrOffset - 4;
}
} // end for all instructions
@@ -2434,7 +2436,7 @@ bool SMPFunction::MDFindReturnTypes(void) {
set<DefOrUse, LessDefUse>::iterator CurrUse;
for (CurrUse = CurrInst->GetFirstUse(); CurrUse != CurrInst->GetLastUse(); ++CurrUse) {
STARSOpndTypePtr UseOp = CurrUse->GetOp();
- if ((! UseOp->IsRegOp()) || (STARS_MD_LAST_SAVED_REG_NUM < UseOp->GetReg()))
+ if ((! UseOp->IsRegOp()) || (global_STARS_program->GetSTARS_MD_LAST_SAVED_REG_NUM() < UseOp->GetReg()))
continue;
SMPOperandType OldType = this->ReturnRegTypes.at(UseOp->GetReg());
SMPOperandType NewType = SMPTypeMeet(OldType, CurrUse->GetType());
@@ -2466,12 +2468,12 @@ void SMPFunction::MDFindIncomingTypes(void) {
// For each register USE in the marker inst at the top of the function,
// see if we have a consistent type inference at all call sites (i.e.
// the USEs of the call instructions that call this function).
- set<ea_t>::iterator CallSiteIter;
+ set<STARS_ea_t>::iterator CallSiteIter;
for (CallSiteIter = this->AllCallSites.begin(); CallSiteIter != this->AllCallSites.end(); ++CallSiteIter) {
- ea_t CallSiteAddr = (*CallSiteIter);
+ STARS_ea_t CallSiteAddr = (*CallSiteIter);
STARS_Function_t *CurrFunc = SMP_get_func(CallSiteAddr);
assert(NULL != CurrFunc);
- ea_t CallerFirstAddr = CurrFunc->get_startEA();
+ STARS_ea_t CallerFirstAddr = CurrFunc->get_startEA();
SMPFunction *CallerFunc = this->GetProg()->FindFunction(CallerFirstAddr);
assert(NULL != CallerFunc);
SMPInstr *CallSiteInst = CallerFunc->GetInstFromAddr(CallSiteAddr);
@@ -2615,7 +2617,7 @@ void SMPFunction::SemiNaiveLocalVarID(void) {
#endif
for ( ; InstIter != this->Instrs.end(); ++InstIter) {
SMPInstr *CurrInst = (*InstIter);
- ea_t addr = CurrInst->GetAddr();
+ STARS_ea_t addr = CurrInst->GetAddr();
sval_t sp_delta = CurrInst->GetStackPtrOffset();
if (sp_delta < this->MinStackDelta)
this->MinStackDelta = sp_delta;
@@ -2641,7 +2643,7 @@ void SMPFunction::SemiNaiveLocalVarID(void) {
#endif
for ( ; InstIter != this->Instrs.end(); ++InstIter) {
SMPInstr *CurrInst = (*InstIter);
- ea_t addr = CurrInst->GetAddr();
+ STARS_ea_t addr = CurrInst->GetAddr();
// Find the min and max stack offsets in DEFs and USEs.
STARSOpndTypePtr TempOp;
if (CurrInst->HasDestMemoryOperand() || CurrInst->MDIsPushInstr() || CurrInst->MDIsEnterInstr()) {
@@ -2807,7 +2809,7 @@ void SMPFunction::SemiNaiveLocalVarID(void) {
// Update MinStackAccessOffset and MaxStackAccessLimit if TempOp is stack access
void SMPFunction::UpdateMinMaxStackOffsets(SMPInstr *CurrInst, STARSOpndTypePtr TempOp) {
- ea_t offset;
+ STARS_ea_t offset;
std::size_t DataSize;
bool UsedFramePointer;
bool IndexedAccess;
@@ -2911,7 +2913,7 @@ bool SMPFunction::AuditLocalVarTable(void) {
struct LocalVar TempLocal;
char TempStr[20];
TempLocal.offset = this->LocalVarOffsetLimit;
- TempLocal.size = STARS_ISA_Bytewidth;
+ TempLocal.size = global_STARS_program->GetSTARS_ISA_Bytewidth();
if ((TempLocal.size + TempLocal.offset) > ((long) this->MaxStackAccessLimit)) {
TempLocal.size = ((long) this->MaxStackAccessLimit) - TempLocal.offset;
}
@@ -3038,7 +3040,7 @@ void SMPFunction::FindOutgoingArgsSize(void) {
#endif
for ( ; InstIter != this->Instrs.end(); ++InstIter) {
SMPInstr *CurrInst = (*InstIter);
- ea_t InstAddr = CurrInst->GetAddr();
+ STARS_ea_t InstAddr = CurrInst->GetAddr();
sval_t sp_delta = CurrInst->GetStackPtrOffset();
if (0 < sp_delta) {
// Stack underflow.
@@ -3049,7 +3051,7 @@ void SMPFunction::FindOutgoingArgsSize(void) {
return;
}
assert(0 >= sp_delta);
- ea_t offset;
+ STARS_ea_t offset;
std::size_t DataSize;
bool UsedFramePointer;
bool IndexedAccess;
@@ -3117,8 +3119,8 @@ void SMPFunction::FindOutgoingArgsSize(void) {
StackDefFG.SignMiscInfo |= FG_MASK_UNSIGNED;
}
// Insert the StackDefFG into the map of InstAddr to DEF FG info.
- pair<map<ea_t, struct FineGrainedInfo>::iterator, bool> InsertResult;
- pair<ea_t, struct FineGrainedInfo> InsertValue(InstAddr, StackDefFG);
+ pair<map<STARS_ea_t, struct FineGrainedInfo>::iterator, bool> InsertResult;
+ pair<STARS_ea_t, struct FineGrainedInfo> InsertValue(InstAddr, StackDefFG);
InsertResult = this->StackDefFGInfo.insert(InsertValue);
assert(InsertResult.second);
} // end if MDGetStackOffsetAndSize()
@@ -3184,8 +3186,8 @@ void SMPFunction::FindOutgoingArgsSize(void) {
StackUseFG.SignMiscInfo |= FG_MASK_UNSIGNED;
}
// Insert the StackUseFG into the map of InstAddr to USE FG info.
- pair<map<ea_t, struct FineGrainedInfo>::iterator, bool> InsertResult;
- pair<ea_t, struct FineGrainedInfo> InsertValue(InstAddr, StackUseFG);
+ pair<map<STARS_ea_t, struct FineGrainedInfo>::iterator, bool> InsertResult;
+ pair<STARS_ea_t, struct FineGrainedInfo> InsertValue(InstAddr, StackUseFG);
InsertResult = this->StackUseFGInfo.insert(InsertValue);
assert(InsertResult.second);
} // end if MDGetStackOffsetAndSize()
@@ -3320,14 +3322,14 @@ void SMPFunction::FindOutgoingArgsSize(void) {
// BaseValue is either this->MinStackAccessOffset, or this->MinStackDelta (when this->MinStackAccessOffset is still
// being computed).
// Return true if a stack memory access was found in TempOp, false otherwise.
-bool SMPFunction::MDGetStackOffsetAndSize(SMPInstr *Instr, STARSOpndTypePtr TempOp, sval_t BaseValue, ea_t &offset, std::size_t &DataSize, bool &FP,
+bool SMPFunction::MDGetStackOffsetAndSize(SMPInstr *Instr, STARSOpndTypePtr TempOp, sval_t BaseValue, STARS_ea_t &offset, std::size_t &DataSize, bool &FP,
bool &Indexed, bool &Signed, bool &Unsigned) {
int BaseReg;
int IndexReg;
uint16_t ScaleFactor;
int SignedOffset;
sval_t sp_delta = Instr->GetStackPtrOffset();
- ea_t InstAddr = Instr->GetAddr(); // helps debugging
+ STARS_ea_t InstAddr = Instr->GetAddr(); // helps debugging
assert((TempOp->IsMemNoDisplacementOp()) || (TempOp->IsMemDisplacementOp()));
MDExtractAddressFields(TempOp, BaseReg, IndexReg, ScaleFactor, offset);
@@ -3338,20 +3340,20 @@ bool SMPFunction::MDGetStackOffsetAndSize(SMPInstr *Instr, STARSOpndTypePtr Temp
SignedOffset = (int) offset; // avoid sign errors during adjustment arithmetic
- if ((BaseReg == R_sp) || (IndexReg == R_sp)) {
+ if ((BaseReg == STARS_x86_R_sp) || (IndexReg == STARS_x86_R_sp)) {
// ESP-relative constant offset
if (!Instr->AreDefsNormalized()) {
SignedOffset += sp_delta; // base offsets from entry ESP value
}
SignedOffset -= BaseValue; // convert to StackFrameMap index
- offset = (ea_t) SignedOffset; // write back to outgoing argument
+ offset = (STARS_ea_t) SignedOffset; // write back to outgoing argument
// Get size of data written
DataSize = GetOpDataSize(TempOp);
FP = false;
- Indexed = ((BaseReg != R_none) && (IndexReg != R_none)); // two regs used
+ Indexed = ((BaseReg != STARS_x86_R_none) && (IndexReg != STARS_x86_R_none)); // two regs used
unsigned short opcode = Instr->GetIDAOpcode();
- Unsigned = (opcode == NN_movzx);
- Signed = (opcode == NN_movsx);
+ Unsigned = (opcode == STARS_NN_movzx);
+ Signed = (opcode == STARS_NN_movsx);
if ((0 > SignedOffset) && (!Indexed) && (BaseValue == this->MinStackAccessOffset)) {
// Consider asserting here.
SMP_msg("ERROR: Negative offset in MDGetStackOffsetAndSize for inst dump: \n");
@@ -3362,10 +3364,10 @@ bool SMPFunction::MDGetStackOffsetAndSize(SMPInstr *Instr, STARSOpndTypePtr Temp
else if (this->UseFP && ((BaseReg == MD_FRAME_POINTER_REG) || (IndexReg == MD_FRAME_POINTER_REG))) {
SignedOffset -= this->FuncInfo->GetSavedRegSize(); // base offsets from entry ESP value
SignedOffset -= BaseValue; // convert to StackFrameMap index
- offset = (ea_t) SignedOffset;
+ offset = (STARS_ea_t) SignedOffset;
DataSize = GetOpDataSize(TempOp);
FP = true;
- Indexed = ((BaseReg != R_none) && (IndexReg != R_none)); // two regs used
+ Indexed = ((BaseReg != STARS_x86_R_none) && (IndexReg != STARS_x86_R_none)); // two regs used
#if 0
assert(Indexed || (!this->StackPtrAnalysisSucceeded()) || !this->HasSTARSStackPtrAnalysisCompleted()); // Else we should never get here with unnormalized stack operands
#else
@@ -3375,8 +3377,8 @@ bool SMPFunction::MDGetStackOffsetAndSize(SMPInstr *Instr, STARSOpndTypePtr Temp
}
#endif
unsigned short opcode = Instr->GetIDAOpcode();
- Unsigned = (opcode == NN_movzx);
- Signed = (opcode == NN_movsx);
+ Unsigned = (opcode == STARS_NN_movzx);
+ Signed = (opcode == STARS_NN_movsx);
if ((0 > SignedOffset) && (!Indexed) && (BaseValue == this->MinStackAccessOffset)) {
// Consider asserting here.
SMP_msg("ERROR: Negative offset %d in MDGetStackOffsetAndSize: frregs: %d MinStackDelta: %ld Inst dump: \n",
@@ -3391,11 +3393,11 @@ bool SMPFunction::MDGetStackOffsetAndSize(SMPInstr *Instr, STARSOpndTypePtr Temp
} // end of SMPFunction::MDGetStackOffsetAndSize()
// Return fine grained stack entry for stack op TempOp from instruction at InstAddr
-bool SMPFunction::MDGetFGStackLocInfo(ea_t InstAddr, STARSOpndTypePtr TempOp, struct FineGrainedInfo &FGEntry) {
+bool SMPFunction::MDGetFGStackLocInfo(STARS_ea_t InstAddr, STARSOpndTypePtr TempOp, struct FineGrainedInfo &FGEntry) {
int BaseReg;
int IndexReg;
uint16_t ScaleFactor;
- ea_t offset;
+ STARS_ea_t offset;
int SignedOffset;
assert((TempOp->IsMemNoDisplacementOp()) || (TempOp->IsMemDisplacementOp()));
@@ -3435,11 +3437,11 @@ bool SMPFunction::MDGetFGStackLocInfo(ea_t InstAddr, STARSOpndTypePtr TempOp, st
} // end of SMPFunction::MDGetFGStackLocInfo()
// Return true if we update fine grained stack entry for stack op TempOp from instruction at InstAddr
-bool SMPFunction::MDUpdateFGStackLocInfo(ea_t InstAddr, STARSOpndTypePtr TempOp, struct FineGrainedInfo NewFG) {
+bool SMPFunction::MDUpdateFGStackLocInfo(STARS_ea_t InstAddr, STARSOpndTypePtr TempOp, struct FineGrainedInfo NewFG) {
int BaseReg;
int IndexReg;
uint16_t ScaleFactor;
- ea_t offset;
+ STARS_ea_t offset;
int SignedOffset;
struct FineGrainedInfo OldFG, UnionFG;
@@ -3493,16 +3495,16 @@ bool SMPFunction::MDUpdateFGStackLocInfo(ea_t InstAddr, STARSOpndTypePtr TempOp,
} // end of SMPFunction::MDUpdateFGStackLocInfo()
// retrieve DEF addr from GlobalDefAddrBySSA or return BADADDR
-ea_t SMPFunction::GetGlobalDefAddr(STARSOpndTypePtr DefOp, int SSANum) {
- map<int, ea_t>::iterator MapResult;
- ea_t DefAddr = BADADDR; // BADADDR means we did not find it
+STARS_ea_t SMPFunction::GetGlobalDefAddr(STARSOpndTypePtr DefOp, int SSANum) {
+ map<int, STARS_ea_t>::iterator MapResult;
+ STARS_ea_t DefAddr = BADADDR; // BADADDR means we did not find it
bool RegDef = (DefOp->IsRegOp());
if (RegDef) {
int HashedName = HashGlobalNameAndSSA(DefOp, SSANum);
MapResult = this->GlobalDefAddrBySSA.find(HashedName);
if (MapResult != this->GlobalDefAddrBySSA.end()) { // Found it.
- DefAddr = (ea_t) MapResult->second;
+ DefAddr = (STARS_ea_t) MapResult->second;
}
}
else if (MDIsStackAccessOpnd(DefOp, this->UsesFramePointer())) {
@@ -3557,8 +3559,8 @@ int SMPFunction::GetBlockNumForPhiDef(STARSOpndTypePtr DefOp, int SSANum) {
} // end of SMPFunction::GetBlockNumForPhiDef()
// Retrieve block iterator for InstAddr from InstBlockMap; assert if failure
-SMPBasicBlock *SMPFunction::GetBlockFromInstAddr(ea_t InstAddr) {
- map<ea_t, SMPBasicBlock *>::iterator MapEntry;
+SMPBasicBlock *SMPFunction::GetBlockFromInstAddr(STARS_ea_t InstAddr) {
+ map<STARS_ea_t, SMPBasicBlock *>::iterator MapEntry;
MapEntry = this->InstBlockMap.find(InstAddr);
assert(MapEntry != this->InstBlockMap.end());
return MapEntry->second;
@@ -3576,7 +3578,7 @@ list<SMPBasicBlock *>::iterator SMPFunction::GetBlockIter(SMPBasicBlock *FindBlo
}
// Retrieve inst pointer for InstAddr; assert if failure on block find.
-SMPInstr *SMPFunction::GetInstFromAddr(ea_t InstAddr) {
+SMPInstr *SMPFunction::GetInstFromAddr(STARS_ea_t InstAddr) {
SMPBasicBlock *CurrBlock = this->GetBlockFromInstAddr(InstAddr);
SMPInstr *CurrInst = CurrBlock->FindInstr(InstAddr);
return CurrInst;
@@ -3609,16 +3611,16 @@ bool SMPFunction::IsInOutgoingArgsRegion(STARSOpndTypePtr DestOp) {
bool OutArgWrite = false;
int BaseReg, IndexReg;
uint16_t ScaleFactor;
- ea_t offset;
+ STARS_ea_t offset;
if (this->IsLeaf())
return false;
MDExtractAddressFields(DestOp, BaseReg, IndexReg, ScaleFactor, offset);
- if ((BaseReg != R_sp) && (IndexReg != R_sp))
+ if ((BaseReg != STARS_x86_R_sp) && (IndexReg != STARS_x86_R_sp))
return false;
- if (((BaseReg == R_sp) && (IndexReg != R_none))
- || ((IndexReg == R_sp) && (BaseReg != R_none))
+ if (((BaseReg == STARS_x86_R_sp) && (IndexReg != STARS_x86_R_none))
+ || ((IndexReg == STARS_x86_R_sp) && (BaseReg != STARS_x86_R_none))
|| (0 < ScaleFactor)) {
#if 0
@@ -3644,12 +3646,12 @@ bool SMPFunction::IsInIncomingArgsRegion(SMPInstr *SourceInst, STARSOpndTypePtr
bool InArg = MDIsStackAccessOpnd(SourceOp, false) && SourceInst->AreDefsNormalized();
int BaseReg, IndexReg;
uint16_t ScaleFactor;
- ea_t offset;
+ STARS_ea_t offset;
if (InArg) {
MDExtractAddressFields(SourceOp, BaseReg, IndexReg, ScaleFactor, offset);
int SignedOffset = (int) offset;
- if (((BaseReg != R_sp) && (IndexReg != R_sp)) || (SignedOffset < 4)) {
+ if (((BaseReg != STARS_x86_R_sp) && (IndexReg != STARS_x86_R_sp)) || (SignedOffset < 4)) {
InArg = false;
}
}
@@ -3658,11 +3660,11 @@ bool SMPFunction::IsInIncomingArgsRegion(SMPInstr *SourceInst, STARSOpndTypePtr
} // end of SMPFunction::IsInIncomingArgsRegion()
// Is DestOp a direct memory access above the local vars frame?
-bool SMPFunction::WritesAboveLocalFrame(STARSOpndTypePtr DestOp, bool OpNormalized, ea_t InstAddr) {
+bool SMPFunction::WritesAboveLocalFrame(STARSOpndTypePtr DestOp, bool OpNormalized, STARS_ea_t InstAddr) {
bool InArgWrite = false;
int BaseReg, IndexReg;
uint16_t ScaleFactor;
- ea_t offset;
+ STARS_ea_t offset;
long SignedOffset;
MDExtractAddressFields(DestOp, BaseReg, IndexReg, ScaleFactor, offset);
@@ -3672,7 +3674,7 @@ bool SMPFunction::WritesAboveLocalFrame(STARSOpndTypePtr DestOp, bool OpNormaliz
assert(!EBPrelative || !OpNormalized); // stack operands should be normalized by now
if (!(ESPrelative || EBPrelative))
return false;
- if (((IndexReg != R_none) && (BaseReg != R_none))
+ if (((IndexReg != STARS_x86_R_none) && (BaseReg != STARS_x86_R_none))
|| (0 < ScaleFactor)) {
SMP_msg("WARNING: WritesAboveLocalFrame called with indexed write.");
@@ -3698,11 +3700,11 @@ bool SMPFunction::WritesAboveLocalFrame(STARSOpndTypePtr DestOp, bool OpNormaliz
}// end of SMPFunction::WritesAboveLocalFrame()
// Is StackOp direct stack access to caller's frame?
-bool SMPFunction::AccessAboveLocalFrame(STARSOpndTypePtr StackOp, bool OpNormalized, ea_t InstAddr, bool WriteAccess){
+bool SMPFunction::AccessAboveLocalFrame(STARSOpndTypePtr StackOp, bool OpNormalized, STARS_ea_t InstAddr, bool WriteAccess){
bool InArgAccess = false;
int BaseReg, IndexReg;
uint16_t ScaleFactor;
- ea_t offset;
+ STARS_ea_t offset;
long SignedOffset;
MDExtractAddressFields(StackOp, BaseReg, IndexReg, ScaleFactor, offset);
@@ -3712,7 +3714,7 @@ bool SMPFunction::AccessAboveLocalFrame(STARSOpndTypePtr StackOp, bool OpNormali
assert(!EBPrelative || !OpNormalized); // stack operands should be normalized by now
if (!(ESPrelative || EBPrelative))
return false;
- if (((IndexReg != R_none) && (BaseReg != R_none))
+ if (((IndexReg != STARS_x86_R_none) && (BaseReg != STARS_x86_R_none))
|| (0 < ScaleFactor)) {
SMP_msg("WARNING: AccessAboveLocalFrame called with indexed operand.");
@@ -3750,7 +3752,7 @@ bool SMPFunction::IndexedWritesAboveLocalFrame(STARSOpndTypePtr DestOp) {
bool InArgWrite = false;
int BaseReg, IndexReg;
uint16_t ScaleFactor;
- ea_t offset;
+ STARS_ea_t offset;
int SignedOffset;
MDExtractAddressFields(DestOp, BaseReg, IndexReg, ScaleFactor, offset);
@@ -3775,9 +3777,9 @@ bool SMPFunction::IsInStackPtrCopySet(STARSOpndTypePtr CurrOp) {
bool found = false;
// Set is composed of triples, so we have to iterate through it and compare operands.
- set<pair<STARSOpndTypePtr, pair<ea_t, sval_t> >, LessStackDeltaCopy>::iterator CopyIter;
+ set<pair<STARSOpndTypePtr, pair<STARS_ea_t, sval_t> >, LessStackDeltaCopy>::iterator CopyIter;
for (CopyIter = this->StackPtrCopySet.begin(); CopyIter != this->StackPtrCopySet.end(); ++CopyIter) {
- pair<STARSOpndTypePtr, pair<ea_t, sval_t> > CurrCopy = *CopyIter;
+ pair<STARSOpndTypePtr, pair<STARS_ea_t, sval_t> > CurrCopy = *CopyIter;
STARSOpndTypePtr CopyOp = CurrCopy.first;
if (IsEqOp(CopyOp, CurrOp)) {
// Found it.
@@ -3801,7 +3803,7 @@ bool SMPFunction::FindAlloca(void) {
bool FoundAlloca = false;
list<SMPInstr *>::iterator InstIter = this->Instrs.begin();
SMPInstr *CurrInst;
- ea_t InstAddr;
+ STARS_ea_t InstAddr;
#if SMP_USE_SSA_FNOP_MARKER
++InstIter; // skip marker instruction
#endif
@@ -3825,7 +3827,7 @@ bool SMPFunction::FindAlloca(void) {
// Emit the annotations describing the regions of the stack frame.
void SMPFunction::EmitStackFrameAnnotations(FILE *AnnotFile, SMPInstr *Instr) {
- ea_t addr = Instr->GetAddr();
+ STARS_ea_t addr = Instr->GetAddr();
#if 0
if (0 < IncomingArgsSize) {
@@ -3844,7 +3846,8 @@ void SMPFunction::EmitStackFrameAnnotations(FILE *AnnotFile, SMPInstr *Instr) {
(unsigned long) addr, this->CalleeSavedRegsSize, (unsigned long) this->LocalVarsSize);
}
if ((0 < this->LocalVarsSize) && this->GoodLocalVarTable) {
- unsigned long ParentReferentID = DataReferentID++;
+ unsigned long ParentReferentID = global_STARS_program->GetDataReferentID();
+ global_STARS_program->IncrementDataReferentID();
SMP_fprintf(AnnotFile, "%10lx %6lu DATAREF STACK %lu esp + %d PARENT LocalFrame LOCALFRAME\n",
(unsigned long) addr, (unsigned long) this->LocalVarsSize, ParentReferentID, 0);
#if SMP_COMPUTE_STACK_GRANULARITY
@@ -3852,8 +3855,8 @@ void SMPFunction::EmitStackFrameAnnotations(FILE *AnnotFile, SMPInstr *Instr) {
// We can only fine-grain the stack frame if we were able to analyze the stack
if (this->OutgoingArgsSize > 0) {
SMP_fprintf(AnnotFile, "%10lx %6zu DATAREF STACK %lu esp + %d CHILDOF %lu OFFSET %d OutArgsRegion OUTARGS\n",
- (unsigned long) addr, this->OutgoingArgsSize, DataReferentID, 0, ParentReferentID, 0);
- ++DataReferentID;
+ (unsigned long) addr, this->OutgoingArgsSize, global_STARS_program->GetDataReferentID(), 0, ParentReferentID, 0);
+ global_STARS_program->IncrementDataReferentID();
}
#if SMP_DEBUG_STACK_GRANULARITY
SMP_msg("LocalVarTable of size %d for function %s\n", this->LocalVarTable.size(),
@@ -3870,10 +3873,10 @@ void SMPFunction::EmitStackFrameAnnotations(FILE *AnnotFile, SMPInstr *Instr) {
|| (this->LocalVarTable[i].offset < (long) this->OutgoingArgsSize))
continue;
SMP_fprintf(AnnotFile, "%10lx %6zu DATAREF STACK %lu esp + %ld CHILDOF %lu OFFSET %ld LOCALVAR %s \n",
- (unsigned long) addr, this->LocalVarTable[i].size, DataReferentID,
+ (unsigned long) addr, this->LocalVarTable[i].size, global_STARS_program->GetDataReferentID(),
this->LocalVarTable[i].offset, ParentReferentID,
this->LocalVarTable[i].offset, this->LocalVarTable[i].VarName);
- ++DataReferentID;
+ global_STARS_program->IncrementDataReferentID();
}
} // end if (this->AnalyzedSP and not Alloca .... )
#endif
@@ -3896,14 +3899,14 @@ void SMPFunction::MDAuditJumpXrefs(void) {
// Rebuild AllCallTargets as the union of the direct and indirect call targets.
void SMPFunction::RebuildCallTargets(void) {
- set<ea_t>::iterator TargetIter;
+ set<STARS_ea_t>::iterator TargetIter;
this->AllCallTargets.clear();
for (TargetIter = this->DirectCallTargets.begin(); TargetIter != this->DirectCallTargets.end(); ++TargetIter) {
- ea_t TargetAddr = (*TargetIter);
+ STARS_ea_t TargetAddr = (*TargetIter);
this->AllCallTargets.push_back(TargetAddr);
}
for (TargetIter = this->IndirectCallTargets.begin(); TargetIter != this->IndirectCallTargets.end(); ++TargetIter) {
- ea_t TargetAddr = (*TargetIter);
+ STARS_ea_t TargetAddr = (*TargetIter);
this->AllCallTargets.push_back(TargetAddr);
}
return;
@@ -3913,8 +3916,8 @@ void SMPFunction::RebuildCallTargets(void) {
// fills all objects for instructions, basic blocks, and the function
// itself.
void SMPFunction::AnalyzeFunc(void) {
- set<ea_t> FragmentWorkList; // Distant code fragments that belong to this function and need processing
- ea_t InstAddr; // grab address to help in debugging, conditional breakpoints, etc.
+ set<STARS_ea_t> FragmentWorkList; // Distant code fragments that belong to this function and need processing
+ STARS_ea_t InstAddr; // grab address to help in debugging, conditional breakpoints, etc.
#if SMP_DEBUG_CONTROLFLOW
SMP_msg("Entering SMPFunction::Analyze.\n");
@@ -3973,7 +3976,7 @@ void SMPFunction::AnalyzeFunc(void) {
SMPitype InstDataFlowType = CurrInst->GetDataFlowType();
if ((CALL == InstDataFlowType) || (INDIR_CALL == InstDataFlowType)) {
CurrBlock->SetHasCallInst();
- ea_t CallTarget = CurrInst->GetCallTarget();
+ STARS_ea_t CallTarget = CurrInst->GetCallTarget();
if (0 == CallTarget) {
// Some libc functions have a call to a debug function that is set to a "call 0"
// when the library is not compiled with debug options. The basic block is
@@ -4043,7 +4046,7 @@ void SMPFunction::AdvancedAnalysis(void) {
}
for ( ; InstIter != this->Instrs.end(); ++InstIter) {
CurrInst = (*InstIter);
- ea_t InstAddr = CurrInst->GetAddr(); // for debugging breakpoints
+ STARS_ea_t InstAddr = CurrInst->GetAddr(); // for debugging breakpoints
if (CurrInst->HasGoodRTL())
CurrInst->SyncAllRTs(this->UsesFramePointer(), this->GetFramePtrStackDelta());
@@ -4064,8 +4067,8 @@ void SMPFunction::AdvancedAnalysis(void) {
// for functions with scattered chunks.
if ((!this->AllCallTargets.empty()) || this->UnresolvedIndirectCalls) {
bool FoundInternalCallTarget = false;
- vector<ea_t>::iterator CurrTarget = this->AllCallTargets.begin();
- set<ea_t>::iterator CurrDirectTarget, CurrIndirectTarget;
+ vector<STARS_ea_t>::iterator CurrTarget = this->AllCallTargets.begin();
+ set<STARS_ea_t>::iterator CurrDirectTarget, CurrIndirectTarget;
while (CurrTarget != this->AllCallTargets.end()) {
if ((this->GetFirstFuncAddr() <= *CurrTarget) && (this->FuncInfo->get_endEA() >= *CurrTarget)) {
// Found a call target that is within the function.
@@ -4085,10 +4088,10 @@ void SMPFunction::AdvancedAnalysis(void) {
// Audit direct call targets.
CurrDirectTarget = this->DirectCallTargets.begin();
- set<ea_t>::iterator CopyOfIterator;
+ set<STARS_ea_t>::iterator CopyOfIterator;
bool CallTargetRemoved = false;
while (CurrDirectTarget != this->DirectCallTargets.end()) {
- ea_t TargetAddr = (*CurrDirectTarget);
+ STARS_ea_t TargetAddr = (*CurrDirectTarget);
if ((this->GetFirstFuncAddr() <= TargetAddr) && (this->FuncInfo->get_endEA() >= TargetAddr)) {
// Found a call target that is within the function.
CopyOfIterator = CurrDirectTarget;
@@ -4104,7 +4107,7 @@ void SMPFunction::AdvancedAnalysis(void) {
// Audit indirect call targets.
CurrIndirectTarget = this->IndirectCallTargets.begin();
while (CurrIndirectTarget != this->IndirectCallTargets.end()) {
- ea_t TargetAddr = (*CurrIndirectTarget);
+ STARS_ea_t TargetAddr = (*CurrIndirectTarget);
if ((this->GetFirstFuncAddr() <= TargetAddr) && (this->FuncInfo->get_endEA() >= TargetAddr)) {
// Found a call target that is within the function.
CopyOfIterator = CurrIndirectTarget;
@@ -4199,11 +4202,11 @@ std::size_t SMPFunction::UnprocessedCalleesCount(void) {
return UnprocessedTargetsCount;
} // end of SMPFunction::UnprocessedCalleesCount()
-ea_t SMPFunction::GetFirstUnprocessedCallee(void) {
- ea_t CalleeAddr = BADADDR;
+STARS_ea_t SMPFunction::GetFirstUnprocessedCallee(void) {
+ STARS_ea_t CalleeAddr = BADADDR;
std::size_t TargetIndex;
for (TargetIndex = 0; TargetIndex < this->AllCallTargets.size(); ++TargetIndex) {
- ea_t TargetAddr = this->AllCallTargets.at(TargetIndex);
+ STARS_ea_t TargetAddr = this->AllCallTargets.at(TargetIndex);
SMPFunction *CurrTarget = this->GetProg()->FindFunction(TargetAddr);
if ((NULL != CurrTarget) && (!(CurrTarget->IsFuncProcessed()))) {
CalleeAddr = TargetAddr;
@@ -4219,7 +4222,7 @@ ea_t SMPFunction::GetFirstUnprocessedCallee(void) {
// code fragments that are not really functions (i.e. don't have a stack frame, jump straight back
// into our function after executing a few instructions, not a chunk shared among other functions).
// These code fragments are found in the locking and unlocking code of the gcc stdlib, for example.
-bool SMPFunction::FindDistantCodeFragment(ea_t TargetAddr) {
+bool SMPFunction::FindDistantCodeFragment(STARS_ea_t TargetAddr) {
return GetFuncInfo()->FindDistantCodeFragment(this,TargetAddr);
} // end of SMPFunction::FindDistantCodeFragment()
@@ -4236,7 +4239,7 @@ void SMPFunction::FreeUnusedMemory2(void) {
if (0 < UnusedElements) {
UnusedIntCount += (unsigned long) UnusedElements;
#if SMP_SHRINK_TO_FIT
- std::vector<ea_t>(this->DirectCallTargets).swap(this->DirectCallTargets);
+ std::vector<STARS_ea_t>(this->DirectCallTargets).swap(this->DirectCallTargets);
#else
this->DirectCallTargets.resize(CurrSize);
#endif
@@ -4247,7 +4250,7 @@ void SMPFunction::FreeUnusedMemory2(void) {
if (0 < UnusedElements) {
UnusedIntCount += (unsigned long) UnusedElements;
#if SMP_SHRINK_TO_FIT
- std::vector<ea_t>(this->IndirectCallTargets).swap(this->IndirectCallTargets);
+ std::vector<STARS_ea_t>(this->IndirectCallTargets).swap(this->IndirectCallTargets);
#else
this->IndirectCallTargets.resize(CurrSize);
#endif
@@ -4259,7 +4262,7 @@ void SMPFunction::FreeUnusedMemory2(void) {
if (0 < UnusedElements) {
UnusedIntCount += (unsigned long) UnusedElements;
#if SMP_SHRINK_TO_FIT
- std::vector<ea_t>(this->AllCallTargets).swap(this->AllCallTargets);
+ std::vector<STARS_ea_t>(this->AllCallTargets).swap(this->AllCallTargets);
#else
this->AllCallTargets.resize(CurrSize);
#endif
@@ -4406,7 +4409,7 @@ void SMPFunction::AnalyzeMetadataLiveness(void) {
int BaseReg;
int IndexReg;
uint16_t ScaleFactor;
- ea_t offset;
+ STARS_ea_t offset;
list<SMPInstr *>::iterator InstIter;
list<SMPInstr *>::reverse_iterator RevInstIter;
set<DefOrUse, LessDefUse>::iterator CurrDef;
@@ -4431,7 +4434,7 @@ void SMPFunction::AnalyzeMetadataLiveness(void) {
}
for (RevInstIter = this->Instrs.rbegin(); RevInstIter != this->Instrs.rend(); ++RevInstIter) {
SMPInstr *CurrInst = (*RevInstIter);
- ea_t InstAddr = CurrInst->GetAddr();
+ STARS_ea_t InstAddr = CurrInst->GetAddr();
SafeMemDest = false; // true for some SafeFunc instructions
#if 0
// Skip the SSA marker instruction.
@@ -4447,10 +4450,8 @@ void SMPFunction::AnalyzeMetadataLiveness(void) {
if (DEF_METADATA_UNANALYZED == CurrDef->GetMetadataStatus()) {
STARSOpndTypePtr DefOp = CurrDef->GetOp();
// Handle special registers never used as address regs.
- if (DefOp->MatchesReg(X86_FLAGS_REG)
- || ((o_trreg <= DefOp->GetOpType()) && (o_ymmreg >= DefOp->GetOpType()))) {
- CurrDef = CurrInst->SetDefMetadata(DefOp,
- DEF_METADATA_UNUSED);
+ if (DefOp->MatchesReg(X86_FLAGS_REG) || DefOp->MDIsSpecialRegOpType()) {
+ CurrDef = CurrInst->SetDefMetadata(DefOp, DEF_METADATA_UNUSED);
changed = true;
}
else if (MDIsStackOrFramePointerReg(DefOp, UseFP)) {
@@ -4479,7 +4480,7 @@ void SMPFunction::AnalyzeMetadataLiveness(void) {
changed = true;
MDExtractAddressFields(DefOp, BaseReg, IndexReg,
ScaleFactor, offset);
- if (R_none != BaseReg) {
+ if (STARS_x86_R_none != BaseReg) {
STARSOpndTypePtr BaseOp = CurrInst->MakeRegOpnd(MDCanonicalizeSubReg((uint16_t) BaseReg));
if (MDIsStackOrFramePointerReg(BaseOp, UseFP)) {
; // do nothing; DEF handled by case above
@@ -4501,8 +4502,8 @@ void SMPFunction::AnalyzeMetadataLiveness(void) {
DEF_METADATA_USED, CurrUse->GetSSANum(), InstAddr);
}
}
- } // end if R_none != BaseReg
- if (R_none != IndexReg) {
+ } // end if STARS_x86_R_none != BaseReg
+ if (STARS_x86_R_none != IndexReg) {
STARSOpndTypePtr IndexOp = CurrInst->MakeRegOpnd(MDCanonicalizeSubReg((uint16_t) IndexReg));
if (MDIsStackOrFramePointerReg(IndexOp, UseFP)) {
; // do nothing; DEF handled by case above
@@ -4528,7 +4529,7 @@ void SMPFunction::AnalyzeMetadataLiveness(void) {
DEF_METADATA_USED, CurrUse->GetSSANum(), InstAddr);
}
}
- } // end if R_none != IndexReg
+ } // end if STARS_x86_R_none != IndexReg
} // end if X86_FLAGS_REG .. else if stack ptr ...
} // end if unanalyzed metadata usage
++CurrDef;
@@ -4617,7 +4618,7 @@ void SMPFunction::AnalyzeMetadataLiveness(void) {
// be marked as DEF_METADATA_UNUSED.
for (InstIter = this->Instrs.begin(); InstIter != this->Instrs.end(); ++InstIter) {
SMPInstr *CurrInst = (*InstIter);
- ea_t InstAddr = CurrInst->GetAddr();
+ STARS_ea_t InstAddr = CurrInst->GetAddr();
#if 0 // important to know if incoming values are dead metadata
if (CurrInst->IsMarkerInst())
continue;
@@ -4646,7 +4647,7 @@ void SMPFunction::AnalyzeMetadataLiveness(void) {
// Propagate the metadata Status for UseOp/SSANum to its global DEF.
// Return true if successful.
-bool SMPFunction::PropagateGlobalMetadata(STARSOpndTypePtr UseOp, SMPMetadataType Status, int SSANum, ea_t UseAddr) {
+bool SMPFunction::PropagateGlobalMetadata(STARSOpndTypePtr UseOp, SMPMetadataType Status, int SSANum, STARS_ea_t UseAddr) {
bool changed = false;
bool UseFP = this->UsesFramePointer();
@@ -4654,7 +4655,7 @@ bool SMPFunction::PropagateGlobalMetadata(STARSOpndTypePtr UseOp, SMPMetadataTyp
return false;
// Find the DEF of UseOp with SSANum.
- ea_t DefAddr;
+ STARS_ea_t DefAddr;
SMPBasicBlock *UseBlock;
SMPBasicBlock *DefBlock;
@@ -4673,7 +4674,7 @@ bool SMPFunction::PropagateGlobalMetadata(STARSOpndTypePtr UseOp, SMPMetadataTyp
if (!STARS_IsBlockNumPseudoID(DefAddr)) { // found a DEF inst.
SMPInstr *CurrInst = this->GetInstFromAddr(DefAddr);
- ea_t InstAddr = DefAddr;
+ STARS_ea_t InstAddr = DefAddr;
DefBlock = this->GetBlockFromInstAddr(DefAddr);
set<DefOrUse, LessDefUse>::iterator CurrDef;
set<DefOrUse, LessDefUse>::iterator CurrUse;
@@ -4725,9 +4726,9 @@ bool SMPFunction::PropagateGlobalMetadata(STARSOpndTypePtr UseOp, SMPMetadataTyp
PropThroughUses = false; // load address regs are not live metadata
}
else if ((5 == CurrInst->GetOptType())
- || (NN_and == CurrInst->GetIDAOpcode())
- || (NN_or == CurrInst->GetIDAOpcode())
- || (NN_xor == CurrInst->GetIDAOpcode())) {
+ || (STARS_NN_and == CurrInst->GetIDAOpcode())
+ || (STARS_NN_or == CurrInst->GetIDAOpcode())
+ || (STARS_NN_xor == CurrInst->GetIDAOpcode())) {
// add, subtract, and, or with memsrc
// Find the DEF reg in the USE list.
CurrUse = CurrInst->FindUse(UseOp);
@@ -5009,7 +5010,7 @@ void SMPFunction::SparseConditionalConstantPropagation(void) {
CurrBlock->SetUnreachableBlock(true);
FoundUnreachableBlock = true;
#if STARS_DEBUG_SCCP
- ea_t BlockAddr = CurrBlock->GetFirstAddr();
+ STARS_ea_t BlockAddr = CurrBlock->GetFirstAddr();
SMP_msg("INFO: SCCP found unreachable block at %lx\n", (unsigned long) BlockAddr);
#endif
this->GetProg()->AddBlockToRemovalList(CurrBlock);
@@ -5485,7 +5486,7 @@ void SMPFunction::AliasAnalysis(void) {
list<SMPInstr *>::iterator InstIter;
for (InstIter = this->Instrs.begin(); InstIter != this->Instrs.end(); ++InstIter) {
SMPInstr *CurrInst = (*InstIter);
- ea_t InstAddr = CurrInst->GetAddr();
+ STARS_ea_t InstAddr = CurrInst->GetAddr();
if (CurrInst->HasDestMemoryOperand()) {
// Starting with the DEF instruction, traverse the control flow
// until we run into (A) the re-definition of the operand, including
@@ -5532,7 +5533,7 @@ bool SMPFunction::FindPossibleChainAlias(SMPInstr *CurrInst, STARSOpndTypePtr De
return false; // block already processed
// Proceed by cases:
- ea_t DefAddr = CurrInst->GetAddr();
+ STARS_ea_t DefAddr = CurrInst->GetAddr();
vector<SMPInstr *>::iterator InstIter = CurrBlock->GetInstIterFromAddr(DefAddr);
bool IndWriteFound, ReDef;
++InstIter;
@@ -5688,7 +5689,7 @@ bool SMPFunction::FindChainAliasHelper(list<SMPBasicBlock *>::iterator BlockIter
void SMPFunction::RemoveBlock(SMPBasicBlock *CurrBlock, list<SMPBasicBlock *>::iterator &BlockIter) {
// Remove this block from the predecessors list of its successors.
list<SMPBasicBlock *>::iterator SuccIter;
- ea_t TempAddr = CurrBlock->GetFirstAddr();
+ STARS_ea_t TempAddr = CurrBlock->GetFirstAddr();
for (SuccIter = CurrBlock->GetFirstSucc(); SuccIter != CurrBlock->GetLastSucc(); ++SuccIter) {
(*SuccIter)->ErasePred(TempAddr);
}
@@ -5703,10 +5704,10 @@ void SMPFunction::RemoveBlock(SMPBasicBlock *CurrBlock, list<SMPBasicBlock *>::i
this->GetProg()->AddUnreachableBlock(CurrBlock);
// Remove the unreachable instructions from the function inst list.
vector<SMPInstr *>::iterator InstIter = CurrBlock->GetFirstInst();
- ea_t FirstBadAddr = (*InstIter)->GetAddr();
+ STARS_ea_t FirstBadAddr = (*InstIter)->GetAddr();
InstIter = CurrBlock->GetLastInst();
--InstIter; // get last real instruction
- ea_t LastBadAddr = (*InstIter)->GetAddr();
+ STARS_ea_t LastBadAddr = (*InstIter)->GetAddr();
this->EraseInstRange(FirstBadAddr, LastBadAddr);
// Remove the block from the blocks list.
@@ -5717,9 +5718,9 @@ void SMPFunction::RemoveBlock(SMPBasicBlock *CurrBlock, list<SMPBasicBlock *>::i
// Func is empty, so add all blocks that call it to Program->BlocksPendingRemoval.
void SMPFunction::RemoveCallingBlocks(void) const {
- for (set<ea_t>::iterator CallSiteIter = this->AllCallSites.begin(); CallSiteIter != this->AllCallSites.end(); ++CallSiteIter) {
- ea_t CallInstAddr = (*CallSiteIter);
- ea_t CallingFuncAddr = BADADDR;
+ for (set<STARS_ea_t>::iterator CallSiteIter = this->AllCallSites.begin(); CallSiteIter != this->AllCallSites.end(); ++CallSiteIter) {
+ STARS_ea_t CallInstAddr = (*CallSiteIter);
+ STARS_ea_t CallingFuncAddr = BADADDR;
if (this->GetProg()->IsInstAddrStillInFunction(CallInstAddr, CallingFuncAddr)) {
SMPFunction *CallingFunc = this->GetProg()->FindFunction(CallingFuncAddr);
if (NULL == CallingFunc) {
@@ -5742,7 +5743,7 @@ void SMPFunction::SetLinks(void) {
list<SMPBasicBlock *>::iterator BlockIter;
SMPBasicBlock *CurrBlock;
list<SMPBasicBlock *> UnresolvedBranchWorkList;
- ea_t InstAddr;
+ STARS_ea_t InstAddr;
#if SMP_DEBUG_DATAFLOW_VERBOSE
SMP_msg("SetLinks called for %s\n", this->GetFuncName());
#endif
@@ -5752,7 +5753,7 @@ void SMPFunction::SetLinks(void) {
vector<SMPInstr *>::iterator InstIter;
for (InstIter = CurrBlock->GetFirstInst(); InstIter != CurrBlock->GetLastInst(); ++InstIter) {
InstAddr = (*InstIter)->GetAddr();
- pair<ea_t, SMPBasicBlock *> MapItem(InstAddr, CurrBlock);
+ pair<STARS_ea_t, SMPBasicBlock *> MapItem(InstAddr, CurrBlock);
InstBlockMap.insert(MapItem);
}
}
@@ -5796,7 +5797,7 @@ void SMPFunction::SetLinks(void) {
for (bool ok = CurrXrefs.SMP_first_from(CurrInst->GetAddr(), XREF_ALL);
ok;
ok = CurrXrefs.SMP_next_from()) {
- ea_t TargetAddr = CurrXrefs.GetTo();
+ STARS_ea_t TargetAddr = CurrXrefs.GetTo();
if ((TargetAddr != 0) && (CurrXrefs.GetIscode())) {
// Found a code target, with its address in CurrXrefs.to
if ((CallFlag || IndirCallFlag || TailCallFlag)
@@ -5808,7 +5809,7 @@ void SMPFunction::SetLinks(void) {
// is a jump target from elsewhere.
continue;
}
- map<ea_t, SMPBasicBlock *>::iterator MapEntry;
+ map<STARS_ea_t, SMPBasicBlock *>::iterator MapEntry;
MapEntry = this->InstBlockMap.find(TargetAddr);
if (MapEntry == this->InstBlockMap.end()) {
; // do nothing; probably a tail call (not yet identified)
@@ -5966,7 +5967,7 @@ void SMPFunction::SetLinks(void) {
SMP_msg("Removing block with no predecessors at %x\n", CurrBlock->GetFirstAddr());
// Remove this block from the predecessors list of its successors.
list<SMPBasicBlock *>::iterator SuccIter;
- ea_t TempAddr = CurrBlock->GetFirstAddr();
+ STARS_ea_t TempAddr = CurrBlock->GetFirstAddr();
for (SuccIter = CurrBlock->GetFirstSucc(); SuccIter != CurrBlock->GetLastSucc(); ++SuccIter) {
(*SuccIter)->ErasePred(TempAddr);
}
@@ -5975,10 +5976,10 @@ void SMPFunction::SetLinks(void) {
// Remove the unreachable instructions from the function inst list.
vector<SMPInstr *>::iterator InstIter;
InstIter = CurrBlock->GetFirstInst();
- ea_t FirstBadAddr = (*InstIter)->GetAddr();
+ STARS_ea_t FirstBadAddr = (*InstIter)->GetAddr();
InstIter = CurrBlock->GetLastInst();
--InstIter; // get last real instruction
- ea_t LastBadAddr = (*InstIter)->GetAddr();
+ STARS_ea_t LastBadAddr = (*InstIter)->GetAddr();
this->EraseInstRange(FirstBadAddr, LastBadAddr);
// Finally, remove the block from the blocks list.
@@ -6123,7 +6124,7 @@ void SMPFunction::RPONumberBlocks(void) {
// all predecessors numbered. Take the WorkList item with the lowest address
// and number it so we can proceed.
CurrListItem = WorkList.begin();
- ea_t LowAddr = (*CurrListItem)->GetFirstAddr();
+ STARS_ea_t LowAddr = (*CurrListItem)->GetFirstAddr();
list<SMPBasicBlock *>::iterator SaveItem = CurrListItem;
++CurrListItem;
while (CurrListItem != WorkList.end()) {
@@ -6833,13 +6834,13 @@ void SMPFunction::SSARename(int BlockNumber) {
TempPhiList.push_back(TempPhi);
if (PhiDefOp->IsRegOp()) {
- if (DumpFlag && PhiDefOp->MatchesReg(R_ax)) {
+ if (DumpFlag && PhiDefOp->MatchesReg(STARS_x86_R_ax)) {
SMP_msg("New EAX Phi Def SSANum: %d Block %d\n", NewSSANum, BlockNumber);
}
// Map the final SSA number to the block number.
int DefHashValue = HashGlobalNameAndSSA(PhiDefOp, NewSSANum);
- pair<int, ea_t> DefMapEntry(DefHashValue, (STARS_PSEUDO_ID_MIN + CurrBlock->GetNumber()));
- pair<map<int, ea_t>::iterator, bool> MapReturnValue;
+ pair<int, STARS_ea_t> DefMapEntry(DefHashValue, (STARS_PSEUDO_ID_MIN + CurrBlock->GetNumber()));
+ pair<map<int, STARS_ea_t>::iterator, bool> MapReturnValue;
MapReturnValue = this->GlobalDefAddrBySSA.insert(DefMapEntry);
assert(MapReturnValue.second);
}
@@ -6863,7 +6864,7 @@ void SMPFunction::SSARename(int BlockNumber) {
for (InstIter = CurrBlock->GetFirstInst(); InstIter != CurrBlock->GetLastInst(); ++InstIter) {
CurrInst = (*InstIter);
set<DefOrUse, LessDefUse>::iterator CurrUse = CurrInst->GetFirstUse();
- ea_t InstAddr = CurrInst->GetAddr(); // for debugging break points
+ STARS_ea_t InstAddr = CurrInst->GetAddr(); // for debugging break points
while (CurrUse != CurrInst->GetLastUse()) {
// See if Use is a global name.
STARSOpndTypePtr UseOp = CurrUse->GetOp();
@@ -6897,7 +6898,7 @@ void SMPFunction::SSARename(int BlockNumber) {
NewSSANum = this->SSAStack.at(GlobIndex).back();
}
CurrUse = CurrInst->SetUseSSA(UseOp, NewSSANum);
- if (DumpFlag && (UseOp->IsRegOp()) && UseOp->MatchesReg(R_ax)) {
+ if (DumpFlag && (UseOp->IsRegOp()) && UseOp->MatchesReg(STARS_x86_R_ax)) {
SMP_msg("New EAX Use SSANum: %d at %lx\n", NewSSANum, (unsigned long) CurrInst->GetAddr());
}
}
@@ -6914,15 +6915,15 @@ void SMPFunction::SSARename(int BlockNumber) {
int NewSSANum = this->SSANewNumber(GlobIndex);
CurrDef = CurrInst->SetDefSSA(DefOp, NewSSANum);
if (DefOp->IsRegOp()) {
- ea_t DefAddr = InstAddr;
- if (DumpFlag && DefOp->MatchesReg(R_ax)) {
+ STARS_ea_t DefAddr = InstAddr;
+ if (DumpFlag && DefOp->MatchesReg(STARS_x86_R_ax)) {
SMP_msg("New EAX Def SSANum: %d at %lx\n", NewSSANum, (unsigned long) DefAddr);
}
// Map the final SSA number to the DEF address.
int DefHashValue = HashGlobalNameAndSSA(DefOp, NewSSANum);
- pair<int, ea_t> DefMapEntry(DefHashValue, DefAddr);
- pair<map<int, ea_t>::iterator, bool> MapReturnValue;
+ pair<int, STARS_ea_t> DefMapEntry(DefHashValue, DefAddr);
+ pair<map<int, STARS_ea_t>::iterator, bool> MapReturnValue;
MapReturnValue = this->GlobalDefAddrBySSA.insert(DefMapEntry);
assert(MapReturnValue.second);
}
@@ -7105,7 +7106,7 @@ void SMPFunction::InferTypes(bool FirstIter) {
set<DefOrUse, LessDefUse>::iterator NextDef;
list<SMPBasicBlock *>::iterator BlockIter;
SMPBasicBlock *CurrBlock;
- ea_t InstAddr;
+ STARS_ea_t InstAddr;
#if SMP_DEBUG_TYPE_INFERENCE
if (DebugFlag) {
@@ -7167,7 +7168,7 @@ void SMPFunction::InferTypes(bool FirstIter) {
changed = (changed || NewChange);
#if SMP_ANALYZE_INFER_TYPES_TIME
if (DebugFlag2 && NewChange) {
- ea_t InstAddr = CurrInst->GetAddr();
+ STARS_ea_t InstAddr = CurrInst->GetAddr();
++NewChangeCount;
}
#endif
@@ -7225,7 +7226,7 @@ void SMPFunction::InferTypes(bool FirstIter) {
++CurrDef;
continue;
}
- ea_t DefAddr = InstAddr;
+ STARS_ea_t DefAddr = InstAddr;
// Call inference method based on whether it is a block-local
// name or a global name.
CurrBlock = CurrInst->GetBlock();
@@ -7404,11 +7405,11 @@ void SMPFunction::ApplyProfilerInformation(ProfilerInformation* pi)
}
// lookup whether this instruction has been profiled as an indirect call
- set<ea_t> indirect_call_targets = pi->GetIndirectCallTargets(CurrInst->GetAddr());
+ set<STARS_ea_t> indirect_call_targets = pi->GetIndirectCallTargets(CurrInst->GetAddr());
- for (set<ea_t>::iterator ict_iter = indirect_call_targets.begin(); ict_iter != indirect_call_targets.end(); ++ict_iter) {
- ea_t target = *ict_iter;
- pair<set<ea_t>::iterator, bool> InsertResult;
+ for (set<STARS_ea_t>::iterator ict_iter = indirect_call_targets.begin(); ict_iter != indirect_call_targets.end(); ++ict_iter) {
+ STARS_ea_t target = *ict_iter;
+ pair<set<STARS_ea_t>::iterator, bool> InsertResult;
if (BADADDR != target) {
InsertResult = this->IndirectCallTargets.insert(target);
if (InsertResult.second && (!vector_exists(target, AllCallTargets))) {
@@ -7425,7 +7426,7 @@ void SMPFunction::ApplyProfilerInformation(ProfilerInformation* pi)
// If so, set the DEF to that type and return type,
// else return UNINIT.
// If DefAddr == BADADDR, then the DEF is in a Phi function, not an instruction.
-SMPOperandType SMPFunction::InferGlobalDefType(STARSOpndTypePtr DefOp, int SSANum, SMPBasicBlock *DefBlock, bool CallInst, ea_t DefAddr) {
+SMPOperandType SMPFunction::InferGlobalDefType(STARSOpndTypePtr DefOp, int SSANum, SMPBasicBlock *DefBlock, bool CallInst, STARS_ea_t DefAddr) {
bool DebugFlag = false;
bool FoundNumeric = false;
bool FoundPointer = false;
@@ -7509,7 +7510,7 @@ SMPOperandType SMPFunction::InferGlobalDefType(STARSOpndTypePtr DefOp, int SSANu
if (DefEscapes) { // Need to recurse into successor blocks
list<SMPBasicBlock *>::iterator SuccIter;
- ea_t TempAddr;
+ STARS_ea_t TempAddr;
this->ResetProcessedBlocks(); // set up recursion
for (SuccIter = DefBlock->GetFirstSucc(); SuccIter != DefBlock->GetLastSucc(); ++SuccIter) {
SMPBasicBlock *CurrBlock = (*SuccIter);
@@ -7580,10 +7581,10 @@ void SMPFunction::FindCounterVariables(void) {
}
STARSOpndTypePtr DefOp = DefIter->GetOp();
if (DefOp->IsRegOp()) {
- list<pair<int, ea_t> > CounterSSANums; // SSA numbers that are definitely counters for DefOp
+ list<pair<int, STARS_ea_t> > CounterSSANums; // SSA numbers that are definitely counters for DefOp
int DefSSANum = DefIter->GetSSANum();
- ea_t DefAddr = CurrInst->GetAddr();
- pair<int, ea_t> ListItem(DefSSANum, DefAddr);
+ STARS_ea_t DefAddr = CurrInst->GetAddr();
+ pair<int, STARS_ea_t> ListItem(DefSSANum, DefAddr);
CounterSSANums.push_back(ListItem);
SMPBasicBlock *CurrBlock = CurrInst->GetBlock();
int BlockNum = CurrBlock->GetNumber();
@@ -7591,7 +7592,7 @@ void SMPFunction::FindCounterVariables(void) {
if (this->CounterVarHelper(DefOp, DefSSANum, BlockNum, LocalName, CounterSSANums)) {
while (!CounterSSANums.empty()) {
int CurrSSANum = CounterSSANums.front().first;
- ea_t CurrDefAddr = CounterSSANums.front().second;
+ STARS_ea_t CurrDefAddr = CounterSSANums.front().second;
bool Propagated;
if (LocalName) {
Propagated = CurrBlock->PropagateLocalDefType(DefOp, NUMERIC, CurrDefAddr, CurrSSANum, false);
@@ -7603,7 +7604,7 @@ void SMPFunction::FindCounterVariables(void) {
CounterSSANums.pop_front();
}
}
- } // end if o_reg type
+ } // end if reg type
} // end if const value of 0
} // end if simple assignment
} // end for all instructions
@@ -7613,7 +7614,7 @@ void SMPFunction::FindCounterVariables(void) {
// recursive helper for FindCounterVariables()
// Return true if we added to the DefSSANums list.
-bool SMPFunction::CounterVarHelper(STARSOpndTypePtr DefOp, int DefSSANum, int BlockNum, bool LocalName, list<pair<int, ea_t> > &CounterSSANums) {
+bool SMPFunction::CounterVarHelper(STARSOpndTypePtr DefOp, int DefSSANum, int BlockNum, bool LocalName, list<pair<int, STARS_ea_t> > &CounterSSANums) {
bool ListExpanded = false;
std::size_t IncomingListSize = CounterSSANums.size();
set<int> NonEscapingRegisterHashes;
@@ -7628,7 +7629,7 @@ bool SMPFunction::CounterVarHelper(STARSOpndTypePtr DefOp, int DefSSANum, int Bl
// We will expand this to loops that are not in a single block later.
SMPBasicBlock *CurrBlock = this->GetBlockByNum((std::size_t) BlockNum);
assert(NULL != CurrBlock);
- ea_t DefAddr = CounterSSANums.front().second;
+ STARS_ea_t DefAddr = CounterSSANums.front().second;
if (CurrBlock->DoesDefReachBlockEnd(DefAddr, DefOp, DefSSANum, NonEscapingRegisterHashes)) {
NonEscapingRegisterHashes.clear(); // Not memoizing for this use of DoesDefReachBlockEnd()
bool LoopSuccFound = false;
@@ -7669,7 +7670,7 @@ bool SMPFunction::CounterVarHelper(STARSOpndTypePtr DefOp, int DefSSANum, int Bl
// Found a redefinition of DefOp. Is it just a counter operation that redefines DefOp?
if (CurrInst->IsCounterOperation()) {
// We will add the new DEF SSA # to the list of counter SSAs.
- pair<int, ea_t> CounterPair(DefIter->GetSSANum(), CurrInst->GetAddr());
+ pair<int, STARS_ea_t> CounterPair(DefIter->GetSSANum(), CurrInst->GetAddr());
CounterSSANums.push_back(CounterPair);
// We don't need to push the PhiDefSSANum discovered earlier, because if
// it follows the simple pattern of only using two counter DEFs as its USEs,
@@ -7957,7 +7958,7 @@ void SMPFunction::MarkSpecialNumericErrorCases(void) {
list<SMPInstr *>::iterator InstIter;
for (InstIter = this->Instrs.begin(); InstIter != this->Instrs.end(); ++InstIter) {
CurrInst = (*InstIter);
- ea_t InstAddr = CurrInst->GetAddr();
+ STARS_ea_t InstAddr = CurrInst->GetAddr();
SMPitype CurrDataFlowType = CurrInst->GetDataFlowType();
// Find all conditional and unconditional jumps within the function.
@@ -8013,9 +8014,9 @@ void SMPFunction::MarkSpecialNumericErrorCases(void) {
// So, do not claim success unless the later addition DEF reaches the end
// of the block.
DefIter = CurrInst->GetFirstNonFlagsDef();
- ea_t DefAddr = CurrInst->GetAddr();
+ STARS_ea_t DefAddr = CurrInst->GetAddr();
STARSOpndTypePtr DefOp = DefIter->GetOp();
- ea_t AdditionAddr = BADADDR;
+ STARS_ea_t AdditionAddr = BADADDR;
ShiftFound = CurrBlock->IsDefInvolvedInAddition(DefAddr, DefOp, AdditionAddr);
if (ShiftFound) {
SMPInstr *AdditionInst = this->GetInstFromAddr(AdditionAddr);
@@ -8067,10 +8068,10 @@ void SMPFunction::GatherIncomingArgTypes(void) {
for (set<DefOrUse, LessDefUse>::iterator DefIter = MarkerInst->GetFirstDef(); DefIter != MarkerInst->GetLastDef(); ++DefIter) {
STARSOpndTypePtr DefOp = DefIter->GetOp();
std::size_t ArgIndex = 0;
- if (STARS_ISA_Bitwidth == 64) {
+ if (global_STARS_program->GetSTARS_ISA_Bitwidth() == 64) {
if (DefOp->IsRegOp()) {
- uint16 RegNum = DefOp->GetReg();
- for (list<uint16>::iterator ArgRegIter = GetFirstArgumentReg(); ArgRegIter != GetLastArgumentReg(); ++ArgRegIter) {
+ uint16_t RegNum = DefOp->GetReg();
+ for (list<uint16_t>::iterator ArgRegIter = global_STARS_program->GetFirstArgumentReg(); ArgRegIter != global_STARS_program->GetLastArgumentReg(); ++ArgRegIter) {
if (RegNum == (*ArgRegIter)) { // found an incoming argument
++ArgCount;
this->InArgTypes[ArgIndex] = (unsigned short) DefIter->GetType();
@@ -8179,15 +8180,15 @@ void SMPFunction::EmitAnnotations(FILE *AnnotFile, FILE *InfoAnnotFile) {
// Emit annotations about how to restore register values
SMP_fprintf(AnnotFile, "%10lx %6d FUNC FRAMERESTORE ", (unsigned long) this->FuncInfo->get_startEA(), 0);
- for (int i = R_ax; i <= STARS_MD_LAST_SAVED_REG_NUM; i++) {
+ for (int i = STARS_x86_R_ax; i <= global_STARS_program->GetSTARS_MD_LAST_SAVED_REG_NUM(); i++) {
SMP_fprintf(AnnotFile, "%d %d %d ", i, this->SavedRegLoc[i], this->ReturnRegTypes[i]);
}
SMP_fprintf(AnnotFile, "ZZ\n");
// Print type left in the return register.
- if (MD_RETURN_VALUE_REG != R_none) {
+ if (MD_RETURN_VALUE_REG != STARS_x86_R_none) {
SMP_fprintf(InfoAnnotFile, "%10lx %6u FUNC RETURNTYPE ", (unsigned long) this->FuncInfo->get_startEA(), this->Size);
- SMP_fprintf(InfoAnnotFile, "%s %d\n", MDGetRegNumName(MD_RETURN_VALUE_REG, STARS_ISA_Bytewidth), this->ReturnRegTypes[MD_RETURN_VALUE_REG]);
+ SMP_fprintf(InfoAnnotFile, "%s %d\n", MDGetRegNumName(MD_RETURN_VALUE_REG, global_STARS_program->GetSTARS_ISA_Bytewidth()), this->ReturnRegTypes[MD_RETURN_VALUE_REG]);
}
// Print types of incoming arguments, if any.
if (this->GetIncomingArgCount() > 0) {
@@ -8238,7 +8239,7 @@ void SMPFunction::EmitAnnotations(FILE *AnnotFile, FILE *InfoAnnotFile) {
SMP_fprintf(InfoAnnotFile, "\n");
}
- if (STARS_PerformReducedAnalysis) {
+ if (global_STARS_program->ShouldSTARSPerformReducedAnalysis()) {
list<SMPInstr *>::iterator InstIter = Instrs.begin();
#if SMP_USE_SSA_FNOP_MARKER
++InstIter; // skip marker instruction
@@ -8247,7 +8248,7 @@ void SMPFunction::EmitAnnotations(FILE *AnnotFile, FILE *InfoAnnotFile) {
bool DeallocTrigger = false;
for ( ; InstIter != Instrs.end(); ++InstIter) {
SMPInstr *CurrInst = (*InstIter);
- ea_t addr = CurrInst->GetAddr();
+ STARS_ea_t addr = CurrInst->GetAddr();
if (CurrInst->IsFloatNop()) {
SMP_msg("WARNING: FloatNop not used as marker instruction at %llx\n", (uint64) addr);
}
@@ -8328,7 +8329,7 @@ void SMPFunction::EmitAnnotations(FILE *AnnotFile, FILE *InfoAnnotFile) {
bool DeallocTrigger = false;
for ( ; InstIter != Instrs.end(); ++InstIter) {
SMPInstr *CurrInst = (*InstIter);
- ea_t addr = CurrInst->GetAddr();
+ STARS_ea_t addr = CurrInst->GetAddr();
if (CurrInst->IsFloatNop()) {
SMP_msg("WARNING: FloatNop not used as marker instruction at %llx\n", (uint64) addr);
}
@@ -8351,7 +8352,7 @@ void SMPFunction::EmitAnnotations(FILE *AnnotFile, FILE *InfoAnnotFile) {
if (xrefs.GetTo() != 0) {
if (xrefs.GetIscode() && (xrefs.GetType() != fl_F)) {
// Found a code target, with its address in xrefs.to
- PrintCodeToCodeXref(addr, xrefs.GetTo(), CurrInst->GetSize());
+ global_STARS_program->PrintCodeToCodeXref(addr, xrefs.GetTo(), CurrInst->GetSize());
}
}
}
@@ -8424,7 +8425,7 @@ void SMPFunction::EmitAnnotations(FILE *AnnotFile, FILE *InfoAnnotFile) {
CurrInst = CurrBlock->GetFirstInst();
if ((*CurrInst)->IsMarkerInst())
++CurrInst;
- ea_t addr = (*CurrInst)->GetAddr();
+ STARS_ea_t addr = (*CurrInst)->GetAddr();
SMP_fprintf(AnnotFile, "%10x %6d BLOCK PROFILECOUNT %s\n", addr,
(*CurrInst)->GetSize(), (*CurrInst)->GetDisasm());
#endif
@@ -8486,17 +8487,17 @@ void SMPFunction::Dump(void) {
#define STARS_DEBUG_DUPLICATE_SEARCHES 1
// Is DefOp+DefSSANum at DefAddr used as address reg or as source operand in memory write?
-bool SMPFunction::IsDefUsedInMemWrite(STARSOpndTypePtr DefOp, int DefSSANum, ea_t DefAddr) {
+bool SMPFunction::IsDefUsedInMemWrite(STARSOpndTypePtr DefOp, int DefSSANum, STARS_ea_t DefAddr) {
bool FoundMemWriteUse = false;
- list<pair<pair<STARSOpndTypePtr, int>, ea_t> > DefWorkList;
+ list<pair<pair<STARSOpndTypePtr, int>, STARS_ea_t> > DefWorkList;
pair<STARSOpndTypePtr, int> InitialSearchDef(DefOp, DefSSANum);
- pair<pair<STARSOpndTypePtr, int>, ea_t> InitialItem(InitialSearchDef, DefAddr);
+ pair<pair<STARSOpndTypePtr, int>, STARS_ea_t> InitialItem(InitialSearchDef, DefAddr);
DefWorkList.push_back(InitialItem);
- set<pair<ea_t, int>, LessSearchOperand> AlreadySearchedSet;
+ set<pair<STARS_ea_t, int>, LessSearchOperand> AlreadySearchedSet;
do { // process DefWorkList
- pair<pair<STARSOpndTypePtr, int>, ea_t> HeadItem = DefWorkList.front();
+ pair<pair<STARSOpndTypePtr, int>, STARS_ea_t> HeadItem = DefWorkList.front();
DefOp = HeadItem.first.first;
DefSSANum = HeadItem.first.second;
DefAddr = HeadItem.second;
@@ -8506,8 +8507,8 @@ bool SMPFunction::IsDefUsedInMemWrite(STARSOpndTypePtr DefOp, int DefSSANum, ea_
// Ensure that we don't have a data dependence loop that causes
// duplicate searches.
int DefHashIndex = HashGlobalNameAndSSA(DefOp, DefSSANum);
- pair<ea_t, int> SearchItem(DefAddr, DefHashIndex);
- pair<set<pair<ea_t, int>, LessSearchOperand>::iterator, bool> InsertResult = AlreadySearchedSet.insert(SearchItem);
+ pair<STARS_ea_t, int> SearchItem(DefAddr, DefHashIndex);
+ pair<set<pair<STARS_ea_t, int>, LessSearchOperand>::iterator, bool> InsertResult = AlreadySearchedSet.insert(SearchItem);
if (InsertResult.second) { // not previously in the AlreadySearchedSet
// Find DefBlock and get the recursion started.
SMPBasicBlock *DefBlock = this->GetBlockFromInstAddr(DefAddr);
@@ -8531,10 +8532,10 @@ bool SMPFunction::IsDefUsedInMemWrite(STARSOpndTypePtr DefOp, int DefSSANum, ea_
// Can the return address of any caller be read or written directly from this function?
bool SMPFunction::IsCallerReturnAddressReadOrWritten(void) {
- set<ea_t>::iterator CallerIter;
+ set<STARS_ea_t>::iterator CallerIter;
bool CallerVulnerable = false;
for (CallerIter = this->AllCallSources.begin(); CallerIter != this->AllCallSources.end(); ++CallerIter) {
- ea_t CallerFirstAddr = (*CallerIter); // we store first addrs of funcs that call us, not the call inst addrs, in AllCallSources.
+ STARS_ea_t CallerFirstAddr = (*CallerIter); // we store first addrs of funcs that call us, not the call inst addrs, in AllCallSources.
SMPFunction *CallerFunc = this->GetProg()->FindFunction(CallerFirstAddr);
if ((NULL != CallerFunc) && CallerFunc->StackPtrAnalysisSucceeded()) {
if (CallerFunc->GetLocalVarsSize() < this->GetMaxDirectStackAccessDelta()) {
@@ -8585,10 +8586,10 @@ void SMPFunction::MarkFunctionSafe() {
#endif
}
- ea_t FirstAddr = this->GetFirstFuncAddr();
+ STARS_ea_t FirstAddr = this->GetFirstFuncAddr();
SMP_xref_t xrefs;
for (bool ok = xrefs.SMP_first_to(FirstAddr, XREF_ALL); ok; ok = xrefs.SMP_next_to()) {
- ea_t FromAddr = xrefs.GetFrom();
+ STARS_ea_t FromAddr = xrefs.GetFrom();
if (FromAddr != 0) {
if (!xrefs.GetIscode()) { // found data xref
IsIndirectCallTarget = true; // addr of func appears in data; assume indirect calls to func
@@ -8642,14 +8643,14 @@ void SMPFunction::MarkFunctionSafe() {
}
}
else if (!XferESPtoEBP) { // found "push ebp", looking for "mov ebp,esp"
- if ((CurrInst->GetIDAOpcode() == NN_mov)
+ if ((CurrInst->GetIDAOpcode() == STARS_NN_mov)
&& (CurrInst->GetFirstDef()->GetOp()->MatchesReg(MD_FRAME_POINTER_REG))
&& (CurrInst->GetFirstUse()->GetOp()->MatchesReg(MD_STACK_POINTER_REG))) {
XferESPtoEBP = true;
continue;
}
}
- ea_t address = CurrInst->GetAddr();
+ STARS_ea_t address = CurrInst->GetAddr();
if ((CurrInst->IsTailCall()) || (CurrInst->IsCondTailCall())) {
// Moved up here because a tail call can be the point at which the stack
// frame returns to its prior state, making it the DeallocInstr.
@@ -8723,14 +8724,14 @@ void SMPFunction::MarkFunctionSafe() {
int BaseReg;
int IndexReg;
uint16_t ScaleFactor;
- ea_t offset;
+ STARS_ea_t offset;
if (Operand->IsStaticMemOp()) {
// now o_mem can have sib byte as well, as
- // reported by IDA. Check if the base reg is R_none
- // and index reg is R_none. If they are, then this is
+ // reported by IDA. Check if the base reg is STARS_x86_R_none
+ // and index reg is STARS_x86_R_none. If they are, then this is
// a direct global write and can be marked safe.
MDExtractAddressFields(Operand, BaseReg, IndexReg, ScaleFactor, offset);
- if ((BaseReg == R_none) && (IndexReg == R_none)) {
+ if ((BaseReg == STARS_x86_R_none) && (IndexReg == STARS_x86_R_none)) {
// go onto next def
continue;
}
@@ -8743,7 +8744,7 @@ void SMPFunction::MarkFunctionSafe() {
bool FramePointerRelative = (this->UseFP && (BaseReg == MD_FRAME_POINTER_REG));
bool StackPointerRelative = (BaseReg == MD_STACK_POINTER_REG);
if (StackPointerRelative || FramePointerRelative) {
- if (IndexReg == R_none) {
+ if (IndexReg == STARS_x86_R_none) {
bool tempWritesAboveLocalFrame = this->WritesAboveLocalFrame(Operand, CurrInst->AreDefsNormalized(), address);
WritesAboveLocalFrame |= tempWritesAboveLocalFrame;
#if SMP_DEBUG_FUNC
@@ -8795,7 +8796,7 @@ void SMPFunction::MarkFunctionSafe() {
// check the base reg
// if index reg is used mark as unsafe
if (MDIsStackPtrReg(BaseReg, this->UseFP)) {
- if (IndexReg == R_none) {
+ if (IndexReg == STARS_x86_R_none) {
/* addressing mode is *esp or *ebp */
continue;
}
@@ -8939,8 +8940,8 @@ void SMPFunction::EmitFuncSPARKAda(void) {
}
#endif
- FILE *OutFile = ZST_SPARKSourceFile;
- FILE *HeaderFile = ZST_SPARKHeaderFile;
+ FILE *OutFile = global_STARS_program->GetSPARKSourceFile();
+ FILE *HeaderFile = global_STARS_program->GetSPARKHeaderFile();
list<SMPInstr *>::iterator InstIter = this->Instrs.begin();
#if SMP_USE_SSA_FNOP_MARKER
@@ -8948,7 +8949,7 @@ void SMPFunction::EmitFuncSPARKAda(void) {
#endif
while (InstIter != this->Instrs.end()) {
SMPInstr *CurrInst = (*InstIter);
- ea_t InstAddr = CurrInst->GetAddr();
+ STARS_ea_t InstAddr = CurrInst->GetAddr();
CurrInst->EmitSPARKAda(OutFile);
++InstIter;
} // end while all instrs
diff --git a/src/base/SMPInstr.cpp b/src/base/SMPInstr.cpp
index 45da0676..46351ccb 100644
--- a/src/base/SMPInstr.cpp
+++ b/src/base/SMPInstr.cpp
@@ -18,7 +18,7 @@
* e-mail: jwd@virginia.com
* URL : http://www.cs.virginia.edu/
*
- * Additional copyrights 2010, 2011 by Zephyr Software LLC
+ * Additional copyrights 2010, 2011, 2012, 2013, 2014, 2015 by Zephyr Software LLC
* e-mail: {clc,jwd}@zephyr-software.com
* URL : http://www.zephyr-software.com/
*
@@ -33,26 +33,30 @@
using namespace std;
+#include <memory>
#include <string>
+
#include <cstring>
-#include <memory>
#include <cstddef>
+#include <cassert>
#include <pro.h>
-#include <assert.h>
#include <ua.hpp>
+#include <intel.hpp>
+
+#if 0
#include <ida.hpp>
#include <idp.hpp>
#include <auto.hpp>
#include <bytes.hpp>
#include <funcs.hpp>
-#include <intel.hpp>
#include <loader.hpp>
#include <lines.hpp>
#include <name.hpp>
+#endif
+#include "interfaces/STARSTypes.h"
#include "interfaces/SMPDBInterface.h"
-#include "base/SMPStaticAnalyzer.h"
#include "base/SMPDataFlowAnalysis.h"
#include "base/SMPInstr.h"
#include "base/SMPProgram.h"
@@ -93,6 +97,7 @@ static uint32_t UseMacros[UA_MAXOP] = {CF_USE1, CF_USE2, CF_USE3, CF_USE4, CF_US
// Text to be printed in each optimizing annotation explaining why
// the annotation was emitted.
+#define LAST_TYPE_CATEGORY 15
static const char *OptExplanation[LAST_TYPE_CATEGORY + 1] =
{ "NoOpt", "NoMetaUpdate", "AlwaysNUM", "NUMVia2ndSrcIMMEDNUM",
"Always1stSrc", "1stSrcVia2ndSrcIMMEDNUM", "AlwaysPtr",
@@ -340,7 +345,7 @@ void PrintSPARKIndentTabs(FILE *OutFile) {
void SMPInstr::PrintSPARKAdaOperand(STARSOpndTypePtr Opnd, FILE *OutFile, bool LeftHandSide, bool UseFP) {
std::size_t OpndByteWidth = Opnd->GetByteWidth();
bool MemOpnd = IsMemOperand(Opnd);
- bool SubwordWidth = (STARS_ISA_Bytewidth > OpndByteWidth);
+ bool SubwordWidth = (global_STARS_program->GetSTARS_ISA_Bytewidth() > OpndByteWidth);
bool MemWrite = LeftHandSide && MemOpnd;
bool MemRead = MemOpnd && (!LeftHandSide);
char MemWriteString[40] = { '\0' };
@@ -375,7 +380,7 @@ void SMPInstr::PrintSPARKAdaOperand(STARSOpndTypePtr Opnd, FILE *OutFile, bool L
else { // no SIB info
uint16_t BaseReg = Opnd->GetReg();
STARSOpndTypePtr BaseOp = this->STARSInstPtr->MakeRegOpnd(BaseReg);
- if (Opnd->HasSegReg() && (!((R_ss == Opnd->GetSegReg()) && MDIsStackAccessOpnd(Opnd, UseFP)))) {
+ if (Opnd->HasSegReg() && (!((STARS_x86_R_ss == Opnd->GetSegReg()) && MDIsStackAccessOpnd(Opnd, UseFP)))) {
// We have a segment selector that is not just a redundant SS: selector for an RSP-relative access.
STARSOpndTypePtr SegRegOp = this->STARSInstPtr->MakeRegOpnd(Opnd->GetSegReg());
SMP_fprintf(OutFile, " %s X86.%s + X86.%s ", MemWriteString, MDGetRegName(SegRegOp), MDGetRegName(BaseOp));
@@ -383,7 +388,7 @@ void SMPInstr::PrintSPARKAdaOperand(STARSOpndTypePtr Opnd, FILE *OutFile, bool L
else {
SMP_fprintf(OutFile, " %s X86.%s ", MemWriteString, MDGetRegName(BaseOp));
}
- if (STARS_ISA_Bytewidth > BaseOp->GetByteWidth()) {
+ if (global_STARS_program->GetSTARS_ISA_Bytewidth() > BaseOp->GetByteWidth()) {
++SubwordAddressRegCount;
}
}
@@ -409,7 +414,7 @@ void SMPInstr::PrintSPARKAdaOperand(STARSOpndTypePtr Opnd, FILE *OutFile, bool L
else {
uint16_t BaseReg = Opnd->GetReg();
STARSOpndTypePtr BaseOp = this->STARSInstPtr->MakeRegOpnd(BaseReg);
- if (Opnd->HasSegReg() && (!((R_ss == Opnd->GetSegReg()) && MDIsStackAccessOpnd(Opnd, UseFP)))) {
+ if (Opnd->HasSegReg() && (!((STARS_x86_R_ss == Opnd->GetSegReg()) && MDIsStackAccessOpnd(Opnd, UseFP)))) {
// We have a segment selector that is not just a redundant SS: selector for an RSP-relative access.
STARSOpndTypePtr SegRegOp = this->STARSInstPtr->MakeRegOpnd(Opnd->GetSegReg());
SMP_fprintf(OutFile, " %s X86.%s + X86.%s ", MemWriteString, MDGetRegName(SegRegOp), MDGetRegName(BaseOp));
@@ -421,7 +426,7 @@ void SMPInstr::PrintSPARKAdaOperand(STARSOpndTypePtr Opnd, FILE *OutFile, bool L
SMP_fprintf(OutFile, "+ %d ", SignedOffset);
else // minus sign will print automatically
SMP_fprintf(OutFile, "%d ", SignedOffset);
- if (STARS_ISA_Bytewidth > BaseOp->GetByteWidth()) {
+ if (global_STARS_program->GetSTARS_ISA_Bytewidth() > BaseOp->GetByteWidth()) {
++SubwordAddressRegCount;
}
}
@@ -1024,7 +1029,7 @@ bool SMPRegTransfer::IsTruncatedWidthRTL(std::size_t &LeftBitWidth) const {
bool TruncatedWidth = false;
STARSOpndTypePtr LeftOp = this->GetLeftOperand();
std::size_t LeftOpByteWidth = (std::size_t) LeftOp->GetByteWidth();
- if (LeftOpByteWidth < STARS_ISA_Bytewidth) { // Forget it unless LeftOp is reduced width.
+ if (LeftOpByteWidth < global_STARS_program->GetSTARS_ISA_Bytewidth()) { // Forget it unless LeftOp is reduced width.
// Search right hand side for wider operands.
LeftBitWidth = 8 * LeftOpByteWidth;
STARSOpndTypePtr RightOp = nullptr;
@@ -1050,8 +1055,8 @@ bool SMPRegTransfer::IsTruncatedWidthRTL(std::size_t &LeftBitWidth) const {
#define STARS_ESP_ADDITION_OVERFLOW_THRESHOLD 0xf0000000
// Compute operand-dependent change in stack pointer value.
-sval_t SMPRegTransfer::ComputeStackPointerAlteration(bool IsLeaveInstr, sval_t IncomingDelta, sval_t FramePtrDelta) {
- sval_t delta = 0;
+STARS_sval_t SMPRegTransfer::ComputeStackPointerAlteration(bool IsLeaveInstr, STARS_sval_t IncomingDelta, STARS_sval_t FramePtrDelta) {
+ STARS_sval_t delta = 0;
// Search for the pattern: stack_pointer := ...
if (SMP_ASSIGN == this->GetOperator()) {
@@ -1081,7 +1086,7 @@ sval_t SMPRegTransfer::ComputeStackPointerAlteration(bool IsLeaveInstr, sval_t I
// !!!!****!!!!**** Need to look up deltas for registers that
// were used to hold a copy of the stack pointer.
// For now, just consider it an error.
- delta = (sval_t) SMP_STACK_DELTA_ERROR_CODE;
+ delta = (STARS_sval_t) SMP_STACK_DELTA_ERROR_CODE;
}
}
else {
@@ -1096,11 +1101,11 @@ sval_t SMPRegTransfer::ComputeStackPointerAlteration(bool IsLeaveInstr, sval_t I
assert(SMP_ADD == RightOperator);
assert(!RightRT->HasRightSubTree());
assert(RightDefOp->MatchesReg(X86_FRAME_POINTER_REG));
- delta = STARS_ISA_Bytewidth + FramePtrDelta - IncomingDelta;
+ delta = global_STARS_program->GetSTARS_ISA_Bytewidth() + FramePtrDelta - IncomingDelta;
}
else if (RightRT->HasRightSubTree()) {
// Not the right code pattern; unknown effect on stack pointer.
- delta = (sval_t) SMP_STACK_DELTA_ERROR_CODE;
+ delta = (STARS_sval_t) SMP_STACK_DELTA_ERROR_CODE;
}
else if (!RightDefOp->MatchesReg(MD_STACK_POINTER_REG)) {
// We have stack_pointer := something1 operator something2
@@ -1120,14 +1125,14 @@ sval_t SMPRegTransfer::ComputeStackPointerAlteration(bool IsLeaveInstr, sval_t I
}
else {
// Not the right code pattern; unknown effect on stack pointer.
- delta = (sval_t) SMP_STACK_DELTA_ERROR_CODE;
+ delta = (STARS_sval_t) SMP_STACK_DELTA_ERROR_CODE;
}
}
else {
// !!!!****!!!!**** Need to look up deltas for registers that
// were used to hold a copy of the stack pointer.
// For now, just consider it an error.
- delta = (sval_t) SMP_STACK_DELTA_ERROR_CODE;
+ delta = (STARS_sval_t) SMP_STACK_DELTA_ERROR_CODE;
}
}
else {
@@ -1135,20 +1140,20 @@ sval_t SMPRegTransfer::ComputeStackPointerAlteration(bool IsLeaveInstr, sval_t I
STARSOpndTypePtr RightUseOp = RightRT->GetRightOperand();
// Check the operator
if (SMP_BITWISE_AND == RightOperator) {
- delta = (sval_t) SMP_STACK_POINTER_BITWISE_AND_CODE;
+ delta = (STARS_sval_t) SMP_STACK_POINTER_BITWISE_AND_CODE;
}
else {
if (! RightUseOp->IsImmedOp()) {
// Don't know how to deal with adding non-constant to stack pointer
- delta = (sval_t) SMP_STACK_DELTA_ERROR_CODE;
+ delta = (STARS_sval_t) SMP_STACK_DELTA_ERROR_CODE;
}
else if (SMP_ADD == RightOperator) {
- delta = (sval_t) RightUseOp->GetImmedValue();
+ delta = (STARS_sval_t) RightUseOp->GetImmedValue();
if (delta > STARS_ESP_ADDITION_OVERFLOW_THRESHOLD) {
// Really a subtraction via addition of a negative.
// E.g. add esp, 0xfffffff0 is sub esp,16
int32 TempDelta = (int32) (delta & 0xffffffff);
- delta = (sval_t) TempDelta;
+ delta = (STARS_sval_t) TempDelta;
}
}
else if (SMP_SUBTRACT == RightOperator) {
@@ -1156,14 +1161,14 @@ sval_t SMPRegTransfer::ComputeStackPointerAlteration(bool IsLeaveInstr, sval_t I
// Really a subtraction via addition of a negative.
// E.g. add esp, 0xfffffff0 is sub esp,16
int32 TempDelta = (int32) (RightUseOp->GetImmedValue() & 0xffffffff);
- delta = (0 - ((sval_t) TempDelta));
+ delta = (0 - ((STARS_sval_t) TempDelta));
}
else {
- delta = (0 - ((sval_t) RightUseOp->GetImmedValue()));
+ delta = (0 - ((STARS_sval_t) RightUseOp->GetImmedValue()));
}
}
else {
- delta = (sval_t) SMP_STACK_DELTA_ERROR_CODE;
+ delta = (STARS_sval_t) SMP_STACK_DELTA_ERROR_CODE;
}
}
}
@@ -1409,7 +1414,7 @@ void SMPRegTransfer::EmitSPARKAda(FILE *OutFile) {
STARSOpndTypePtr LeftOp = this->GetLeftOperandNoNorm();
uint16_t LeftByteWidth = LeftOp->GetByteWidth();
bool MemWrite = LeftOp->IsMemOp();
- bool SubregWrite = (LeftOp->IsRegOp() && (STARS_ISA_Bytewidth > LeftByteWidth));
+ bool SubregWrite = (LeftOp->IsRegOp() && (global_STARS_program->GetSTARS_ISA_Bytewidth() > LeftByteWidth));
bool OperatorIsProcCall = false;
bool PrefixUnaryOperator = false;
bool UseFP = this->ParentInst->GetBlock()->GetFunc()->UsesFramePointer();
@@ -1514,9 +1519,9 @@ void SMPRTL::Dump(void) const {
} // end of SMPRTL::Dump()
// Accumulate stack pointer alteration total across all RTs.
-sval_t SMPRTL::TotalStackPointerAlteration(bool IsLeaveInstr, sval_t IncomingDelta, sval_t FramePtrDelta) {
- sval_t TotalDelta = 0;
- sval_t IncrementalDelta;
+STARS_sval_t SMPRTL::TotalStackPointerAlteration(bool IsLeaveInstr, STARS_sval_t IncomingDelta, STARS_sval_t FramePtrDelta) {
+ STARS_sval_t TotalDelta = 0;
+ STARS_sval_t IncrementalDelta;
for (std::size_t index = 0; index < this->RTCount; ++index) {
IncrementalDelta = this->RTvector[index]->ComputeStackPointerAlteration(IsLeaveInstr, IncomingDelta, FramePtrDelta);
@@ -1706,8 +1711,8 @@ STARSOpndTypePtr SMPInstr::GetMoveSource(void) {
STARSOpndTypePtr SMPInstr::GetUseOnlyAddSubOp(void) const {
unsigned short opcode = this->GetIDAOpcode();
- bool IsAddSubInst = ((NN_adc == opcode) || (NN_add == opcode) || (NN_inc == opcode)
- || (NN_dec == opcode) || (NN_sbb == opcode) || (NN_sub == opcode));
+ bool IsAddSubInst = ((STARS_NN_adc == opcode) || (STARS_NN_add == opcode) || (STARS_NN_inc == opcode)
+ || (STARS_NN_dec == opcode) || (STARS_NN_sbb == opcode) || (STARS_NN_sub == opcode));
if ((this->RTL.GetCount() < 1) || (!IsAddSubInst))
return this->STARSInstPtr->MakeVoidOpnd(); // no RTL or not an addition or subtraction
@@ -1716,7 +1721,7 @@ STARSOpndTypePtr SMPInstr::GetUseOnlyAddSubOp(void) const {
STARSOpndTypePtr RightOp = nullptr;
#if SMP_BUILD_SPECIAL_ADC_SBB_RTL
- if ((NN_adc != opcode) && (NN_sbb != opcode)) {
+ if ((STARS_NN_adc != opcode) && (STARS_NN_sbb != opcode)) {
assert(!(RightTree->HasRightSubTree()));
RightOp = RightTree->GetRightOperand(); // Src (non-DEF) operand
}
@@ -1738,8 +1743,8 @@ STARSOpndTypePtr SMPInstr::GetUseOnlyAddSubOp(void) const {
STARSOpndTypePtr SMPInstr::GetDefUseAddSubOp(void) const {
unsigned short opcode = this->GetIDAOpcode();
- bool IsAddSubInst = ((NN_adc == opcode) || (NN_add == opcode) || (NN_inc == opcode)
- || (NN_dec == opcode) || (NN_sbb == opcode) || (NN_sub == opcode));
+ bool IsAddSubInst = ((STARS_NN_adc == opcode) || (STARS_NN_add == opcode) || (STARS_NN_inc == opcode)
+ || (STARS_NN_dec == opcode) || (STARS_NN_sbb == opcode) || (STARS_NN_sub == opcode));
if ((this->RTL.GetCount() < 1) || (!IsAddSubInst))
return this->STARSInstPtr->MakeVoidOpnd(); // no RTL or not an addition or subtraction
@@ -1824,7 +1829,7 @@ set<DefOrUse, LessDefUse>::iterator SMPInstr::GetPointerAddressReg(STARSOpndType
MDExtractAddressFields(MemOp, BaseReg, IndexReg, ScaleFactor, displacement);
- if ((R_none != BaseReg) && (!MDIsStackPtrReg(BaseReg, UseFP))) {
+ if ((STARS_x86_R_none != BaseReg) && (!MDIsStackPtrReg(BaseReg, UseFP))) {
STARSOpndTypePtr BaseOp = this->STARSInstPtr->MakeRegOpnd((uint16_t) BaseReg);
PtrIter = this->FindUse(BaseOp);
assert(PtrIter != this->GetLastUse());
@@ -1832,7 +1837,7 @@ set<DefOrUse, LessDefUse>::iterator SMPInstr::GetPointerAddressReg(STARSOpndType
return PtrIter;
}
}
- if ((R_none != IndexReg) && (!MDIsStackPtrReg(IndexReg, UseFP))) {
+ if ((STARS_x86_R_none != IndexReg) && (!MDIsStackPtrReg(IndexReg, UseFP))) {
STARSOpndTypePtr IndexOp = this->STARSInstPtr->MakeRegOpnd((uint16_t) IndexReg);
PtrIter = this->FindUse(IndexOp);
assert(PtrIter != this->GetLastUse());
@@ -1879,7 +1884,7 @@ void SMPInstr::SetAddSubSourceType(void) {
STARSOpndTypePtr RightOp = nullptr;
STARSOpndTypePtr LeftOp = RightTree->GetLeftOperand(); // Use (also DEF) operand
#if SMP_BUILD_SPECIAL_ADC_SBB_RTL
- if ((NN_adc != opcode) && (NN_sbb != opcode)) {
+ if ((STARS_NN_adc != opcode) && (STARS_NN_sbb != opcode)) {
assert(!(RightTree->HasRightSubTree()));
RightOp = RightTree->GetRightOperand(); // Src (non-DEF) operand
}
@@ -1922,7 +1927,7 @@ bool SMPInstr::AllDefsNumeric(void) {
for (CurrDef = this->GetFirstDef(); CurrDef != this->GetLastDef(); ++CurrDef) {
// We ignore the stack pointer for pop instructions and consider only
// the register DEF of the pop.
- if (this->MDIsPopInstr() && CurrDef->GetOp()->MatchesReg(R_sp))
+ if (this->MDIsPopInstr() && CurrDef->GetOp()->MatchesReg(STARS_x86_R_sp))
continue;
AllNumeric = (AllNumeric && IsNumeric(CurrDef->GetType()));
}
@@ -2062,7 +2067,7 @@ char * SMPInstr::DestString(int OptType) {
continue;
// We want to ignore the stack pointer DEF for pops and just include
// the register DEF for the pop.
- if (DefOpnd->MatchesReg(R_sp) && this->MDIsPopInstr())
+ if (DefOpnd->MatchesReg(STARS_x86_R_sp) && this->MDIsPopInstr())
continue;
if (DefOpnd->IsRegOp()) {
uint16_t DestReg = DefOpnd->GetReg();
@@ -2115,7 +2120,7 @@ void SMPInstr::MDEmitSPARKAdaStringOperation(FILE *OutFile) {
bool HasRepeatNEQPrefix = this->STARSInstPtr->HasRepeatIfNotEqualPrefix();
uint16_t opcode = this->GetIDAOpcode();
- if (opcode == NN_cmps) {
+ if (opcode == STARS_NN_cmps) {
PrintSPARKIndentTabs(OutFile);
SMP_fprintf(OutFile, " ");
if (HasRepeatEQPrefix) {
@@ -2126,7 +2131,7 @@ void SMPInstr::MDEmitSPARKAdaStringOperation(FILE *OutFile) {
}
SMP_fprintf(OutFile, "cmpsb;\n"); // procedure call
}
- else if (opcode == NN_scas) {
+ else if (opcode == STARS_NN_scas) {
PrintSPARKIndentTabs(OutFile);
SMP_fprintf(OutFile, " ");
if (HasRepeatEQPrefix) {
@@ -2137,7 +2142,7 @@ void SMPInstr::MDEmitSPARKAdaStringOperation(FILE *OutFile) {
}
SMP_fprintf(OutFile, "scasb;\n"); // procedure call
}
- else { // don't expect to see port I/O opcodes NN_ins or NN_outs yet.
+ else { // don't expect to see port I/O opcodes STARS_NN_ins or STARS_NN_outs yet.
SMP_fprintf(OutFile, "ERROR: Unknown string opcode at %llx\n", (unsigned long long) this->GetAddr());
}
@@ -2150,8 +2155,8 @@ void SMPInstr::MDEmitSPARKAdaCompareOrTest(FILE *OutFile) {
uint16_t opcode = this->GetIDAOpcode();
bool EmitCarryFlag = false; // no carry flag for test; but yes for compare
bool EmitOverflowFlag = false; // no overflow flag for test; but yes for compare
- bool BitwiseAndOperation = (NN_test == opcode);
- bool SubtractionOperation = (NN_cmp == opcode);
+ bool BitwiseAndOperation = (STARS_NN_test == opcode);
+ bool SubtractionOperation = (STARS_NN_cmp == opcode);
bool UseFP = this->GetBlock()->GetFunc()->UsesFramePointer();
assert(BitwiseAndOperation || SubtractionOperation);
@@ -2242,7 +2247,7 @@ void SMPInstr::MDEmitSPARKAdaSetCondCodeIntoReg(FILE *OutFile) {
SMPRegTransfer *CurrRT = this->RTL.GetRT(0);
STARSOpndTypePtr LeftOp = CurrRT->GetLeftOperandNoNorm();
std::size_t LeftOpndByteWidth = LeftOp->GetByteWidth();
- bool LeftSubwordWidth = (STARS_ISA_Bytewidth > LeftOpndByteWidth);
+ bool LeftSubwordWidth = (global_STARS_program->GetSTARS_ISA_Bytewidth() > LeftOpndByteWidth);
bool UseFP = this->GetBlock()->GetFunc()->UsesFramePointer();
// We will produce conditional assignments, Ada 2012 style:
@@ -2262,81 +2267,81 @@ void SMPInstr::MDEmitSPARKAdaSetCondCodeIntoReg(FILE *OutFile) {
uint16_t opcode = this->GetIDAOpcode();
switch (opcode) {
- case NN_seta: // Set Byte if Above (CF=0 & ZF=0)
- case NN_setnbe: // Set Byte if Not Below or Equal (CF=0 & ZF=0)
+ case STARS_NN_seta: // Set Byte if Above (CF=0 & ZF=0)
+ case STARS_NN_setnbe: // Set Byte if Not Below or Equal (CF=0 & ZF=0)
SMP_fprintf(OutFile, "(not (X86.CarryFlag or X86.ZeroFlag))");
break;
- case NN_setae: // Set Byte if Above or Equal (CF=0)
- case NN_setnb: // Set Byte if Not Below (CF=0)
- case NN_setnc: // Set Byte if Not Carry (CF=0)
+ case STARS_NN_setae: // Set Byte if Above or Equal (CF=0)
+ case STARS_NN_setnb: // Set Byte if Not Below (CF=0)
+ case STARS_NN_setnc: // Set Byte if Not Carry (CF=0)
SMP_fprintf(OutFile, "(not X86.CarryFlag)");
break;
- case NN_setb: // Set Byte if Below (CF=1)
- case NN_setc: // Set Byte if Carry (CF=1)
- case NN_setnae: // Set Byte if Not Above or Equal (CF=1)
+ case STARS_NN_setb: // Set Byte if Below (CF=1)
+ case STARS_NN_setc: // Set Byte if Carry (CF=1)
+ case STARS_NN_setnae: // Set Byte if Not Above or Equal (CF=1)
SMP_fprintf(OutFile, "(X86.CarryFlag)");
break;
- case NN_setbe: // Set Byte if Below or Equal (CF=1 | ZF=1)
- case NN_setna: // Set Byte if Not Above (CF=1 | ZF=1)
+ case STARS_NN_setbe: // Set Byte if Below or Equal (CF=1 | ZF=1)
+ case STARS_NN_setna: // Set Byte if Not Above (CF=1 | ZF=1)
SMP_fprintf(OutFile, "(X86.CarryFlag or X86.ZeroFlag)");
break;
- case NN_sete: // Set Byte if Equal (ZF=1)
- case NN_setz: // Set Byte if Zero (ZF=1)
+ case STARS_NN_sete: // Set Byte if Equal (ZF=1)
+ case STARS_NN_setz: // Set Byte if Zero (ZF=1)
SMP_fprintf(OutFile, "(X86.ZeroFlag)");
break;
- case NN_setg: // Set Byte if Greater (ZF=0 & SF=OF)
- case NN_setnle: // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
+ case STARS_NN_setg: // Set Byte if Greater (ZF=0 & SF=OF)
+ case STARS_NN_setnle: // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
SMP_fprintf(OutFile, "((not X86.ZeroFlag) and then (X86.SignFlag = X86.OverflowFlag))");
break;
- case NN_setge: // Set Byte if Greater or Equal (SF=OF)
- case NN_setnl: // Set Byte if Not Less (SF=OF)
+ case STARS_NN_setge: // Set Byte if Greater or Equal (SF=OF)
+ case STARS_NN_setnl: // Set Byte if Not Less (SF=OF)
SMP_fprintf(OutFile, "(X86.SignFlag = X86.OverflowFlag)");
break;
- case NN_setl: // Set Byte if Less (SF!=OF)
- case NN_setnge: // Set Byte if Not Greater or Equal (ZF=1)
+ case STARS_NN_setl: // Set Byte if Less (SF!=OF)
+ case STARS_NN_setnge: // Set Byte if Not Greater or Equal (ZF=1)
SMP_fprintf(OutFile, "(X86.SignFlag /= X86.OverflowFlag)");
break;
- case NN_setle: // Set Byte if Less or Equal (ZF=1 | SF!=OF)
- case NN_setng: // Set Byte if Not Greater (ZF=1 | SF!=OF)
+ case STARS_NN_setle: // Set Byte if Less or Equal (ZF=1 | SF!=OF)
+ case STARS_NN_setng: // Set Byte if Not Greater (ZF=1 | SF!=OF)
SMP_fprintf(OutFile, "(X86.ZeroFlag or (X86.SignFlag /= X86.OverflowFlag))");
break;
- case NN_setne: // Set Byte if Not Equal (ZF=0)
- case NN_setnz: // Set Byte if Not Zero (ZF=0)
+ case STARS_NN_setne: // Set Byte if Not Equal (ZF=0)
+ case STARS_NN_setnz: // Set Byte if Not Zero (ZF=0)
SMP_fprintf(OutFile, "(not X86.ZeroFlag)");
break;
- case NN_setno: // Set Byte if Not Overflow (OF=0)
+ case STARS_NN_setno: // Set Byte if Not Overflow (OF=0)
SMP_fprintf(OutFile, "(not X86.OverflowFlag)");
break;
- case NN_setnp: // Set Byte if Not Parity (PF=0)
- case NN_setpo: // Set Byte if Parity Odd (PF=0)
+ case STARS_NN_setnp: // Set Byte if Not Parity (PF=0)
+ case STARS_NN_setpo: // Set Byte if Parity Odd (PF=0)
SMP_fprintf(OutFile, "(not X86.ParityFlag)");
break;
- case NN_setns: // Set Byte if Not Sign (SF=0)
+ case STARS_NN_setns: // Set Byte if Not Sign (SF=0)
SMP_fprintf(OutFile, "(not X86.SignFlag)");
break;
- case NN_seto: // Set Byte if Overflow (OF=1)
+ case STARS_NN_seto: // Set Byte if Overflow (OF=1)
SMP_fprintf(OutFile, "(X86.OverflowFlag)");
break;
- case NN_setp: // Set Byte if Parity (PF=1)
- case NN_setpe: // Set Byte if Parity Even (PF=1)
+ case STARS_NN_setp: // Set Byte if Parity (PF=1)
+ case STARS_NN_setpe: // Set Byte if Parity Even (PF=1)
SMP_fprintf(OutFile, "(X86.ParityFlag)");
break;
- case NN_sets: // Set Byte if Sign (SF=1)
+ case STARS_NN_sets: // Set Byte if Sign (SF=1)
SMP_fprintf(OutFile, "(X86.SignFlag)");
break;
@@ -2358,109 +2363,109 @@ void SMPInstr::MDEmitSPARKAdaSetCondCodeIntoReg(FILE *OutFile) {
void SMPInstr::MDEmitSPARKAdaCondition(FILE *OutFile) {
uint16_t opcode = this->GetIDAOpcode();
switch (opcode) {
- case NN_ja: // Jump if Above (CF=0 & ZF=0)
- case NN_jnbe: // Jump if Not Below or Equal (CF=0 & ZF=0)
- case NN_cmova: // Move if Above (CF=0 & ZF=0)
+ case STARS_NN_ja: // Jump if Above (CF=0 & ZF=0)
+ case STARS_NN_jnbe: // Jump if Not Below or Equal (CF=0 & ZF=0)
+ case STARS_NN_cmova: // Move if Above (CF=0 & ZF=0)
SMP_fprintf(OutFile, "(not (X86.CarryFlag or X86.ZeroFlag))");
break;
- case NN_jae: // Jump if Above or Equal (CF=0)
- case NN_jnb: // Jump if Not Below (CF=0)
- case NN_jnc: // Jump if Not Carry (CF=0)
- case NN_cmovnb: // Move if Not Below (CF=0)
+ case STARS_NN_jae: // Jump if Above or Equal (CF=0)
+ case STARS_NN_jnb: // Jump if Not Below (CF=0)
+ case STARS_NN_jnc: // Jump if Not Carry (CF=0)
+ case STARS_NN_cmovnb: // Move if Not Below (CF=0)
SMP_fprintf(OutFile, "(not X86.CarryFlag)");
break;
- case NN_jb: // Jump if Below (CF=1)
- case NN_jc: // Jump if Carry (CF=1)
- case NN_jnae: // Jump if Not Above or Equal (CF=1)
- case NN_cmovb: // Move if Below (CF=1)
+ case STARS_NN_jb: // Jump if Below (CF=1)
+ case STARS_NN_jc: // Jump if Carry (CF=1)
+ case STARS_NN_jnae: // Jump if Not Above or Equal (CF=1)
+ case STARS_NN_cmovb: // Move if Below (CF=1)
SMP_fprintf(OutFile, "(X86.CarryFlag)");
break;
- case NN_jbe: // Jump if Below or Equal (CF=1 | ZF=1)
- case NN_jna: // Jump if Not Above (CF=1 | ZF=1)
- case NN_cmovbe: // Move if Below or Equal (CF=1 | ZF=1)
+ case STARS_NN_jbe: // Jump if Below or Equal (CF=1 | ZF=1)
+ case STARS_NN_jna: // Jump if Not Above (CF=1 | ZF=1)
+ case STARS_NN_cmovbe: // Move if Below or Equal (CF=1 | ZF=1)
SMP_fprintf(OutFile, "(X86.CarryFlag or X86.ZeroFlag)");
break;
- case NN_jcxz: // Jump if CX is 0
+ case STARS_NN_jcxz: // Jump if CX is 0
SMP_fprintf(OutFile, "(X86.CX = 0)");
break;
- case NN_jecxz: // Jump if ECX is 0
+ case STARS_NN_jecxz: // Jump if ECX is 0
SMP_fprintf(OutFile, "(X86.ECX = 0)");
break;
- case NN_jrcxz: // Jump if RCX is 0
+ case STARS_NN_jrcxz: // Jump if RCX is 0
SMP_fprintf(OutFile, "(X86.RCX = 0)");
break;
- case NN_je: // Jump if Equal (ZF=1)
- case NN_jz: // Jump if Zero (ZF=1)
- case NN_cmovz: // Move if Zero (ZF=1)
+ case STARS_NN_je: // Jump if Equal (ZF=1)
+ case STARS_NN_jz: // Jump if Zero (ZF=1)
+ case STARS_NN_cmovz: // Move if Zero (ZF=1)
SMP_fprintf(OutFile, "(X86.ZeroFlag)");
break;
- case NN_jg: // Jump if Greater (ZF=0 & SF=OF)
- case NN_jnle: // Jump if Not Less or Equal (ZF=0 & SF=OF)
- case NN_cmovg: // Move if Greater (ZF=0 & SF=OF)
+ case STARS_NN_jg: // Jump if Greater (ZF=0 & SF=OF)
+ case STARS_NN_jnle: // Jump if Not Less or Equal (ZF=0 & SF=OF)
+ case STARS_NN_cmovg: // Move if Greater (ZF=0 & SF=OF)
SMP_fprintf(OutFile, "((not X86.ZeroFlag) and then (X86.SignFlag = X86.OverflowFlag))");
break;
- case NN_jge: // Jump if Greater or Equal (SF=OF)
- case NN_jnl: // Jump if Not Less (SF=OF)
- case NN_cmovge: // Move if Greater or Equal (SF=OF)
+ case STARS_NN_jge: // Jump if Greater or Equal (SF=OF)
+ case STARS_NN_jnl: // Jump if Not Less (SF=OF)
+ case STARS_NN_cmovge: // Move if Greater or Equal (SF=OF)
SMP_fprintf(OutFile, "(X86.SignFlag = X86.OverflowFlag)");
break;
- case NN_jl: // Jump if Less (SF!=OF)
- case NN_jnge: // Jump if Not Greater or Equal (SF!=OF)
- case NN_cmovl: // Move if Less (SF!=OF)
+ case STARS_NN_jl: // Jump if Less (SF!=OF)
+ case STARS_NN_jnge: // Jump if Not Greater or Equal (SF!=OF)
+ case STARS_NN_cmovl: // Move if Less (SF!=OF)
SMP_fprintf(OutFile, "(X86.SignFlag /= X86.OverflowFlag)");
break;
- case NN_jle: // Jump if Less or Equal (ZF=1 | SF!=OF)
- case NN_jng: // Jump if Not Greater (ZF=1 | SF!=OF)
- case NN_cmovle: // Move if Less or Equal (ZF=1 | SF!=OF)
+ case STARS_NN_jle: // Jump if Less or Equal (ZF=1 | SF!=OF)
+ case STARS_NN_jng: // Jump if Not Greater (ZF=1 | SF!=OF)
+ case STARS_NN_cmovle: // Move if Less or Equal (ZF=1 | SF!=OF)
SMP_fprintf(OutFile, "(X86.ZeroFlag or (X86.SignFlag /= X86.OverflowFlag))");
break;
- case NN_jne: // Jump if Not Equal (ZF=0)
- case NN_jnz: // Jump if Not Zero (ZF=0)
- case NN_cmovnz: // Move if Not Zero (ZF=0)
+ case STARS_NN_jne: // Jump if Not Equal (ZF=0)
+ case STARS_NN_jnz: // Jump if Not Zero (ZF=0)
+ case STARS_NN_cmovnz: // Move if Not Zero (ZF=0)
SMP_fprintf(OutFile, "(not X86.ZeroFlag)");
break;
- case NN_jno: // Jump if Not Overflow (OF=0)
- case NN_cmovno: // Move if Not Overflow (OF=0)
+ case STARS_NN_jno: // Jump if Not Overflow (OF=0)
+ case STARS_NN_cmovno: // Move if Not Overflow (OF=0)
SMP_fprintf(OutFile, "(not X86.OverflowFlag)");
break;
- case NN_jnp: // Jump if Not Parity (PF=0)
- case NN_jpo: // Jump if Parity Odd (PF=0)
- case NN_cmovnp: // Move if Not Parity (PF=0)
+ case STARS_NN_jnp: // Jump if Not Parity (PF=0)
+ case STARS_NN_jpo: // Jump if Parity Odd (PF=0)
+ case STARS_NN_cmovnp: // Move if Not Parity (PF=0)
SMP_fprintf(OutFile, "(not X86.ParityFlag)");
break;
- case NN_jns: // Jump if Not Sign (SF=0)
- case NN_cmovns: // Move if Not Sign (SF=0)
+ case STARS_NN_jns: // Jump if Not Sign (SF=0)
+ case STARS_NN_cmovns: // Move if Not Sign (SF=0)
SMP_fprintf(OutFile, "(not X86.SignFlag)");
break;
- case NN_jo: // Jump if Overflow (OF=1)
- case NN_cmovo: // Move if Overflow (OF=1)
+ case STARS_NN_jo: // Jump if Overflow (OF=1)
+ case STARS_NN_cmovo: // Move if Overflow (OF=1)
SMP_fprintf(OutFile, "(X86.OverflowFlag)");
break;
- case NN_jp: // Jump if Parity (PF=1)
- case NN_jpe: // Jump if Parity Even (PF=1)
- case NN_cmovp: // Move if Parity (PF=1)
+ case STARS_NN_jp: // Jump if Parity (PF=1)
+ case STARS_NN_jpe: // Jump if Parity Even (PF=1)
+ case STARS_NN_cmovp: // Move if Parity (PF=1)
SMP_fprintf(OutFile, "(X86.ParityFlag)");
break;
- case NN_js: // Jump if Sign (SF=1)
- case NN_cmovs: // Move if Sign (SF=1)
+ case STARS_NN_js: // Jump if Sign (SF=1)
+ case STARS_NN_cmovs: // Move if Sign (SF=1)
SMP_fprintf(OutFile, "(X86.SignFlag)");
break;
@@ -2475,93 +2480,93 @@ void SMPInstr::MDEmitSPARKAdaCondition(FILE *OutFile) {
void SMPInstr::MDEmitSPARKAdaInvertedCondition(FILE *OutFile) {
uint16_t opcode = this->GetIDAOpcode();
switch (opcode) {
- case NN_ja: // Jump if Above (CF=0 & ZF=0)
- case NN_jnbe: // Jump if Not Below or Equal (CF=0 & ZF=0)
+ case STARS_NN_ja: // Jump if Above (CF=0 & ZF=0)
+ case STARS_NN_jnbe: // Jump if Not Below or Equal (CF=0 & ZF=0)
SMP_fprintf(OutFile, "(X86.CarryFlag or X86.ZeroFlag)");
break;
- case NN_jae: // Jump if Above or Equal (CF=0)
- case NN_jnb: // Jump if Not Below (CF=0)
- case NN_jnc: // Jump if Not Carry (CF=0)
+ case STARS_NN_jae: // Jump if Above or Equal (CF=0)
+ case STARS_NN_jnb: // Jump if Not Below (CF=0)
+ case STARS_NN_jnc: // Jump if Not Carry (CF=0)
SMP_fprintf(OutFile, "(X86.CarryFlag)");
break;
- case NN_jb: // Jump if Below (CF=1)
- case NN_jc: // Jump if Carry (CF=1)
- case NN_jnae: // Jump if Not Above or Equal (CF=1)
+ case STARS_NN_jb: // Jump if Below (CF=1)
+ case STARS_NN_jc: // Jump if Carry (CF=1)
+ case STARS_NN_jnae: // Jump if Not Above or Equal (CF=1)
SMP_fprintf(OutFile, "(not X86.CarryFlag)");
break;
- case NN_jbe: // Jump if Below or Equal (CF=1 | ZF=1)
- case NN_jna: // Jump if Not Above (CF=1 | ZF=1)
+ case STARS_NN_jbe: // Jump if Below or Equal (CF=1 | ZF=1)
+ case STARS_NN_jna: // Jump if Not Above (CF=1 | ZF=1)
SMP_fprintf(OutFile, "(not (X86.CarryFlag or X86.ZeroFlag))");
break;
- case NN_jcxz: // Jump if CX is 0
+ case STARS_NN_jcxz: // Jump if CX is 0
SMP_fprintf(OutFile, "(X86.CX /= 0)");
break;
- case NN_jecxz: // Jump if ECX is 0
+ case STARS_NN_jecxz: // Jump if ECX is 0
SMP_fprintf(OutFile, "(X86.ECX /= 0)");
break;
- case NN_jrcxz: // Jump if RCX is 0
+ case STARS_NN_jrcxz: // Jump if RCX is 0
SMP_fprintf(OutFile, "(X86.RCX /= 0)");
break;
- case NN_je: // Jump if Equal (ZF=1)
- case NN_jz: // Jump if Zero (ZF=1)
+ case STARS_NN_je: // Jump if Equal (ZF=1)
+ case STARS_NN_jz: // Jump if Zero (ZF=1)
SMP_fprintf(OutFile, "(not X86.ZeroFlag)");
break;
- case NN_jg: // Jump if Greater (ZF=0 & SF=OF)
- case NN_jnle: // Jump if Not Less or Equal (ZF=0 & SF=OF)
+ case STARS_NN_jg: // Jump if Greater (ZF=0 & SF=OF)
+ case STARS_NN_jnle: // Jump if Not Less or Equal (ZF=0 & SF=OF)
SMP_fprintf(OutFile, "(X86.ZeroFlag or (X86.SignFlag /= X86.OverflowFlag))");
break;
- case NN_jge: // Jump if Greater or Equal (SF=OF)
- case NN_jnl: // Jump if Not Less (SF=OF)
+ case STARS_NN_jge: // Jump if Greater or Equal (SF=OF)
+ case STARS_NN_jnl: // Jump if Not Less (SF=OF)
SMP_fprintf(OutFile, "(X86.SignFlag /= X86.OverflowFlag)");
break;
- case NN_jl: // Jump if Less (SF!=OF)
- case NN_jnge: // Jump if Not Greater or Equal (SF!=OF)
+ case STARS_NN_jl: // Jump if Less (SF!=OF)
+ case STARS_NN_jnge: // Jump if Not Greater or Equal (SF!=OF)
SMP_fprintf(OutFile, "(X86.SignFlag = X86.OverflowFlag)");
break;
- case NN_jle: // Jump if Less or Equal (ZF=1 | SF!=OF)
- case NN_jng: // Jump if Not Greater (ZF=1 | SF!=OF)
+ case STARS_NN_jle: // Jump if Less or Equal (ZF=1 | SF!=OF)
+ case STARS_NN_jng: // Jump if Not Greater (ZF=1 | SF!=OF)
SMP_fprintf(OutFile, "((not X86.ZeroFlag) and (X86.SignFlag = X86.OverflowFlag))");
break;
- case NN_jne: // Jump if Not Equal (ZF=0)
- case NN_jnz: // Jump if Not Zero (ZF=0)
+ case STARS_NN_jne: // Jump if Not Equal (ZF=0)
+ case STARS_NN_jnz: // Jump if Not Zero (ZF=0)
SMP_fprintf(OutFile, "(X86.ZeroFlag)");
break;
- case NN_jno: // Jump if Not Overflow (OF=0)
+ case STARS_NN_jno: // Jump if Not Overflow (OF=0)
SMP_fprintf(OutFile, "(X86.OverflowFlag)");
break;
- case NN_jnp: // Jump if Not Parity (PF=0)
- case NN_jpo: // Jump if Parity Odd (PF=0)
+ case STARS_NN_jnp: // Jump if Not Parity (PF=0)
+ case STARS_NN_jpo: // Jump if Parity Odd (PF=0)
SMP_fprintf(OutFile, "(X86.ParityFlag)");
break;
- case NN_jns: // Jump if Not Sign (SF=0)
+ case STARS_NN_jns: // Jump if Not Sign (SF=0)
SMP_fprintf(OutFile, "(X86.SignFlag)");
break;
- case NN_jo: // Jump if Overflow (OF=1)
+ case STARS_NN_jo: // Jump if Overflow (OF=1)
SMP_fprintf(OutFile, "(not X86.OverflowFlag)");
break;
- case NN_jp: // Jump if Parity (PF=1)
- case NN_jpe: // Jump if Parity Even (PF=1)
+ case STARS_NN_jp: // Jump if Parity (PF=1)
+ case STARS_NN_jpe: // Jump if Parity Even (PF=1)
SMP_fprintf(OutFile, "(not X86.ParityFlag)");
break;
- case NN_js: // Jump if Sign (SF=1)
+ case STARS_NN_js: // Jump if Sign (SF=1)
SMP_fprintf(OutFile, "(not X86.SignFlag)");
break;
@@ -2588,6 +2593,7 @@ void SMPInstr::EmitSPARKAda(FILE *OutFile) {
SMPitype CurrDataFlowType = this->GetDataFlowType();
std::string FuncTarget;
STARS_ea_t NextAddr;
+ std::size_t STARS_ISA_Bitwidth = global_STARS_program->GetSTARS_ISA_Bitwidth();
// Detect start of a loop.
if (this->IsFirstInBlock()) {
@@ -2633,9 +2639,9 @@ void SMPInstr::EmitSPARKAda(FILE *OutFile) {
NextAddr = InstAddr + (STARS_ea_t) this->GetSize();
PrintSPARKIndentTabs(OutFile);
SMP_fprintf(OutFile, " X86.WriteMem%d(Unsigned%d(X86.RSP - %d), %llx );\n", STARS_ISA_Bitwidth, STARS_ISA_Bitwidth,
- STARS_ISA_Bytewidth, (unsigned long long) NextAddr);
+ global_STARS_program->GetSTARS_ISA_Bytewidth(), (unsigned long long) NextAddr);
PrintSPARKIndentTabs(OutFile);
- SMP_fprintf(OutFile, " X86.RSP := X86.RSP - %d;\n", STARS_ISA_Bytewidth);
+ SMP_fprintf(OutFile, " X86.RSP := X86.RSP - %d;\n", global_STARS_program->GetSTARS_ISA_Bytewidth());
}
// Detect loop-related control flow first, then simple if-else control flow otherwise.
FuncControlFlowType = this->GetBlock()->GetFunc()->GetControlFlowType(InstAddr);
@@ -2729,9 +2735,9 @@ void SMPInstr::EmitSPARKAda(FILE *OutFile) {
NextAddr = InstAddr + (STARS_ea_t) this->GetSize();
PrintSPARKIndentTabs(OutFile);
SMP_fprintf(OutFile, " X86.WriteMem%d(Unsigned%d(X86.RSP - %d), %llu );\n",
- STARS_ISA_Bitwidth, STARS_ISA_Bitwidth, STARS_ISA_Bytewidth, (unsigned long long) NextAddr);
+ STARS_ISA_Bitwidth, STARS_ISA_Bitwidth, global_STARS_program->GetSTARS_ISA_Bytewidth(), (unsigned long long) NextAddr);
PrintSPARKIndentTabs(OutFile);
- SMP_fprintf(OutFile, " X86.RSP := X86.RSP - %d;\n", STARS_ISA_Bytewidth);
+ SMP_fprintf(OutFile, " X86.RSP := X86.RSP - %d;\n", global_STARS_program->GetSTARS_ISA_Bytewidth());
PrintSPARKIndentTabs(OutFile);
SMP_fprintf(OutFile, " %s ;\n", FuncTarget.c_str());
break;
@@ -2743,7 +2749,7 @@ void SMPInstr::EmitSPARKAda(FILE *OutFile) {
// We increase the stack size by 8 to swallow the return address, then
// execute a SPARK Ada return instruction.
PrintSPARKIndentTabs(OutFile);
- SMP_fprintf(OutFile, " X86.RSP := X86.RSP + %d;\n", STARS_ISA_Bytewidth);
+ SMP_fprintf(OutFile, " X86.RSP := X86.RSP + %d;\n", global_STARS_program->GetSTARS_ISA_Bytewidth());
PrintSPARKIndentTabs(OutFile);
SMP_fprintf(OutFile, " return;\n");
break;
@@ -2826,16 +2832,16 @@ int SMPInstr::operator<=(const SMPInstr &rhs) const {
return (this->GetAddr() <= rhs.GetAddr());
}
-#define MD_FIRST_ENTER_INSTR NN_enterw
-#define MD_LAST_ENTER_INSTR NN_enterq
+#define MD_FIRST_ENTER_INSTR STARS_NN_enterw
+#define MD_LAST_ENTER_INSTR STARS_NN_enterq
// Is this instruction one that allocates space on the
// stack for the local variables?
bool SMPInstr::MDIsFrameAllocInstr(void) {
// The frame allocating instruction should look like:
// sub esp,48 or add esp,-64 etc.
- STARSOpndTypePtr ESPOp = this->STARSInstPtr->MakeRegOpnd(R_sp);
+ STARSOpndTypePtr ESPOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_sp);
unsigned short opcode = this->GetIDAOpcode();
- if ((opcode == NN_sub) || (opcode == NN_add)) {
+ if ((opcode == STARS_NN_sub) || (opcode == STARS_NN_add)) {
if (this->GetLastDef() != this->Defs.FindRef(ESPOp)) {
// We know that an addition or subtraction is being
// performed on the stack pointer. This should not be
@@ -2857,14 +2863,14 @@ bool SMPInstr::MDIsFrameAllocInstr(void) {
for (CurrUse = this->GetFirstUse(); CurrUse != this->GetLastUse(); ++CurrUse) {
if (CurrUse->GetOp()->IsImmedOp()) {
signed long TempImm = (signed long) CurrUse->GetOp()->GetImmedValue();
- if (((0 > TempImm) && (opcode == NN_add))
- || ((0 < TempImm) && (opcode == NN_sub))) {
+ if (((0 > TempImm) && (opcode == STARS_NN_add))
+ || ((0 < TempImm) && (opcode == STARS_NN_sub))) {
return true;
}
}
else if (CurrUse->GetOp()->IsRegOp()
- && (!CurrUse->GetOp()->MatchesReg(R_sp)) // skip the ESP operand
- && (opcode == NN_sub)) { // sub esp,reg: alloca() ?
+ && (!CurrUse->GetOp()->MatchesReg(STARS_x86_R_sp)) // skip the ESP operand
+ && (opcode == STARS_NN_sub)) { // sub esp,reg: alloca() ?
return true;
}
}
@@ -2876,8 +2882,8 @@ bool SMPInstr::MDIsFrameAllocInstr(void) {
return false;
} // end of SMPInstr::MDIsFrameAllocInstr()
-#define MD_FIRST_LEAVE_INSTR NN_leavew
-#define MD_LAST_LEAVE_INSTR NN_leaveq
+#define MD_FIRST_LEAVE_INSTR STARS_NN_leavew
+#define MD_LAST_LEAVE_INSTR STARS_NN_leaveq
// Is this instruction in the epilogue the one that deallocates the local
// vars region of the stack frame?
bool SMPInstr::MDIsFrameDeallocInstr(bool UseFP, STARS_asize_t LocalVarsSize) {
@@ -2899,11 +2905,11 @@ bool SMPInstr::MDIsFrameDeallocInstr(bool UseFP, STARS_asize_t LocalVarsSize) {
// from memory operands, e.g. mov eax,[ebp-20]
return false;
}
- else if (UseFP && (opcode == NN_mov)
+ else if (UseFP && (opcode == STARS_NN_mov)
&& (FirstDef->GetOp()->MatchesReg(MD_STACK_POINTER_REG))
&& (FirstUse->GetOp()->MatchesReg(MD_FRAME_POINTER_REG)))
return true;
- else if ((opcode == NN_add) && (FirstDef->GetOp()->MatchesReg(MD_STACK_POINTER_REG))) {
+ else if ((opcode == STARS_NN_add) && (FirstDef->GetOp()->MatchesReg(MD_STACK_POINTER_REG))) {
set<DefOrUse, LessDefUse>::iterator SecondUse = ++FirstUse;
if (SecondUse == this->Uses.GetLastRef())
return false; // no more USEs ... strange for ADD instruction
@@ -2930,9 +2936,9 @@ bool SMPInstr::MDIsNop(void) const {
bool IsNop = false;
unsigned short opcode = this->GetIDAOpcode();
- if ((NN_nop == opcode) || (NN_lock == opcode))
+ if ((STARS_NN_nop == opcode) || (STARS_NN_lock == opcode))
IsNop = true;
- else if ((NN_mov == opcode) || (NN_xchg == opcode)) {
+ else if ((STARS_NN_mov == opcode) || (STARS_NN_xchg == opcode)) {
if (this->STARSInstPtr->GetOpnd(0)->IsRegOp()
&& this->STARSInstPtr->GetOpnd(1)->MatchesReg(this->STARSInstPtr->GetOpnd(0)->GetReg())) {
// We have a register to register move with source == destination,
@@ -2940,7 +2946,7 @@ bool SMPInstr::MDIsNop(void) const {
IsNop = true;
}
}
- else if (NN_lea == opcode) {
+ else if (STARS_NN_lea == opcode) {
if (this->STARSInstPtr->GetOpnd(0)->IsRegOp()
&& (this->STARSInstPtr->GetOpnd(1)->IsMemDisplacementOp()
|| this->STARSInstPtr->GetOpnd(1)->IsMemNoDisplacementOp())
@@ -2949,8 +2955,8 @@ bool SMPInstr::MDIsNop(void) const {
uint16_t destreg = this->STARSInstPtr->GetOpnd(0)->GetReg();
if ((this->STARSInstPtr->GetOpnd(1)->HasSIBByte())
&& (destreg == (uint16_t) MD_STARS_sib_base(this->STARSInstPtr->GetOpnd(1)))
- && (R_sp == MD_STARS_sib_index(this->STARSInstPtr->GetOpnd(1)))) {
- // R_sp signifies no SIB index register. So, we have
+ && (STARS_x86_R_sp == MD_STARS_sib_index(this->STARSInstPtr->GetOpnd(1)))) {
+ // STARS_x86_R_sp signifies no SIB index register. So, we have
// lea reg,[reg+0] with reg being the same in both place,
// once as Operands[0] and once as the base reg in Operands[1].
IsNop = true;
@@ -2966,73 +2972,73 @@ bool SMPInstr::MDIsNop(void) const {
// Opcode always produces an UNSIGNED DEF.
bool SMPInstr::MDAlwaysUnsignedDEF(void) const {
unsigned short opcode = this->GetIDAOpcode();
- return ((opcode == NN_bsf) || (opcode == NN_bsr) || (opcode == NN_div)
- || (opcode == NN_lahf) || (opcode == NN_lar) || (opcode == NN_lgs)
- || (opcode == NN_lss) || (opcode == NN_lds) || (opcode == NN_les)
- || (opcode == NN_lfs) || (opcode == NN_lsl) || (opcode == NN_movzx)
- || (opcode == NN_rcl) || (opcode == NN_rcr) || (opcode == NN_rol)
- || (opcode == NN_ror) || (opcode == NN_shl) || (opcode == NN_shr)
- || ((opcode >= NN_seta) && (opcode <= NN_setz)) || (opcode == NN_cpuid)
- || (opcode == NN_rdtsc) || (opcode == NN_rdpmc) || (opcode == NN_fstsw)
- || (opcode == NN_setalc) || (opcode == NN_packuswb) || (opcode == NN_paddusb)
- || (opcode == NN_paddusw) || (opcode == NN_psllw) || (opcode == NN_pslld)
- || (opcode == NN_psllq) || (opcode == NN_psrlw) || (opcode == NN_psrld)
- || (opcode == NN_psrlq) || (opcode == NN_psubusb) || (opcode == NN_psubusw)
- || (opcode == NN_pxor) || (opcode == NN_pavgusb) || (opcode == NN_pavgb)
- || (opcode == NN_pavgw) || (opcode == NN_pextrw) || (opcode == NN_pmaxub)
- || ((opcode >= NN_pminub) && (opcode <= NN_psadbw))
- || (opcode == NN_movmskpd) || (opcode == NN_pmuludq) || (opcode == NN_pslldq)
- || (opcode == NN_psrldq) || ((opcode >= NN_pabsb) && (opcode <= NN_pabsd))
- || (opcode == NN_rdtscp) || (opcode == NN_mpsadbw) || (opcode == NN_packusdw)
- || ((opcode >= NN_pcmpeqq) && (opcode <= NN_phminposuw)) || (opcode == NN_pmaxud)
- || (opcode == NN_pmaxuw) || (opcode == NN_pminud) || (opcode == NN_pminuw)
- || ((opcode >= NN_pmovzxbw) && (opcode <= NN_pmovzxdq)) || ((opcode >= NN_crc32)
- && (opcode <= NN_pcmpistrm)) || (opcode == NN_popcnt) || (opcode == NN_lzcnt)
- || ((opcode >= NN_aesenc) && (opcode <= NN_aeskeygenassist)));
+ return ((opcode == STARS_NN_bsf) || (opcode == STARS_NN_bsr) || (opcode == STARS_NN_div)
+ || (opcode == STARS_NN_lahf) || (opcode == STARS_NN_lar) || (opcode == STARS_NN_lgs)
+ || (opcode == STARS_NN_lss) || (opcode == STARS_NN_lds) || (opcode == STARS_NN_les)
+ || (opcode == STARS_NN_lfs) || (opcode == STARS_NN_lsl) || (opcode == STARS_NN_movzx)
+ || (opcode == STARS_NN_rcl) || (opcode == STARS_NN_rcr) || (opcode == STARS_NN_rol)
+ || (opcode == STARS_NN_ror) || (opcode == STARS_NN_shl) || (opcode == STARS_NN_shr)
+ || ((opcode >= STARS_NN_seta) && (opcode <= STARS_NN_setz)) || (opcode == STARS_NN_cpuid)
+ || (opcode == STARS_NN_rdtsc) || (opcode == STARS_NN_rdpmc) || (opcode == STARS_NN_fstsw)
+ || (opcode == STARS_NN_setalc) || (opcode == STARS_NN_packuswb) || (opcode == STARS_NN_paddusb)
+ || (opcode == STARS_NN_paddusw) || (opcode == STARS_NN_psllw) || (opcode == STARS_NN_pslld)
+ || (opcode == STARS_NN_psllq) || (opcode == STARS_NN_psrlw) || (opcode == STARS_NN_psrld)
+ || (opcode == STARS_NN_psrlq) || (opcode == STARS_NN_psubusb) || (opcode == STARS_NN_psubusw)
+ || (opcode == STARS_NN_pxor) || (opcode == STARS_NN_pavgusb) || (opcode == STARS_NN_pavgb)
+ || (opcode == STARS_NN_pavgw) || (opcode == STARS_NN_pextrw) || (opcode == STARS_NN_pmaxub)
+ || ((opcode >= STARS_NN_pminub) && (opcode <= STARS_NN_psadbw))
+ || (opcode == STARS_NN_movmskpd) || (opcode == STARS_NN_pmuludq) || (opcode == STARS_NN_pslldq)
+ || (opcode == STARS_NN_psrldq) || ((opcode >= STARS_NN_pabsb) && (opcode <= STARS_NN_pabsd))
+ || (opcode == STARS_NN_rdtscp) || (opcode == STARS_NN_mpsadbw) || (opcode == STARS_NN_packusdw)
+ || ((opcode >= STARS_NN_pcmpeqq) && (opcode <= STARS_NN_phminposuw)) || (opcode == STARS_NN_pmaxud)
+ || (opcode == STARS_NN_pmaxuw) || (opcode == STARS_NN_pminud) || (opcode == STARS_NN_pminuw)
+ || ((opcode >= STARS_NN_pmovzxbw) && (opcode <= STARS_NN_pmovzxdq)) || ((opcode >= STARS_NN_crc32)
+ && (opcode <= STARS_NN_pcmpistrm)) || (opcode == STARS_NN_popcnt) || (opcode == STARS_NN_lzcnt)
+ || ((opcode >= STARS_NN_aesenc) && (opcode <= STARS_NN_aeskeygenassist)));
} // end of SMPInstr::MDAlwaysUnsignedDEF()
// Opcode always produces a SIGNED DEF.
bool SMPInstr::MDAlwaysSignedDEF(void) const {
unsigned short opcode = this->GetIDAOpcode();
- return ((opcode == NN_cbw) || (opcode == NN_cwde) || (opcode == NN_cdqe)
- || (opcode == NN_cwd) || (opcode == NN_cdq) || (opcode == NN_cqo)
- || (opcode == NN_idiv) || (opcode == NN_movsx) || (opcode == NN_neg)
- || (opcode == NN_sal) || (opcode == NN_sar) || (opcode == NN_fist)
- || (opcode == NN_fistp) || (opcode == NN_fbstp) || (opcode == NN_packsswb)
- || (opcode == NN_packssdw) || (opcode == NN_paddsb) || (opcode == NN_paddsw)
- || (opcode == NN_pmaddwd) || (opcode == NN_pmulhw) || (opcode == NN_pmullw)
- || (opcode == NN_psraw) || (opcode == NN_psrad) || (opcode == NN_psubsb)
- || (opcode == NN_psubsw) || (opcode == NN_pfadd) || (opcode == NN_pfsub)
- || (opcode == NN_pfsubr) || (opcode == NN_pfacc) || (opcode == NN_pfmin)
- || (opcode == NN_pfmax) || (opcode == NN_pf2id) || (opcode == NN_pfrcp)
- || (opcode == NN_pfrsqrt) || (opcode == NN_pfmul)
- || (opcode == NN_pfrcpit1) || (opcode == NN_pfrsqit1) || (opcode == NN_pfrcpit2)
- || (opcode == NN_pmulhrw) || ((opcode >= NN_addps) && (opcode <= NN_andps))
- || ((opcode >= NN_cvtpi2ps) && (opcode <= NN_divss)) || ((opcode >= NN_maxps)
- && (opcode <= NN_movlps)) || ((opcode >= NN_movss) && (opcode <= NN_sqrtss))
- || (opcode == NN_subps) || (opcode == NN_subss) || (opcode == NN_unpckhps)
- || (opcode == NN_unpcklps) || (opcode == NN_pmaxsw) || (opcode == NN_pminsw)
- || (opcode == NN_movntps) || (opcode == NN_pf2iw) || (opcode == NN_pfnacc)
- || (opcode == NN_pfpnacc) || (opcode == NN_pi2fw) || ((opcode >= NN_addpd)
- && (opcode <= NN_andpd)) || ((opcode >= NN_cvtdq2pd) && (opcode <= NN_divsd))
- || (opcode == NN_maxpd) || (opcode == NN_maxsd) || ((opcode >= NN_minpd)
- && (opcode <= NN_movapd)) || (opcode == NN_movhpd) || (opcode == NN_movlpd)
- || (opcode == NN_movntpd) || ((opcode >= NN_movsd) && (opcode <= NN_orpd))
- || ((opcode >= NN_sqrtpd) && (opcode <= NN_subsd)) && ((opcode >= NN_unpckhpd)
- && (opcode <= NN_xorpd)) || ((opcode >= NN_movddup) && (opcode <= NN_movsxd))
- || ((opcode >= NN_addsubpd) && (opcode <= NN_hsubps)) || (opcode == NN_fisttp)
- || ((opcode >= NN_psignb) && (opcode <= NN_psignd)) || ((opcode >= NN_pmulhrsw)
- && (opcode <= NN_phsubd)) || (opcode == NN_pfrcpv) || (opcode == NN_pfrsqrtv)
- || ((opcode >= NN_blendpd) && (opcode <= NN_insertps)) || (opcode == NN_pmaxsb)
- || (opcode == NN_pmaxsd) || (opcode == NN_pminsb) || (opcode == NN_pminsd)
- || ((opcode >= NN_pmovsxbw) && (opcode <= NN_pmovsxdq)) || (opcode == NN_pmuldq)
- || (opcode == NN_pmulld) || ((opcode >= NN_roundpd) && (opcode <= NN_roundss))
- || (opcode == NN_movntsd) || (opcode == NN_movntss));
+ return ((opcode == STARS_NN_cbw) || (opcode == STARS_NN_cwde) || (opcode == STARS_NN_cdqe)
+ || (opcode == STARS_NN_cwd) || (opcode == STARS_NN_cdq) || (opcode == STARS_NN_cqo)
+ || (opcode == STARS_NN_idiv) || (opcode == STARS_NN_movsx) || (opcode == STARS_NN_neg)
+ || (opcode == STARS_NN_sal) || (opcode == STARS_NN_sar) || (opcode == STARS_NN_fist)
+ || (opcode == STARS_NN_fistp) || (opcode == STARS_NN_fbstp) || (opcode == STARS_NN_packsswb)
+ || (opcode == STARS_NN_packssdw) || (opcode == STARS_NN_paddsb) || (opcode == STARS_NN_paddsw)
+ || (opcode == STARS_NN_pmaddwd) || (opcode == STARS_NN_pmulhw) || (opcode == STARS_NN_pmullw)
+ || (opcode == STARS_NN_psraw) || (opcode == STARS_NN_psrad) || (opcode == STARS_NN_psubsb)
+ || (opcode == STARS_NN_psubsw) || (opcode == STARS_NN_pfadd) || (opcode == STARS_NN_pfsub)
+ || (opcode == STARS_NN_pfsubr) || (opcode == STARS_NN_pfacc) || (opcode == STARS_NN_pfmin)
+ || (opcode == STARS_NN_pfmax) || (opcode == STARS_NN_pf2id) || (opcode == STARS_NN_pfrcp)
+ || (opcode == STARS_NN_pfrsqrt) || (opcode == STARS_NN_pfmul)
+ || (opcode == STARS_NN_pfrcpit1) || (opcode == STARS_NN_pfrsqit1) || (opcode == STARS_NN_pfrcpit2)
+ || (opcode == STARS_NN_pmulhrw) || ((opcode >= STARS_NN_addps) && (opcode <= STARS_NN_andps))
+ || ((opcode >= STARS_NN_cvtpi2ps) && (opcode <= STARS_NN_divss)) || ((opcode >= STARS_NN_maxps)
+ && (opcode <= STARS_NN_movlps)) || ((opcode >= STARS_NN_movss) && (opcode <= STARS_NN_sqrtss))
+ || (opcode == STARS_NN_subps) || (opcode == STARS_NN_subss) || (opcode == STARS_NN_unpckhps)
+ || (opcode == STARS_NN_unpcklps) || (opcode == STARS_NN_pmaxsw) || (opcode == STARS_NN_pminsw)
+ || (opcode == STARS_NN_movntps) || (opcode == STARS_NN_pf2iw) || (opcode == STARS_NN_pfnacc)
+ || (opcode == STARS_NN_pfpnacc) || (opcode == STARS_NN_pi2fw) || ((opcode >= STARS_NN_addpd)
+ && (opcode <= STARS_NN_andpd)) || ((opcode >= STARS_NN_cvtdq2pd) && (opcode <= STARS_NN_divsd))
+ || (opcode == STARS_NN_maxpd) || (opcode == STARS_NN_maxsd) || ((opcode >= STARS_NN_minpd)
+ && (opcode <= STARS_NN_movapd)) || (opcode == STARS_NN_movhpd) || (opcode == STARS_NN_movlpd)
+ || (opcode == STARS_NN_movntpd) || ((opcode >= STARS_NN_movsd) && (opcode <= STARS_NN_orpd))
+ || ((opcode >= STARS_NN_sqrtpd) && (opcode <= STARS_NN_subsd)) && ((opcode >= STARS_NN_unpckhpd)
+ && (opcode <= STARS_NN_xorpd)) || ((opcode >= STARS_NN_movddup) && (opcode <= STARS_NN_movsxd))
+ || ((opcode >= STARS_NN_addsubpd) && (opcode <= STARS_NN_hsubps)) || (opcode == STARS_NN_fisttp)
+ || ((opcode >= STARS_NN_psignb) && (opcode <= STARS_NN_psignd)) || ((opcode >= STARS_NN_pmulhrsw)
+ && (opcode <= STARS_NN_phsubd)) || (opcode == STARS_NN_pfrcpv) || (opcode == STARS_NN_pfrsqrtv)
+ || ((opcode >= STARS_NN_blendpd) && (opcode <= STARS_NN_insertps)) || (opcode == STARS_NN_pmaxsb)
+ || (opcode == STARS_NN_pmaxsd) || (opcode == STARS_NN_pminsb) || (opcode == STARS_NN_pminsd)
+ || ((opcode >= STARS_NN_pmovsxbw) && (opcode <= STARS_NN_pmovsxdq)) || (opcode == STARS_NN_pmuldq)
+ || (opcode == STARS_NN_pmulld) || ((opcode >= STARS_NN_roundpd) && (opcode <= STARS_NN_roundss))
+ || (opcode == STARS_NN_movntsd) || (opcode == STARS_NN_movntss));
} // end of SMPInstr::MDAlwaysSignedDEF()
bool SMPInstr::MDIsAddition(void) const {
unsigned short opcode = this->GetIDAOpcode();
- bool FoundAddition = ((NN_adc == opcode) || (NN_add == opcode));
+ bool FoundAddition = ((STARS_NN_adc == opcode) || (STARS_NN_add == opcode));
if (this->MDIsLoadEffectiveAddressInstr()) {
SMPRegTransfer *CurrRT = this->RTL.GetRT(0);
@@ -3050,29 +3056,29 @@ bool SMPInstr::MDIsAddition(void) const {
bool SMPInstr::MDIsOverflowingOpcode(void) const {
unsigned short opcode = this->GetIDAOpcode();
- return ((NN_adc == opcode) || (NN_add == opcode) || (NN_inc == opcode)
- || (NN_neg == opcode) || (NN_xadd == opcode));
+ return ((STARS_NN_adc == opcode) || (STARS_NN_add == opcode) || (STARS_NN_inc == opcode)
+ || (STARS_NN_neg == opcode) || (STARS_NN_xadd == opcode));
}
// Is non-multiply arithmetic instruction that can possibly underflow?
bool SMPInstr::MDIsUnderflowingOpcode(void) const {
unsigned short opcode = this->GetIDAOpcode();
- return ((NN_dec == opcode) || (NN_sbb == opcode) || (NN_sub == opcode));
+ return ((STARS_NN_dec == opcode) || (STARS_NN_sbb == opcode) || (STARS_NN_sub == opcode));
}
// Is potentially benign overflow instruction?
bool SMPInstr::MDIsMaybeBenignOverflowOpcode(void) const {
unsigned short opcode = this->GetIDAOpcode();
- return ((NN_adc == opcode) || (NN_add == opcode));
+ return ((STARS_NN_adc == opcode) || (STARS_NN_add == opcode));
}
// Is potentially benign underflow instruction?
bool SMPInstr::MDIsMaybeBenignUnderflowOpcode(void) const {
unsigned short opcode = this->GetIDAOpcode();
- return ((NN_neg == opcode) || (NN_sbb == opcode) || (NN_sub == opcode));
+ return ((STARS_NN_neg == opcode) || (STARS_NN_sbb == opcode) || (STARS_NN_sub == opcode));
}
// Is definitely benign underflow instruction?
@@ -3084,7 +3090,7 @@ bool SMPInstr::MDIsDefiniteBenignUnderflowOpcode(int &IdiomCode) {
// (Some sort of saturation? Often treated as 0 or -1, i.e. it becomes SIGNED
// even if it used to be UNSIGNED.)
// The "underflow" on the subtraction is irrelevant and benign.
- bool benign = ((NN_sbb == opcode) && (this->SubtractsFromItself()));
+ bool benign = ((STARS_NN_sbb == opcode) && (this->SubtractsFromItself()));
if (benign) {
IdiomCode = 4;
}
@@ -3155,7 +3161,7 @@ bool SMPInstr::SubtractsImmedASCII(void) {
#define SMP_ASCII_CARRIAGE_RETURN 13
bool SMPInstr::MDComparesImmedASCII(void) {
bool ComparesToASCII = false;
- if (this->GetIDAOpcode() == NN_cmp) {
+ if (this->GetIDAOpcode() == STARS_NN_cmp) {
SMPRegTransfer *CurrRT = this->RTL.GetRT(0);
if ((CurrRT != NULL) && (CurrRT->HasRightSubTree())) {
CurrRT = CurrRT->GetRightTree();
@@ -3178,21 +3184,21 @@ bool SMPInstr::MDComparesImmedASCII(void) {
bool SMPInstr::MDDestroysSignBit(void) const {
bool SignBitDestroyed;
unsigned short opcode = this->GetIDAOpcode();
- SignBitDestroyed = (NN_shl == opcode); // add more cases later.
+ SignBitDestroyed = (STARS_NN_shl == opcode); // add more cases later.
return SignBitDestroyed;
} // end of SMPInstr::MDDestroysSignBit()
// Inst is cond branch depending only on zero/non-zero status, i.e. uses only the zero flag
bool SMPInstr::MDIsZeroFlagCondBranch(void) const {
unsigned short opcode = this->GetIDAOpcode();
- bool ZeroFlagBranch = ((opcode == NN_je) || (opcode == NN_jne) || (opcode == NN_jz) || (opcode == NN_jnz));
+ bool ZeroFlagBranch = ((opcode == STARS_NN_je) || (opcode == STARS_NN_jne) || (opcode == STARS_NN_jz) || (opcode == STARS_NN_jnz));
return ZeroFlagBranch;
} // end of SMPInstr::MDIsZeroFlagCondBranch()
// Inst is x86 string opcode that can have a repeat prefix to make it loop.
bool SMPInstr::MDIsPossibleStringLoopingOpcode(void) const {
unsigned short opcode = this->GetIDAOpcode();
- bool LoopingStringOperation = ((opcode == NN_cmps) || (opcode == NN_scas) || (opcode == NN_ins) || (opcode == NN_outs));
+ bool LoopingStringOperation = ((opcode == STARS_NN_cmps) || (opcode == STARS_NN_scas) || (opcode == STARS_NN_ins) || (opcode == STARS_NN_outs));
return LoopingStringOperation;
} // end of SMPInstr::MDIsPossibleStringLoopingOpcode()
@@ -3342,20 +3348,20 @@ bool SMPInstr::IsSetToZero(void) const {
// MACHINE DEPENDENT: Is instruction a return instruction?
bool SMPInstr::MDIsReturnInstr(void) const {
- return ((this->GetIDAOpcode() == NN_retn) || (this->GetIDAOpcode() == NN_retf));
+ return ((this->GetIDAOpcode() == STARS_NN_retn) || (this->GetIDAOpcode() == STARS_NN_retf));
}
// MACHINE DEPENDENT: Is instruction a POP instruction?
-#define FIRST_POP_INST NN_pop
-#define LAST_POP_INST NN_popfq
+#define FIRST_POP_INST STARS_NN_pop
+#define LAST_POP_INST STARS_NN_popfq
bool SMPInstr::MDIsPopInstr(void) const {
return ((this->GetIDAOpcode() >= FIRST_POP_INST)
&& (this->GetIDAOpcode() <= LAST_POP_INST));
}
// MACHINE DEPENDENT: Is instruction a PUSH instruction?
-#define FIRST_PUSH_INST NN_push
-#define LAST_PUSH_INST NN_pushfq
+#define FIRST_PUSH_INST STARS_NN_push
+#define LAST_PUSH_INST STARS_NN_pushfq
bool SMPInstr::MDIsPushInstr(void) const {
return ((this->GetIDAOpcode() >= FIRST_PUSH_INST)
&& (this->GetIDAOpcode() <= LAST_PUSH_INST));
@@ -3375,11 +3381,11 @@ bool SMPInstr::MDIsLeaveInstr(void) const {
// MACHINE DEPENDENT: Is instruction a HALT instruction?
bool SMPInstr::MDIsHaltInstr(void) const {
- return (NN_hlt == this->GetIDAOpcode());
+ return (STARS_NN_hlt == this->GetIDAOpcode());
}
-#define MD_FIRST_COND_MOVE_INSTR NN_cmova
-#define MD_LAST_COND_MOVE_INSTR NN_fcmovnu
+#define MD_FIRST_COND_MOVE_INSTR STARS_NN_cmova
+#define MD_LAST_COND_MOVE_INSTR STARS_NN_fcmovnu
// MACHINE DEPENDENT: Is instruction a conditional move?
bool SMPInstr::MDIsConditionalMoveInstr(void) const {
return ((this->GetIDAOpcode() >= MD_FIRST_COND_MOVE_INSTR)
@@ -3388,17 +3394,17 @@ bool SMPInstr::MDIsConditionalMoveInstr(void) const {
// MACHINE DEPENDENT: Is instruction any kind of move?
bool SMPInstr::MDIsMoveInstr(void) const {
- return ((NN_mov == this->GetIDAOpcode()) || (NN_movsx == this->GetIDAOpcode())
- || (NN_movzx == this->GetIDAOpcode()) || this->MDIsConditionalMoveInstr());
+ return ((STARS_NN_mov == this->GetIDAOpcode()) || (STARS_NN_movsx == this->GetIDAOpcode())
+ || (STARS_NN_movzx == this->GetIDAOpcode()) || this->MDIsConditionalMoveInstr());
}
// MACHINE DEPENDENT: Do opcode/operands definitely indicate signed arithmetic?
// Generally, this is only true for certain variants of multiplication and division.
bool SMPInstr::MDIsSignedArithmetic(void) const {
unsigned short opcode = this->GetIDAOpcode();
- if (NN_idiv == opcode)
+ if (STARS_NN_idiv == opcode)
return true;
- if (NN_imul == opcode) {
+ if (STARS_NN_imul == opcode) {
// If we discard the upper N bits of the multiplication result, then the
// lower N bits are the same for signed and unsigned multiplication, and
// gcc/g++ often use the IMUL opcode for both signed and unsigned multiplies
@@ -3414,49 +3420,49 @@ bool SMPInstr::MDIsSignedArithmetic(void) const {
// MACHINE DEPENDENT: Is instruction a conditional jump based on an unsigned condition?
bool SMPInstr::MDIsUnsignedBranch(void) const {
unsigned short opcode = this->GetIDAOpcode();
- return ((NN_ja == opcode) || (NN_jae == opcode) || (NN_jb == opcode) || (NN_jbe == opcode)
- || (NN_jna == opcode) || (NN_jnae == opcode) || (NN_jnb == opcode) || (NN_jnbe == opcode));
+ return ((STARS_NN_ja == opcode) || (STARS_NN_jae == opcode) || (STARS_NN_jb == opcode) || (STARS_NN_jbe == opcode)
+ || (STARS_NN_jna == opcode) || (STARS_NN_jnae == opcode) || (STARS_NN_jnb == opcode) || (STARS_NN_jnbe == opcode));
}
// MACHINE DEPENDENT: Is instruction a conditional jump based on a signed condition?
bool SMPInstr::MDIsSignedBranch(void) const {
unsigned short opcode = this->GetIDAOpcode();
- return ((NN_jg == opcode) || (NN_jge == opcode) || (NN_jl == opcode) || (NN_jle == opcode)
- || (NN_jng == opcode) || (NN_jnge == opcode) || (NN_jnl == opcode) || (NN_jnle == opcode)
- || (NN_js == opcode) || (NN_jns == opcode));
+ return ((STARS_NN_jg == opcode) || (STARS_NN_jge == opcode) || (STARS_NN_jl == opcode) || (STARS_NN_jle == opcode)
+ || (STARS_NN_jng == opcode) || (STARS_NN_jnge == opcode) || (STARS_NN_jnl == opcode) || (STARS_NN_jnle == opcode)
+ || (STARS_NN_js == opcode) || (STARS_NN_jns == opcode));
}
// MACHINE DEPENDENT: Is instruction a boolean set based on an unsigned condition?
bool SMPInstr::MDIsUnsignedSetValue(void) const {
unsigned short opcode = this->GetIDAOpcode();
- return ((NN_seta == opcode) || (NN_setae == opcode) || (NN_setb == opcode) || (NN_setbe == opcode)
- || (NN_setna == opcode) || (NN_setnae == opcode) || (NN_setnb == opcode) || (NN_setnbe == opcode));
+ return ((STARS_NN_seta == opcode) || (STARS_NN_setae == opcode) || (STARS_NN_setb == opcode) || (STARS_NN_setbe == opcode)
+ || (STARS_NN_setna == opcode) || (STARS_NN_setnae == opcode) || (STARS_NN_setnb == opcode) || (STARS_NN_setnbe == opcode));
}
// MACHINE DEPENDENT: Is instruction a boolean set based on a signed condition?
bool SMPInstr::MDIsSignedSetValue(void) const {
unsigned short opcode = this->GetIDAOpcode();
- return ((NN_setg == opcode) || (NN_setge == opcode) || (NN_setl == opcode) || (NN_setle == opcode)
- || (NN_setng == opcode) || (NN_setnge == opcode) || (NN_setnl == opcode) || (NN_setnle == opcode)
- || (NN_sets == opcode) || (NN_setns == opcode));
+ return ((STARS_NN_setg == opcode) || (STARS_NN_setge == opcode) || (STARS_NN_setl == opcode) || (STARS_NN_setle == opcode)
+ || (STARS_NN_setng == opcode) || (STARS_NN_setnge == opcode) || (STARS_NN_setnl == opcode) || (STARS_NN_setnle == opcode)
+ || (STARS_NN_sets == opcode) || (STARS_NN_setns == opcode));
}
// MACHINE DEPENDENT: Is instruction a boolean set based on any condition?
bool SMPInstr::MDIsAnySetValue(void) const {
unsigned short opcode = this->GetIDAOpcode();
- return ((NN_seta <= opcode) && (NN_setz >= opcode));
+ return ((STARS_NN_seta <= opcode) && (STARS_NN_setz >= opcode));
}
// MACHINE DEPENDENT: Is instruction a left shift instruction?
bool SMPInstr::MDIsLeftShift(void) const {
unsigned short opcode = this->GetIDAOpcode();
- return ((NN_sal == opcode) || (NN_shl == opcode));
+ return ((STARS_NN_sal == opcode) || (STARS_NN_shl == opcode));
}
// MACHINE DEPENDENT: Is instruction a right shift instruction?
bool SMPInstr::MDIsRightShift(void) const {
unsigned short opcode = this->GetIDAOpcode();
- return ((NN_sar == opcode) || (NN_shr == opcode));
+ return ((STARS_NN_sar == opcode) || (STARS_NN_shr == opcode));
}
// Is kind of shift or rotate that is used in hash functions
@@ -3465,11 +3471,11 @@ bool SMPInstr::MDIsHashingArithmetic(void) const {
bool FoundHashShift = false;
unsigned short opcode = this->GetIDAOpcode();
// We are looking for shifts in the leftward direction, or rotates in either directon.
- bool IsRotate = ((opcode == NN_ror) || (opcode == NN_rcr) || (opcode == NN_rcl) || (opcode == NN_rol));
+ bool IsRotate = ((opcode == STARS_NN_ror) || (opcode == STARS_NN_rcr) || (opcode == STARS_NN_rcl) || (opcode == STARS_NN_rol));
if (IsRotate) {
FoundHashShift = true;
}
- else if ((opcode == NN_shl) || (opcode == NN_shld)) {
+ else if ((opcode == STARS_NN_shl) || (opcode == STARS_NN_shld)) {
SMPRegTransfer *CurrRT = this->RTL.GetRT(0);
assert(CurrRT->HasRightSubTree());
do { // double-shift is a deeply nested RTL tree
@@ -3493,7 +3499,7 @@ bool SMPInstr::MDIsHashingArithmetic(void) const {
bool SMPInstr::MDIsCompareToPositiveConstant(STARSOpndTypePtr &NonConstOperand, STARS_uval_t &ConstValue) const {
bool CompareToConst = false;
- if (NN_cmp == this->GetIDAOpcode()) {
+ if (STARS_NN_cmp == this->GetIDAOpcode()) {
SMPRegTransfer *CurrRT = this->RTL.GetRT(0);
assert(CurrRT->HasRightSubTree());
CurrRT = CurrRT->GetRightTree();
@@ -3517,7 +3523,7 @@ bool SMPInstr::MDIsCompareToPositiveConstant(STARSOpndTypePtr &NonConstOperand,
// Opcode is compare or test
bool SMPInstr::MDIsCompareOrTest(void) const {
- return ((NN_cmp == this->GetIDAOpcode()) || (NN_test == this->GetIDAOpcode()));
+ return ((STARS_NN_cmp == this->GetIDAOpcode()) || (STARS_NN_test == this->GetIDAOpcode()));
} // end of SMPInstr::MDIsCompareOrTest()
bool SMPInstr::IsSubtractionOfConstant(STARSOpndTypePtr &NonConstOperand, STARS_uval_t &ConstValue) const {
@@ -3596,8 +3602,8 @@ bool SMPInstr::MDUsesCalleeSavedReg(void) {
set<DefOrUse, LessDefUse>::iterator CurrUse;
for (CurrUse = this->GetFirstUse(); CurrUse != this->GetLastUse(); ++CurrUse) {
STARSOpndTypePtr CurrOp = CurrUse->GetOp();
- if (CurrOp->MatchesReg(MD_FRAME_POINTER_REG) || CurrOp->MatchesReg(R_si)
- || CurrOp->MatchesReg(R_di) || CurrOp->MatchesReg(R_bx)) {
+ if (CurrOp->MatchesReg(MD_FRAME_POINTER_REG) || CurrOp->MatchesReg(STARS_x86_R_si)
+ || CurrOp->MatchesReg(STARS_x86_R_di) || CurrOp->MatchesReg(STARS_x86_R_bx)) {
return true;
}
}
@@ -3614,7 +3620,7 @@ bool SMPInstr::MDIsStackPointerCopy(bool UseFP) {
if (((this->OptType == 3) || this->MDIsLoadEffectiveAddressInstr())
&& this->IsAnalyzeable()
&& (this->GetFirstDef()->GetOp()->IsRegOp())
- && (!(this->GetFirstDef()->GetOp()->MatchesReg(R_sp)))
+ && (!(this->GetFirstDef()->GetOp()->MatchesReg(STARS_x86_R_sp)))
&& (!(this->HasSourceMemoryOperand()))) { // reg to reg move
set<DefOrUse, LessDefUse>::iterator UseIter = this->GetFirstUse();
if (UseIter == this->GetLastUse()) {
@@ -3662,7 +3668,7 @@ bool SMPInstr::HasAllocaRTL(void) {
// register (whichever was restored), leave StackDelta alone for later computation
// based on reaching definitions, and return true.
// For most instructions, no save or restore of a stack pointer, so return false.
-bool SMPInstr::MDIsStackPtrSaveOrRestore(bool UseFP, sval_t FPDelta, bool &Save, sval_t &StackDelta, STARSOpndTypePtr &CopyOp, bool &Error) {
+bool SMPInstr::MDIsStackPtrSaveOrRestore(bool UseFP, STARS_sval_t FPDelta, bool &Save, STARS_sval_t &StackDelta, STARSOpndTypePtr &CopyOp, bool &Error) {
bool StackPointerSaveOrRestore;
std::size_t RTLCount = this->RTL.GetCount();
std::size_t RTLIndex;
@@ -3672,7 +3678,7 @@ bool SMPInstr::MDIsStackPtrSaveOrRestore(bool UseFP, sval_t FPDelta, bool &Save,
STARS_ea_t offset;
SMPoperator CurrOper;
bool LookUpStackDelta; // Get stack delta from reaching defs for TempOp
- sval_t DeltaAdjust; // add to StackDelta after computing from reaching defs, e.g. lea esp,[ecx-4] get TempOp of ecx
+ STARS_sval_t DeltaAdjust; // add to StackDelta after computing from reaching defs, e.g. lea esp,[ecx-4] get TempOp of ecx
// and DeltaAdjust of -4
Error = false;
@@ -3794,13 +3800,13 @@ bool SMPInstr::MDIsStackPtrSaveOrRestore(bool UseFP, sval_t FPDelta, bool &Save,
}
else {
TempOp = RightLeftOp;
- DeltaAdjust = (sval_t) RightRightOp->GetImmedValue();
+ DeltaAdjust = (STARS_sval_t) RightRightOp->GetImmedValue();
if (DeltaAdjust > STARS_ESP_ADDITION_OVERFLOW_THRESHOLD) {
// Really a subtraction via addition of a negative,
// or addition via subtraction of a negative.
// E.g. add esp, 0xfffffff0 is sub esp,16 and sub esp,0xfffffff0 is add esp,16
int32_t TempDelta = (int32_t) (DeltaAdjust & 0xffffffff);
- DeltaAdjust = (sval_t) TempDelta;
+ DeltaAdjust = (STARS_sval_t) TempDelta;
}
if (SMP_SUBTRACT == CurrOper) {
// Negate the stack delta adjustment, e.g. lea esp,[ecx-4] needs DeltaAdjust of -4, not 4.
@@ -3859,7 +3865,7 @@ bool SMPInstr::MDIsStackPtrSaveOrRestore(bool UseFP, sval_t FPDelta, bool &Save,
else {
MDExtractAddressFields(TempOp, BaseReg, IndexReg, Scale, offset);
CopyReg = BaseReg;
- bool IndexedAccess = ((R_none != BaseReg) && (R_none != IndexReg));
+ bool IndexedAccess = ((STARS_x86_R_none != BaseReg) && (STARS_x86_R_none != IndexReg));
if (IndexedAccess) {
StackPointerSaveOrRestore = false; // Cannot analyze indexed accesses into the stack
}
@@ -3869,7 +3875,7 @@ bool SMPInstr::MDIsStackPtrSaveOrRestore(bool UseFP, sval_t FPDelta, bool &Save,
else {
// memory expr that is not stack or frame pointer
NonStackMemAccess = true; // something like [ecx] might actually turn out to be stack access
- DeltaAdjust = (sval_t) TempOp->GetAddr(); // get normalized delta from addr field
+ DeltaAdjust = (STARS_sval_t) TempOp->GetAddr(); // get normalized delta from addr field
}
}
@@ -3897,7 +3903,7 @@ bool SMPInstr::MDIsStackPtrSaveOrRestore(bool UseFP, sval_t FPDelta, bool &Save,
// frame pointer. We need to look up the normalized stack address [esp+StackDelta]
// in the StackPtrCopySet just like we did for ECX before we conclude that a
// stack pointer save or restore is happening.
- FindOp = this->STARSInstPtr->MakeMemDisplacementOpnd(MD_STACK_POINTER_REG, R_none, 0, (STARS_ea_t) StackDelta);
+ FindOp = this->STARSInstPtr->MakeMemDisplacementOpnd(MD_STACK_POINTER_REG, STARS_x86_R_none, 0, (STARS_ea_t) StackDelta);
if (this->GetBlock()->GetFunc()->IsInStackPtrCopySet(FindOp)) {
// Screened out time wasters that are not in copy set; now,
// look up reaching defs.
@@ -3941,7 +3947,7 @@ bool SMPInstr::MDIsStackPtrSaveOrRestore(bool UseFP, sval_t FPDelta, bool &Save,
} // end of SMPInstr::MDIsStackPtrSaveOrRestore()
// Make list of regs and their stack offsets in RTLs for any push instruction
-bool SMPInstr::GetPushedRegsList(map<uint32_t, sval_t> &PushedRegs) {
+bool SMPInstr::GetPushedRegsList(map<uint32_t, STARS_sval_t> &PushedRegs) {
std::size_t RTLCount = this->RTL.GetCount();
std::size_t RTLIndex;
STARSOpndTypePtr LeftOp = nullptr, RightOp = nullptr;
@@ -3960,12 +3966,12 @@ bool SMPInstr::GetPushedRegsList(map<uint32_t, sval_t> &PushedRegs) {
if (RightOp->IsRegOp()) {
MDExtractAddressFields(LeftOp, BaseReg, IndexReg, Scale, offset);
// Exclude indexed stack writes.
- if (R_none == IndexReg) {
- sval_t ESPOffset = (sval_t) offset;
- map<uint32_t, sval_t>::iterator FindIter = PushedRegs.find((uint32_t) RightOp->GetReg());
+ if (STARS_x86_R_none == IndexReg) {
+ STARS_sval_t ESPOffset = (STARS_sval_t) offset;
+ map<uint32_t, STARS_sval_t>::iterator FindIter = PushedRegs.find((uint32_t) RightOp->GetReg());
if (FindIter == PushedRegs.end()) { // Not already pushed earlier
- pair<uint32_t, sval_t> TempPair((uint32_t) RightOp->GetReg(), ESPOffset);
- pair<map<uint32_t, sval_t>::iterator, bool> InsertResult;
+ pair<uint32_t, STARS_sval_t> TempPair((uint32_t) RightOp->GetReg(), ESPOffset);
+ pair<map<uint32_t, STARS_sval_t>::iterator, bool> InsertResult;
InsertResult = PushedRegs.insert(TempPair);
assert(InsertResult.second);
}
@@ -3978,7 +3984,7 @@ bool SMPInstr::GetPushedRegsList(map<uint32_t, sval_t> &PushedRegs) {
} // end of SMPInstr::GetPushedRegsList()
// Make list of regs and their stack offsets in RTLs for any pop instruction
-bool SMPInstr::GetPoppedRegsList(bool FirstReturnBlock, map<uint32_t, sval_t> &PoppedRegs) {
+bool SMPInstr::GetPoppedRegsList(bool FirstReturnBlock, map<uint32_t, STARS_sval_t> &PoppedRegs) {
std::size_t RTLCount = this->RTL.GetCount();
std::size_t RTLIndex;
std::size_t IncomingSize = PoppedRegs.size(); // from return blocks already processed
@@ -3999,13 +4005,13 @@ bool SMPInstr::GetPoppedRegsList(bool FirstReturnBlock, map<uint32_t, sval_t> &P
if (MDIsStackAccessOpnd(RightOp, false)) {
MDExtractAddressFields(RightOp, BaseReg, IndexReg, Scale, offset);
// Exclude indexed stack reads.
- if (R_none == IndexReg) {
- sval_t ESPOffset = (sval_t) offset;
- map<uint32_t, sval_t>::iterator FindIter = PoppedRegs.find((uint32_t) LeftOp->GetReg());
+ if (STARS_x86_R_none == IndexReg) {
+ STARS_sval_t ESPOffset = (STARS_sval_t) offset;
+ map<uint32_t, STARS_sval_t>::iterator FindIter = PoppedRegs.find((uint32_t) LeftOp->GetReg());
if (FindIter == PoppedRegs.end()) { // Not already popped in another block
if (FirstReturnBlock) {
- pair<uint32_t, sval_t> TempPair((uint32_t) LeftOp->GetReg(), ESPOffset);
- pair<map<uint32_t, sval_t>::iterator, bool> InsertResult;
+ pair<uint32_t, STARS_sval_t> TempPair((uint32_t) LeftOp->GetReg(), ESPOffset);
+ pair<map<uint32_t, STARS_sval_t>::iterator, bool> InsertResult;
InsertResult = PoppedRegs.insert(TempPair);
assert(InsertResult.second);
}
@@ -4050,7 +4056,7 @@ bool SMPInstr::MDFindMallocCall(STARSOpndTypePtr TargetOp) {
#if SMP_VERBOSE_FIND_POINTERS
SMP_msg("Found call to malloc at %x\n", this->GetAddr());
#endif
- STARSOpndTypePtr SearchOp = this->STARSInstPtr->MakeRegOpnd(R_ax);
+ STARSOpndTypePtr SearchOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_ax);
set<DefOrUse, LessDefUse>::iterator EAXDEF;
EAXDEF = this->SetDefType(SearchOp, HEAPPTR);
int SSANum = EAXDEF->GetSSANum();
@@ -4165,15 +4171,15 @@ void SMPInstr::Analyze(void) {
if (!(this->FillCmd()))
return;
- unsigned short opcode = this->GetIDAOpcode();
+ uint16_t opcode = this->GetIDAOpcode();
// Record what type of instruction this is, simplified for the needs
// of data flow and type analysis.
this->type = DFACategory[opcode];
// Record optimization category.
- this->OptType = OptCategory[opcode];
+ this->OptType = global_STARS_program->GetOptCategory(opcode);
- if ((NN_int == opcode) || (NN_into == opcode) || (NN_int3 == opcode)) {
+ if ((STARS_NN_int == opcode) || (STARS_NN_into == opcode) || (STARS_NN_int3 == opcode)) {
this->SetInterrupt();
}
else {
@@ -4184,12 +4190,12 @@ void SMPInstr::Analyze(void) {
this->MDFixupIDAProOperandList();
// See if instruction is an ASM idiom for clearing a register.
- if ((NN_xor == opcode) || (NN_lea == opcode)) {
+ if ((STARS_NN_xor == opcode) || (STARS_NN_lea == opcode)) {
uint16_t FirstReg;
if (this->STARSInstPtr->IsRegOpnd(0)) {
FirstReg = this->STARSInstPtr->GetOpnd(0)->GetReg();
STARSOpndTypePtr SecondOpnd = this->STARSInstPtr->GetOpnd(1);
- if (NN_xor == opcode) {
+ if (STARS_NN_xor == opcode) {
// Check for xor of reg with itself
if (SecondOpnd->MatchesReg(FirstReg)) {
this->SetRegClearIdiom();
@@ -4202,7 +4208,7 @@ void SMPInstr::Analyze(void) {
uint16_t ScaleFactor;
STARS_ea_t Offset;
MDExtractAddressFields(SecondOpnd, BaseReg, IndexReg, ScaleFactor, Offset);
- if ((R_none == BaseReg) && (R_none == IndexReg) && (0 == Offset)) {
+ if ((STARS_x86_R_none == BaseReg) && (STARS_x86_R_none == IndexReg) && (0 == Offset)) {
this->SetRegClearIdiom();
}
}
@@ -4258,8 +4264,7 @@ void SMPInstr::Analyze(void) {
else if (this->GetDataFlowType() == CALL) {
set<DefOrUse, LessDefUse>::iterator CurrUse;
for (CurrUse = this->GetFirstUse(); CurrUse != this->GetLastUse(); ++CurrUse) {
- optype_t OpType = CurrUse->GetOp()->GetOpType();
- if ((OpType == o_near) || (OpType == o_far)) {
+ if (CurrUse->GetOp()->IsNearPointer() || CurrUse->GetOp()->IsFarPointer()) {
this->CallTarget = CurrUse->GetOp()->GetAddr();
}
}
@@ -4281,9 +4286,9 @@ void SMPInstr::AnalyzeMarker(void) {
// Record what type of instruction this is, simplified for the needs
// of data flow and type analysis.
- this->type = DFACategory[NN_fnop];
+ this->type = DFACategory[this->GetIDAOpcode()];
// Record optimization category.
- this->OptType = OptCategory[NN_fnop];
+ this->OptType = global_STARS_program->GetOptCategory(this->GetIDAOpcode());
return;
} // end of SMPInstr::AnalyzeMarker()
@@ -4320,9 +4325,9 @@ void SMPInstr::AnalyzeCallInst(STARS_ea_t FirstFuncAddr, STARS_ea_t LastFuncAddr
return;
} // end of SMPInstr::AnalyzeCallInst()
-sval_t SMPInstr::AnalyzeStackPointerDelta(sval_t IncomingDelta, sval_t PreAllocDelta) {
- unsigned short InstType = this->GetIDAOpcode();
- sval_t InstDelta = StackAlteration[InstType];
+STARS_sval_t SMPInstr::AnalyzeStackPointerDelta(STARS_sval_t IncomingDelta, STARS_sval_t PreAllocDelta) {
+ uint16_t InstType = this->GetIDAOpcode();
+ STARS_sval_t InstDelta = global_STARS_program->GetStackAlteration(InstType);
SMPitype FlowType = this->GetDataFlowType();
bool TailCall = this->IsTailCall();
@@ -4371,7 +4376,7 @@ sval_t SMPInstr::AnalyzeStackPointerDelta(sval_t IncomingDelta, sval_t PreAllocD
}
else { // We have a call target
SMPFunction *CalleeFunc = this->GetBlock()->GetFunc()->GetProg()->FindFunction(CalledFuncAddr);
- sval_t AdjustmentDelta;
+ STARS_sval_t AdjustmentDelta;
if (CalleeFunc) {
if (!CalleeFunc->HasSTARSStackPtrAnalysisCompleted()) {
// Phase ordering issue in the call graph. A mutually recursive clique of functions has to
@@ -4443,9 +4448,9 @@ sval_t SMPInstr::AnalyzeStackPointerDelta(sval_t IncomingDelta, sval_t PreAllocD
// Total the stack adjustment bytes, as happens after a call to a function that leaves
// outgoing args on the stack or swallows incoming args from the stack.
-sval_t SMPInstr::FindStackAdjustment(void) {
- unsigned short InstType = this->GetIDAOpcode();
- sval_t InstDelta = StackAlteration[InstType];
+STARS_sval_t SMPInstr::FindStackAdjustment(void) {
+ uint16_t InstType = this->GetIDAOpcode();
+ STARS_sval_t InstDelta = global_STARS_program->GetStackAlteration(InstType);
if (1 == InstDelta) {
// value of 1 is trigger to investigate the RTL for the
@@ -4471,7 +4476,7 @@ sval_t SMPInstr::FindStackAdjustment(void) {
// FPDelta holds the stack delta (normalized) for the frame pointer.
// DefOp comes in with the operand to be normalized, and contains the normalized operand upon return.
// Return true if operand is a register or stack location, false otherwise (true => include in data flow analysis sets and SSA.)
-bool SMPInstr::MDComputeNormalizedDataFlowOp(bool UseFP, sval_t FPDelta, STARSOpndTypePtr &DefOp) {
+bool SMPInstr::MDComputeNormalizedDataFlowOp(bool UseFP, STARS_sval_t FPDelta, STARSOpndTypePtr &DefOp) {
if (nullptr == DefOp)
return false;
@@ -4481,7 +4486,7 @@ bool SMPInstr::MDComputeNormalizedDataFlowOp(bool UseFP, sval_t FPDelta, STARSOp
else if (MDIsStackAccessOpnd(DefOp, UseFP)) {
STARSOpndTypePtr OldOp = DefOp->clone();
int SignedOffset = (int) DefOp->GetAddr();
- sval_t NormalizedDelta = 0;
+ STARS_sval_t NormalizedDelta = 0;
if (DefOp->HasSIBByte()) {
// We must deal with a potentially indexed memory expression. We want to
@@ -4494,15 +4499,15 @@ bool SMPInstr::MDComputeNormalizedDataFlowOp(bool UseFP, sval_t FPDelta, STARSOp
int BaseReg = MD_STARS_sib_base(DefOp);
int IndexReg = (int) MD_STARS_sib_index(DefOp);
if (X86_STACK_POINTER_REG == IndexReg) // signifies no index register
- IndexReg = R_none;
+ IndexReg = STARS_x86_R_none;
if (BaseReg == X86_STACK_POINTER_REG) {
// We probably have an indexed ESP-relative operand.
// We leave the sib byte alone and normalize the offset.
- NormalizedDelta = this->GetStackPtrOffset() + (sval_t) SignedOffset;
+ NormalizedDelta = this->GetStackPtrOffset() + (STARS_sval_t) SignedOffset;
}
else {
// Must be EBP-relative.
- NormalizedDelta = FPDelta + (sval_t) SignedOffset;
+ NormalizedDelta = FPDelta + (STARS_sval_t) SignedOffset;
// Unfortunately, when we are dealing with a SIB byte in the opcode, we cannot
// just say DefOp.reg = MD_STACK_POINTER_REG to convert from the frame pointer
// to the stack pointer. Instead, we have to get into the nasty machine code
@@ -4545,7 +4550,7 @@ bool SMPInstr::MDComputeNormalizedDataFlowOp(bool UseFP, sval_t FPDelta, STARSOp
// argument. If SignedOffset is -12, we have [ebp-12] as DefOp, and this is [esp-16] when
// normalized to the entry point value of the stack pointer. In both cases, we can see that the
// normalized stack delta is just FPDelta+SignedOffset.
- NormalizedDelta = FPDelta + (sval_t) SignedOffset;
+ NormalizedDelta = FPDelta + (STARS_sval_t) SignedOffset;
// Now, we simply convert the memory operand from EBP to ESP and replace the SignedOffset with the
// NormalizedDelta just computed.
DefOp->SetReg(MD_STACK_POINTER_REG);
@@ -4558,7 +4563,7 @@ bool SMPInstr::MDComputeNormalizedDataFlowOp(bool UseFP, sval_t FPDelta, STARSOp
// We only need to adjust the offset to reflect the change in the stack pointer since the function
// was entered, e.g. [esp+4] is normalized to [esp-28] if the current esp value is 32 less than it
// was upon function entry. We get the value "-32" in that case from a member variable.
- NormalizedDelta = this->GetStackPtrOffset() + (sval_t) SignedOffset;
+ NormalizedDelta = this->GetStackPtrOffset() + (STARS_sval_t) SignedOffset;
}
DefOp->SetAddr((uintptr_t) NormalizedDelta); // common to frame and stack pointer cases
this->GetBlock()->GetFunc()->UpdateMaxDirectStackAccessOffset(NormalizedDelta); // maintain record of maximum
@@ -4590,7 +4595,7 @@ bool SMPInstr::MDComputeNormalizedDataFlowOp(bool UseFP, sval_t FPDelta, STARSOp
// Normalize stack operands in all DEFs and USEs to have stack deltas relative to the function entry stack pointer.
// Return true if any stack DEFs or USEs were normalized.
-bool SMPInstr::MDNormalizeStackOps(bool UseFP, sval_t FPDelta, bool Recomputing, sval_t DeltaIncrement) {
+bool SMPInstr::MDNormalizeStackOps(bool UseFP, STARS_sval_t FPDelta, bool Recomputing, STARS_sval_t DeltaIncrement) {
if (!this->IsAnalyzeable())
return false;
@@ -4754,7 +4759,7 @@ bool SMPInstr::MDNormalizeStackOps(bool UseFP, sval_t FPDelta, bool Recomputing,
// Renormalize SP-relative stack operands in functions that call alloca() by adding DeltaIncrement to their stack displacements.
// DefOp comes in with the operand to be renormalized, and contains the normalized operand upon return.
// Return true if operand is a register or stack location, false otherwise (true => include in data flow analysis sets and SSA.)
-bool SMPInstr::MDRecomputeNormalizedDataFlowOp(sval_t DeltaIncrement, bool UpdateMaps, STARSOpndTypePtr &DefOp) {
+bool SMPInstr::MDRecomputeNormalizedDataFlowOp(STARS_sval_t DeltaIncrement, bool UpdateMaps, STARSOpndTypePtr &DefOp) {
if (nullptr == DefOp)
return false;
@@ -4771,7 +4776,7 @@ bool SMPInstr::MDRecomputeNormalizedDataFlowOp(sval_t DeltaIncrement, bool Updat
// The remaining cases are simple. The ESP-relative displacement is incremented by
// DeltaIncrement, regardless of the presence of a SIB byte.
int SignedOffset = (int) DefOp->GetAddr();
- sval_t NormalizedDelta = DeltaIncrement + (sval_t) SignedOffset;
+ STARS_sval_t NormalizedDelta = DeltaIncrement + (STARS_sval_t) SignedOffset;
STARSOpndTypePtr OldOp = DefOp->clone();
DefOp->SetAddr((uintptr_t) NormalizedDelta);
@@ -4795,7 +4800,7 @@ bool SMPInstr::MDRecomputeNormalizedDataFlowOp(sval_t DeltaIncrement, bool Updat
// If NormOp is a normalized stack memory operand, unnormalize it.
void SMPInstr::MDGetUnnormalizedOp(STARSOpndTypePtr &NormOp) {
- sval_t SignedOffset;
+ STARS_sval_t SignedOffset;
bool UseFP = this->GetBlock()->GetFunc()->UsesFramePointer();
if (this->AreDefsNormalized() && MDIsStackAccessOpnd(NormOp, UseFP)) {
if (this->HasFPNormalizedToSP()) {
@@ -4808,14 +4813,14 @@ void SMPInstr::MDGetUnnormalizedOp(STARSOpndTypePtr &NormOp) {
else {
NormOp->SetReg(MD_FRAME_POINTER_REG);
}
- SignedOffset = (sval_t) NormOp->GetAddr();
+ SignedOffset = (STARS_sval_t) NormOp->GetAddr();
SignedOffset -= this->GetBlock()->GetFunc()->GetFramePtrStackDelta();
}
else {
// NormOp should remain stack-pointer-relative address, but it
// should be a positive offset from the current stack pointer instead
// of a negative offset from the entry point of the function.
- SignedOffset = (sval_t) NormOp->GetAddr();
+ SignedOffset = (STARS_sval_t) NormOp->GetAddr();
SignedOffset -= this->GetStackPtrOffset();
assert((0 <= SignedOffset) || this->GetBlock()->GetFunc()->DoesStackFrameExtendPastStackTop());
}
@@ -4903,7 +4908,7 @@ void SMPInstr::MDFixupIDAProOperandList(void) {
// We want it to look like:
// Opnd[0] = EAX, both DEF and USE
// Opnd[1] = immediate, just USE
- if (NN_imul == this->GetIDAOpcode()) {
+ if (STARS_NN_imul == this->GetIDAOpcode()) {
STARSOpndTypePtr Opnd2 = this->STARSInstPtr->GetOpnd(2);
if ((!(this->STARSInstPtr->IsDefOpnd(2)))
&& (!(this->STARSInstPtr->IsUseOpnd(2)))) {
@@ -5036,12 +5041,12 @@ void SMPInstr::SetTailCall(void) {
this->GetBlock()->SetReturns(true);
// We want to add the caller-saved registers to the USEs and DEFs lists
- this->MDAddRegDef(R_ax, false);
- this->MDAddRegDef(R_cx, false);
- this->MDAddRegDef(R_dx, false);
- this->MDAddRegUse(R_ax, false);
- this->MDAddRegUse(R_cx, false);
- this->MDAddRegUse(R_dx, false);
+ this->MDAddRegDef(STARS_x86_R_ax, false);
+ this->MDAddRegDef(STARS_x86_R_cx, false);
+ this->MDAddRegDef(STARS_x86_R_dx, false);
+ this->MDAddRegUse(STARS_x86_R_ax, false);
+ this->MDAddRegUse(STARS_x86_R_cx, false);
+ this->MDAddRegUse(STARS_x86_R_dx, false);
} // end of SMPInstr::SetTailCall()
// record original Lea instruction [pseudo-]memory operand.
@@ -5112,8 +5117,8 @@ void SMPInstr::MDFixupDefUseLists(void) {
break;
if (Opnd->IsMemOp()) {
MDExtractAddressFields(Opnd, BaseReg, IndexReg, ScaleFactor, displacement);
- SingleAddressReg = ((0 == displacement) && ((R_none == BaseReg) || (R_none == IndexReg)));
- if (R_none != IndexReg) {
+ SingleAddressReg = ((0 == displacement) && ((STARS_x86_R_none == BaseReg) || (STARS_x86_R_none == IndexReg)));
+ if (STARS_x86_R_none != IndexReg) {
STARSOpndTypePtr IndexOpnd = this->STARSInstPtr->MakeRegOpnd(IndexReg);
if (0 == ScaleFactor)
this->Uses.SetRef(IndexOpnd);
@@ -5122,15 +5127,15 @@ void SMPInstr::MDFixupDefUseLists(void) {
this->Uses.SetRef(IndexOpnd, NUMERIC);
}
}
- if (R_none != BaseReg) {
+ if (STARS_x86_R_none != BaseReg) {
STARSOpndTypePtr BaseOpnd = this->STARSInstPtr->MakeRegOpnd(BaseReg);
RefType = UNINIT;
#if SMP_BASEREG_POINTER_TYPE
- // R_sp and R_bp will get type STACKPTR in SMPInstr::SetImmedTypes().
+ // STARS_x86_R_sp and STARS_x86_R_bp will get type STACKPTR in SMPInstr::SetImmedTypes().
// Other registers used as base registers should get their USEs as
// base registers typed as POINTER, which might get refined later
// to STACKPTR, GLOBALPTR, HEAPPTR, etc.
- // NOTE: the NN_lea opcode is often used without a true base register.
+ // NOTE: the STARS_NN_lea opcode is often used without a true base register.
// E.g. lea eax,[eax+eax+5] is an x86 idiom for eax:=eax*2+5, which
// could not be done in one instruction without using the addressing
// modes of the machine to do the arithmetic. We don't want to set the
@@ -5150,7 +5155,7 @@ void SMPInstr::MDFixupDefUseLists(void) {
}
#endif
this->Uses.SetRef(BaseOpnd, RefType);
- } // end if R_none != BaseReg
+ } // end if STARS_x86_R_none != BaseReg
} // end if (o_phrase or o_displ operand)
} // end for (all operands)
@@ -5182,40 +5187,40 @@ void SMPInstr::MDFixupDefUseLists(void) {
SMP_msg("ERROR: REP and REPNE both present at %lx %s\n", (unsigned long) this->GetAddr(), DisAsmText.GetDisAsm(this->GetAddr()));
if (HasRepPrefix || HasRepnePrefix) {
// All repeating instructions use ECX as the countdown register.
- STARSOpndTypePtr BaseOpnd = this->STARSInstPtr->MakeRegOpnd(R_cx);
+ STARSOpndTypePtr BaseOpnd = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_cx);
BaseOpnd->SetNotVisible();
this->Defs.SetRef(BaseOpnd, NUMERIC);
this->Uses.SetRef(BaseOpnd, NUMERIC);
}
- if ((opcode == NN_cmps) || (opcode == NN_scas) || (opcode == NN_movs) || (opcode == NN_stos)) {
+ if ((opcode == STARS_NN_cmps) || (opcode == STARS_NN_scas) || (opcode == STARS_NN_movs) || (opcode == STARS_NN_stos)) {
// ESI and EDI are USEd and DEFed to point to source and dest strings for CMPS/MOVS.
// Only EDI is involved with SCAS/STOS.
- if ((opcode == NN_cmps) || (opcode == NN_movs)) {
- STARSOpndTypePtr BaseOpnd = this->STARSInstPtr->MakeRegOpnd(R_si);
+ if ((opcode == STARS_NN_cmps) || (opcode == STARS_NN_movs)) {
+ STARSOpndTypePtr BaseOpnd = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_si);
BaseOpnd->SetNotVisible();
this->Defs.SetRef(BaseOpnd, POINTER);
this->Uses.SetRef(BaseOpnd, POINTER);
}
- STARSOpndTypePtr BaseOpnd2 = this->STARSInstPtr->MakeRegOpnd(R_di);
+ STARSOpndTypePtr BaseOpnd2 = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_di);
BaseOpnd2->SetNotVisible();
this->Defs.SetRef(BaseOpnd2, POINTER);
this->Uses.SetRef(BaseOpnd2, POINTER);
}
- else if ((NN_loopw <= opcode) && (NN_loopqne >= opcode)) {
- STARSOpndTypePtr LoopCounterOp = this->STARSInstPtr->MakeRegOpnd(R_cx);
+ else if ((STARS_NN_loopw <= opcode) && (STARS_NN_loopqne >= opcode)) {
+ STARSOpndTypePtr LoopCounterOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_cx);
this->Defs.SetRef(LoopCounterOp, NUMERIC);
this->Uses.SetRef(LoopCounterOp, NUMERIC);
}
// Now, handle special instruction categories that have implicit operands.
- if (NN_cmpxchg == opcode) {
+ if (STARS_NN_cmpxchg == opcode) {
// x86 Compare and Exchange conditionally sets EAX. We must keep data flow analysis
// sound by declaring that EAX is always a DEF.
- this->MDAddRegDef(R_ax, false);
- } // end if NN_cmpxchg
+ this->MDAddRegDef(STARS_x86_R_ax, false);
+ } // end if STARS_NN_cmpxchg
else if ((this->type == CALL) || (this->type == INDIR_CALL) || this->IsTailCall()) {
// We want to add the caller-saved registers to the USEs and DEFs lists
- for (list<uint16_t>::iterator RegIter = GetFirstCallerSavedReg(); RegIter != GetLastCallerSavedReg(); ++RegIter) {
+ for (list<uint16_t>::iterator RegIter = global_STARS_program->GetFirstCallerSavedReg(); RegIter != global_STARS_program->GetLastCallerSavedReg(); ++RegIter) {
uint16_t RegNum = (*RegIter);
this->MDAddRegDef(RegNum, false);
this->MDAddRegUse(RegNum, false);
@@ -5224,27 +5229,27 @@ void SMPInstr::MDFixupDefUseLists(void) {
#if 1
if (this->MDIsInterruptCall()) {
#endif
- this->MDAddRegDef(R_bx, false);
- this->MDAddRegUse(R_bx, false);
- this->MDAddRegDef(R_si, false);
- this->MDAddRegUse(R_si, false);
+ this->MDAddRegDef(STARS_x86_R_bx, false);
+ this->MDAddRegUse(STARS_x86_R_bx, false);
+ this->MDAddRegDef(STARS_x86_R_si, false);
+ this->MDAddRegUse(STARS_x86_R_si, false);
#if 1
}
#endif
}
else if (this->MDIsPopInstr() || this->MDIsPushInstr() || this->MDIsReturnInstr()) {
// IDA does not include the stack pointer in the DEFs or USEs.
- this->MDAddRegDef(R_sp, false);
- this->MDAddRegUse(R_sp, false);
+ this->MDAddRegDef(STARS_x86_R_sp, false);
+ this->MDAddRegUse(STARS_x86_R_sp, false);
if (!this->MDIsReturnInstr()) {
// We always reference [esp+0] or [esp-4 or 8], so add it to the DEF or USE list.
if (this->MDIsPopInstr()) {
- STARSOpndTypePtr StackOp = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0, 0); // [ESP+0]
+ STARSOpndTypePtr StackOp = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0, 0); // [ESP+0]
this->Uses.SetRef(StackOp); // USE
}
else {
- STARSOpndTypePtr StackOp = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0,
- (-((STARS_ea_t) STARS_ISA_Bytewidth))); // [ESP-4] or [ESP-8]
+ STARSOpndTypePtr StackOp = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0,
+ (-((STARS_ea_t) global_STARS_program->GetSTARS_ISA_Bytewidth()))); // [ESP-4] or [ESP-8]
this->Defs.SetRef(StackOp); // DEF
}
}
@@ -5256,13 +5261,13 @@ void SMPInstr::MDFixupDefUseLists(void) {
this->MDAddRegDef(MD_FRAME_POINTER_REG, false);
this->MDAddRegUse(MD_FRAME_POINTER_REG, false);
}
- else if ((opcode == NN_maskmovq) || (opcode == NN_maskmovdqu)) {
- this->MDAddRegUse(R_di, false, POINTER);
+ else if ((opcode == STARS_NN_maskmovq) || (opcode == STARS_NN_maskmovdqu)) {
+ this->MDAddRegUse(STARS_x86_R_di, false, POINTER);
}
else if (8 == this->GetOptType()) {
// This category implicitly writes to EDX:EAX.
- this->MDAddRegDef(R_dx, false);
- this->MDAddRegDef(R_ax, false);
+ this->MDAddRegDef(STARS_x86_R_dx, false);
+ this->MDAddRegDef(STARS_x86_R_ax, false);
} // end else if (8 == GetOptType)
else if (7 == this->GetOptType()) {
// Category 7 instructions sometimes write implicitly to EDX:EAX or DX:AX.
@@ -5280,12 +5285,12 @@ void SMPInstr::MDFixupDefUseLists(void) {
if (nullptr == TempUse) // finished processing operands
break;
if (!TempUse->IsVisible()) { // hidden operand
- if (TempUse->MatchesReg(R_ax)) { // not R_al, so it is not 8 bits
- if ((NN_div == opcode) || (NN_idiv == opcode)) {
- this->MDAddRegUse(R_dx, false);
+ if (TempUse->MatchesReg(STARS_x86_R_ax)) { // not STARS_x86_R_al, so it is not 8 bits
+ if ((STARS_NN_div == opcode) || (STARS_NN_idiv == opcode)) {
+ this->MDAddRegUse(STARS_x86_R_dx, false);
}
- this->MDAddRegDef(R_ax, false);
- this->MDAddRegDef(R_dx, false);
+ this->MDAddRegDef(STARS_x86_R_ax, false);
+ this->MDAddRegDef(STARS_x86_R_dx, false);
}
}
}
@@ -5328,14 +5333,14 @@ void SMPInstr::MDFixupDefUseLists(void) {
// in order to prevent erroneous analyses of dead registers or unused
// metadata.
if ((this->type == RETURN) || this->IsTailCall()) {
- this->MDAddRegUse(R_ax, false);
- this->MDAddRegUse(R_bx, false);
- this->MDAddRegUse(R_cx, false);
- this->MDAddRegUse(R_dx, false);
+ this->MDAddRegUse(STARS_x86_R_ax, false);
+ this->MDAddRegUse(STARS_x86_R_bx, false);
+ this->MDAddRegUse(STARS_x86_R_cx, false);
+ this->MDAddRegUse(STARS_x86_R_dx, false);
if (!UseFP)
this->MDAddRegUse(MD_FRAME_POINTER_REG, false);
- this->MDAddRegUse(R_si, false);
- this->MDAddRegUse(R_di, false);
+ this->MDAddRegUse(STARS_x86_R_si, false);
+ this->MDAddRegUse(STARS_x86_R_di, false);
}
// Next, add the flags register to the DEFs and USEs for those instructions that
@@ -5384,7 +5389,7 @@ void SMPInstr::MDFixupCallDefUseLists(void) {
// be USEs or DEFs. They essentially are untouched by the callee.
set<DefOrUse, LessDefUse>::iterator DefIter, UseIter;
bool CalleeAnalyzed = (CalleeFunc->HasSTARSStackPtrAnalysisCompleted() && CalleeFunc->StackPtrAnalysisSucceeded() && (!CalleeFunc->HasUnresolvedIndirectJumps()) && (!CalleeFunc->HasSharedChunks()));
- for (list<uint16_t>::iterator RegIter = GetFirstCallerSavedReg(); RegIter != GetLastCallerSavedReg(); ++RegIter) {
+ for (list<uint16_t>::iterator RegIter = global_STARS_program->GetFirstCallerSavedReg(); RegIter != global_STARS_program->GetLastCallerSavedReg(); ++RegIter) {
uint16_t RegNum = (*RegIter);
STARSOpndTypePtr SearchOp = this->STARSInstPtr->MakeRegOpnd(RegNum);
bool ErasedDEF = false;
@@ -5447,26 +5452,26 @@ bool SMPInstr::MDFindPointerUse(STARSOpndTypePtr MemOp, bool UseFP) {
if (this->MDIsLoadEffectiveAddressInstr())
return false; // lea instruction really has no memory operands
- if (NN_fnop == this->GetIDAOpcode())
+ if (STARS_NN_fnop == this->GetIDAOpcode())
return false; // SSA marker instruction
STARSOpndTypePtr BaseOp = nullptr;
STARSOpndTypePtr IndexOp = nullptr;
MDExtractAddressFields(MemOp, BaseReg, IndexReg, ScaleFactor, offset);
- if (R_none != IndexReg) {
+ if (STARS_x86_R_none != IndexReg) {
IndexOp = this->STARSInstPtr->MakeRegOpnd(MDCanonicalizeSubReg((uint16_t) IndexReg));
IndexIter = this->FindUse(IndexOp);
assert(IndexIter != this->GetLastUse());
IndexType = IndexIter->GetType();
}
- if (R_none != BaseReg) {
+ if (STARS_x86_R_none != BaseReg) {
BaseOp = this->STARSInstPtr->MakeRegOpnd(MDCanonicalizeSubReg((uint16_t) BaseReg));
BaseIter = this->FindUse(BaseOp);
assert(BaseIter != this->GetLastUse());
BaseType = BaseIter->GetType();
}
if (MDIsStackPtrReg(BaseReg, UseFP)) {
- if ((R_none != IndexReg) && (!IsNumeric(IndexType))) {
+ if ((STARS_x86_R_none != IndexReg) && (!IsNumeric(IndexType))) {
// We have an indexed access into the stack frame.
// Set IndexReg USE type to NUMERIC.
changed = true;
@@ -5476,7 +5481,7 @@ bool SMPInstr::MDFindPointerUse(STARSOpndTypePtr MemOp, bool UseFP) {
return changed; // stack accesses will get STACKPTR type in SetImmedTypes()
}
if (MDIsStackPtrReg(IndexReg, UseFP)) {
- if ((R_none != BaseReg) && (!IsNumeric(BaseType))) {
+ if ((STARS_x86_R_none != BaseReg) && (!IsNumeric(BaseType))) {
// We have an indexed access into the stack frame.
// Set BaseReg USE type to NUMERIC.
// Note that BaseReg is really an IndexReg and vice versa.
@@ -5489,14 +5494,14 @@ bool SMPInstr::MDFindPointerUse(STARSOpndTypePtr MemOp, bool UseFP) {
return changed; // stack accesses will get STACKPTR type in SetImmedTypes()
}
if (IsImmedGlobalAddress(offset)) {
- if ((R_none != IndexReg) && (!IsNumeric(IndexType))) {
+ if ((STARS_x86_R_none != IndexReg) && (!IsNumeric(IndexType))) {
// We have an indexed access into a global.
// Set IndexReg USE type to NUMERIC.
changed = true;
IndexIter = this->SetUseType(IndexOp, NUMERIC);
assert(IndexIter != this->GetLastUse());
}
- if ((R_none != BaseReg) && (!IsNumeric(BaseType))) {
+ if ((STARS_x86_R_none != BaseReg) && (!IsNumeric(BaseType))) {
// We have an indexed access into a global.
// Set BaseReg USE type to NUMERIC.
// Note that BaseReg is really an index register.
@@ -5512,11 +5517,11 @@ bool SMPInstr::MDFindPointerUse(STARSOpndTypePtr MemOp, bool UseFP) {
// At this point, we must have a base address in a register, not used
// to directly address the stack or a global.
- if ((0 < ScaleFactor) || (R_none == IndexReg)) {
+ if ((0 < ScaleFactor) || (STARS_x86_R_none == IndexReg)) {
// IndexReg is scaled, meaning it is NUMERIC, so BaseReg must
// be a POINTER; or IndexReg is not present, so BaseReg is the
// only possible holder of an address.
- if (R_none != BaseReg) {
+ if (STARS_x86_R_none != BaseReg) {
if (UNINIT == BaseIter->GetType()) {
changed = true;
BaseIter = this->SetUseType(BaseOp, POINTER);
@@ -5524,10 +5529,10 @@ bool SMPInstr::MDFindPointerUse(STARSOpndTypePtr MemOp, bool UseFP) {
}
}
}
- else if (R_none == BaseReg) {
+ else if (STARS_x86_R_none == BaseReg) {
// We have an unscaled IndexReg and no BaseReg and offset was
// not a global offset, so IndexReg must be a POINTER.
- if (R_none != IndexReg) {
+ if (STARS_x86_R_none != IndexReg) {
if (UNINIT == IndexType) {
changed = true;
IndexIter = this->SetUseType(IndexOp, POINTER);
@@ -6501,15 +6506,15 @@ bool SMPInstr::IsOpSourceByteSwap(STARSOpndTypePtr UseOp, int UseSSANum, STARS_e
// used as a helper for IsSubRegUsedAsShiftCount().
bool SMPInstr::MDIsShiftOrRotate(void) const {
unsigned short opcode = this->GetIDAOpcode();
- return (((NN_rcl <= opcode) && (NN_ror >= opcode))
- || ((NN_sal <= opcode) && (NN_shr >= opcode))
- || (NN_shld == opcode) || (NN_shrd == opcode));
+ return (((STARS_NN_rcl <= opcode) && (STARS_NN_ror >= opcode))
+ || ((STARS_NN_sal <= opcode) && (STARS_NN_shr >= opcode))
+ || (STARS_NN_shld == opcode) || (STARS_NN_shrd == opcode));
} // end of SMPInstr::MDIsShiftOrRotate()
// Is opcode a shift to the right?
bool SMPInstr::MDIsShiftRight(void) const {
unsigned short opcode = this->GetIDAOpcode();
- return ((NN_sar == opcode) || (NN_shr == opcode));
+ return ((STARS_NN_sar == opcode) || (STARS_NN_shr == opcode));
}
// Does the shift or rotate RTL move the upper HalfBitWidth bits
@@ -6552,7 +6557,7 @@ bool SMPInstr::ShiftMakesUpperBitsLower(std::size_t HalfBitWidth, bool MustBeHal
#if 0
// Find SearchDelta in StackDeltaSet, inserting it if not found. Return whether it was initially found.
-bool SMPInstr::FindStackPtrDelta(sval_t SearchDelta) const {
+bool SMPInstr::FindStackPtrDelta(STARS_sval_t SearchDelta) const {
bool found = (this->StackDeltaSet.find(SearchDelta) != this->StackDeltaSet.end());
if (!found) {
this->StackDeltaSet.insert(SearchDelta);
@@ -6708,10 +6713,10 @@ void SMPInstr::MDFindLoadFromStack(bool UseFP) {
// True if sign or zero-extended; pass out mask bits if true.
bool SMPInstr::MDIsSignedLoad(unsigned short &SignMask) {
unsigned short opcode = this->GetIDAOpcode();
- if (NN_movzx == opcode) {
+ if (STARS_NN_movzx == opcode) {
SignMask = FG_MASK_UNSIGNED;
}
- else if (NN_movsx == opcode) {
+ else if (STARS_NN_movsx == opcode) {
SignMask = FG_MASK_SIGNED;
}
else {
@@ -6724,10 +6729,10 @@ bool SMPInstr::MDIsSignedLoad(unsigned short &SignMask) {
#define STARS_SMALL_POS_VALUE_LIMIT 255
bool SMPInstr::MDIsSmallPositiveAddition(void) {
unsigned short opcode = this->GetIDAOpcode();
- bool found = (NN_inc == opcode);
+ bool found = (STARS_NN_inc == opcode);
STARS_uval_t ImmVal;
- if (!found && ((NN_add == opcode) || (NN_adc == opcode))) {
+ if (!found && ((STARS_NN_add == opcode) || (STARS_NN_adc == opcode))) {
set<DefOrUse, LessDefUse>::iterator UseIter;
for (UseIter = this->GetFirstUse(); UseIter != this->GetLastUse(); ++UseIter) {
STARSOpndTypePtr UseOp = UseIter->GetOp();
@@ -6764,9 +6769,9 @@ bool SMPInstr::MDIsSmallPositiveAddition(void) {
// true if increment, decrement, or addition or subtraction of small immediate value
bool SMPInstr::MDIsSmallAdditionOrSubtraction(void) {
unsigned short opcode = this->GetIDAOpcode();
- bool found = ((NN_inc == opcode) || (NN_dec == opcode));
+ bool found = ((STARS_NN_inc == opcode) || (STARS_NN_dec == opcode));
- if ((NN_add == opcode) || (NN_adc == opcode) || (NN_sub == opcode) || (NN_sbb == opcode)) {
+ if ((STARS_NN_add == opcode) || (STARS_NN_adc == opcode) || (STARS_NN_sub == opcode) || (STARS_NN_sbb == opcode)) {
set<DefOrUse, LessDefUse>::iterator UseIter;
for (UseIter = this->GetFirstUse(); !found && (UseIter != this->GetLastUse()); ++UseIter) {
STARSOpndTypePtr UseOp = UseIter->GetOp();
@@ -6822,8 +6827,8 @@ bool SMPInstr::IsCounterOperation(void) {
// Inst does an AND, OR, XOR operation; does not do add, subtract, etc.
bool SMPInstr::MDIsNonOverflowingBitManipulation(void) const {
unsigned short opcode = this->GetIDAOpcode();
- return ((NN_and == opcode) || (NN_not == opcode) || (NN_or == opcode) || (NN_shl == opcode)
- || ((NN_xor == opcode) && !this->IsRegClearIdiom()));
+ return ((STARS_NN_and == opcode) || (STARS_NN_not == opcode) || (STARS_NN_or == opcode) || (STARS_NN_shl == opcode)
+ || ((STARS_NN_xor == opcode) && !this->IsRegClearIdiom()));
} // end of SMPInstr::MDIsNonOverflowingBitManipulation()
// return true if traced USE to a constant value
@@ -7542,7 +7547,7 @@ bool SMPInstr::SkipSignednessCheckOnStackWrite(int DefSSANum, bool SourceIsSigne
bool SMPInstr::MDIsArgumentPass(std::size_t &ArgumentNumber) {
bool OutArgPass = false;
- if (STARS_ISA_Bitwidth == 64) {
+ if (global_STARS_program->GetSTARS_ISA_Bitwidth() == 64) {
// x86-64 passes the first six arguments in registers EDI, ESI, EDX, ECX, R8 and R9, in that order.
set<DefOrUse, LessDefUse>::iterator DefIter = this->GetFirstNonFlagsDef();
if (DefIter != this->GetLastDef()) {
@@ -7550,7 +7555,7 @@ bool SMPInstr::MDIsArgumentPass(std::size_t &ArgumentNumber) {
if (DefOp->IsRegOp()) {
uint16_t RegNum = DefOp->GetReg();
std::size_t ArgIndex = 0;
- for (list<uint16_t>::iterator ArgRegIter = GetFirstArgumentReg(); ArgRegIter != GetLastArgumentReg(); ++ArgRegIter) {
+ for (list<uint16_t>::iterator ArgRegIter = global_STARS_program->GetFirstArgumentReg(); ArgRegIter != global_STARS_program->GetLastArgumentReg(); ++ArgRegIter) {
if (RegNum == (*ArgRegIter)) {
OutArgPass = true;
ArgumentNumber = ArgIndex;
@@ -8067,7 +8072,7 @@ bool SMPInstr::InferTypes(void) {
// and do not need an RTL walk.
SMPitype DFAType = this->GetDataFlowType();
bool CallInst = ((DFAType == CALL) || (DFAType == INDIR_CALL) || this->IsTailCall());
- uint16_t IndirCallReg = R_none;
+ uint16_t IndirCallReg = STARS_x86_R_none;
if (DebugFlag) {
SMP_msg("DFAType: %d CategoryInferenceComplete: %d\n",
DFAType, this->IsCategoryInferenceComplete());
@@ -9788,7 +9793,7 @@ bool SMPInstr::InferOperatorFGInfo(SMPRegTransfer *CurrRT, bool FirstIter, struc
}
if ((RightFG.SignMiscInfo != 0) || (RightFG.SizeInfo != 0))
MapsChanged |= this->UpdateUseOpFGInfo(RightOp, RightFG);
- } // end if (RightOP is o_reg)
+ } // end if (RightOP is reg)
else if (MDIsDirectStackAccessOpnd(RightOp, UseFP)) {
// We used to assume that all FG info transfers from stack locations to
// the target registers of stack loads happened in SMPInstr::MDSetWidthSignInfo(),
@@ -10049,7 +10054,7 @@ bool SMPInstr::IsNumericTrustedSystemCall(void) {
if ((BADADDR != this->CallTarget) && (!this->IsCallUsedAsJump())) {
// We have a resolved call target address, either via direct or indirect call.
string FuncName = this->GetTrimmedCalledFunctionName();
- TrustedCall = IsNumericSafeSystemCall(FuncName);
+ TrustedCall = global_STARS_program->IsNumericSafeSystemCall(FuncName);
}
return TrustedCall;
@@ -10209,53 +10214,53 @@ void SMPInstr::EmitFastReturnStatus(unsigned short FastReturnStatus) {
return;
}
- SMP_fprintf(STARS_CallReturnFile, "%10lx %6d INSTR %s ",
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "%10lx %6d INSTR %s ",
(unsigned long) this->GetAddr(), this->GetSize(), InstrString);
- if (STARS_PerformReducedAnalysis) {
- SMP_fprintf(STARS_CallReturnFile, "NOFASTRETURN REDUCEDANALYSIS");
+ if (global_STARS_program->ShouldSTARSPerformReducedAnalysis()) {
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "NOFASTRETURN REDUCEDANALYSIS");
}
else if (FastReturnStatus == SAFE_FAST_RETURN) {
- SMP_fprintf(STARS_CallReturnFile, "FASTRETURN ");
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "FASTRETURN ");
}
else {
// Iterate through possible reasons and print each reason.
- SMP_fprintf(STARS_CallReturnFile, "NOFASTRETURN ");
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "NOFASTRETURN ");
if (UNSAFE_RETURN_ADDRESS & FastReturnStatus) {
- SMP_fprintf(STARS_CallReturnFile, "RAUNSAFE ");
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "RAUNSAFE ");
}
if (RETURN_ADDRESS_WRITE & FastReturnStatus) {
- SMP_fprintf(STARS_CallReturnFile, "RAWRITE ");
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "RAWRITE ");
}
if (RETURN_ADDRESS_READ & FastReturnStatus) {
- SMP_fprintf(STARS_CallReturnFile, "RAREAD ");
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "RAREAD ");
}
if (INDIRECTLY_CALLED & FastReturnStatus) {
- SMP_fprintf(STARS_CallReturnFile, "INDIRECT ");
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "INDIRECT ");
}
if (NO_CALLERS & FastReturnStatus) {
- SMP_fprintf(STARS_CallReturnFile, "NOCALLERS ");
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "NOCALLERS ");
}
if (TAIL_CALL_TARGET & FastReturnStatus) {
- SMP_fprintf(STARS_CallReturnFile, "TAILCALLED ");
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "TAILCALLED ");
}
if (MAKES_TAIL_CALL & FastReturnStatus) {
- SMP_fprintf(STARS_CallReturnFile, "MAKES_TAIL_CALL ");
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "MAKES_TAIL_CALL ");
}
if (MULTIPLE_ENTRY_POINTS & FastReturnStatus) {
- SMP_fprintf(STARS_CallReturnFile, "MULTIENTRY ");
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "MULTIENTRY ");
}
if (UNRESOLVED_INDIR_JUMP & FastReturnStatus) {
- SMP_fprintf(STARS_CallReturnFile, "INDIRJUMP ");
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "INDIRJUMP ");
}
if (EH_FRAME_ENTRY & FastReturnStatus) {
- SMP_fprintf(STARS_CallReturnFile, "EXCEPTION_HANDLING ");
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "EXCEPTION_HANDLING ");
}
if (RAUNSAFE_CALLEES & FastReturnStatus) {
- SMP_fprintf(STARS_CallReturnFile, "UNSAFE_CALLEES ");
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "UNSAFE_CALLEES ");
}
}
- SMP_fprintf(STARS_CallReturnFile, "ZZ %s \n", disasm);
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "ZZ %s \n", disasm);
return;
} // end of SMPInstr::EmitFastReturnStatus()
@@ -10277,7 +10282,7 @@ void SMPInstr::EmitCallReturnStatus(SMPProgram *CurrProg) {
}
if (NULL == CalleeFunc) {
SMP_msg("ERROR: Cannot find callee function for CALL at %llx \n", (unsigned long long) this->GetAddr());
- SMP_fprintf(STARS_CallReturnFile, "%10lx %6d INSTR CALL RAUNSAFE %s\n",
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "%10lx %6d INSTR CALL RAUNSAFE %s\n",
(unsigned long) this->GetAddr(), this->GetSize(), disasm);
this->EmitFastReturnStatus((unsigned short) NO_CALLERS);
}
@@ -10285,11 +10290,11 @@ void SMPInstr::EmitCallReturnStatus(SMPProgram *CurrProg) {
FuncType RetAddrStatus = CalleeFunc->GetReturnAddressStatus();
unsigned short FastReturnStatus = CalleeFunc->GetFastReturnStatus();
if (FUNC_SAFE != RetAddrStatus) {
- SMP_fprintf(STARS_CallReturnFile, "%10lx %6d INSTR CALL RAUNSAFE %s\n",
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "%10lx %6d INSTR CALL RAUNSAFE %s\n",
(unsigned long) this->GetAddr(), this->GetSize(), disasm);
}
else {
- SMP_fprintf(STARS_CallReturnFile, "%10lx %6d INSTR CALL RASAFE %s\n",
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "%10lx %6d INSTR CALL RASAFE %s\n",
(unsigned long) this->GetAddr(), this->GetSize(), disasm);
}
this->EmitFastReturnStatus(FastReturnStatus);
@@ -10297,8 +10302,8 @@ void SMPInstr::EmitCallReturnStatus(SMPProgram *CurrProg) {
}
else if (INDIR_CALL == FlowType) {
STARS_ea_t CalleeAddr = this->GetCallTarget();
- if ((BADADDR == CalleeAddr) || STARS_PerformReducedAnalysis) {
- SMP_fprintf(STARS_CallReturnFile, "%10lx %6d INSTR INDIRCALL RAUNSAFE UNKNOWNTARGET %s\n",
+ if ((BADADDR == CalleeAddr) || global_STARS_program->ShouldSTARSPerformReducedAnalysis()) {
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "%10lx %6d INSTR INDIRCALL RAUNSAFE UNKNOWNTARGET %s\n",
(unsigned long) this->GetAddr(), this->GetSize(), disasm);
unsigned short DummyReturnStatus = INDIRECTLY_CALLED;
this->EmitFastReturnStatus(DummyReturnStatus);
@@ -10313,7 +10318,7 @@ void SMPInstr::EmitCallReturnStatus(SMPProgram *CurrProg) {
}
if (NULL == CalleeFunc) {
SMP_msg("ERROR: Cannot find callee function for CALL at %llx \n", (unsigned long long) this->GetAddr());
- SMP_fprintf(STARS_CallReturnFile, "%10lx %6d INSTR CALL RAUNSAFE %s\n",
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "%10lx %6d INSTR CALL RAUNSAFE %s\n",
(unsigned long) this->GetAddr(), this->GetSize(), disasm);
this->EmitFastReturnStatus((unsigned short) NO_CALLERS);
}
@@ -10321,11 +10326,11 @@ void SMPInstr::EmitCallReturnStatus(SMPProgram *CurrProg) {
FuncType RetAddrStatus = CalleeFunc->GetReturnAddressStatus();
unsigned short FastReturnStatus = CalleeFunc->GetFastReturnStatus();
if (FUNC_SAFE != RetAddrStatus) {
- SMP_fprintf(STARS_CallReturnFile, "%10lx %6d INSTR INDIRCALL RAUNSAFE %s\n",
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "%10lx %6d INSTR INDIRCALL RAUNSAFE %s\n",
(unsigned long) this->GetAddr(), this->GetSize(), disasm);
}
else {
- SMP_fprintf(STARS_CallReturnFile, "%10lx %6d INSTR INDIRCALL RASAFE %s\n",
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "%10lx %6d INSTR INDIRCALL RASAFE %s\n",
(unsigned long) this->GetAddr(), this->GetSize(), disasm);
}
this->EmitFastReturnStatus(FastReturnStatus);
@@ -10334,11 +10339,11 @@ void SMPInstr::EmitCallReturnStatus(SMPProgram *CurrProg) {
}
else if (RETURN == FlowType) {
if (this->IsCondTailCall()) {
- SMP_fprintf(STARS_CallReturnFile, "%10lx %6d INSTR CALL CONDTAILCALL %s\n",
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "%10lx %6d INSTR CALL CONDTAILCALL %s\n",
(unsigned long) this->GetAddr(), this->GetSize(), disasm);
}
else if (this->IsTailCall()) {
- SMP_fprintf(STARS_CallReturnFile, "%10lx %6d INSTR CALL TAILCALL %s\n",
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "%10lx %6d INSTR CALL TAILCALL %s\n",
(unsigned long) this->GetAddr(), this->GetSize(), disasm);
}
else if (this->MDIsReturnInstr()) {
@@ -10350,11 +10355,11 @@ void SMPInstr::EmitCallReturnStatus(SMPProgram *CurrProg) {
}
if (FUNC_SAFE == RetAddrStatus) {
- SMP_fprintf(STARS_CallReturnFile, "%10lx %6d INSTR RETURN RASAFE %s\n",
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "%10lx %6d INSTR RETURN RASAFE %s\n",
(unsigned long) this->GetAddr(), this->GetSize(), disasm);
}
else {
- SMP_fprintf(STARS_CallReturnFile, "%10lx %6d INSTR RETURN RAUNSAFE %s\n",
+ SMP_fprintf(global_STARS_program->GetCallReturnFile(), "%10lx %6d INSTR RETURN RAUNSAFE %s\n",
(unsigned long) this->GetAddr(), this->GetSize(), disasm);
}
this->EmitFastReturnStatus(FastReturnStatus);
@@ -10390,7 +10395,7 @@ void SMPInstr::EmitAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame, FILE
ProfInfo = this->BasicBlock->GetFunc()->GetProg()->GetProfInfo();
#endif
- ++OptCount[OptType]; // keep count for debugging info
+ global_STARS_program->IncrementOptCount(this->OptType); // keep count for debugging info
#if SMP_ANNOTATE_ALL_MEMORY_OPERANDS
// Emit informational annotations for memory operands.
@@ -10425,18 +10430,18 @@ void SMPInstr::EmitAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame, FILE
if ((BADADDR != this->CallTarget) && (!this->IsCallUsedAsJump())) {
// We have a resolved call target address, either via direct or indirect call.
string FuncName = this->GetTrimmedCalledFunctionName();
- ZST_SysCallType FuncCallType = GetCallTypeFromFuncName(FuncName);
- ZST_Policy FuncCallPolicy = GetPolicyFromCallType(FuncCallType);
+ ZST_SysCallType FuncCallType = global_STARS_program->GetCallTypeFromFuncName(FuncName);
+ ZST_Policy FuncCallPolicy = global_STARS_program->GetPolicyFromCallType(FuncCallType);
if (ZST_DISALLOW == FuncCallPolicy) {
if ((NULL != this->GetBlock()) && (NULL != this->GetBlock()->GetFunc())) {
- SMP_fprintf(ZST_AlarmFile, "ALARM: Call to %s will be disallowed at %lx in %s\n",
+ SMP_fprintf(global_STARS_program->GetAlarmFile(), "ALARM: Call to %s will be disallowed at %lx in %s\n",
FuncName.c_str(), (unsigned long) this->GetAddr(), this->GetBlock()->GetFunc()->GetFuncName());
}
else {
- SMP_fprintf(ZST_AlarmFile, "ALARM: Call to %s will be disallowed at %lx\n",
+ SMP_fprintf(global_STARS_program->GetAlarmFile(), "ALARM: Call to %s will be disallowed at %lx\n",
FuncName.c_str(), (unsigned long) this->GetAddr());
}
- SMP_fprintf(ZST_AlarmFile, "ALARM REASON: Call policy is DISALLOW for all calls of type %s\n", CallTypeNames[FuncCallType]);
+ SMP_fprintf(global_STARS_program->GetAlarmFile(), "ALARM REASON: Call policy is DISALLOW for all calls of type %s\n", CallTypeNames[FuncCallType]);
SMP_fprintf(InfoAnnotFile, "%10lx %6d INSTR SECURITYCALL Disallow 1 1 %s \n",
(unsigned long) addr, this->GetSize(), disasm);
}
@@ -10475,7 +10480,7 @@ void SMPInstr::EmitAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame, FILE
case 1: // nothing for SDT to do
{ SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL %s %s \n",
(unsigned long) addr, -1, OptExplanation[OptType], disasm);
- ++AnnotationCount[OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
break;
}
@@ -10486,7 +10491,7 @@ void SMPInstr::EmitAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame, FILE
}
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL Always1stSrc %s \n",
(unsigned long) addr, -1, disasm);
- ++AnnotationCount[OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
break;
}
@@ -10498,13 +10503,13 @@ void SMPInstr::EmitAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame, FILE
if (SecondSrcOperandImmNum
&& !this->MDIsFrameAllocInstr()
#if SPECIAL_CASE_CARRY_BORROW
- && (this->GetIDAOpcode() != NN_adc)
- && (this->GetIDAOpcode() != NN_sbb)
+ && (this->GetIDAOpcode() != STARS_NN_adc)
+ && (this->GetIDAOpcode() != STARS_NN_sbb)
#endif
) { // treat as category 1
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL %s %s \n",
(unsigned long) addr, -1, OptExplanation[OptType], disasm);
- ++AnnotationCount[OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
}
else {
SDTInstrumentation = true;
@@ -10519,14 +10524,14 @@ void SMPInstr::EmitAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame, FILE
}
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL AlwaysPTR %s \n",
(unsigned long) addr, -OptType, disasm);
- ++AnnotationCount[OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
break;
}
case 8: // Implicitly writes to EDX:EAX, always numeric.
{ SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL n EDX EAX ZZ %s %s \n",
(unsigned long) addr, -2, OptExplanation[OptType], disasm);
- ++AnnotationCount[OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
SDTInstrumentation = true;
break;
}
@@ -10542,14 +10547,14 @@ void SMPInstr::EmitAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame, FILE
}
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL %s %s \n",
(unsigned long) addr, -1, OptExplanation[OptType], disasm);
- ++AnnotationCount[OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
break;
}
case 10: // Implicitly writes to EDX:EAX and ECX, always numeric.
{ SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL n EDX EAX ECX ZZ %s %s \n",
(unsigned long) addr, -2, OptExplanation[OptType], disasm);
- ++AnnotationCount[OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
SDTInstrumentation = true;
break;
}
@@ -10579,7 +10584,7 @@ void SMPInstr::EmitAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame, FILE
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL n %s %s %s \n",
(unsigned long) addr, -2, this->DestString(OptType),
OptExplanation[OptType], disasm);
- ++AnnotationCount[OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
}
break;
}
@@ -10654,8 +10659,8 @@ void SMPInstr::EmitTypeAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame,
bool MemSrc = this->HasSourceMemoryOperand();
bool SecondSrcOperandImmNum = this->IsSecondSrcOperandNumeric(InstrFlags); // assumes 2nd source is imm or not-numeric??
bool NoWarnFlag = false; // NOWARN annotation emitted?
- bool CarryBorrow = ((this->GetIDAOpcode() == NN_adc)
- || (this->GetIDAOpcode() == NN_sbb));
+ bool CarryBorrow = ((this->GetIDAOpcode() == STARS_NN_adc)
+ || (this->GetIDAOpcode() == STARS_NN_sbb));
// Do we have the special case in which a non-NUMERIC comes into
// an add with carry or subtract with borrow and the result
// has been inferred to be NUMERIC?
@@ -10666,7 +10671,7 @@ void SMPInstr::EmitTypeAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame,
ProfInfo = this->BasicBlock->GetFunc()->GetProg()->GetProfInfo();
char *disasm = DisAsmText.GetDisAsm(this->GetAddr());
- ++OptCount[this->OptType]; // keep count for debugging info
+ global_STARS_program->IncrementOptCount(this->OptType); // keep count for debugging info
if (this->IsNop())
TypeGroup = 1; // no-op idioms need their category reset
@@ -10710,12 +10715,12 @@ void SMPInstr::EmitTypeAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame,
if ((BADADDR != this->CallTarget) && (!this->IsCallUsedAsJump())) {
// We have a resolved call target address, either via direct or indirect call.
string FuncName = this->GetTrimmedCalledFunctionName();
- ZST_SysCallType FuncCallType = GetCallTypeFromFuncName(FuncName);
- ZST_Policy FuncCallPolicy = GetPolicyFromCallType(FuncCallType);
+ ZST_SysCallType FuncCallType = global_STARS_program->GetCallTypeFromFuncName(FuncName);
+ ZST_Policy FuncCallPolicy = global_STARS_program->GetPolicyFromCallType(FuncCallType);
if (ZST_DISALLOW == FuncCallPolicy) {
- SMP_fprintf(ZST_AlarmFile, "ALARM: Call to %s will be disallowed at %lx in %s\n",
+ SMP_fprintf(global_STARS_program->GetAlarmFile(), "ALARM: Call to %s will be disallowed at %lx in %s\n",
FuncName.c_str(), (unsigned long) this->GetAddr(), this->GetBlock()->GetFunc()->GetFuncName());
- SMP_fprintf(ZST_AlarmFile, "ALARM REASON: Call policy is DISALLOW for all calls of type %s\n", CallTypeNames[FuncCallType]);
+ SMP_fprintf(global_STARS_program->GetAlarmFile(), "ALARM REASON: Call policy is DISALLOW for all calls of type %s\n", CallTypeNames[FuncCallType]);
SMP_fprintf(InfoAnnotFile, "%10lx %6d INSTR SECURITYCALL Disallow 1 1 %s \n",
(unsigned long) addr, this->GetSize(), disasm);
}
@@ -10729,26 +10734,26 @@ void SMPInstr::EmitTypeAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame,
// We omit this for groups 1 and 14, so that the metadata analysis
// does not get statistical credit for instructions that were already
// getting -1 annotations without analysis.
- // We also cannot skip NN_adc and NN_sbb instructions that change the
+ // We also cannot skip STARS_NN_adc and STARS_NN_sbb instructions that change the
// type of the incoming register.
if ((1 != TypeGroup) && (14 != TypeGroup) && (!this->MDIsInterruptCall())
&& !TypeChange) {
if (UnusedMetadata) {
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL MetadataUnused %s \n",
(unsigned long) addr, -1, disasm);
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
return;
}
else if (DEF_METADATA_REDUNDANT == DefMetadataType) {
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL MetadataRedundant %s \n",
(unsigned long) addr, -1, disasm);
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
return;
}
else if (DEF_METADATA_PROF_REDUNDANT == DefMetadataType) {
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL MetadataRedundant %s \n",
(unsigned long) addr, -257, disasm);
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
// Profiler annotations could be backed off due to false
// positives, in which case we will need stack constant
// annotations.
@@ -10779,7 +10784,7 @@ void SMPInstr::EmitTypeAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame,
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL n %s NumericDEFs %s \n",
(unsigned long) addr, ProfiledDEFs ? -256-2 : -2, this->DestString(this->OptType),
disasm);
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
}
else {
SDTInstrumentation = true;
@@ -10795,7 +10800,7 @@ void SMPInstr::EmitTypeAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame,
}
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL %s %s \n",
(unsigned long) addr, -1, OptExplanation[this->OptType], disasm);
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
break;
case 4: // INC, DEC, etc.: no SDT work unless MemDest
@@ -10806,7 +10811,7 @@ void SMPInstr::EmitTypeAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame,
}
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL Always1stSrc %s \n",
(unsigned long) addr, -1, disasm);
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
break;
case 5: // ADD, etc.: If numeric 2nd src operand, no SDT work.
@@ -10826,7 +10831,7 @@ void SMPInstr::EmitTypeAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame,
// treat as category 1
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL %s %s \n",
(unsigned long) addr, -1, OptExplanation[this->OptType], disasm);
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
}
else if (IsEqType(NUMERIC, this->AddSubSourceType)
&& !this->MDIsFrameAllocInstr()
@@ -10837,15 +10842,15 @@ void SMPInstr::EmitTypeAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame,
) {
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL 2ndSrcNumeric %s \n",
(unsigned long) addr, -1, disasm);
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
}
else if (NumericDEFs) {
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL n %s NumericDEFs %s \n",
(unsigned long) addr, ProfiledDEFs ? -256-2 : -2, this->DestString(this->OptType), disasm);
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
}
#if SMP_OPTIMIZE_ADD_TO_NUMERIC
- else if ((NN_add == this->GetIDAOpcode()) && (!MemSrc)
+ else if ((STARS_NN_add == this->GetIDAOpcode()) && (!MemSrc)
&& IsNumeric(this->AddSubDefUseType)) {
// reg1 := reg1 + reg2, where reg1 comes in as NUMERIC,
// means that reg1 will get DEFed to the type of reg2,
@@ -10854,7 +10859,7 @@ void SMPInstr::EmitTypeAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame,
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL %s := %s ZZ AddToNumeric %s \n",
(unsigned long) addr, -5, MDGetRegName(this->GetDefUseAddSubOp()),
MDGetRegName(this->GetUseOnlyAddSubOp()), disasm);
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
}
#endif
else {
@@ -10869,7 +10874,7 @@ void SMPInstr::EmitTypeAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame,
}
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL AlwaysPTR %s \n",
(unsigned long) addr, -OptType, disasm);
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
break;
case 8: // Implicitly writes to EDX:EAX, always numeric.
@@ -10881,7 +10886,7 @@ void SMPInstr::EmitTypeAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame,
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL n EDX EAX ZZ %s %s \n",
(unsigned long) addr, -2, OptExplanation[this->OptType], disasm);
}
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
SDTInstrumentation = true;
break;
@@ -10892,14 +10897,14 @@ void SMPInstr::EmitTypeAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame,
if (NumericDEFs) {
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL n %s NumericDEFs %s \n",
(unsigned long) addr, ProfiledDEFs ? -256-2 : -2, this->DestString(this->OptType), disasm);
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
}
#endif
}
else {
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL %s %s \n",
(unsigned long) addr, -1, OptExplanation[this->OptType], disasm);
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
}
break;
@@ -10912,7 +10917,7 @@ void SMPInstr::EmitTypeAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame,
else if (NumericDEFs) { // NUMERIC result because of NUMERIC sources
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL n %s NumericDEFs %s \n",
(unsigned long) addr, ProfiledDEFs ? -256-2 : -2, this->DestString(this->OptType), disasm);
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
}
break;
@@ -10925,7 +10930,7 @@ void SMPInstr::EmitTypeAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame,
else if (NumericDEFs) { // NUMERIC result because of NUMERIC sources
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL %s %s \n", (unsigned long) addr,
ProfiledDEFs ? -256-1 : -1, OptExplanation[TypeGroup], disasm);
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
}
else
SDTInstrumentation = true;
@@ -10941,7 +10946,7 @@ void SMPInstr::EmitTypeAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame,
else { // NUMERIC floating register result; these regs are always NUMERIC
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL %s %s \n", (unsigned long) addr,
-1, OptExplanation[TypeGroup], disasm);
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
}
break;
@@ -10955,12 +10960,12 @@ void SMPInstr::EmitTypeAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame,
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL n %s %s %s \n",
(unsigned long) addr, -2, this->DestString(this->OptType),
OptExplanation[this->OptType], disasm);
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
}
else if (NumericDEFs) { // NUMERIC move instruction
SMP_fprintf(AnnotFile, "%10lx %6d INSTR LOCAL n %s NumericDEFs %s \n",
(unsigned long) addr, ProfiledDEFs ? -256-2 : -2, this->DestString(this->OptType), disasm);
- ++AnnotationCount[this->OptType];
+ global_STARS_program->IncrementAnnotationCount(this->OptType);
}
break;
} // end switch (OptType)
@@ -10999,7 +11004,7 @@ void SMPInstr::EmitTypeAnnotations(bool UseFP, bool AllocSeen, bool NeedsFrame,
set<DefOrUse, LessDefUse>::iterator PtrUse;
PtrUse = this->GetPointerAddressReg(this->DEFMemOp);
if (PtrUse != this->GetLastUse()) { // found POINTER addr reg USE
- if (PtrUse->GetOp()->GetOpType() == o_reg) {
+ if (PtrUse->GetOp()->GetOpType()->IsRegOp()) {
SMP_fprintf(AnnotFile, "%10lx %6d INSTR POINTER reg %s ZZ %s \n",
(unsigned long) addr, this->GetSize(), MDGetRegName(PtrUse->GetOp()), disasm);
}
@@ -11395,7 +11400,7 @@ void SMPInstr::EmitIntegerErrorAnnotations(FILE *InfoAnnotFile, list<std::size_t
// multiplication and we have the potential for sub-cases A&B
// but not sub-case C. So, we check to see if the DEF of EDX
// is dead.
- DefOp = this->STARSInstPtr->MakeRegOpnd(R_dx);
+ DefOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_dx);
DefIter = this->FindDef(DefOp);
if (DefIter != this->GetLastDef()) {
// We found DEF of EDX, so it is not AX:=AL*op8 sub-case C.
@@ -12263,7 +12268,7 @@ void SMPInstr::MDEmitLeaOpcodeOverflowAnnotations(FILE *InfoAnnotFile, list<std:
}
// Gather signedness info about BaseReg, if any, that will be used in multiple cases below.
- if (R_none != BaseReg) {
+ if (STARS_x86_R_none != BaseReg) {
STARSOpndTypePtr RegOp = this->STARSInstPtr->MakeRegOpnd(MDCanonicalizeSubReg(BaseReg));
if (this->MDIsAddressing64bit()) {
RegOp->SetByteWidth(8);
@@ -12305,7 +12310,7 @@ void SMPInstr::MDEmitLeaOpcodeOverflowAnnotations(FILE *InfoAnnotFile, list<std:
BaseRegSignMask = 0;
}
- if (R_none != IndexReg) {
+ if (STARS_x86_R_none != IndexReg) {
// Get signedness info for IndexReg.
STARSOpndTypePtr RegOp = this->STARSInstPtr->MakeRegOpnd(MDCanonicalizeSubReg(IndexReg));
if (this->MDIsAddressing64bit()) {
@@ -12344,7 +12349,7 @@ void SMPInstr::MDEmitLeaOpcodeOverflowAnnotations(FILE *InfoAnnotFile, list<std:
if (ScaledIndexReg) {
assert((ScaleFactor >= 1) && (ScaleFactor <= 3));
- assert((IndexReg >= R_ax) && (IndexReg <= R_bh));
+ assert((IndexReg >= STARS_x86_R_ax) && (IndexReg <= STARS_x86_R_bh));
CurrString += MDGetRegName(RegOp);
CurrString += ScaleStrings[ScaleFactor];
if (IdiomCode > 0) {
@@ -12367,7 +12372,7 @@ void SMPInstr::MDEmitLeaOpcodeOverflowAnnotations(FILE *InfoAnnotFile, list<std:
#if SMP_MEASURE_NUMERIC_ANNOTATIONS
++LeaInstOverflowCount;
#endif
- if (R_none != BaseReg) {
+ if (STARS_x86_R_none != BaseReg) {
// Have BaseReg+IndexReg*ScaleFactor
string TempStr(CurrString);
CurrString.clear();
@@ -12430,7 +12435,7 @@ void SMPInstr::MDEmitLeaOpcodeOverflowAnnotations(FILE *InfoAnnotFile, list<std:
#endif
}
}
- else if (R_none != BaseReg) {
+ else if (STARS_x86_R_none != BaseReg) {
// We have BaseReg+IndexReg, unscaled.
STARSOpndTypePtr RegOp = this->STARSInstPtr->MakeRegOpnd(MDCanonicalizeSubReg(BaseReg));
if (this->MDIsAddressing64bit()) {
@@ -12532,7 +12537,7 @@ void SMPInstr::MDEmitLeaOpcodeOverflowAnnotations(FILE *InfoAnnotFile, list<std:
;
}
}
- else if ((R_none != BaseReg) && (SignedOffset != 0)) {
+ else if ((STARS_x86_R_none != BaseReg) && (SignedOffset != 0)) {
// No index reg, scaled or otherwise. Just BaseReg+offset
STARSOpndTypePtr RegOp = this->STARSInstPtr->MakeRegOpnd(MDCanonicalizeSubReg(BaseReg));
if (this->MDIsAddressing64bit()) {
@@ -12581,7 +12586,7 @@ void SMPInstr::MDEmitLeaOpcodeOverflowAnnotations(FILE *InfoAnnotFile, list<std:
STARSOpndTypePtr SMPInstr::GetPushedOpnd(void) {
STARSOpndTypePtr VoidOp = this->STARSInstPtr->MakeVoidOpnd();
- if (NN_push == this->GetIDAOpcode()) {
+ if (STARS_NN_push == this->GetIDAOpcode()) {
for (std::size_t OpNum = 0; OpNum < UA_MAXOP; ++OpNum) {
STARSOpndTypePtr TempOp = this->STARSInstPtr->GetOpnd(OpNum);
if (this->STARSInstPtr->IsUseOpnd(OpNum)) { // USE
@@ -12617,139 +12622,139 @@ int SMPInstr::MDGetImmedUse(void) {
void SMPInstr::MDGetFlagsUsed(set<int> &UsedFlags) {
pair<set<int>::iterator, bool> InsertResult;
switch (this->GetIDAOpcode()) {
- case NN_adc: // Add with Carry
- case NN_daa: // Decimal Adjust AL after Addition
- case NN_das: // Decimal Adjust AL after Subtraction
- case NN_jae: // Jump if Above or Equal (CF=0)
- case NN_jb: // Jump if Below (CF=1)
- case NN_jc: // Jump if Carry (CF=1)
- case NN_jnae: // Jump if Not Above or Equal (CF=1)
- case NN_jnb: // Jump if Not Below (CF=0)
- case NN_jnc: // Jump if Not Carry (CF=0)
- case NN_rcl: // Rotate Through Carry Left
- case NN_rcr: // Rotate Through Carry Right
- case NN_sbb: // Integer Subtraction with Borrow
- case NN_setae: // Set Byte if Above or Equal (CF=0)
- case NN_setb: // Set Byte if Below (CF=1)
- case NN_setc: // Set Byte if Carry (CF=1)
- case NN_setnae: // Set Byte if Not Above or Equal (CF=1)
- case NN_setnb: // Set Byte if Not Below (CF=0)
- case NN_setnc: // Set Byte if Not Carry (CF=0)
- case NN_cmovb: // Move if Below (CF=1)
- case NN_cmovnb: // Move if Not Below (CF=0)
- case NN_fcmovb: // Floating Move if Below
- case NN_fcmovnb: // Floating Move if Not Below
- case NN_setalc: // Set AL to Carry Flag
- case NN_adcx: // Unsigned Integer Addition of Two Operands with Carry Flag
+ case STARS_NN_adc: // Add with Carry
+ case STARS_NN_daa: // Decimal Adjust AL after Addition
+ case STARS_NN_das: // Decimal Adjust AL after Subtraction
+ case STARS_NN_jae: // Jump if Above or Equal (CF=0)
+ case STARS_NN_jb: // Jump if Below (CF=1)
+ case STARS_NN_jc: // Jump if Carry (CF=1)
+ case STARS_NN_jnae: // Jump if Not Above or Equal (CF=1)
+ case STARS_NN_jnb: // Jump if Not Below (CF=0)
+ case STARS_NN_jnc: // Jump if Not Carry (CF=0)
+ case STARS_NN_rcl: // Rotate Through Carry Left
+ case STARS_NN_rcr: // Rotate Through Carry Right
+ case STARS_NN_sbb: // Integer Subtraction with Borrow
+ case STARS_NN_setae: // Set Byte if Above or Equal (CF=0)
+ case STARS_NN_setb: // Set Byte if Below (CF=1)
+ case STARS_NN_setc: // Set Byte if Carry (CF=1)
+ case STARS_NN_setnae: // Set Byte if Not Above or Equal (CF=1)
+ case STARS_NN_setnb: // Set Byte if Not Below (CF=0)
+ case STARS_NN_setnc: // Set Byte if Not Carry (CF=0)
+ case STARS_NN_cmovb: // Move if Below (CF=1)
+ case STARS_NN_cmovnb: // Move if Not Below (CF=0)
+ case STARS_NN_fcmovb: // Floating Move if Below
+ case STARS_NN_fcmovnb: // Floating Move if Not Below
+ case STARS_NN_setalc: // Set AL to Carry Flag
+ case STARS_NN_adcx: // Unsigned Integer Addition of Two Operands with Carry Flag
InsertResult = UsedFlags.insert(MD_CARRY_FLAG);
break;
- case NN_into: // Call to Interrupt Procedure if Overflow Flag = 1
- case NN_jno: // Jump if Not Overflow (OF=0)
- case NN_jo: // Jump if Overflow (OF=1)
- case NN_setno: // Set Byte if Not Overflow (OF=0)
- case NN_seto: // Set Byte if Overflow (OF=1)
- case NN_cmovno: // Move if Not Overflow (OF=0)
- case NN_cmovo: // Move if Overflow (OF=1)
- case NN_adox: // Unsigned Integer Addition of Two Operands with Overflow Flag
+ case STARS_NN_into: // Call to Interrupt Procedure if Overflow Flag = 1
+ case STARS_NN_jno: // Jump if Not Overflow (OF=0)
+ case STARS_NN_jo: // Jump if Overflow (OF=1)
+ case STARS_NN_setno: // Set Byte if Not Overflow (OF=0)
+ case STARS_NN_seto: // Set Byte if Overflow (OF=1)
+ case STARS_NN_cmovno: // Move if Not Overflow (OF=0)
+ case STARS_NN_cmovo: // Move if Overflow (OF=1)
+ case STARS_NN_adox: // Unsigned Integer Addition of Two Operands with Overflow Flag
InsertResult = UsedFlags.insert(MD_OVERFLOW_FLAG);
break;
- case NN_ja: // Jump if Above (CF=0 & ZF=0)
- case NN_jbe: // Jump if Below or Equal (CF=1 | ZF=1)
- case NN_jna: // Jump if Not Above (CF=1 | ZF=1)
- case NN_jnbe: // Jump if Not Below or Equal (CF=0 & ZF=0) a.k.a. ja
- case NN_seta: // Set Byte if Above (CF=0 & ZF=0)
- case NN_setbe: // Set Byte if Below or Equal (CF=1 | ZF=1)
- case NN_setna: // Set Byte if Not Above (CF=1 | ZF=1)
- case NN_setnbe: // Set Byte if Not Below or Equal (CF=0 & ZF=0)
- case NN_cmova: // Move if Above (CF=0 & ZF=0)
- case NN_cmovbe: // Move if Below or Equal (CF=1 | ZF=1)
- case NN_fcmovbe: // Floating Move if Below or Equal
- case NN_fcmovnbe: // Floating Move if Not Below or Equal
+ case STARS_NN_ja: // Jump if Above (CF=0 & ZF=0)
+ case STARS_NN_jbe: // Jump if Below or Equal (CF=1 | ZF=1)
+ case STARS_NN_jna: // Jump if Not Above (CF=1 | ZF=1)
+ case STARS_NN_jnbe: // Jump if Not Below or Equal (CF=0 & ZF=0) a.k.a. ja
+ case STARS_NN_seta: // Set Byte if Above (CF=0 & ZF=0)
+ case STARS_NN_setbe: // Set Byte if Below or Equal (CF=1 | ZF=1)
+ case STARS_NN_setna: // Set Byte if Not Above (CF=1 | ZF=1)
+ case STARS_NN_setnbe: // Set Byte if Not Below or Equal (CF=0 & ZF=0)
+ case STARS_NN_cmova: // Move if Above (CF=0 & ZF=0)
+ case STARS_NN_cmovbe: // Move if Below or Equal (CF=1 | ZF=1)
+ case STARS_NN_fcmovbe: // Floating Move if Below or Equal
+ case STARS_NN_fcmovnbe: // Floating Move if Not Below or Equal
InsertResult = UsedFlags.insert(MD_CARRY_FLAG);
InsertResult = UsedFlags.insert(MD_ZERO_FLAG);
break;
- case NN_ins: // Input string; uses ZERO_FLAG if REPE/REPNE/REPZ/REPNZ prefix is used
- case NN_je: // Jump if Equal (ZF=1)
- case NN_jne: // Jump if Not Equal (ZF=0)
- case NN_jnz: // Jump if Not Zero (ZF=0) a.k.a. jne
- case NN_jz: // Jump if Zero (ZF=1)
- case NN_lods: // Load string; uses ZERO_FLAG if REPE/REPNE/REPZ/REPNZ prefix is used
- case NN_loopwe: // Loop while CX != 0 and ZF=1
- case NN_loope: // Loop while rCX != 0 and ZF=1
- case NN_loopde: // Loop while ECX != 0 and ZF=1
- case NN_loopqe: // Loop while RCX != 0 and ZF=1
- case NN_loopwne: // Loop while CX != 0 and ZF=0
- case NN_loopne: // Loop while rCX != 0 and ZF=0
- case NN_loopdne: // Loop while ECX != 0 and ZF=0
- case NN_loopqne: // Loop while RCX != 0 and ZF=0
- case NN_movs: // Move Byte(s) from String to String; uses ZERO_FLAG if REPE/REPNE/REPZ/REPNZ prefix is used
- case NN_outs: // Output string; uses ZERO_FLAG if REPE/REPNE/REPZ/REPNZ prefix is used
- case NN_repe: // Repeat String Operation while ZF=1
- case NN_repne: // Repeat String Operation while ZF=0
- case NN_scas: // Scan String; uses ZERO_FLAG if REPE/REPNE/REPZ/REPNZ prefix is used
- case NN_sete: // Set Byte if Equal (ZF=1)
- case NN_setne: // Set Byte if Not Equal (ZF=0)
- case NN_setnz: // Set Byte if Not Zero (ZF=0)
- case NN_setz: // Set Byte if Zero (ZF=1)
- case NN_stos: // Store String; uses ZERO_FLAG if REPE/REPNE/REPZ/REPNZ prefix is used
- case NN_cmovnz: // Move if Not Zero (ZF=0)
- case NN_cmovz: // Move if Zero (ZF=1)
- case NN_fcmove: // Floating Move if Equal
- case NN_fcmovne: // Floating Move if Not Equal
+ case STARS_NN_ins: // Input string; uses ZERO_FLAG if REPE/REPNE/REPZ/REPNZ prefix is used
+ case STARS_NN_je: // Jump if Equal (ZF=1)
+ case STARS_NN_jne: // Jump if Not Equal (ZF=0)
+ case STARS_NN_jnz: // Jump if Not Zero (ZF=0) a.k.a. jne
+ case STARS_NN_jz: // Jump if Zero (ZF=1)
+ case STARS_NN_lods: // Load string; uses ZERO_FLAG if REPE/REPNE/REPZ/REPNZ prefix is used
+ case STARS_NN_loopwe: // Loop while CX != 0 and ZF=1
+ case STARS_NN_loope: // Loop while rCX != 0 and ZF=1
+ case STARS_NN_loopde: // Loop while ECX != 0 and ZF=1
+ case STARS_NN_loopqe: // Loop while RCX != 0 and ZF=1
+ case STARS_NN_loopwne: // Loop while CX != 0 and ZF=0
+ case STARS_NN_loopne: // Loop while rCX != 0 and ZF=0
+ case STARS_NN_loopdne: // Loop while ECX != 0 and ZF=0
+ case STARS_NN_loopqne: // Loop while RCX != 0 and ZF=0
+ case STARS_NN_movs: // Move Byte(s) from String to String; uses ZERO_FLAG if REPE/REPNE/REPZ/REPNZ prefix is used
+ case STARS_NN_outs: // Output string; uses ZERO_FLAG if REPE/REPNE/REPZ/REPNZ prefix is used
+ case STARS_NN_repe: // Repeat String Operation while ZF=1
+ case STARS_NN_repne: // Repeat String Operation while ZF=0
+ case STARS_NN_scas: // Scan String; uses ZERO_FLAG if REPE/REPNE/REPZ/REPNZ prefix is used
+ case STARS_NN_sete: // Set Byte if Equal (ZF=1)
+ case STARS_NN_setne: // Set Byte if Not Equal (ZF=0)
+ case STARS_NN_setnz: // Set Byte if Not Zero (ZF=0)
+ case STARS_NN_setz: // Set Byte if Zero (ZF=1)
+ case STARS_NN_stos: // Store String; uses ZERO_FLAG if REPE/REPNE/REPZ/REPNZ prefix is used
+ case STARS_NN_cmovnz: // Move if Not Zero (ZF=0)
+ case STARS_NN_cmovz: // Move if Zero (ZF=1)
+ case STARS_NN_fcmove: // Floating Move if Equal
+ case STARS_NN_fcmovne: // Floating Move if Not Equal
InsertResult = UsedFlags.insert(MD_ZERO_FLAG);
break;
- case NN_jge: // Jump if Greater or Equal (SF=OF)
- case NN_jl: // Jump if Less (SF!=OF)
- case NN_jnge: // Jump if Not Greater or Equal (SF != OF) **
- case NN_jnl: // Jump if Not Less (SF=OF) a.k.a. jge
- case NN_setge: // Set Byte if Greater or Equal (SF=OF)
- case NN_setl: // Set Byte if Less (SF!=OF)
- case NN_setnge: // Set Byte if Not Greater or Equal (SF!=OF)
- case NN_setnl: // Set Byte if Not Less (SF=OF)
- case NN_cmovge: // Move if Greater or Equal (SF=OF)
- case NN_cmovl: // Move if Less (SF!=OF)
+ case STARS_NN_jge: // Jump if Greater or Equal (SF=OF)
+ case STARS_NN_jl: // Jump if Less (SF!=OF)
+ case STARS_NN_jnge: // Jump if Not Greater or Equal (SF != OF) **
+ case STARS_NN_jnl: // Jump if Not Less (SF=OF) a.k.a. jge
+ case STARS_NN_setge: // Set Byte if Greater or Equal (SF=OF)
+ case STARS_NN_setl: // Set Byte if Less (SF!=OF)
+ case STARS_NN_setnge: // Set Byte if Not Greater or Equal (SF!=OF)
+ case STARS_NN_setnl: // Set Byte if Not Less (SF=OF)
+ case STARS_NN_cmovge: // Move if Greater or Equal (SF=OF)
+ case STARS_NN_cmovl: // Move if Less (SF!=OF)
InsertResult = UsedFlags.insert(MD_SIGN_FLAG);
InsertResult = UsedFlags.insert(MD_OVERFLOW_FLAG);
break;
- case NN_jg: // Jump if Greater (ZF=0 & SF=OF)
- case NN_jle: // Jump if Less or Equal (ZF=1 | SF!=OF)
- case NN_jng: // Jump if Not Greater (ZF=1 | SF!=OF) a.k.a. jle
- case NN_jnle: // Jump if Not Less or Equal (ZF=0 & SF=OF) a.k.a. jg
- case NN_setg: // Set Byte if Greater (ZF=0 & SF=OF)
- case NN_setle: // Set Byte if Less or Equal (ZF=1 | SF!=OF)
- case NN_setng: // Set Byte if Not Greater (ZF=1 | SF!=OF)
- case NN_setnle: // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
- case NN_cmovg: // Move if Greater (ZF=0 & SF=OF)
- case NN_cmovle: // Move if Less or Equal (ZF=1 | SF!=OF)
+ case STARS_NN_jg: // Jump if Greater (ZF=0 & SF=OF)
+ case STARS_NN_jle: // Jump if Less or Equal (ZF=1 | SF!=OF)
+ case STARS_NN_jng: // Jump if Not Greater (ZF=1 | SF!=OF) a.k.a. jle
+ case STARS_NN_jnle: // Jump if Not Less or Equal (ZF=0 & SF=OF) a.k.a. jg
+ case STARS_NN_setg: // Set Byte if Greater (ZF=0 & SF=OF)
+ case STARS_NN_setle: // Set Byte if Less or Equal (ZF=1 | SF!=OF)
+ case STARS_NN_setng: // Set Byte if Not Greater (ZF=1 | SF!=OF)
+ case STARS_NN_setnle: // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
+ case STARS_NN_cmovg: // Move if Greater (ZF=0 & SF=OF)
+ case STARS_NN_cmovle: // Move if Less or Equal (ZF=1 | SF!=OF)
InsertResult = UsedFlags.insert(MD_ZERO_FLAG);
InsertResult = UsedFlags.insert(MD_SIGN_FLAG);
InsertResult = UsedFlags.insert(MD_OVERFLOW_FLAG);
break;
- case NN_jns: // Jump if Not Sign (SF=0)
- case NN_js: // Jump if Sign (SF=1)
- case NN_setns: // Set Byte if Not Sign (SF=0)
- case NN_sets: // Set Byte if Sign (SF=1)
- case NN_cmovns: // Move if Not Sign (SF=0)
- case NN_cmovs: // Move if Sign (SF=1)
+ case STARS_NN_jns: // Jump if Not Sign (SF=0)
+ case STARS_NN_js: // Jump if Sign (SF=1)
+ case STARS_NN_setns: // Set Byte if Not Sign (SF=0)
+ case STARS_NN_sets: // Set Byte if Sign (SF=1)
+ case STARS_NN_cmovns: // Move if Not Sign (SF=0)
+ case STARS_NN_cmovs: // Move if Sign (SF=1)
InsertResult = UsedFlags.insert(MD_SIGN_FLAG);
break;
- case NN_lahf: // Load Flags into AH Register
+ case STARS_NN_lahf: // Load Flags into AH Register
InsertResult = UsedFlags.insert(MD_CARRY_FLAG);
InsertResult = UsedFlags.insert(MD_ZERO_FLAG);
InsertResult = UsedFlags.insert(MD_SIGN_FLAG);
break;
- case NN_pushfw: // Push Flags Register onto the Stack
- case NN_pushf: // Push Flags Register onto the Stack
- case NN_pushfd: // Push Flags Register onto the Stack (use32)
- case NN_pushfq: // Push Flags Register onto the Stack (use64)
+ case STARS_NN_pushfw: // Push Flags Register onto the Stack
+ case STARS_NN_pushf: // Push Flags Register onto the Stack
+ case STARS_NN_pushfd: // Push Flags Register onto the Stack (use32)
+ case STARS_NN_pushfq: // Push Flags Register onto the Stack (use64)
InsertResult = UsedFlags.insert(MD_CARRY_FLAG);
InsertResult = UsedFlags.insert(MD_ZERO_FLAG);
InsertResult = UsedFlags.insert(MD_SIGN_FLAG);
@@ -12835,7 +12840,7 @@ bool SMPInstr::BuildUnaryRTL(SMPoperator UnaryOp) {
TempRT->SetRightTree(RightRT);
this->RTL.push_back(TempRT);
}
- else if ((NN_clc == opcode) || (NN_cld == opcode) || (NN_cmc == opcode) || (NN_stc == opcode) || (NN_std == opcode)) {
+ else if ((STARS_NN_clc == opcode) || (STARS_NN_cld == opcode) || (STARS_NN_cmc == opcode) || (STARS_NN_stc == opcode) || (STARS_NN_std == opcode)) {
// Flags register is implicit destination.
DestFound = true;
TempRT = new SMPRegTransfer;
@@ -12844,7 +12849,7 @@ bool SMPInstr::BuildUnaryRTL(SMPoperator UnaryOp) {
TempRT->SetOperator(SMP_ASSIGN);
SMPRegTransfer *RightRT = new SMPRegTransfer;
RightRT->SetParentInst(this);
- if (NN_cmc == opcode) { // complement carry flag USEs old carry flag
+ if (STARS_NN_cmc == opcode) { // complement carry flag USEs old carry flag
RightRT->SetLeftOperand(FlagsOp);
RightRT->SetOperator(SMP_BITWISE_NOT);
}
@@ -12980,8 +12985,8 @@ bool SMPInstr::BuildBinaryRTL(SMPoperator BinaryOp, bool HiddenFPStackOp) {
bool SrcIsReallyDest = ((SMP_COMPARE_EQ_AND_SET <= BinaryOp)
&& (SMP_COMPARE_LE_AND_SET >= BinaryOp));
bool StackPointerModification = false; // SP := SP SMP_BITWISE_AND operand
- bool NeedsGuard = ((NN_arpl == opcode) || (NN_bound == opcode));
- bool BuildOnlySignalRT = (NN_bound == opcode);
+ bool NeedsGuard = ((STARS_NN_arpl == opcode) || (STARS_NN_bound == opcode));
+ bool BuildOnlySignalRT = (STARS_NN_bound == opcode);
SMPRegTransfer *TempRT = NULL;
SMPRegTransfer *RightRT = new SMPRegTransfer;
SMPGuard *Guard1 = NULL;
@@ -13130,7 +13135,7 @@ bool SMPInstr::BuildBinaryRTL(SMPoperator BinaryOp, bool HiddenFPStackOp) {
this->RTL.push_back(TempRT);
// The "p" at the end of the opcode indicates that the floating point
// register stack gets popped.
- if ((NN_fstp == opcode) || (NN_fbstp == opcode) || (NN_fistp == opcode)) {
+ if ((STARS_NN_fstp == opcode) || (STARS_NN_fbstp == opcode) || (STARS_NN_fistp == opcode)) {
this->RTL.ExtraKills.push_back(FPRegOp);
}
}
@@ -13327,8 +13332,8 @@ bool SMPInstr::BuildBinaryIgnoreImmedRTL(SMPoperator BinaryOp) {
bool MemSrc = this->HasSourceMemoryOperand();
bool MemDest = this->HasDestMemoryOperand();
unsigned short opcode = this->GetIDAOpcode();
- bool ECXDest = ((NN_pcmpestri == opcode) || (NN_pcmpistri == opcode));
- bool XMM0Dest = ((NN_pcmpestrm == opcode) || (NN_pcmpistrm == opcode));
+ bool ECXDest = ((STARS_NN_pcmpestri == opcode) || (STARS_NN_pcmpistri == opcode));
+ bool XMM0Dest = ((STARS_NN_pcmpestrm == opcode) || (STARS_NN_pcmpistrm == opcode));
bool SrcIsReallyDest = (ECXDest || XMM0Dest); // Dest is implicit, so ASM only has source operand
SMPRegTransfer *TempRT = NULL;
SMPRegTransfer *RightRT = new SMPRegTransfer;
@@ -13346,11 +13351,11 @@ bool SMPInstr::BuildBinaryIgnoreImmedRTL(SMPoperator BinaryOp) {
TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
if (ECXDest) {
- STARSOpndTypePtr ECXOp = this->STARSInstPtr->MakeRegOpnd(R_cx);
+ STARSOpndTypePtr ECXOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_cx);
TempRT->SetLeftOperand(ECXOp);
}
else if (XMM0Dest) {
- STARSOpndTypePtr XMMOp = this->STARSInstPtr->MakeXMMRegOpnd(R_xmm0);
+ STARSOpndTypePtr XMMOp = this->STARSInstPtr->MakeXMMRegOpnd(STARS_x86_R_xmm0);
TempRT->SetLeftOperand(XMMOp);
}
else {
@@ -13503,12 +13508,12 @@ bool SMPInstr::BuildLeaRTL(void) {
AssignRT->SetLeftOperand(DefOp);
AssignRT->SetOperator(SMP_ASSIGN);
- ScaledIndexReg = ((ScaleFactor > 0) && (IndexReg != R_none));
+ ScaledIndexReg = ((ScaleFactor > 0) && (IndexReg != STARS_x86_R_none));
STARSOpndTypePtr BaseOp = nullptr;
- if (BaseReg != R_none)
+ if (BaseReg != STARS_x86_R_none)
BaseOp = this->STARSInstPtr->MakeRegOpnd(BaseReg);
STARSOpndTypePtr IndexOp = nullptr;
- if (IndexReg != R_none)
+ if (IndexReg != STARS_x86_R_none)
IndexOp = this->STARSInstPtr->MakeRegOpnd(IndexReg);
STARSOpndTypePtr OffsetOp = this->STARSInstPtr->MakeImmediateOpnd((STARS_uval_t) offset);
STARSOpndTypePtr ScaleOp = this->STARSInstPtr->MakeImmediateOpnd((STARS_uval_t) ScaleFactor);
@@ -13529,7 +13534,7 @@ bool SMPInstr::BuildLeaRTL(void) {
AddOffRT->SetOperator(SMP_ADD);
AddOffRT->SetRightTree(MultRT);
// Add a BaseReg, if any.
- if (R_none != BaseReg) {
+ if (STARS_x86_R_none != BaseReg) {
SMPRegTransfer *AddBaseRT = new SMPRegTransfer;
AddBaseRT->SetParentInst(this);
AddBaseRT->SetLeftOperand(BaseOp);
@@ -13544,7 +13549,7 @@ bool SMPInstr::BuildLeaRTL(void) {
} // end if nonzero offset
else { // no offset to add
// Add a BaseReg, if any.
- if (R_none != BaseReg) {
+ if (STARS_x86_R_none != BaseReg) {
SMPRegTransfer *AddBaseRT = new SMPRegTransfer;
AddBaseRT->SetParentInst(this);
AddBaseRT->SetLeftOperand(BaseOp);
@@ -13560,14 +13565,14 @@ bool SMPInstr::BuildLeaRTL(void) {
} // end if ScaleIndexReg
else { // no scaled index register
if (0 != offset) {
- if (R_none != IndexReg) {
+ if (STARS_x86_R_none != IndexReg) {
SMPRegTransfer *AddOffRT = new SMPRegTransfer;
AddOffRT->SetParentInst(this);
AddOffRT->SetLeftOperand(OffsetOp);
AddOffRT->SetOperator(SMP_ADD);
AddOffRT->SetRightOperand(IndexOp);
// Add BaseReg, if any.
- if (R_none != BaseReg) {
+ if (STARS_x86_R_none != BaseReg) {
SMPRegTransfer *AddBaseRT = new SMPRegTransfer;
AddBaseRT->SetParentInst(this);
AddBaseRT->SetLeftOperand(BaseOp);
@@ -13582,7 +13587,7 @@ bool SMPInstr::BuildLeaRTL(void) {
} // end if valid IndexReg
else { // no IndexReg
// Add BaseReg, if any.
- if (R_none != BaseReg) {
+ if (STARS_x86_R_none != BaseReg) {
SMPRegTransfer *AddBaseRT = new SMPRegTransfer;
AddBaseRT->SetParentInst(this);
AddBaseRT->SetLeftOperand(BaseOp);
@@ -13601,14 +13606,14 @@ bool SMPInstr::BuildLeaRTL(void) {
}
} // end if nonzero offset
else { // no offset
- if ((R_none == BaseReg) || (R_none == IndexReg)) {
+ if ((STARS_x86_R_none == BaseReg) || (STARS_x86_R_none == IndexReg)) {
SMP_msg("WARNING: lea used as move at %lx for %s\n", (unsigned long) this->GetAddr(),
DisAsmText.GetDisAsm(this->GetAddr()));
- if (R_none != BaseReg) {
+ if (STARS_x86_R_none != BaseReg) {
AssignRT->SetRightOperand(BaseOp);
}
else {
- if (R_none == IndexReg) { // Should be RegClearIdiom in this case, no longer Lea RTL
+ if (STARS_x86_R_none == IndexReg) { // Should be RegClearIdiom in this case, no longer Lea RTL
assert(this->IsRegClearIdiom());
STARSOpndTypePtr ZeroOp = this->STARSInstPtr->MakeImmediateOpnd(0);
AssignRT->SetRightOperand(ZeroOp);
@@ -13733,12 +13738,12 @@ bool SMPInstr::BuildMultiplyDivideRTL(SMPoperator BinaryOp) {
if (nullptr == TempOp) // finished processing operands
break;
if (!TempOp->IsVisible()) { // hidden operand
- if (TempOp->MatchesReg(R_ax)) { // not R_al, so it is not 8 bits
+ if (TempOp->MatchesReg(STARS_x86_R_ax)) { // not STARS_x86_R_al, so it is not 8 bits
// This form always has a hidden use of EDX:EAX
HiddenEAXUse = true;
ImplicitEDXUse = true;
}
- else if (TempOp->MatchesReg(R_al)) {
+ else if (TempOp->MatchesReg(STARS_x86_R_al)) {
// Use of AX register to hold 16-bit result is hidden,
// but EDX is not needed to hold result bits.
HiddenEAXUse = true;
@@ -13793,14 +13798,14 @@ bool SMPInstr::BuildMultiplyDivideRTL(SMPoperator BinaryOp) {
EDXRightRT->SetParentInst(this);
STARSOpndTypePtr EDXOp = TempRT->GetLeftOperand()->clone();
EDXRT->SetOperator(SMP_ASSIGN);
- assert(EDXOp->MatchesReg(R_ax));
- EDXOp->SetReg(R_dx);
+ assert(EDXOp->MatchesReg(STARS_x86_R_ax));
+ EDXOp->SetReg(STARS_x86_R_dx);
EDXRT->SetLeftOperand(EDXOp);
STARSOpndTypePtr SourceOp = RightRT->GetLeftOperand();
- if ((NN_div == this->GetIDAOpcode()) || (NN_idiv == this->GetIDAOpcode())) {
+ if ((STARS_NN_div == this->GetIDAOpcode()) || (STARS_NN_idiv == this->GetIDAOpcode())) {
// Need to change left operand of RightRT to EDX. i.e. we are
// changing the effect from eax := eax DIV foo to edx := edx DIV foo.
- assert(SourceOp->MatchesReg(R_ax));
+ assert(SourceOp->MatchesReg(STARS_x86_R_ax));
EDXRightRT->SetLeftOperand(EDXOp);
}
else { // just use same source operands for multiplies
@@ -13883,8 +13888,8 @@ bool SMPInstr::BuildBinaryPlusFlagsRTL(SMPoperator BinaryOp) {
return (DestFound && SourceFound);
} // end of SMPInstr::BuildBinaryPlusFlagsRTL()
-#define SMP_FIRST_SET_OPCODE NN_seta
-#define SMP_LAST_SET_OPCODE NN_setz
+#define SMP_FIRST_SET_OPCODE STARS_NN_seta
+#define SMP_LAST_SET_OPCODE STARS_NN_setz
// Build the RTL for an instruction of form dest := unary_operator(source), dest != source
bool SMPInstr::BuildUnary2OpndRTL(SMPoperator UnaryOp) {
std::size_t OpNum;
@@ -13895,13 +13900,13 @@ bool SMPInstr::BuildUnary2OpndRTL(SMPoperator UnaryOp) {
SMPRegTransfer *RightRT = new SMPRegTransfer;
RightRT->SetParentInst(this);
unsigned short opcode = this->GetIDAOpcode();
- bool ExtendedMove = ((NN_movsx == opcode) || (NN_movzx == opcode) || (NN_movsxd == opcode));
+ bool ExtendedMove = ((STARS_NN_movsx == opcode) || (STARS_NN_movzx == opcode) || (STARS_NN_movsxd == opcode));
STARSOpndTypePtr VoidOp = this->STARSInstPtr->MakeVoidOpnd();
STARSOpndTypePtr FlagsOp = this->STARSInstPtr->MakeRegOpnd(X86_FLAGS_REG);
- STARSOpndTypePtr PortNumOp = this->STARSInstPtr->MakeRegOpnd(R_dx);
+ STARSOpndTypePtr PortNumOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_dx);
PortNumOp->SetByteWidth(2); // always DX, 16-bit
- STARSOpndTypePtr PortDataOp = this->STARSInstPtr->MakeRegOpnd(R_ax);
+ STARSOpndTypePtr PortDataOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_ax);
// Handle special cases first.
if ((SMP_FIRST_SET_OPCODE <= opcode) && (SMP_LAST_SET_OPCODE >= opcode)) {
@@ -13917,7 +13922,7 @@ bool SMPInstr::BuildUnary2OpndRTL(SMPoperator UnaryOp) {
if (this->STARSInstPtr->IsDefOpnd(OpNum)) { // DEF
if (MDKnownOperandType(TempOp)) {
DestFound = true;
- if (NN_in == opcode) {
+ if (STARS_NN_in == opcode) {
#if 0
SMP_msg("ERROR: Explicit DEF for IN from port opcode at %x : ", this->GetAddr());
PrintOperand(TempOp);
@@ -13926,7 +13931,7 @@ bool SMPInstr::BuildUnary2OpndRTL(SMPoperator UnaryOp) {
TempRT->SetLeftOperand(TempOp);
TempRT->SetOperator(UnaryOp);
}
- else if (NN_out == opcode) {
+ else if (STARS_NN_out == opcode) {
TempRT->SetLeftOperand(TempOp);
TempRT->SetOperator(UnaryOp);
}
@@ -13942,10 +13947,10 @@ bool SMPInstr::BuildUnary2OpndRTL(SMPoperator UnaryOp) {
else { // USE
if (MDKnownOperandType(TempOp)) {
SourceFound = true;
- if (NN_in == opcode) {
+ if (STARS_NN_in == opcode) {
TempRT->SetRightOperand(TempOp);
}
- else if (NN_out == opcode) {
+ else if (STARS_NN_out == opcode) {
#if 0
SMP_msg("ERROR: Explicit USE for OUT to port opcode at %x : ", this->GetAddr());
PrintOperand(TempOp);
@@ -13962,13 +13967,13 @@ bool SMPInstr::BuildUnary2OpndRTL(SMPoperator UnaryOp) {
}
} // end for (OpNum = 0; ...)
- if (!SourceFound && (NN_in == opcode)) {
+ if (!SourceFound && (STARS_NN_in == opcode)) {
// Input from port is implicitly from port # in DX register if not
// specified with an immediate operand.
SourceFound = true;
TempRT->SetRightOperand(PortNumOp);
}
- if (!DestFound && (NN_in == opcode)) {
+ if (!DestFound && (STARS_NN_in == opcode)) {
// Input from port is implicitly to register AL, AX, or EAX
// depending on the opcode and bit width mode.
// NOTE: Two different machine codes for 8-bit and 32-bit widths.
@@ -13977,7 +13982,7 @@ bool SMPInstr::BuildUnary2OpndRTL(SMPoperator UnaryOp) {
TempRT->SetLeftOperand(PortDataOp);
TempRT->SetOperator(UnaryOp);
}
- if (!DestFound && (NN_out == opcode)) {
+ if (!DestFound && (STARS_NN_out == opcode)) {
// Output to port is implicitly to port # in DX register if not
// specified with an immediate operand.
// NOTE: Two different machine codes for 8-bit and 32-bit widths.
@@ -13986,7 +13991,7 @@ bool SMPInstr::BuildUnary2OpndRTL(SMPoperator UnaryOp) {
TempRT->SetLeftOperand(PortNumOp);
TempRT->SetOperator(SMP_ASSIGN);
}
- if (!SourceFound && (NN_out == opcode)) {
+ if (!SourceFound && (STARS_NN_out == opcode)) {
// Output to port is implicitly from register AL, AX, or EAX
// depending on the opcode and bit width mode.
SourceFound = true;
@@ -14005,7 +14010,7 @@ bool SMPInstr::BuildUnary2OpndRTL(SMPoperator UnaryOp) {
}
else {
this->RTL.push_back(TempRT);
- if ((NN_in == opcode) || (NN_out == opcode))
+ if ((STARS_NN_in == opcode) || (STARS_NN_out == opcode))
delete RightRT; // unused for port I/O
}
return (DestFound && SourceFound);
@@ -14028,58 +14033,58 @@ bool SMPInstr::BuildLoopRTL(SMPoperator GuardOp) {
STARSOpndTypePtr CountOp = nullptr;
switch (this->GetIDAOpcode()) {
- case NN_loopw: // Loop while ECX != 0
+ case STARS_NN_loopw: // Loop while ECX != 0
CounterByteWidth = 4;
break;
- case NN_loop: // Loop while CX != 0
- CounterByteWidth = STARS_ISA_Bytewidth;
+ case STARS_NN_loop: // Loop while CX != 0
+ CounterByteWidth = global_STARS_program->GetSTARS_ISA_Bytewidth();
break;
- case NN_loopd: // Loop while ECX != 0
+ case STARS_NN_loopd: // Loop while ECX != 0
CounterByteWidth = 4;
break;
- case NN_loopq: // Loop while RCX != 0
+ case STARS_NN_loopq: // Loop while RCX != 0
CounterByteWidth = 8;
break;
- case NN_loopwe: // Loop while CX != 0 and ZF=1
+ case STARS_NN_loopwe: // Loop while CX != 0 and ZF=1
CounterByteWidth = 2;
EqFlag = true;
break;
- case NN_loope: // Loop while rCX != 0 and ZF=1
- CounterByteWidth = STARS_ISA_Bytewidth;
+ case STARS_NN_loope: // Loop while rCX != 0 and ZF=1
+ CounterByteWidth = global_STARS_program->GetSTARS_ISA_Bytewidth();
EqFlag = true;
break;
- case NN_loopde: // Loop while ECX != 0 and ZF=1
+ case STARS_NN_loopde: // Loop while ECX != 0 and ZF=1
CounterByteWidth = 4;
EqFlag = true;
break;
- case NN_loopqe: // Loop while RCX != 0 and ZF=1
+ case STARS_NN_loopqe: // Loop while RCX != 0 and ZF=1
CounterByteWidth = 8;
EqFlag = true;
break;
- case NN_loopwne: // Loop while CX != 0 and ZF=0
+ case STARS_NN_loopwne: // Loop while CX != 0 and ZF=0
CounterByteWidth = 2;
NeqFlag = true;
break;
- case NN_loopne: // Loop while rCX != 0 and ZF=0
- CounterByteWidth = STARS_ISA_Bytewidth;
+ case STARS_NN_loopne: // Loop while rCX != 0 and ZF=0
+ CounterByteWidth = global_STARS_program->GetSTARS_ISA_Bytewidth();
NeqFlag = true;
break;
- case NN_loopdne: // Loop while ECX != 0 and ZF=0
+ case STARS_NN_loopdne: // Loop while ECX != 0 and ZF=0
CounterByteWidth = 4;
NeqFlag = true;
break;
- case NN_loopqne: // Loop while RCX != 0 and ZF=0
+ case STARS_NN_loopqne: // Loop while RCX != 0 and ZF=0
CounterByteWidth = 8;
NeqFlag = true;
break;
@@ -14092,10 +14097,10 @@ bool SMPInstr::BuildLoopRTL(SMPoperator GuardOp) {
OneOp->SetByteWidth(CounterByteWidth);
if (CounterByteWidth == 1) {
- CountOp = this->STARSInstPtr->MakeRegOpnd(R_cl);
+ CountOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_cl);
}
else {
- CountOp = this->STARSInstPtr->MakeRegOpnd(R_cx);
+ CountOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_cx);
CountOp->SetByteWidth(CounterByteWidth);
}
@@ -14183,7 +14188,7 @@ bool SMPInstr::BuildMoveRTL(SMPoperator GuardOp) {
unsigned short opcode = this->GetIDAOpcode();
#if IDA_SDK_VERSION < 600
- if ((NN_ldmxcsr == opcode) || (NN_stmxcsr == opcode)) {
+ if ((STARS_NN_ldmxcsr == opcode) || (STARS_NN_stmxcsr == opcode)) {
// IDA 5.1 does not have the R_mxcsr enumeration value,
// so we cannot handle these opcodes.
return false;
@@ -14193,23 +14198,23 @@ bool SMPInstr::BuildMoveRTL(SMPoperator GuardOp) {
SMPRegTransfer *TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
- STARSOpndTypePtr EAXOp = this->STARSInstPtr->MakeRegOpnd(R_ax);
- STARSOpndTypePtr ALOp = this->STARSInstPtr->MakeRegOpnd(R_al);
+ STARSOpndTypePtr EAXOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_ax);
+ STARSOpndTypePtr ALOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_al);
STARSOpndTypePtr FlagsOp = this->STARSInstPtr->MakeRegOpnd(X86_FLAGS_REG);
STARSOpndTypePtr FPRegOp = this->STARSInstPtr->MakeFloatingPointRegOpnd(MD_FIRST_FP_STACK_REG);
- STARSOpndTypePtr PortNumOp = this->STARSInstPtr->MakeRegOpnd(R_dx);
- STARSOpndTypePtr PortDataOp = this->STARSInstPtr->MakeRegOpnd(R_ax);
+ STARSOpndTypePtr PortNumOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_dx);
+ STARSOpndTypePtr PortDataOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_ax);
#if SMP_DEBUG_BUILD_RTL
- if (MemSrc && MemDest && (NN_movs != opcode) && (NN_movss != opcode) && (NN_movsd != opcode)) {
- if ((NN_stos != opcode) && (NN_outs != opcode)) {
+ if (MemSrc && MemDest && (STARS_NN_movs != opcode) && (STARS_NN_movss != opcode) && (STARS_NN_movsd != opcode)) {
+ if ((STARS_NN_stos != opcode) && (STARS_NN_outs != opcode)) {
SMP_msg("ERROR: IDA Pro error: MemDest and MemSrc in move at %lx for %s\n",
(unsigned long) this->GetAddr(), DisAsmText.GetDisAsm(this->GetAddr()));
this->PrintOperands();
}
#if 1
else { // IDA incorrectly lists [EDI] as both DEF and USE, because reg EDI
- // is both DEF and USE in NN_stos.
+ // is both DEF and USE in STARS_NN_stos.
SMP_msg("WARNING: Ignoring IDA Pro error: MemDest and MemSrc in move at %lx for %s\n",
(unsigned long) this->GetAddr(), DisAsmText.GetDisAsm(this->GetAddr()));
this->PrintOperands();
@@ -14219,30 +14224,30 @@ bool SMPInstr::BuildMoveRTL(SMPoperator GuardOp) {
#endif
// First, handle special cases with implicit operands
- if (NN_lahf == opcode) { // load AH from flags
+ if (STARS_NN_lahf == opcode) { // load AH from flags
TempRT->SetOperator(SMP_ASSIGN);
TempRT->SetLeftOperand(EAXOp);
TempRT->SetRightOperand(FlagsOp);
this->RTL.push_back(TempRT);
return true;
}
- if (NN_sahf == opcode) { // store AH to flags
+ if (STARS_NN_sahf == opcode) { // store AH to flags
TempRT->SetOperator(SMP_ASSIGN);
TempRT->SetLeftOperand(FlagsOp);
TempRT->SetRightOperand(EAXOp);
this->RTL.push_back(TempRT);
return true;
}
- if ((NN_movs == opcode) || (NN_stos == opcode) || (NN_ins == opcode) || (NN_outs == opcode)) {
+ if ((STARS_NN_movs == opcode) || (STARS_NN_stos == opcode) || (STARS_NN_ins == opcode) || (STARS_NN_outs == opcode)) {
// The ESI and EDI registers get incremented or decremented, depending
// on the direction flag DF, for MOVS; only EDI for STOS and INS;
// only ESI for OUTS.
// This is true with or without a repeat prefix.
- STARSOpndTypePtr ESIOp = this->STARSInstPtr->MakeRegOpnd(R_si);
- STARSOpndTypePtr EDIOp = this->STARSInstPtr->MakeRegOpnd(R_di);
- STARSOpndTypePtr ESIMemOp = this->STARSInstPtr->MakeMemPhraseOpnd(R_si, R_none, 0); // [esi]
- STARSOpndTypePtr EDIMemOp = this->STARSInstPtr->MakeMemPhraseOpnd(R_di, R_none, 0); // [edi]
- if (NN_movs == opcode) {
+ STARSOpndTypePtr ESIOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_si);
+ STARSOpndTypePtr EDIOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_di);
+ STARSOpndTypePtr ESIMemOp = this->STARSInstPtr->MakeMemPhraseOpnd(STARS_x86_R_si, STARS_x86_R_none, 0); // [esi]
+ STARSOpndTypePtr EDIMemOp = this->STARSInstPtr->MakeMemPhraseOpnd(STARS_x86_R_di, STARS_x86_R_none, 0); // [edi]
+ if (STARS_NN_movs == opcode) {
this->RTL.ExtraKills.push_back(ESIOp);
this->RTL.ExtraKills.push_back(EDIOp);
TempRT->SetOperator(SMP_ASSIGN);
@@ -14251,14 +14256,14 @@ bool SMPInstr::BuildMoveRTL(SMPoperator GuardOp) {
DestFound = true;
SourceFound = true;
}
- else if (NN_stos == opcode) {
+ else if (STARS_NN_stos == opcode) {
this->RTL.ExtraKills.push_back(EDIOp);
TempRT->SetOperator(SMP_ASSIGN);
TempRT->SetLeftOperand(EDIMemOp);
TempRT->SetRightOperand(ALOp); // default in case we don't find source later
DestFound = true;
}
- else if (NN_ins == opcode) {
+ else if (STARS_NN_ins == opcode) {
this->RTL.ExtraKills.push_back(EDIOp);
TempRT->SetOperator(SMP_INPUT);
TempRT->SetLeftOperand(EDIMemOp);
@@ -14266,7 +14271,7 @@ bool SMPInstr::BuildMoveRTL(SMPoperator GuardOp) {
DestFound = true;
SourceFound = true;
}
- else if (NN_outs == opcode) {
+ else if (STARS_NN_outs == opcode) {
this->RTL.ExtraKills.push_back(ESIOp);
TempRT->SetOperator(SMP_OUTPUT);
TempRT->SetLeftOperand(ESIMemOp);
@@ -14280,33 +14285,33 @@ bool SMPInstr::BuildMoveRTL(SMPoperator GuardOp) {
// an implicit source or destination, but the other operand of the load or store
// is explicit, so we set the implicit operand and let control flow pass to the
// main processing loop below.
- if ((NN_fld == opcode) || (NN_fbld == opcode) || (NN_fild == opcode)) {
+ if ((STARS_NN_fld == opcode) || (STARS_NN_fbld == opcode) || (STARS_NN_fild == opcode)) {
// Loads implicitly use the floating point stack top as destination.
TempRT->SetLeftOperand(FPRegOp);
TempRT->SetOperator(SMP_ASSIGN);
DestFound = true;
}
- else if ((NN_fst == opcode) || (NN_fstp == opcode) || (NN_fbstp == opcode)
- || (NN_fist == opcode) || (NN_fistp == opcode)) {
+ else if ((STARS_NN_fst == opcode) || (STARS_NN_fstp == opcode) || (STARS_NN_fbstp == opcode)
+ || (STARS_NN_fist == opcode) || (STARS_NN_fistp == opcode)) {
// Stores implicitly use the floating point stack top as source
TempRT->SetRightOperand(FPRegOp);
SourceFound = true;
// The "p" at the end of the opcode indicates that the floating point
// register stack gets popped.
- if ((NN_fstp == opcode) || (NN_fbstp == opcode) || (NN_fistp == opcode)) {
+ if ((STARS_NN_fstp == opcode) || (STARS_NN_fbstp == opcode) || (STARS_NN_fistp == opcode)) {
this->RTL.ExtraKills.push_back(FPRegOp);
}
}
#if IDA_SDK_VERSION > 599
- else if (NN_ldmxcsr == opcode) {
+ else if (STARS_NN_ldmxcsr == opcode) {
// The MMX Control & Status Register is used implicitly.
- STARSOpndTypePtr MXCSROp = this->STARSInstPtr->MakeRegOpnd(R_mxcsr); // MMX Control & Status Register
+ STARSOpndTypePtr MXCSROp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_mxcsr); // MMX Control & Status Register
TempRT->SetLeftOperand(MXCSROp);
DestFound = true;
}
- else if (NN_stmxcsr == opcode) {
+ else if (STARS_NN_stmxcsr == opcode) {
// The MMX Control & Status Register is used implicitly.
- STARSOpndTypePtr MXCSROp = this->STARSInstPtr->MakeRegOpnd(R_mxcsr); // MMX Control & Status Register
+ STARSOpndTypePtr MXCSROp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_mxcsr); // MMX Control & Status Register
TempRT->SetRightOperand(MXCSROp);
SourceFound = true;
}
@@ -14383,7 +14388,7 @@ bool SMPInstr::BuildMoveRTL(SMPoperator GuardOp) {
// Now, create the repeat prefix effects
if (HasRepeatPrefix) { // Must be MOVS or STOS or INS or OUTS
// The repeat causes USE and DEF of ECX as a counter
- STARSOpndTypePtr CountOp = this->STARSInstPtr->MakeRegOpnd(R_cx);
+ STARSOpndTypePtr CountOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_cx);
STARSOpndTypePtr VoidOp = this->STARSInstPtr->MakeVoidOpnd();
SMPRegTransfer *CounterRT = new SMPRegTransfer;
CounterRT->SetParentInst(this);
@@ -14416,19 +14421,19 @@ bool SMPInstr::BuildLoadStringRTL(void) {
if (MDKnownOperandType(TempOp)) {
if ((TempOp->IsRegOp()) && (this->STARSInstPtr->IsDefOpnd(OpNum))) { // DEF
DestFound = true;
- if (TempOp->MatchesReg(R_al)) {
+ if (TempOp->MatchesReg(STARS_x86_R_al)) {
ByteSize = 1;
- DestOp = this->STARSInstPtr->MakeRegOpnd(R_al);
+ DestOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_al);
}
- else if (TempOp->MatchesReg(R_ax)) {
- ByteSize = STARS_ISA_Bytewidth;
- DestOp = this->STARSInstPtr->MakeRegOpnd(R_ax);
+ else if (TempOp->MatchesReg(STARS_x86_R_ax)) {
+ ByteSize = global_STARS_program->GetSTARS_ISA_Bytewidth();
+ DestOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_ax);
}
else {
SMP_msg("ERROR: Load string destination operand is neither AL nor EAX at %lx\n",
(unsigned long) this->GetAddr());
ByteSize = 1; // default to AL destination
- DestOp = this->STARSInstPtr->MakeRegOpnd(R_al);
+ DestOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_al);
}
}
}
@@ -14442,8 +14447,8 @@ bool SMPInstr::BuildLoadStringRTL(void) {
STARSOpndTypePtr ZeroOp = this->STARSInstPtr->MakeImmediateOpnd(0);
STARSOpndTypePtr OneOp = this->STARSInstPtr->MakeImmediateOpnd(1);
STARSOpndTypePtr FlagsOp = this->STARSInstPtr->MakeRegOpnd(X86_FLAGS_REG);
- STARSOpndTypePtr ESIOp = this->STARSInstPtr->MakeRegOpnd(R_si);
- STARSOpndTypePtr DerefESIOp = this->STARSInstPtr->MakeMemPhraseOpnd(R_si, R_none, 0);
+ STARSOpndTypePtr ESIOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_si);
+ STARSOpndTypePtr DerefESIOp = this->STARSInstPtr->MakeMemPhraseOpnd(STARS_x86_R_si, STARS_x86_R_none, 0);
SMPRegTransfer *TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
@@ -14572,7 +14577,7 @@ bool SMPInstr::BuildCompareStringRTL(void) {
CounterRT->SetParentInst(this);
SMPRegTransfer *RightRT = new SMPRegTransfer;
RightRT->SetParentInst(this);
- STARSOpndTypePtr CountOp = this->STARSInstPtr->MakeRegOpnd(R_cx);
+ STARSOpndTypePtr CountOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_cx);
STARSOpndTypePtr VoidOp = this->STARSInstPtr->MakeVoidOpnd();
CounterRT->SetLeftOperand(CountOp);
CounterRT->SetOperator(SMP_ASSIGN);
@@ -14766,7 +14771,7 @@ bool SMPInstr::BuildCompareExchangeRTL(void) {
else {
// Create the first effect, if (dest == EAX) dest := src
SMPGuard *Guard1 = new SMPGuard;
- STARSOpndTypePtr EAXOp = this->STARSInstPtr->MakeRegOpnd(R_ax);
+ STARSOpndTypePtr EAXOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_ax);
Guard1->SetLeftOperand(DestOp);
Guard1->SetOperator(SMP_EQUAL);
Guard1->SetRightOperand(EAXOp);
@@ -14858,7 +14863,7 @@ bool SMPInstr::BuildFlagsDestBinaryRTL(SMPoperator BinaryOp) {
unsigned short opcode = this->GetIDAOpcode();
bool Source1Found = false;
bool Source2Found = false;
- bool NoOperandsRequired = ((NN_scas == opcode) || (NN_cmps == opcode));
+ bool NoOperandsRequired = ((STARS_NN_scas == opcode) || (STARS_NN_cmps == opcode));
bool HasRepeatPrefix = this->STARSInstPtr->HasAnyRepeatPrefix();
SMPRegTransfer *TempRT = new SMPRegTransfer;
@@ -14872,8 +14877,8 @@ bool SMPInstr::BuildFlagsDestBinaryRTL(SMPoperator BinaryOp) {
// an implicit source or destination, but the other operand of the load or store
// is explicit, so we set the implicit operand and let control flow pass to the
// main processing loop below.
- if ((NN_fcomi == opcode) || (NN_fucomi == opcode) || (NN_fcomip == opcode)
- || (NN_fucomip == opcode)) {
+ if ((STARS_NN_fcomi == opcode) || (STARS_NN_fucomi == opcode) || (STARS_NN_fcomip == opcode)
+ || (STARS_NN_fucomip == opcode)) {
// Compares implicitly use the floating point stack top as destination.
STARSOpndTypePtr FPRegOp = this->STARSInstPtr->MakeFloatingPointRegOpnd(MD_FIRST_FP_STACK_REG);
TempRT->SetLeftOperand(FlagsOp);
@@ -14884,7 +14889,7 @@ bool SMPInstr::BuildFlagsDestBinaryRTL(SMPoperator BinaryOp) {
Source1Found = true;
// The "p" at the end of the opcode indicates that the floating point
// register stack gets popped.
- if ((NN_fcomip == opcode) || (NN_fucomip == opcode)) {
+ if ((STARS_NN_fcomip == opcode) || (STARS_NN_fucomip == opcode)) {
this->RTL.ExtraKills.push_back(FPRegOp);
}
}
@@ -14944,7 +14949,7 @@ bool SMPInstr::BuildFlagsDestBinaryRTL(SMPoperator BinaryOp) {
CounterRT->SetParentInst(this);
SMPRegTransfer *RightRT = new SMPRegTransfer;
RightRT->SetParentInst(this);
- STARSOpndTypePtr CountOp = this->STARSInstPtr->MakeRegOpnd(R_cx);
+ STARSOpndTypePtr CountOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_cx);
CounterRT->SetLeftOperand(CountOp);
CounterRT->SetOperator(SMP_ASSIGN);
RightRT->SetLeftOperand(CountOp);
@@ -14954,15 +14959,15 @@ bool SMPInstr::BuildFlagsDestBinaryRTL(SMPoperator BinaryOp) {
CounterRT->SetRightTree(RightRT);
this->RTL.push_back(CounterRT);
}
- if ((NN_cmps == opcode) || (NN_scas == opcode)) {
+ if ((STARS_NN_cmps == opcode) || (STARS_NN_scas == opcode)) {
// The ESI and EDI registers get incremented or decremented, depending
// on the direction flag DF, for CMPS; only EDI for SCAS.
// This is true with or without a repeat prefix.
- if (NN_cmps == opcode) {
- STARSOpndTypePtr ESIOp = this->STARSInstPtr->MakeRegOpnd(R_si);
+ if (STARS_NN_cmps == opcode) {
+ STARSOpndTypePtr ESIOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_si);
this->RTL.ExtraKills.push_back(ESIOp);
}
- STARSOpndTypePtr EDIOp = this->STARSInstPtr->MakeRegOpnd(R_di);
+ STARSOpndTypePtr EDIOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_di);
this->RTL.ExtraKills.push_back(EDIOp);
}
}
@@ -15015,22 +15020,22 @@ bool SMPInstr::BuildCallRTL(void) {
// Build the RTL for a return instruction, with or without extra bytes popped off stack
bool SMPInstr::BuildReturnRTL(void) {
std::size_t OpNum;
- uintptr_t PopBytes = STARS_ISA_Bytewidth; // default: pop off return address
+ uintptr_t PopBytes = global_STARS_program->GetSTARS_ISA_Bytewidth(); // default: pop off return address
switch (this->GetIDAOpcode()) {
// Returns modified by operand size prefixes
- case NN_retnw: // Return Near from Procedure (use16)
- case NN_retfw: // Return Far from Procedure (use16)
+ case STARS_NN_retnw: // Return Near from Procedure (use16)
+ case STARS_NN_retfw: // Return Far from Procedure (use16)
PopBytes = 2;
break;
- case NN_retnd: // Return Near from Procedure (use32)
- case NN_retfd: // Return Far from Procedure (use32)
+ case STARS_NN_retnd: // Return Near from Procedure (use32)
+ case STARS_NN_retfd: // Return Far from Procedure (use32)
PopBytes = 4;
break;
- case NN_retnq: // Return Near from Procedure (use64)
- case NN_retfq: // Return Far from Procedure (use64)
+ case STARS_NN_retnq: // Return Near from Procedure (use64)
+ case STARS_NN_retfq: // Return Far from Procedure (use64)
PopBytes = 8;
break;
}
@@ -15091,9 +15096,9 @@ bool SMPInstr::BuildEnterRTL(void) {
STARSOpndTypePtr StackPointerOp = this->STARSInstPtr->MakeRegOpnd(MD_STACK_POINTER_REG);
STARSOpndTypePtr FramePointerOp = this->STARSInstPtr->MakeRegOpnd(MD_FRAME_POINTER_REG);
- STARSOpndTypePtr ImmedWordSizeOp = this->STARSInstPtr->MakeImmediateOpnd((STARS_uval_t) STARS_ISA_Bytewidth);
+ STARSOpndTypePtr ImmedWordSizeOp = this->STARSInstPtr->MakeImmediateOpnd((STARS_uval_t) global_STARS_program->GetSTARS_ISA_Bytewidth());
- STARSOpndTypePtr SavedEBP = this->STARSInstPtr->MakeMemDisplacementOpnd(MD_STACK_POINTER_REG, R_none, 0, (-((STARS_ea_t) STARS_ISA_Bytewidth)));
+ STARSOpndTypePtr SavedEBP = this->STARSInstPtr->MakeMemDisplacementOpnd(MD_STACK_POINTER_REG, STARS_x86_R_none, 0, (-((STARS_ea_t) global_STARS_program->GetSTARS_ISA_Bytewidth())));
// [ESP-4 or 8], location of saved EBP
for (OpNum = 0; !(AllocFound && NestingLevelFound) && (OpNum < UA_MAXOP); ++OpNum) {
@@ -15163,7 +15168,7 @@ bool SMPInstr::BuildEnterRTL(void) {
RightRT = NULL;
// Add final effect on stack pointer
- AllocBytes += (STARS_ISA_Bytewidth * (NestingLevel + 1));
+ AllocBytes += (global_STARS_program->GetSTARS_ISA_Bytewidth() * (NestingLevel + 1));
if (0 != NestingLevel) {
SMP_msg("WARNING: Nested procedures in ENTER instruction at %lx : %s\n",
(unsigned long) this->GetAddr(), DisAsmText.GetDisAsm(this->GetAddr()));
@@ -15184,8 +15189,8 @@ bool SMPInstr::BuildLeaveRTL(void) {
// esp := ebp + wordsize; ebp := [ebp+0] as our two parallel effects
STARSOpndTypePtr StackPointerOp = this->STARSInstPtr->MakeRegOpnd(MD_STACK_POINTER_REG);
STARSOpndTypePtr FramePointerOp = this->STARSInstPtr->MakeRegOpnd(MD_FRAME_POINTER_REG);
- STARSOpndTypePtr ImmedWordSizeOp = this->STARSInstPtr->MakeImmediateOpnd((STARS_uval_t) STARS_ISA_Bytewidth);
- STARSOpndTypePtr SavedEBP = this->STARSInstPtr->MakeMemDisplacementOpnd(MD_FRAME_POINTER_REG, R_none, 0, 0);
+ STARSOpndTypePtr ImmedWordSizeOp = this->STARSInstPtr->MakeImmediateOpnd((STARS_uval_t) global_STARS_program->GetSTARS_ISA_Bytewidth());
+ STARSOpndTypePtr SavedEBP = this->STARSInstPtr->MakeMemDisplacementOpnd(MD_FRAME_POINTER_REG, STARS_x86_R_none, 0, 0);
// Build first effect: ESP := EBP + wordsize
SMPRegTransfer *TempRT = new SMPRegTransfer;
@@ -15216,13 +15221,13 @@ bool SMPInstr::BuildLeaveRTL(void) {
// Build OptCategory 8 RTLs, which set system info into EDX:EAX.
bool SMPInstr::BuildOptType8RTL(void) {
- STARSOpndTypePtr DestOp1 = this->STARSInstPtr->MakeRegOpnd(R_dx);
- STARSOpndTypePtr DestOp2 = this->STARSInstPtr->MakeRegOpnd(R_ax);
+ STARSOpndTypePtr DestOp1 = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_dx);
+ STARSOpndTypePtr DestOp2 = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_ax);
STARSOpndTypePtr VoidOp = this->STARSInstPtr->MakeVoidOpnd();
STARSOpndTypePtr LeftOp = nullptr;
- if (NN_xgetbv == this->GetIDAOpcode()) {
+ if (STARS_NN_xgetbv == this->GetIDAOpcode()) {
// AMD xgetbv opcode gets control register number to read out of ECX.
- LeftOp = this->STARSInstPtr->MakeRegOpnd(R_cx);
+ LeftOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_cx);
}
else {
LeftOp = VoidOp;
@@ -15264,8 +15269,8 @@ bool SMPInstr::BuildJumpRTL(SMPoperator CondBranchOp) {
std::size_t OpNum;
bool TargetFound = false;
SMPRegTransfer *TempRT = NULL;
- STARSOpndTypePtr EIPOp = this->STARSInstPtr->MakeRegOpnd(R_ip);
- STARSOpndTypePtr CountOp = this->STARSInstPtr->MakeRegOpnd(R_cx);
+ STARSOpndTypePtr EIPOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_ip);
+ STARSOpndTypePtr CountOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_cx);
STARSOpndTypePtr FlagsOp = this->STARSInstPtr->MakeRegOpnd(X86_FLAGS_REG);
STARSOpndTypePtr ZeroOp = this->STARSInstPtr->MakeImmediateOpnd(0);
@@ -15292,7 +15297,7 @@ bool SMPInstr::BuildJumpRTL(SMPoperator CondBranchOp) {
SMPGuard *BranchCondition = new SMPGuard;
BranchCondition->SetOperator(CondBranchOp);
// The conditional jumps on ECX==0 compare to ECX, not EFLAGS.
- if ((NN_jcxz <= this->GetIDAOpcode()) && (NN_jrcxz >= this->GetIDAOpcode()))
+ if ((STARS_NN_jcxz <= this->GetIDAOpcode()) && (STARS_NN_jrcxz >= this->GetIDAOpcode()))
BranchCondition->SetLeftOperand(CountOp);
else
BranchCondition->SetLeftOperand(FlagsOp);
@@ -15318,7 +15323,7 @@ void SMPInstr::AddToStackPointer(STARS_uval_t delta) {
TempRT->SetParentInst(this);
SMPRegTransfer *RightRT = new SMPRegTransfer;
RightRT->SetParentInst(this);
- STARSOpndTypePtr StackOp = this->STARSInstPtr->MakeRegOpnd(R_sp);
+ STARSOpndTypePtr StackOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_sp);
STARSOpndTypePtr DeltaOp = this->STARSInstPtr->MakeImmediateOpnd(delta);
TempRT->SetLeftOperand(StackOp); // ESP := RightRT
@@ -15337,7 +15342,7 @@ void SMPInstr::SubFromStackPointer(STARS_uval_t delta) {
TempRT->SetParentInst(this);
SMPRegTransfer *RightRT = new SMPRegTransfer;
RightRT->SetParentInst(this);
- STARSOpndTypePtr StackOp = this->STARSInstPtr->MakeRegOpnd(R_sp);
+ STARSOpndTypePtr StackOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_sp);
STARSOpndTypePtr DeltaOp = this->STARSInstPtr->MakeImmediateOpnd(delta);
TempRT->SetLeftOperand(StackOp); // ESP := RightRT
@@ -15350,10 +15355,10 @@ void SMPInstr::SubFromStackPointer(STARS_uval_t delta) {
return;
} // end of SMPInstr::SubFromStackPointer()
-#define SMP_FIRST_POP_FLAGS NN_popfw
-#define SMP_LAST_POP_FLAGS NN_popfq
-#define SMP_FIRST_POP_ALL NN_popaw
-#define SMP_LAST_POP_ALL NN_popaq
+#define SMP_FIRST_POP_FLAGS STARS_NN_popfw
+#define SMP_LAST_POP_FLAGS STARS_NN_popfq
+#define SMP_FIRST_POP_ALL STARS_NN_popaw
+#define SMP_LAST_POP_ALL STARS_NN_popaq
// Build the RTL for a pop instruction
bool SMPInstr::BuildPopRTL(void) {
std::size_t OpNum, OpSize;
@@ -15363,7 +15368,7 @@ bool SMPInstr::BuildPopRTL(void) {
// Handle special cases first.
if ((SMP_FIRST_POP_FLAGS <= this->GetIDAOpcode()) && (SMP_LAST_POP_FLAGS >= this->GetIDAOpcode())) {
STARSOpndTypePtr FlagsOp = this->STARSInstPtr->MakeRegOpnd(X86_FLAGS_REG);
- STARSOpndTypePtr StackOp = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0, 0); // [ESP+0]
+ STARSOpndTypePtr StackOp = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0, 0); // [ESP+0]
TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
TempRT->SetLeftOperand(FlagsOp);
@@ -15372,7 +15377,7 @@ bool SMPInstr::BuildPopRTL(void) {
this->RTL.push_back(TempRT);
TempRT = NULL;
// Now create the stack pointer increment effect.
- this->AddToStackPointer(STARS_ISA_Bytewidth);
+ this->AddToStackPointer(global_STARS_program->GetSTARS_ISA_Bytewidth());
return true;
}
@@ -15382,9 +15387,9 @@ bool SMPInstr::BuildPopRTL(void) {
// adjusted at the end, per the Intel instruction manuals.
// EDI comes from [ESP+0]
- STARSOpndTypePtr EDIOp = this->STARSInstPtr->MakeRegOpnd(R_di);
- STARSOpndTypePtr StackOp0 = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0,
- ((STARS_ea_t) 0 * STARS_ISA_Bytewidth));
+ STARSOpndTypePtr EDIOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_di);
+ STARSOpndTypePtr StackOp0 = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0,
+ ((STARS_ea_t) 0 * global_STARS_program->GetSTARS_ISA_Bytewidth()));
TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
TempRT->SetLeftOperand(EDIOp);
@@ -15394,9 +15399,9 @@ bool SMPInstr::BuildPopRTL(void) {
TempRT = NULL;
// ESI comes from [ESP+4 or 8]
- STARSOpndTypePtr ESIOp = this->STARSInstPtr->MakeRegOpnd(R_si);
- STARSOpndTypePtr StackOp1 = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0,
- ((STARS_ea_t) 1 * STARS_ISA_Bytewidth));
+ STARSOpndTypePtr ESIOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_si);
+ STARSOpndTypePtr StackOp1 = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0,
+ ((STARS_ea_t) 1 * global_STARS_program->GetSTARS_ISA_Bytewidth()));
TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
TempRT->SetLeftOperand(ESIOp);
@@ -15406,9 +15411,9 @@ bool SMPInstr::BuildPopRTL(void) {
TempRT = NULL;
// EBP comes from [ESP+8 or 16]
- STARSOpndTypePtr EBPOp = this->STARSInstPtr->MakeRegOpnd(R_bp);
- STARSOpndTypePtr StackOp2 = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0,
- ((STARS_ea_t) 2 * STARS_ISA_Bytewidth));
+ STARSOpndTypePtr EBPOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_bp);
+ STARSOpndTypePtr StackOp2 = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0,
+ ((STARS_ea_t) 2 * global_STARS_program->GetSTARS_ISA_Bytewidth()));
TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
TempRT->SetLeftOperand(EBPOp);
@@ -15420,9 +15425,9 @@ bool SMPInstr::BuildPopRTL(void) {
// Skip over saved ESP at [ESP+12 or 24]
// EBX comes from [ESP+16 or 32]
- STARSOpndTypePtr EBXOp = this->STARSInstPtr->MakeRegOpnd(R_bx);
- STARSOpndTypePtr StackOp4 = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0,
- ((STARS_ea_t) 4 * STARS_ISA_Bytewidth));
+ STARSOpndTypePtr EBXOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_bx);
+ STARSOpndTypePtr StackOp4 = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0,
+ ((STARS_ea_t) 4 * global_STARS_program->GetSTARS_ISA_Bytewidth()));
TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
TempRT->SetLeftOperand(EBXOp);
@@ -15432,9 +15437,9 @@ bool SMPInstr::BuildPopRTL(void) {
TempRT = NULL;
// EDX comes from [ESP+20 or 40]
- STARSOpndTypePtr EDXOp = this->STARSInstPtr->MakeRegOpnd(R_dx);
- STARSOpndTypePtr StackOp5 = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0,
- ((STARS_ea_t) 5 * STARS_ISA_Bytewidth));
+ STARSOpndTypePtr EDXOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_dx);
+ STARSOpndTypePtr StackOp5 = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0,
+ ((STARS_ea_t) 5 * global_STARS_program->GetSTARS_ISA_Bytewidth()));
TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
TempRT->SetLeftOperand(EDXOp);
@@ -15444,9 +15449,9 @@ bool SMPInstr::BuildPopRTL(void) {
TempRT = NULL;
// ECX comes from [ESP+24 or 48]
- STARSOpndTypePtr ECXOp = this->STARSInstPtr->MakeRegOpnd(R_cx);
- STARSOpndTypePtr StackOp6 = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0,
- ((STARS_ea_t) 6 * STARS_ISA_Bytewidth));
+ STARSOpndTypePtr ECXOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_cx);
+ STARSOpndTypePtr StackOp6 = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0,
+ ((STARS_ea_t) 6 * global_STARS_program->GetSTARS_ISA_Bytewidth()));
TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
TempRT->SetLeftOperand(ECXOp);
@@ -15456,9 +15461,9 @@ bool SMPInstr::BuildPopRTL(void) {
TempRT = NULL;
// EAX comes from [ESP+28 or 56]
- STARSOpndTypePtr EAXOp = this->STARSInstPtr->MakeRegOpnd(R_ax);
- STARSOpndTypePtr StackOp7 = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0,
- ((STARS_ea_t) 7 * STARS_ISA_Bytewidth));
+ STARSOpndTypePtr EAXOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_ax);
+ STARSOpndTypePtr StackOp7 = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0,
+ ((STARS_ea_t) 7 * global_STARS_program->GetSTARS_ISA_Bytewidth()));
TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
TempRT->SetLeftOperand(EAXOp);
@@ -15468,7 +15473,7 @@ bool SMPInstr::BuildPopRTL(void) {
TempRT = NULL;
// Now create the stack pointer increment effect.
- this->AddToStackPointer(8*STARS_ISA_Bytewidth);
+ this->AddToStackPointer(8*global_STARS_program->GetSTARS_ISA_Bytewidth());
return true;
} // end for "pop all" instructions
@@ -15485,7 +15490,7 @@ bool SMPInstr::BuildPopRTL(void) {
TempRT->SetLeftOperand(TempOp);
TempRT->SetOperator(SMP_ASSIGN);
OpSize = GetOpDataSize(TempOp);
- STARSOpndTypePtr StackOp = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0, 0);
+ STARSOpndTypePtr StackOp = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0, 0);
TempRT->SetRightOperand(StackOp);
this->RTL.push_back(TempRT);
// Now create the stack pointer increment effect.
@@ -15502,10 +15507,10 @@ bool SMPInstr::BuildPopRTL(void) {
return DestFound;
} // end of SMPInstr::BuildPopRTL()
-#define SMP_FIRST_PUSH_FLAGS NN_pushfw
-#define SMP_LAST_PUSH_FLAGS NN_pushfq
-#define SMP_FIRST_PUSH_ALL NN_pushaw
-#define SMP_LAST_PUSH_ALL NN_pushaq
+#define SMP_FIRST_PUSH_FLAGS STARS_NN_pushfw
+#define SMP_LAST_PUSH_FLAGS STARS_NN_pushfq
+#define SMP_FIRST_PUSH_ALL STARS_NN_pushaw
+#define SMP_LAST_PUSH_ALL STARS_NN_pushaq
// Build the RTL for a push instruction
bool SMPInstr::BuildPushRTL(void) {
std::size_t OpNum, OpSize;
@@ -15515,8 +15520,8 @@ bool SMPInstr::BuildPushRTL(void) {
// Handle special cases first.
if ((SMP_FIRST_PUSH_FLAGS <= this->GetIDAOpcode()) && (SMP_LAST_PUSH_FLAGS >= this->GetIDAOpcode())) {
STARSOpndTypePtr FlagsOp = this->STARSInstPtr->MakeRegOpnd(X86_FLAGS_REG);
- STARSOpndTypePtr StackOp = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0,
- -((STARS_ea_t) STARS_ISA_Bytewidth));
+ STARSOpndTypePtr StackOp = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0,
+ -((STARS_ea_t) global_STARS_program->GetSTARS_ISA_Bytewidth()));
TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
TempRT->SetRightOperand(FlagsOp);
@@ -15524,15 +15529,15 @@ bool SMPInstr::BuildPushRTL(void) {
TempRT->SetLeftOperand(StackOp);
this->RTL.push_back(TempRT);
// Now create the stack pointer increment effect.
- this->SubFromStackPointer(STARS_ISA_Bytewidth);
+ this->SubFromStackPointer(global_STARS_program->GetSTARS_ISA_Bytewidth());
return true;
}
if ((SMP_FIRST_PUSH_ALL <= this->GetIDAOpcode()) && (SMP_LAST_PUSH_ALL >= this->GetIDAOpcode())) {
// EDI goes to [ESP-32 or 64]
- STARSOpndTypePtr EDIOp = this->STARSInstPtr->MakeRegOpnd(R_di);
- STARSOpndTypePtr StackOp8 = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0,
- -((STARS_ea_t) 8 * STARS_ISA_Bytewidth));
+ STARSOpndTypePtr EDIOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_di);
+ STARSOpndTypePtr StackOp8 = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0,
+ -((STARS_ea_t) 8 * global_STARS_program->GetSTARS_ISA_Bytewidth()));
TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
TempRT->SetRightOperand(EDIOp);
@@ -15542,9 +15547,9 @@ bool SMPInstr::BuildPushRTL(void) {
TempRT = NULL;
// ESI goes to [ESP-28 or 56]
- STARSOpndTypePtr ESIOp = this->STARSInstPtr->MakeRegOpnd(R_si);
- STARSOpndTypePtr StackOp7 = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0,
- -((STARS_ea_t) 7 * STARS_ISA_Bytewidth));
+ STARSOpndTypePtr ESIOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_si);
+ STARSOpndTypePtr StackOp7 = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0,
+ -((STARS_ea_t) 7 * global_STARS_program->GetSTARS_ISA_Bytewidth()));
TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
TempRT->SetRightOperand(ESIOp);
@@ -15554,9 +15559,9 @@ bool SMPInstr::BuildPushRTL(void) {
TempRT = NULL;
// EBP goes to [ESP-24 or 48]
- STARSOpndTypePtr EBPOp = this->STARSInstPtr->MakeRegOpnd(R_bp);
- STARSOpndTypePtr StackOp6 = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0,
- -((STARS_ea_t) 6 * STARS_ISA_Bytewidth));
+ STARSOpndTypePtr EBPOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_bp);
+ STARSOpndTypePtr StackOp6 = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0,
+ -((STARS_ea_t) 6 * global_STARS_program->GetSTARS_ISA_Bytewidth()));
TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
TempRT->SetRightOperand(EBPOp);
@@ -15566,9 +15571,9 @@ bool SMPInstr::BuildPushRTL(void) {
TempRT = NULL;
// ESP goes to [ESP-20 or 40]
- STARSOpndTypePtr ESPOp = this->STARSInstPtr->MakeRegOpnd(R_sp);
- STARSOpndTypePtr StackOp5 = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0,
- -((STARS_ea_t) 5 * STARS_ISA_Bytewidth));
+ STARSOpndTypePtr ESPOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_sp);
+ STARSOpndTypePtr StackOp5 = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0,
+ -((STARS_ea_t) 5 * global_STARS_program->GetSTARS_ISA_Bytewidth()));
TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
TempRT->SetRightOperand(ESPOp);
@@ -15578,9 +15583,9 @@ bool SMPInstr::BuildPushRTL(void) {
TempRT = NULL;
// EBX goes to [ESP-16 or 32]
- STARSOpndTypePtr EBXOp = this->STARSInstPtr->MakeRegOpnd(R_bx);
- STARSOpndTypePtr StackOp4 = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0,
- -((STARS_ea_t) 4 * STARS_ISA_Bytewidth));
+ STARSOpndTypePtr EBXOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_bx);
+ STARSOpndTypePtr StackOp4 = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0,
+ -((STARS_ea_t) 4 * global_STARS_program->GetSTARS_ISA_Bytewidth()));
TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
TempRT->SetRightOperand(EBXOp);
@@ -15590,9 +15595,9 @@ bool SMPInstr::BuildPushRTL(void) {
TempRT = NULL;
// EDX goes to [ESP-12 or 24]
- STARSOpndTypePtr EDXOp = this->STARSInstPtr->MakeRegOpnd(R_dx);
- STARSOpndTypePtr StackOp3 = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0,
- -((STARS_ea_t) 3 * STARS_ISA_Bytewidth));
+ STARSOpndTypePtr EDXOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_dx);
+ STARSOpndTypePtr StackOp3 = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0,
+ -((STARS_ea_t) 3 * global_STARS_program->GetSTARS_ISA_Bytewidth()));
TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
TempRT->SetRightOperand(EDXOp);
@@ -15602,9 +15607,9 @@ bool SMPInstr::BuildPushRTL(void) {
TempRT = NULL;
// ECX goes to [ESP-8 or 16]
- STARSOpndTypePtr ECXOp = this->STARSInstPtr->MakeRegOpnd(R_cx);
- STARSOpndTypePtr StackOp2 = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0,
- -((STARS_ea_t) 2 * STARS_ISA_Bytewidth));
+ STARSOpndTypePtr ECXOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_cx);
+ STARSOpndTypePtr StackOp2 = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0,
+ -((STARS_ea_t) 2 * global_STARS_program->GetSTARS_ISA_Bytewidth()));
TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
TempRT->SetRightOperand(ECXOp);
@@ -15614,9 +15619,9 @@ bool SMPInstr::BuildPushRTL(void) {
TempRT = NULL;
// EAX goes to [ESP-4]
- STARSOpndTypePtr EAXOp = this->STARSInstPtr->MakeRegOpnd(R_ax);
- STARSOpndTypePtr StackOp1 = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0,
- -((STARS_ea_t) 1 * STARS_ISA_Bytewidth));
+ STARSOpndTypePtr EAXOp = this->STARSInstPtr->MakeRegOpnd(STARS_x86_R_ax);
+ STARSOpndTypePtr StackOp1 = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0,
+ -((STARS_ea_t) 1 * global_STARS_program->GetSTARS_ISA_Bytewidth()));
TempRT = new SMPRegTransfer;
TempRT->SetParentInst(this);
TempRT->SetRightOperand(EAXOp);
@@ -15626,7 +15631,7 @@ bool SMPInstr::BuildPushRTL(void) {
TempRT = NULL;
// Now create the stack pointer increment effect.
- this->SubFromStackPointer((STARS_uval_t) 8*STARS_ISA_Bytewidth);
+ this->SubFromStackPointer((STARS_uval_t) 8 * global_STARS_program->GetSTARS_ISA_Bytewidth());
return true;
} // end for "pop all" instructions
@@ -15643,7 +15648,7 @@ bool SMPInstr::BuildPushRTL(void) {
TempRT->SetParentInst(this);
TempRT->SetRightOperand(TempOp);
TempRT->SetOperator(SMP_ASSIGN);
- STARSOpndTypePtr StackOp = this->STARSInstPtr->MakeMemDisplacementOpnd(R_sp, R_none, 0,
+ STARSOpndTypePtr StackOp = this->STARSInstPtr->MakeMemDisplacementOpnd(STARS_x86_R_sp, STARS_x86_R_none, 0,
-((STARS_ea_t) OpSize));
TempRT->SetLeftOperand(StackOp);
this->RTL.push_back(TempRT);
@@ -15682,64 +15687,64 @@ bool SMPInstr::BuildRTL(void) {
}
switch (this->GetIDAOpcode()) {
- case NN_aaa: // ASCII Adjust after Addition
- case NN_aad: // ASCII Adjust AX before Division
- case NN_aam: // ASCII Adjust AX after Multiply
- case NN_aas: // ASCII Adjust AL after Subtraction
+ case STARS_NN_aaa: // ASCII Adjust after Addition
+ case STARS_NN_aad: // ASCII Adjust AX before Division
+ case STARS_NN_aam: // ASCII Adjust AX after Multiply
+ case STARS_NN_aas: // ASCII Adjust AL after Subtraction
return this->BuildUnaryRTL(SMP_UNARY_NUMERIC_OPERATION);
- case NN_adc: // Add with Carry
+ case STARS_NN_adc: // Add with Carry
#if SMP_BUILD_SPECIAL_ADC_SBB_RTL
return this->BuildBinaryPlusFlagsRTL(SMP_ADD_CARRY);
#else
return this->BuildBinaryRTL(SMP_ADD_CARRY);
#endif
- case NN_add: // Add
+ case STARS_NN_add: // Add
return this->BuildBinaryRTL(SMP_ADD);
- case NN_and: // Logical AND
+ case STARS_NN_and: // Logical AND
return this->BuildBinaryRTL(SMP_BITWISE_AND);
- case NN_arpl: // Adjust RPL Field of Selector
+ case STARS_NN_arpl: // Adjust RPL Field of Selector
return this->BuildBinaryRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_bound: // Check Array Index Against Bounds
+ case STARS_NN_bound: // Check Array Index Against Bounds
return this->BuildGuardedSignalRTL(SMP_SIGNAL);
- case NN_bsf: // Bit Scan Forward
- case NN_bsr: // Bit Scan Reverse
+ case STARS_NN_bsf: // Bit Scan Forward
+ case STARS_NN_bsr: // Bit Scan Reverse
return this->BuildUnary2OpndRTL(SMP_UNARY_NUMERIC_OPERATION);
- case NN_bt: // Bit Test
+ case STARS_NN_bt: // Bit Test
return this->BuildFlagsDestBinaryRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_btc: // Bit Test and Complement
- case NN_btr: // Bit Test and Reset
- case NN_bts: // Bit Test and Set
+ case STARS_NN_btc: // Bit Test and Complement
+ case STARS_NN_btr: // Bit Test and Reset
+ case STARS_NN_bts: // Bit Test and Set
// Has effects on both the carry flag and the first operand
this->RTL.ExtraKills.push_back(FlagsOp);
return this->BuildBinaryRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_call: // Call Procedure
- case NN_callfi: // Indirect Call Far Procedure
- case NN_callni: // Indirect Call Near Procedure
+ case STARS_NN_call: // Call Procedure
+ case STARS_NN_callfi: // Indirect Call Far Procedure
+ case STARS_NN_callni: // Indirect Call Near Procedure
return this->BuildCallRTL();
- case NN_cbw: // AL -> AX (with sign)
- case NN_cwde: // AX -> EAX (with sign)
- case NN_cdqe: // EAX -> RAX (with sign)
+ case STARS_NN_cbw: // AL -> AX (with sign)
+ case STARS_NN_cwde: // AX -> EAX (with sign)
+ case STARS_NN_cdqe: // EAX -> RAX (with sign)
return this->BuildUnaryRTL(SMP_SIGN_EXTEND);
- case NN_clc: // Clear Carry Flag
- case NN_cld: // Clear Direction Flag
+ case STARS_NN_clc: // Clear Carry Flag
+ case STARS_NN_cld: // Clear Direction Flag
return this->BuildUnaryRTL(SMP_UNARY_NUMERIC_OPERATION);
- case NN_cli: // Clear Interrupt Flag
- case NN_clts: // Clear Task-Switched Flag in CR0
+ case STARS_NN_cli: // Clear Interrupt Flag
+ case STARS_NN_clts: // Clear Task-Switched Flag in CR0
// We don't track the interrupt flag or the special registers,
// so we can just consider these to be no-ops.
- // NOTE: Shouldn't we killthe EFLAGS register on NN_cli ??!!??!!
+ // NOTE: Shouldn't we killthe EFLAGS register on STARS_NN_cli ??!!??!!
NopRT = new SMPRegTransfer;
NopRT->SetParentInst(this);
NopRT->SetOperator(SMP_NULL_OPERATOR);
@@ -15747,38 +15752,38 @@ bool SMPInstr::BuildRTL(void) {
NopRT = NULL;
return true;
- case NN_cmc: // Complement Carry Flag
+ case STARS_NN_cmc: // Complement Carry Flag
return this->BuildUnaryRTL(SMP_UNARY_NUMERIC_OPERATION);
- case NN_cmp: // Compare Two Operands
+ case STARS_NN_cmp: // Compare Two Operands
return this->BuildFlagsDestBinaryRTL(SMP_S_COMPARE);
- case NN_cmps: // Compare Strings
+ case STARS_NN_cmps: // Compare Strings
// Why do we no longer use BuildCompareStringRTL()? ****!!!!**** Test it!
return this->BuildFlagsDestBinaryRTL(SMP_U_COMPARE);
- case NN_cwd: // AX -> DX:AX (with sign)
- case NN_cdq: // EAX -> EDX:EAX (with sign)
- case NN_cqo: // RAX -> RDX:RAX (with sign)
+ case STARS_NN_cwd: // AX -> DX:AX (with sign)
+ case STARS_NN_cdq: // EAX -> EDX:EAX (with sign)
+ case STARS_NN_cqo: // RAX -> RDX:RAX (with sign)
return this->BuildUnary2OpndRTL(SMP_SIGN_EXTEND);
- case NN_daa: // Decimal Adjust AL after Addition
- case NN_das: // Decimal Adjust AL after Subtraction
+ case STARS_NN_daa: // Decimal Adjust AL after Addition
+ case STARS_NN_das: // Decimal Adjust AL after Subtraction
return this->BuildUnaryRTL(SMP_UNARY_NUMERIC_OPERATION);
- case NN_dec: // Decrement by 1
+ case STARS_NN_dec: // Decrement by 1
return this->BuildUnaryRTL(SMP_DECREMENT);
- case NN_div: // Unsigned Divide
+ case STARS_NN_div: // Unsigned Divide
return this->BuildMultiplyDivideRTL(SMP_U_DIVIDE);
- case NN_enterw: // Make Stack Frame for Procedure Parameters
- case NN_enter: // Make Stack Frame for Procedure Parameters
- case NN_enterd: // Make Stack Frame for Procedure Parameters
- case NN_enterq: // Make Stack Frame for Procedure Parameters
+ case STARS_NN_enterw: // Make Stack Frame for Procedure Parameters
+ case STARS_NN_enter: // Make Stack Frame for Procedure Parameters
+ case STARS_NN_enterd: // Make Stack Frame for Procedure Parameters
+ case STARS_NN_enterq: // Make Stack Frame for Procedure Parameters
return this->BuildEnterRTL();
- case NN_hlt: // Halt
+ case STARS_NN_hlt: // Halt
// Treat as a no-op
NopRT = new SMPRegTransfer;
NopRT->SetParentInst(this);
@@ -15787,188 +15792,188 @@ bool SMPInstr::BuildRTL(void) {
NopRT = NULL;
return true;
- case NN_idiv: // Signed Divide
+ case STARS_NN_idiv: // Signed Divide
return this->BuildMultiplyDivideRTL(SMP_S_DIVIDE);
- case NN_imul: // Signed Multiply
+ case STARS_NN_imul: // Signed Multiply
return this->BuildMultiplyDivideRTL(SMP_S_MULTIPLY);
- case NN_in: // Input from Port
+ case STARS_NN_in: // Input from Port
return this->BuildUnary2OpndRTL(SMP_INPUT);
- case NN_inc: // Increment by 1
+ case STARS_NN_inc: // Increment by 1
return this->BuildUnaryRTL(SMP_INCREMENT);
- case NN_ins: // Input Byte(s) from Port to String
+ case STARS_NN_ins: // Input Byte(s) from Port to String
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
break;
- case NN_int: // Call to Interrupt Procedure
- case NN_into: // Call to Interrupt Procedure if Overflow Flag = 1
- case NN_int3: // Trap to Debugger
+ case STARS_NN_int: // Call to Interrupt Procedure
+ case STARS_NN_into: // Call to Interrupt Procedure if Overflow Flag = 1
+ case STARS_NN_int3: // Trap to Debugger
return this->BuildCallRTL();
- case NN_iretw: // Interrupt Return
- case NN_iret: // Interrupt Return
- case NN_iretd: // Interrupt Return (use32)
- case NN_iretq: // Interrupt Return (use64)
+ case STARS_NN_iretw: // Interrupt Return
+ case STARS_NN_iret: // Interrupt Return
+ case STARS_NN_iretd: // Interrupt Return (use32)
+ case STARS_NN_iretq: // Interrupt Return (use64)
return this->BuildReturnRTL();
- case NN_ja: // Jump if Above (CF=0 & ZF=0)
- case NN_jae: // Jump if Above or Equal (CF=0)
- case NN_jb: // Jump if Below (CF=1)
- case NN_jbe: // Jump if Below or Equal (CF=1 | ZF=1)
- case NN_jc: // Jump if Carry (CF=1)
+ case STARS_NN_ja: // Jump if Above (CF=0 & ZF=0)
+ case STARS_NN_jae: // Jump if Above or Equal (CF=0)
+ case STARS_NN_jb: // Jump if Below (CF=1)
+ case STARS_NN_jbe: // Jump if Below or Equal (CF=1 | ZF=1)
+ case STARS_NN_jc: // Jump if Carry (CF=1)
return this->BuildJumpRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_jcxz: // Jump if CX is 0
- case NN_jecxz: // Jump if ECX is 0
- case NN_jrcxz: // Jump if RCX is 0
+ case STARS_NN_jcxz: // Jump if CX is 0
+ case STARS_NN_jecxz: // Jump if ECX is 0
+ case STARS_NN_jrcxz: // Jump if RCX is 0
return this->BuildJumpRTL(SMP_EQUAL); // special case in BuildJumpRTL()
- case NN_je: // Jump if Equal (ZF=1)
+ case STARS_NN_je: // Jump if Equal (ZF=1)
return this->BuildJumpRTL(SMP_EQUAL);
- case NN_jg: // Jump if Greater (ZF=0 & SF=OF)
+ case STARS_NN_jg: // Jump if Greater (ZF=0 & SF=OF)
return this->BuildJumpRTL(SMP_GREATER_THAN);
- case NN_jge: // Jump if Greater or Equal (SF=OF)
+ case STARS_NN_jge: // Jump if Greater or Equal (SF=OF)
return this->BuildJumpRTL(SMP_GREATER_EQUAL);
- case NN_jl: // Jump if Less (SF!=OF)
+ case STARS_NN_jl: // Jump if Less (SF!=OF)
return this->BuildJumpRTL(SMP_LESS_THAN);
- case NN_jle: // Jump if Less or Equal (ZF=1 | SF!=OF)
+ case STARS_NN_jle: // Jump if Less or Equal (ZF=1 | SF!=OF)
return this->BuildJumpRTL(SMP_LESS_EQUAL);
- case NN_jna: // Jump if Not Above (CF=1 | ZF=1)
- case NN_jnae: // Jump if Not Above or Equal (CF=1)
- case NN_jnb: // Jump if Not Below (CF=0)
- case NN_jnbe: // Jump if Not Below or Equal (CF=0 & ZF=0) a.k.a. ja
- case NN_jnc: // Jump if Not Carry (CF=0)
+ case STARS_NN_jna: // Jump if Not Above (CF=1 | ZF=1)
+ case STARS_NN_jnae: // Jump if Not Above or Equal (CF=1)
+ case STARS_NN_jnb: // Jump if Not Below (CF=0)
+ case STARS_NN_jnbe: // Jump if Not Below or Equal (CF=0 & ZF=0) a.k.a. ja
+ case STARS_NN_jnc: // Jump if Not Carry (CF=0)
return this->BuildJumpRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_jne: // Jump if Not Equal (ZF=0)
+ case STARS_NN_jne: // Jump if Not Equal (ZF=0)
return this->BuildJumpRTL(SMP_NOT_EQUAL);
- case NN_jng: // Jump if Not Greater (ZF=1 | SF!=OF) a.k.a. jle
+ case STARS_NN_jng: // Jump if Not Greater (ZF=1 | SF!=OF) a.k.a. jle
return this->BuildJumpRTL(SMP_LESS_EQUAL);
- case NN_jnge: // Jump if Not Greater or Equal (SF != OF) **
+ case STARS_NN_jnge: // Jump if Not Greater or Equal (SF != OF) **
return this->BuildJumpRTL(SMP_LESS_THAN);
- case NN_jnl: // Jump if Not Less (SF=OF) a.k.a. jge
+ case STARS_NN_jnl: // Jump if Not Less (SF=OF) a.k.a. jge
return this->BuildJumpRTL(SMP_GREATER_EQUAL);
- case NN_jnle: // Jump if Not Less or Equal (ZF=0 & SF=OF) a.k.a. jg
+ case STARS_NN_jnle: // Jump if Not Less or Equal (ZF=0 & SF=OF) a.k.a. jg
return this->BuildJumpRTL(SMP_GREATER_THAN);
- case NN_jno: // Jump if Not Overflow (OF=0)
- case NN_jnp: // Jump if Not Parity (PF=0)
- case NN_jns: // Jump if Not Sign (SF=0)
+ case STARS_NN_jno: // Jump if Not Overflow (OF=0)
+ case STARS_NN_jnp: // Jump if Not Parity (PF=0)
+ case STARS_NN_jns: // Jump if Not Sign (SF=0)
return this->BuildJumpRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_jnz: // Jump if Not Zero (ZF=0) a.k.a. jne
+ case STARS_NN_jnz: // Jump if Not Zero (ZF=0) a.k.a. jne
return this->BuildJumpRTL(SMP_NOT_EQUAL);
- case NN_jo: // Jump if Overflow (OF=1)
- case NN_jp: // Jump if Parity (PF=1)
- case NN_jpe: // Jump if Parity Even (PF=1)
- case NN_jpo: // Jump if Parity Odd (PF=0)
- case NN_js: // Jump if Sign (SF=1)
+ case STARS_NN_jo: // Jump if Overflow (OF=1)
+ case STARS_NN_jp: // Jump if Parity (PF=1)
+ case STARS_NN_jpe: // Jump if Parity Even (PF=1)
+ case STARS_NN_jpo: // Jump if Parity Odd (PF=0)
+ case STARS_NN_js: // Jump if Sign (SF=1)
return this->BuildJumpRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_jz: // Jump if Zero (ZF=1)
+ case STARS_NN_jz: // Jump if Zero (ZF=1)
return this->BuildJumpRTL(SMP_EQUAL);
- case NN_jmp: // Jump
- case NN_jmpfi: // Indirect Far Jump
- case NN_jmpni: // Indirect Near Jump
- case NN_jmpshort: // Jump Short (not used)
+ case STARS_NN_jmp: // Jump
+ case STARS_NN_jmpfi: // Indirect Far Jump
+ case STARS_NN_jmpni: // Indirect Near Jump
+ case STARS_NN_jmpshort: // Jump Short (not used)
return this->BuildJumpRTL(SMP_NULL_OPERATOR);
- case NN_lahf: // Load Flags into AH Register
+ case STARS_NN_lahf: // Load Flags into AH Register
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
- case NN_lar: // Load Access Right Byte
+ case STARS_NN_lar: // Load Access Right Byte
return false;
break;
- case NN_lea: // Load Effective Address
+ case STARS_NN_lea: // Load Effective Address
return this->BuildLeaRTL();
break;
- case NN_leavew: // High Level Procedure Exit
- case NN_leave: // High Level Procedure Exit
- case NN_leaved: // High Level Procedure Exit
- case NN_leaveq: // High Level Procedure Exit
+ case STARS_NN_leavew: // High Level Procedure Exit
+ case STARS_NN_leave: // High Level Procedure Exit
+ case STARS_NN_leaved: // High Level Procedure Exit
+ case STARS_NN_leaveq: // High Level Procedure Exit
return this->BuildLeaveRTL();
break;
- case NN_lgdt: // Load Global Descriptor Table Register
- case NN_lidt: // Load Interrupt Descriptor Table Register
+ case STARS_NN_lgdt: // Load Global Descriptor Table Register
+ case STARS_NN_lidt: // Load Interrupt Descriptor Table Register
return false;
break;
- case NN_lgs: // Load Full Pointer to GS:xx
- case NN_lss: // Load Full Pointer to SS:xx
- case NN_lds: // Load Full Pointer to DS:xx
- case NN_les: // Load Full Pointer to ES:xx
- case NN_lfs: // Load Full Pointer to FS:xx
- // These instructions differ from NN_lea only in setting
+ case STARS_NN_lgs: // Load Full Pointer to GS:xx
+ case STARS_NN_lss: // Load Full Pointer to SS:xx
+ case STARS_NN_lds: // Load Full Pointer to DS:xx
+ case STARS_NN_les: // Load Full Pointer to ES:xx
+ case STARS_NN_lfs: // Load Full Pointer to FS:xx
+ // These instructions differ from STARS_NN_lea only in setting
// a segment register in addition to a pointer. We are
// not yet tracking segment registers.
return this->BuildLeaRTL();
break;
- case NN_lldt: // Load Local Descriptor Table Register
- case NN_lmsw: // Load Machine Status Word
- case NN_lock: // Assert LOCK# Signal Prefix NOTE: This is now a no-op
+ case STARS_NN_lldt: // Load Local Descriptor Table Register
+ case STARS_NN_lmsw: // Load Machine Status Word
+ case STARS_NN_lock: // Assert LOCK# Signal Prefix NOTE: This is now a no-op
return false;
break;
- case NN_lods: // Load String
+ case STARS_NN_lods: // Load String
return this->BuildLoadStringRTL();
break;
- case NN_loopw: // Loop while ECX != 0
- case NN_loop: // Loop while CX != 0
- case NN_loopd: // Loop while ECX != 0
- case NN_loopq: // Loop while RCX != 0
- case NN_loopwe: // Loop while CX != 0 and ZF=1
- case NN_loope: // Loop while rCX != 0 and ZF=1
- case NN_loopde: // Loop while ECX != 0 and ZF=1
- case NN_loopqe: // Loop while RCX != 0 and ZF=1
- case NN_loopwne: // Loop while CX != 0 and ZF=0
- case NN_loopne: // Loop while rCX != 0 and ZF=0
- case NN_loopdne: // Loop while ECX != 0 and ZF=0
- case NN_loopqne: // Loop while RCX != 0 and ZF=0
+ case STARS_NN_loopw: // Loop while ECX != 0
+ case STARS_NN_loop: // Loop while CX != 0
+ case STARS_NN_loopd: // Loop while ECX != 0
+ case STARS_NN_loopq: // Loop while RCX != 0
+ case STARS_NN_loopwe: // Loop while CX != 0 and ZF=1
+ case STARS_NN_loope: // Loop while rCX != 0 and ZF=1
+ case STARS_NN_loopde: // Loop while ECX != 0 and ZF=1
+ case STARS_NN_loopqe: // Loop while RCX != 0 and ZF=1
+ case STARS_NN_loopwne: // Loop while CX != 0 and ZF=0
+ case STARS_NN_loopne: // Loop while rCX != 0 and ZF=0
+ case STARS_NN_loopdne: // Loop while ECX != 0 and ZF=0
+ case STARS_NN_loopqne: // Loop while RCX != 0 and ZF=0
return this->BuildLoopRTL(SMP_NULL_OPERATOR);
break;
- case NN_lsl: // Load Segment Limit
- case NN_ltr: // Load Task Register
+ case STARS_NN_lsl: // Load Segment Limit
+ case STARS_NN_ltr: // Load Task Register
return false;
break;
- case NN_mov: // Move Data
- case NN_movsp: // Move to/from Special Registers
- case NN_movs: // Move Byte(s) from String to String
+ case STARS_NN_mov: // Move Data
+ case STARS_NN_movsp: // Move to/from Special Registers
+ case STARS_NN_movs: // Move Byte(s) from String to String
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
- case NN_movsx: // Move with Sign-Extend
+ case STARS_NN_movsx: // Move with Sign-Extend
return this->BuildUnary2OpndRTL(SMP_SIGN_EXTEND);
- case NN_movzx: // Move with Zero-Extend
+ case STARS_NN_movzx: // Move with Zero-Extend
return this->BuildUnary2OpndRTL(SMP_ZERO_EXTEND);
- case NN_mul: // Unsigned Multiplication of AL or AX
+ case STARS_NN_mul: // Unsigned Multiplication of AL or AX
return this->BuildMultiplyDivideRTL(SMP_U_MULTIPLY);
- case NN_neg: // Two's Complement Negation
+ case STARS_NN_neg: // Two's Complement Negation
return this->BuildUnaryRTL(SMP_NEGATE);
- case NN_nop: // No Operation
+ case STARS_NN_nop: // No Operation
NopRT = new SMPRegTransfer;
NopRT->SetParentInst(this);
NopRT->SetOperator(SMP_NULL_OPERATOR);
@@ -15976,118 +15981,118 @@ bool SMPInstr::BuildRTL(void) {
NopRT = NULL;
return true;
- case NN_not: // One's Complement Negation
+ case STARS_NN_not: // One's Complement Negation
return this->BuildUnaryRTL(SMP_BITWISE_NOT);
- case NN_or: // Logical Inclusive OR
+ case STARS_NN_or: // Logical Inclusive OR
return this->BuildBinaryRTL(SMP_BITWISE_OR);
- case NN_out: // Output to Port
+ case STARS_NN_out: // Output to Port
return this->BuildUnary2OpndRTL(SMP_OUTPUT);
- case NN_outs: // Output Byte(s) to Port
+ case STARS_NN_outs: // Output Byte(s) to Port
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
break;
- case NN_pop: // Pop a word from the Stack
- case NN_popaw: // Pop all General Registers
- case NN_popa: // Pop all General Registers
- case NN_popad: // Pop all General Registers (use32)
- case NN_popaq: // Pop all General Registers (use64)
- case NN_popfw: // Pop Stack into Flags Register
- case NN_popf: // Pop Stack into Flags Register
- case NN_popfd: // Pop Stack into Eflags Register
- case NN_popfq: // Pop Stack into Rflags Register
+ case STARS_NN_pop: // Pop a word from the Stack
+ case STARS_NN_popaw: // Pop all General Registers
+ case STARS_NN_popa: // Pop all General Registers
+ case STARS_NN_popad: // Pop all General Registers (use32)
+ case STARS_NN_popaq: // Pop all General Registers (use64)
+ case STARS_NN_popfw: // Pop Stack into Flags Register
+ case STARS_NN_popf: // Pop Stack into Flags Register
+ case STARS_NN_popfd: // Pop Stack into Eflags Register
+ case STARS_NN_popfq: // Pop Stack into Rflags Register
return this->BuildPopRTL();
- case NN_push: // Push Operand onto the Stack
- case NN_pushaw: // Push all General Registers
- case NN_pusha: // Push all General Registers
- case NN_pushad: // Push all General Registers (use32)
- case NN_pushaq: // Push all General Registers (use64)
- case NN_pushfw: // Push Flags Register onto the Stack
- case NN_pushf: // Push Flags Register onto the Stack
- case NN_pushfd: // Push Flags Register onto the Stack (use32)
- case NN_pushfq: // Push Flags Register onto the Stack (use64)
+ case STARS_NN_push: // Push Operand onto the Stack
+ case STARS_NN_pushaw: // Push all General Registers
+ case STARS_NN_pusha: // Push all General Registers
+ case STARS_NN_pushad: // Push all General Registers (use32)
+ case STARS_NN_pushaq: // Push all General Registers (use64)
+ case STARS_NN_pushfw: // Push Flags Register onto the Stack
+ case STARS_NN_pushf: // Push Flags Register onto the Stack
+ case STARS_NN_pushfd: // Push Flags Register onto the Stack (use32)
+ case STARS_NN_pushfq: // Push Flags Register onto the Stack (use64)
return this->BuildPushRTL();
- case NN_rcl: // Rotate Through Carry Left
+ case STARS_NN_rcl: // Rotate Through Carry Left
return this->BuildBinaryPlusFlagsRTL(SMP_ROTATE_LEFT_CARRY);
- case NN_rcr: // Rotate Through Carry Right
+ case STARS_NN_rcr: // Rotate Through Carry Right
return this->BuildBinaryPlusFlagsRTL(SMP_ROTATE_RIGHT_CARRY);
- case NN_rol: // Rotate Left
+ case STARS_NN_rol: // Rotate Left
return this->BuildBinaryRTL(SMP_ROTATE_LEFT);
- case NN_ror: // Rotate Right
+ case STARS_NN_ror: // Rotate Right
return this->BuildBinaryRTL(SMP_ROTATE_RIGHT);
- case NN_rep: // Repeat String Operation
- case NN_repe: // Repeat String Operation while ZF=1
- case NN_repne: // Repeat String Operation while ZF=0
+ case STARS_NN_rep: // Repeat String Operation
+ case STARS_NN_repe: // Repeat String Operation while ZF=1
+ case STARS_NN_repne: // Repeat String Operation while ZF=0
return false;
break;
- case NN_retn: // Return Near from Procedure
- case NN_retf: // Return Far from Procedure
+ case STARS_NN_retn: // Return Near from Procedure
+ case STARS_NN_retf: // Return Far from Procedure
return this->BuildReturnRTL();
- case NN_sahf: // Store AH into Flags Register
+ case STARS_NN_sahf: // Store AH into Flags Register
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
- case NN_sal: // Shift Arithmetic Left
+ case STARS_NN_sal: // Shift Arithmetic Left
return this->BuildBinaryRTL(SMP_S_LEFT_SHIFT);
- case NN_sar: // Shift Arithmetic Right
+ case STARS_NN_sar: // Shift Arithmetic Right
return this->BuildBinaryRTL(SMP_S_RIGHT_SHIFT);
- case NN_shl: // Shift Logical Left
+ case STARS_NN_shl: // Shift Logical Left
return this->BuildBinaryRTL(SMP_U_LEFT_SHIFT);
- case NN_shr: // Shift Logical Right
+ case STARS_NN_shr: // Shift Logical Right
return this->BuildBinaryRTL(SMP_U_RIGHT_SHIFT);
- case NN_sbb: // Integer Subtraction with Borrow
+ case STARS_NN_sbb: // Integer Subtraction with Borrow
#if SMP_BUILD_SPECIAL_ADC_SBB_RTL
return this->BuildBinaryPlusFlagsRTL(SMP_SUBTRACT_BORROW);
#else
return this->BuildBinaryRTL(SMP_SUBTRACT_BORROW);
#endif
- case NN_scas: // Scan String
+ case STARS_NN_scas: // Scan String
return this->BuildFlagsDestBinaryRTL(SMP_U_COMPARE);
- case NN_seta: // Set Byte if Above (CF=0 & ZF=0)
- case NN_setae: // Set Byte if Above or Equal (CF=0)
- case NN_setb: // Set Byte if Below (CF=1)
- case NN_setbe: // Set Byte if Below or Equal (CF=1 | ZF=1)
- case NN_setc: // Set Byte if Carry (CF=1)
- case NN_sete: // Set Byte if Equal (ZF=1)
- case NN_setg: // Set Byte if Greater (ZF=0 & SF=OF)
- case NN_setge: // Set Byte if Greater or Equal (SF=OF)
- case NN_setl: // Set Byte if Less (SF!=OF)
- case NN_setle: // Set Byte if Less or Equal (ZF=1 | SF!=OF)
- case NN_setna: // Set Byte if Not Above (CF=1 | ZF=1)
- case NN_setnae: // Set Byte if Not Above or Equal (CF=1)
- case NN_setnb: // Set Byte if Not Below (CF=0)
- case NN_setnbe: // Set Byte if Not Below or Equal (CF=0 & ZF=0)
- case NN_setnc: // Set Byte if Not Carry (CF=0)
- case NN_setne: // Set Byte if Not Equal (ZF=0)
- case NN_setng: // Set Byte if Not Greater (ZF=1 | SF!=OF)
- case NN_setnge: // Set Byte if Not Greater or Equal (ZF=1)
- case NN_setnl: // Set Byte if Not Less (SF=OF)
- case NN_setnle: // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
- case NN_setno: // Set Byte if Not Overflow (OF=0)
- case NN_setnp: // Set Byte if Not Parity (PF=0)
- case NN_setns: // Set Byte if Not Sign (SF=0)
- case NN_setnz: // Set Byte if Not Zero (ZF=0)
- case NN_seto: // Set Byte if Overflow (OF=1)
- case NN_setp: // Set Byte if Parity (PF=1)
- case NN_setpe: // Set Byte if Parity Even (PF=1)
- case NN_setpo: // Set Byte if Parity Odd (PF=0)
- case NN_sets: // Set Byte if Sign (SF=1)
- case NN_setz: // Set Byte if Zero (ZF=1)
+ case STARS_NN_seta: // Set Byte if Above (CF=0 & ZF=0)
+ case STARS_NN_setae: // Set Byte if Above or Equal (CF=0)
+ case STARS_NN_setb: // Set Byte if Below (CF=1)
+ case STARS_NN_setbe: // Set Byte if Below or Equal (CF=1 | ZF=1)
+ case STARS_NN_setc: // Set Byte if Carry (CF=1)
+ case STARS_NN_sete: // Set Byte if Equal (ZF=1)
+ case STARS_NN_setg: // Set Byte if Greater (ZF=0 & SF=OF)
+ case STARS_NN_setge: // Set Byte if Greater or Equal (SF=OF)
+ case STARS_NN_setl: // Set Byte if Less (SF!=OF)
+ case STARS_NN_setle: // Set Byte if Less or Equal (ZF=1 | SF!=OF)
+ case STARS_NN_setna: // Set Byte if Not Above (CF=1 | ZF=1)
+ case STARS_NN_setnae: // Set Byte if Not Above or Equal (CF=1)
+ case STARS_NN_setnb: // Set Byte if Not Below (CF=0)
+ case STARS_NN_setnbe: // Set Byte if Not Below or Equal (CF=0 & ZF=0)
+ case STARS_NN_setnc: // Set Byte if Not Carry (CF=0)
+ case STARS_NN_setne: // Set Byte if Not Equal (ZF=0)
+ case STARS_NN_setng: // Set Byte if Not Greater (ZF=1 | SF!=OF)
+ case STARS_NN_setnge: // Set Byte if Not Greater or Equal (ZF=1)
+ case STARS_NN_setnl: // Set Byte if Not Less (SF=OF)
+ case STARS_NN_setnle: // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
+ case STARS_NN_setno: // Set Byte if Not Overflow (OF=0)
+ case STARS_NN_setnp: // Set Byte if Not Parity (PF=0)
+ case STARS_NN_setns: // Set Byte if Not Sign (SF=0)
+ case STARS_NN_setnz: // Set Byte if Not Zero (ZF=0)
+ case STARS_NN_seto: // Set Byte if Overflow (OF=1)
+ case STARS_NN_setp: // Set Byte if Parity (PF=1)
+ case STARS_NN_setpe: // Set Byte if Parity Even (PF=1)
+ case STARS_NN_setpo: // Set Byte if Parity Odd (PF=0)
+ case STARS_NN_sets: // Set Byte if Sign (SF=1)
+ case STARS_NN_setz: // Set Byte if Zero (ZF=1)
// Destination always get set to NUMERIC 0 or 1, depending on
// the condition and the relevant flags bits. Best way to model
// this in an RTL is to perform an unspecified unary NUMERIC
@@ -16095,27 +16100,27 @@ bool SMPInstr::BuildRTL(void) {
// destination operand, making it always NUMERIC.
return this->BuildUnary2OpndRTL(SMP_UNARY_NUMERIC_OPERATION);
- case NN_sgdt: // Store Global Descriptor Table Register
- case NN_sidt: // Store Interrupt Descriptor Table Register
+ case STARS_NN_sgdt: // Store Global Descriptor Table Register
+ case STARS_NN_sidt: // Store Interrupt Descriptor Table Register
return false;
break;
- case NN_shld: // Double Precision Shift Left
+ case STARS_NN_shld: // Double Precision Shift Left
return this->BuildDoubleShiftRTL(SMP_U_LEFT_SHIFT);
- case NN_shrd: // Double Precision Shift Right
+ case STARS_NN_shrd: // Double Precision Shift Right
return this->BuildDoubleShiftRTL(SMP_U_RIGHT_SHIFT);
- case NN_sldt: // Store Local Descriptor Table Register
- case NN_smsw: // Store Machine Status Word
+ case STARS_NN_sldt: // Store Local Descriptor Table Register
+ case STARS_NN_smsw: // Store Machine Status Word
return false;
break;
- case NN_stc: // Set Carry Flag
- case NN_std: // Set Direction Flag
+ case STARS_NN_stc: // Set Carry Flag
+ case STARS_NN_std: // Set Direction Flag
return this->BuildUnaryRTL(SMP_UNARY_NUMERIC_OPERATION);
- case NN_sti: // Set Interrupt Flag
+ case STARS_NN_sti: // Set Interrupt Flag
NopRT = new SMPRegTransfer;
NopRT->SetParentInst(this);
NopRT->SetOperator(SMP_NULL_OPERATOR);
@@ -16123,39 +16128,39 @@ bool SMPInstr::BuildRTL(void) {
NopRT = NULL;
return true;
- case NN_stos: // Store String
+ case STARS_NN_stos: // Store String
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
- case NN_str: // Store Task Register
+ case STARS_NN_str: // Store Task Register
return false;
break;
- case NN_sub: // Integer Subtraction
+ case STARS_NN_sub: // Integer Subtraction
return this->BuildBinaryRTL(SMP_SUBTRACT);
- case NN_test: // Logical Compare
+ case STARS_NN_test: // Logical Compare
return this->BuildFlagsDestBinaryRTL(SMP_U_COMPARE);
- case NN_verr: // Verify a Segment for Reading
- case NN_verw: // Verify a Segment for Writing
- case NN_wait: // Wait until BUSY# Pin is Inactive (HIGH)
+ case STARS_NN_verr: // Verify a Segment for Reading
+ case STARS_NN_verw: // Verify a Segment for Writing
+ case STARS_NN_wait: // Wait until BUSY# Pin is Inactive (HIGH)
NopRT = new SMPRegTransfer;
NopRT->SetParentInst(this);
NopRT->SetOperator(SMP_NULL_OPERATOR);
this->RTL.push_back(NopRT);
NopRT = NULL;
- if (NN_wait != this->GetIDAOpcode())
+ if (STARS_NN_wait != this->GetIDAOpcode())
this->RTL.ExtraKills.push_back(FlagsOp);
return true;
- case NN_xchg: // Exchange Register/Memory with Register
+ case STARS_NN_xchg: // Exchange Register/Memory with Register
return this->BuildExchangeRTL();
- case NN_xlat: // Table Lookup Translation
+ case STARS_NN_xlat: // Table Lookup Translation
return false;
break;
- case NN_xor: // Logical Exclusive OR
+ case STARS_NN_xor: // Logical Exclusive OR
return this->BuildBinaryRTL(SMP_BITWISE_XOR);
@@ -16163,18 +16168,18 @@ bool SMPInstr::BuildRTL(void) {
// 486 instructions
//
- case NN_cmpxchg: // Compare and Exchange
+ case STARS_NN_cmpxchg: // Compare and Exchange
return this->BuildCompareExchangeRTL();
- case NN_bswap: // Swap bits in EAX
+ case STARS_NN_bswap: // Swap bits in EAX
return this->BuildUnaryRTL(SMP_UNARY_NUMERIC_OPERATION);
- case NN_xadd: // t<-dest; dest<-src+dest; src<-t
+ case STARS_NN_xadd: // t<-dest; dest<-src+dest; src<-t
return this->BuildExchangeAddRTL();
- case NN_invd: // Invalidate Data Cache
- case NN_wbinvd: // Invalidate Data Cache (write changes)
- case NN_invlpg: // Invalidate TLB entry
+ case STARS_NN_invd: // Invalidate Data Cache
+ case STARS_NN_wbinvd: // Invalidate Data Cache (write changes)
+ case STARS_NN_invlpg: // Invalidate TLB entry
NopRT = new SMPRegTransfer;
NopRT->SetParentInst(this);
NopRT->SetOperator(SMP_NULL_OPERATOR);
@@ -16186,24 +16191,24 @@ bool SMPInstr::BuildRTL(void) {
// Pentium instructions
//
- case NN_rdmsr: // Read Machine Status Register
+ case STARS_NN_rdmsr: // Read Machine Status Register
return this->BuildOptType8RTL();
- case NN_wrmsr: // Write Machine Status Register
+ case STARS_NN_wrmsr: // Write Machine Status Register
return false;
break;
- case NN_cpuid: // Get CPU ID
+ case STARS_NN_cpuid: // Get CPU ID
return this->BuildOptType8RTL();
- case NN_cmpxchg8b: // Compare and Exchange Eight Bytes
+ case STARS_NN_cmpxchg8b: // Compare and Exchange Eight Bytes
return false;
break;
- case NN_rdtsc: // Read Time Stamp Counter
+ case STARS_NN_rdtsc: // Read Time Stamp Counter
return this->BuildOptType8RTL();
- case NN_rsm: // Resume from System Management Mode
+ case STARS_NN_rsm: // Resume from System Management Mode
NopRT = new SMPRegTransfer;
NopRT->SetParentInst(this);
NopRT->SetOperator(SMP_NULL_OPERATOR);
@@ -16216,85 +16221,85 @@ bool SMPInstr::BuildRTL(void) {
// Pentium Pro instructions
//
- case NN_cmova: // Move if Above (CF=0 & ZF=0)
- case NN_cmovb: // Move if Below (CF=1)
- case NN_cmovbe: // Move if Below or Equal (CF=1 | ZF=1)
+ case STARS_NN_cmova: // Move if Above (CF=0 & ZF=0)
+ case STARS_NN_cmovb: // Move if Below (CF=1)
+ case STARS_NN_cmovbe: // Move if Below or Equal (CF=1 | ZF=1)
return this->BuildMoveRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_cmovg: // Move if Greater (ZF=0 & SF=OF)
+ case STARS_NN_cmovg: // Move if Greater (ZF=0 & SF=OF)
return this->BuildMoveRTL(SMP_GREATER_THAN);
- case NN_cmovge: // Move if Greater or Equal (SF=OF)
+ case STARS_NN_cmovge: // Move if Greater or Equal (SF=OF)
return this->BuildMoveRTL(SMP_GREATER_EQUAL);
- case NN_cmovl: // Move if Less (SF!=OF)
+ case STARS_NN_cmovl: // Move if Less (SF!=OF)
return this->BuildMoveRTL(SMP_LESS_THAN);
- case NN_cmovle: // Move if Less or Equal (ZF=1 | SF!=OF)
+ case STARS_NN_cmovle: // Move if Less or Equal (ZF=1 | SF!=OF)
return this->BuildMoveRTL(SMP_LESS_EQUAL);
- case NN_cmovnb: // Move if Not Below (CF=0)
- case NN_cmovno: // Move if Not Overflow (OF=0)
- case NN_cmovnp: // Move if Not Parity (PF=0)
- case NN_cmovns: // Move if Not Sign (SF=0)
+ case STARS_NN_cmovnb: // Move if Not Below (CF=0)
+ case STARS_NN_cmovno: // Move if Not Overflow (OF=0)
+ case STARS_NN_cmovnp: // Move if Not Parity (PF=0)
+ case STARS_NN_cmovns: // Move if Not Sign (SF=0)
return this->BuildMoveRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_cmovnz: // Move if Not Zero (ZF=0)
+ case STARS_NN_cmovnz: // Move if Not Zero (ZF=0)
return this->BuildMoveRTL(SMP_NOT_EQUAL);
- case NN_cmovo: // Move if Overflow (OF=1)
- case NN_cmovp: // Move if Parity (PF=1)
- case NN_cmovs: // Move if Sign (SF=1)
+ case STARS_NN_cmovo: // Move if Overflow (OF=1)
+ case STARS_NN_cmovp: // Move if Parity (PF=1)
+ case STARS_NN_cmovs: // Move if Sign (SF=1)
return this->BuildMoveRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_cmovz: // Move if Zero (ZF=1)
+ case STARS_NN_cmovz: // Move if Zero (ZF=1)
return this->BuildMoveRTL(SMP_EQUAL);
- case NN_fcmovb: // Floating Move if Below
+ case STARS_NN_fcmovb: // Floating Move if Below
return this->BuildMoveRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_fcmove: // Floating Move if Equal
+ case STARS_NN_fcmove: // Floating Move if Equal
return this->BuildMoveRTL(SMP_EQUAL);
- case NN_fcmovbe: // Floating Move if Below or Equal
+ case STARS_NN_fcmovbe: // Floating Move if Below or Equal
return this->BuildMoveRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_fcmovu: // Floating Move if Unordered
+ case STARS_NN_fcmovu: // Floating Move if Unordered
return this->BuildMoveRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_fcmovnb: // Floating Move if Not Below
+ case STARS_NN_fcmovnb: // Floating Move if Not Below
return this->BuildMoveRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_fcmovne: // Floating Move if Not Equal
+ case STARS_NN_fcmovne: // Floating Move if Not Equal
return this->BuildMoveRTL(SMP_NOT_EQUAL);
- case NN_fcmovnbe: // Floating Move if Not Below or Equal
+ case STARS_NN_fcmovnbe: // Floating Move if Not Below or Equal
return this->BuildMoveRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_fcmovnu: // Floating Move if Not Unordered
+ case STARS_NN_fcmovnu: // Floating Move if Not Unordered
return this->BuildMoveRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_fcomi: // FP Compare: result in EFLAGS
- case NN_fucomi: // FP Unordered Compare: result in EFLAGS
- case NN_fcomip: // FP Compare: result in EFLAGS: pop stack
- case NN_fucomip: // FP Unordered Compare: result in EFLAGS: pop stack
+ case STARS_NN_fcomi: // FP Compare: result in EFLAGS
+ case STARS_NN_fucomi: // FP Unordered Compare: result in EFLAGS
+ case STARS_NN_fcomip: // FP Compare: result in EFLAGS: pop stack
+ case STARS_NN_fucomip: // FP Unordered Compare: result in EFLAGS: pop stack
return this->BuildFlagsDestBinaryRTL(SMP_S_COMPARE);
break;
- case NN_rdpmc: // Read Performance Monitor Counter
+ case STARS_NN_rdpmc: // Read Performance Monitor Counter
return this->BuildOptType8RTL();
//
// FPP instructions
//
- case NN_fld: // Load Real
- case NN_fst: // Store Real
- case NN_fstp: // Store Real and Pop
+ case STARS_NN_fld: // Load Real
+ case STARS_NN_fst: // Store Real
+ case STARS_NN_fstp: // Store Real and Pop
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
- case NN_fxch: // Exchange Registers
+ case STARS_NN_fxch: // Exchange Registers
// FP registers remain NUMERIC anyway, so this is a no-op to our type system.
NopRT = new SMPRegTransfer;
NopRT->SetParentInst(this);
@@ -16303,53 +16308,53 @@ bool SMPInstr::BuildRTL(void) {
NopRT = NULL;
return true;
- case NN_fild: // Load Integer
+ case STARS_NN_fild: // Load Integer
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
- case NN_fist: // Store Integer
- case NN_fistp: // Store Integer and Pop
+ case STARS_NN_fist: // Store Integer
+ case STARS_NN_fistp: // Store Integer and Pop
return this->BuildBinaryRTL(SMP_CONVERT_FP_TO_INT);
- case NN_fbld: // Load BCD
- case NN_fbstp: // Store BCD and Pop
+ case STARS_NN_fbld: // Load BCD
+ case STARS_NN_fbstp: // Store BCD and Pop
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
- case NN_fadd: // Add Real
- case NN_faddp: // Add Real and Pop
- case NN_fiadd: // Add Integer
- case NN_fsub: // Subtract Real
- case NN_fsubp: // Subtract Real and Pop
- case NN_fisub: // Subtract Integer
- case NN_fsubr: // Subtract Real Reversed
- case NN_fsubrp: // Subtract Real Reversed and Pop
- case NN_fisubr: // Subtract Integer Reversed
- case NN_fmul: // Multiply Real
- case NN_fmulp: // Multiply Real and Pop
- case NN_fimul: // Multiply Integer
- case NN_fdiv: // Divide Real
- case NN_fdivp: // Divide Real and Pop
- case NN_fidiv: // Divide Integer
- case NN_fdivr: // Divide Real Reversed
- case NN_fdivrp: // Divide Real Reversed and Pop
- case NN_fidivr: // Divide Integer Reversed
+ case STARS_NN_fadd: // Add Real
+ case STARS_NN_faddp: // Add Real and Pop
+ case STARS_NN_fiadd: // Add Integer
+ case STARS_NN_fsub: // Subtract Real
+ case STARS_NN_fsubp: // Subtract Real and Pop
+ case STARS_NN_fisub: // Subtract Integer
+ case STARS_NN_fsubr: // Subtract Real Reversed
+ case STARS_NN_fsubrp: // Subtract Real Reversed and Pop
+ case STARS_NN_fisubr: // Subtract Integer Reversed
+ case STARS_NN_fmul: // Multiply Real
+ case STARS_NN_fmulp: // Multiply Real and Pop
+ case STARS_NN_fimul: // Multiply Integer
+ case STARS_NN_fdiv: // Divide Real
+ case STARS_NN_fdivp: // Divide Real and Pop
+ case STARS_NN_fidiv: // Divide Integer
+ case STARS_NN_fdivr: // Divide Real Reversed
+ case STARS_NN_fdivrp: // Divide Real Reversed and Pop
+ case STARS_NN_fidivr: // Divide Integer Reversed
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC, true);
- case NN_fsqrt: // Square Root
- case NN_fscale: // Scale: st(0) <- st(0) * 2^st(1)
- case NN_fprem: // Partial Remainder
- case NN_frndint: // Round to Integer
- case NN_fxtract: // Extract exponent and significand
- case NN_fabs: // Absolute value
- case NN_fchs: // Change Sign
+ case STARS_NN_fsqrt: // Square Root
+ case STARS_NN_fscale: // Scale: st(0) <- st(0) * 2^st(1)
+ case STARS_NN_fprem: // Partial Remainder
+ case STARS_NN_frndint: // Round to Integer
+ case STARS_NN_fxtract: // Extract exponent and significand
+ case STARS_NN_fabs: // Absolute value
+ case STARS_NN_fchs: // Change Sign
return this->BuildUnaryRTL(SMP_UNARY_FLOATING_ARITHMETIC);
- case NN_fcom: // Compare Real
- case NN_fcomp: // Compare Real and Pop
- case NN_fcompp: // Compare Real and Pop Twice
- case NN_ficom: // Compare Integer
- case NN_ficomp: // Compare Integer and Pop
- case NN_ftst: // Test
- case NN_fxam: // Examine
+ case STARS_NN_fcom: // Compare Real
+ case STARS_NN_fcomp: // Compare Real and Pop
+ case STARS_NN_fcompp: // Compare Real and Pop Twice
+ case STARS_NN_ficom: // Compare Integer
+ case STARS_NN_ficomp: // Compare Integer and Pop
+ case STARS_NN_ftst: // Test
+ case STARS_NN_fxam: // Examine
// Floating comparison instructions use FP reg stack locations
// as sources and set only the FP flags. All of these are numeric
// type and we don't track any of them, so all such instructions
@@ -16361,33 +16366,33 @@ bool SMPInstr::BuildRTL(void) {
NopRT = NULL;
return true;
- case NN_fptan: // Partial tangent
- case NN_fpatan: // Partial arctangent
- case NN_f2xm1: // 2^x - 1
- case NN_fyl2x: // Y * lg2(X)
- case NN_fyl2xp1: // Y * lg2(X+1)
+ case STARS_NN_fptan: // Partial tangent
+ case STARS_NN_fpatan: // Partial arctangent
+ case STARS_NN_f2xm1: // 2^x - 1
+ case STARS_NN_fyl2x: // Y * lg2(X)
+ case STARS_NN_fyl2xp1: // Y * lg2(X+1)
// We can consider it a unary operation when both arguments come
// off the floating point register stack, unless we ever start
// modeling the different locations in the FP register stack.
return this->BuildUnaryRTL(SMP_UNARY_FLOATING_ARITHMETIC);
- case NN_fldz: // Load +0.0
- case NN_fld1: // Load +1.0
- case NN_fldpi: // Load PI=3.14...
- case NN_fldl2t: // Load lg2(10)
- case NN_fldl2e: // Load lg2(e)
- case NN_fldlg2: // Load lg10(2)
- case NN_fldln2: // Load ln(2)
- case NN_finit: // Initialize Processor
- case NN_fninit: // Initialize Processor (no wait)
- case NN_fsetpm: // Set Protected Mode
- case NN_fldcw: // Load Control Word
- case NN_fstcw: // Store Control Word
- case NN_fnstcw: // Store Control Word (no wait)
- case NN_fstsw: // Store Status Word
- case NN_fnstsw: // Store Status Word (no wait)
- case NN_fclex: // Clear Exceptions
- case NN_fnclex: // Clear Exceptions (no wait)
+ case STARS_NN_fldz: // Load +0.0
+ case STARS_NN_fld1: // Load +1.0
+ case STARS_NN_fldpi: // Load PI=3.14...
+ case STARS_NN_fldl2t: // Load lg2(10)
+ case STARS_NN_fldl2e: // Load lg2(e)
+ case STARS_NN_fldlg2: // Load lg10(2)
+ case STARS_NN_fldln2: // Load ln(2)
+ case STARS_NN_finit: // Initialize Processor
+ case STARS_NN_fninit: // Initialize Processor (no wait)
+ case STARS_NN_fsetpm: // Set Protected Mode
+ case STARS_NN_fldcw: // Load Control Word
+ case STARS_NN_fstcw: // Store Control Word
+ case STARS_NN_fnstcw: // Store Control Word (no wait)
+ case STARS_NN_fstsw: // Store Status Word
+ case STARS_NN_fnstsw: // Store Status Word (no wait)
+ case STARS_NN_fclex: // Clear Exceptions
+ case STARS_NN_fnclex: // Clear Exceptions (no wait)
// Floating point stack and control word and flags operations
// with no memory operands are no-ops to us.
// NOTE: We might want to deal with the memory operands in some
@@ -16399,15 +16404,15 @@ bool SMPInstr::BuildRTL(void) {
NopRT = NULL;
return true;
- case NN_fstenv: // Store Environment
- case NN_fnstenv: // Store Environment (no wait)
- case NN_fldenv: // Load Environment
- case NN_fsave: // Save State
- case NN_fnsave: // Save State (no wait)
- case NN_frstor: // Restore State
- case NN_fincstp: // Increment Stack Pointer
- case NN_fdecstp: // Decrement Stack Pointer
- case NN_ffree: // Free Register
+ case STARS_NN_fstenv: // Store Environment
+ case STARS_NN_fnstenv: // Store Environment (no wait)
+ case STARS_NN_fldenv: // Load Environment
+ case STARS_NN_fsave: // Save State
+ case STARS_NN_fnsave: // Save State (no wait)
+ case STARS_NN_frstor: // Restore State
+ case STARS_NN_fincstp: // Increment Stack Pointer
+ case STARS_NN_fdecstp: // Decrement Stack Pointer
+ case STARS_NN_ffree: // Free Register
// Floating point stack and control word and flags operations
// with no memory operands are no-ops to us.
// NOTE: We might want to deal with the memory operands in some
@@ -16419,7 +16424,7 @@ bool SMPInstr::BuildRTL(void) {
NopRT = NULL;
return true;
- case NN_fnop: // No Operation
+ case STARS_NN_fnop: // No Operation
NopRT = new SMPRegTransfer;
NopRT->SetParentInst(this);
NopRT->SetOperator(SMP_NULL_OPERATOR);
@@ -16427,10 +16432,10 @@ bool SMPInstr::BuildRTL(void) {
NopRT = NULL;
return true;
- case NN_feni: // (8087 only)
- case NN_fneni: // (no wait) (8087 only)
- case NN_fdisi: // (8087 only)
- case NN_fndisi: // (no wait) (8087 only)
+ case STARS_NN_feni: // (8087 only)
+ case STARS_NN_fneni: // (no wait) (8087 only)
+ case STARS_NN_fdisi: // (8087 only)
+ case STARS_NN_fndisi: // (no wait) (8087 only)
return false;
break;
@@ -16439,13 +16444,13 @@ bool SMPInstr::BuildRTL(void) {
// 80387 instructions
//
- case NN_fprem1: // Partial Remainder ( < half )
- case NN_fsincos: // t<-cos(st); st<-sin(st); push t
- case NN_fsin: // Sine
- case NN_fcos: // Cosine
- case NN_fucom: // Compare Unordered Real
- case NN_fucomp: // Compare Unordered Real and Pop
- case NN_fucompp: // Compare Unordered Real and Pop Twice
+ case STARS_NN_fprem1: // Partial Remainder ( < half )
+ case STARS_NN_fsincos: // t<-cos(st); st<-sin(st); push t
+ case STARS_NN_fsin: // Sine
+ case STARS_NN_fcos: // Cosine
+ case STARS_NN_fucom: // Compare Unordered Real
+ case STARS_NN_fucomp: // Compare Unordered Real and Pop
+ case STARS_NN_fucompp: // Compare Unordered Real and Pop Twice
// Floating point stack and control word and flags operations
// with no memory operands are no-ops to us.
NopRT = new SMPRegTransfer;
@@ -16460,15 +16465,15 @@ bool SMPInstr::BuildRTL(void) {
// Instructions added 28.02.96
//
- case NN_setalc: // Set AL to Carry Flag
- case NN_svdc: // Save Register and Descriptor
- case NN_rsdc: // Restore Register and Descriptor
- case NN_svldt: // Save LDTR and Descriptor
- case NN_rsldt: // Restore LDTR and Descriptor
- case NN_svts: // Save TR and Descriptor
- case NN_rsts: // Restore TR and Descriptor
- case NN_icebp: // ICE Break Point
- case NN_loadall: // Load the entire CPU state from ES:EDI
+ case STARS_NN_setalc: // Set AL to Carry Flag
+ case STARS_NN_svdc: // Save Register and Descriptor
+ case STARS_NN_rsdc: // Restore Register and Descriptor
+ case STARS_NN_svldt: // Save LDTR and Descriptor
+ case STARS_NN_rsldt: // Restore LDTR and Descriptor
+ case STARS_NN_svts: // Save TR and Descriptor
+ case STARS_NN_rsts: // Restore TR and Descriptor
+ case STARS_NN_icebp: // ICE Break Point
+ case STARS_NN_loadall: // Load the entire CPU state from ES:EDI
return false;
break;
@@ -16476,7 +16481,7 @@ bool SMPInstr::BuildRTL(void) {
// MMX instructions
//
- case NN_emms: // Empty MMX state
+ case STARS_NN_emms: // Empty MMX state
NopRT = new SMPRegTransfer;
NopRT->SetParentInst(this);
NopRT->SetOperator(SMP_NULL_OPERATOR);
@@ -16485,106 +16490,106 @@ bool SMPInstr::BuildRTL(void) {
return true;
break;
- case NN_movd: // Move 32 bits
- case NN_movq: // Move 64 bits
+ case STARS_NN_movd: // Move 32 bits
+ case STARS_NN_movq: // Move 64 bits
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
break;
- case NN_packsswb: // Pack with Signed Saturation (Word->Byte)
- case NN_packssdw: // Pack with Signed Saturation (Dword->Word)
+ case STARS_NN_packsswb: // Pack with Signed Saturation (Word->Byte)
+ case STARS_NN_packssdw: // Pack with Signed Saturation (Dword->Word)
return this->BuildBinaryRTL(SMP_PACK_S);
break;
- case NN_packuswb: // Pack with Unsigned Saturation (Word->Byte)
+ case STARS_NN_packuswb: // Pack with Unsigned Saturation (Word->Byte)
return this->BuildBinaryRTL(SMP_PACK_U);
break;
- case NN_paddb: // Packed Add Byte
- case NN_paddw: // Packed Add Word
- case NN_paddd: // Packed Add Dword
- case NN_paddsb: // Packed Add with Saturation (Byte)
- case NN_paddsw: // Packed Add with Saturation (Word)
- case NN_paddusb: // Packed Add Unsigned with Saturation (Byte)
- case NN_paddusw: // Packed Add Unsigned with Saturation (Word)
+ case STARS_NN_paddb: // Packed Add Byte
+ case STARS_NN_paddw: // Packed Add Word
+ case STARS_NN_paddd: // Packed Add Dword
+ case STARS_NN_paddsb: // Packed Add with Saturation (Byte)
+ case STARS_NN_paddsw: // Packed Add with Saturation (Word)
+ case STARS_NN_paddusb: // Packed Add Unsigned with Saturation (Byte)
+ case STARS_NN_paddusw: // Packed Add Unsigned with Saturation (Word)
return this->BuildBinaryRTL(SMP_ADD);
break;
- case NN_pand: // Bitwise Logical And
+ case STARS_NN_pand: // Bitwise Logical And
return this->BuildBinaryRTL(SMP_BITWISE_AND);
break;
- case NN_pandn: // Bitwise Logical And Not
+ case STARS_NN_pandn: // Bitwise Logical And Not
return this->BuildBinaryRTL(SMP_BITWISE_AND_NOT);
break;
- case NN_pcmpeqb: // Packed Compare for Equal (Byte)
- case NN_pcmpeqw: // Packed Compare for Equal (Word)
- case NN_pcmpeqd: // Packed Compare for Equal (Dword)
+ case STARS_NN_pcmpeqb: // Packed Compare for Equal (Byte)
+ case STARS_NN_pcmpeqw: // Packed Compare for Equal (Word)
+ case STARS_NN_pcmpeqd: // Packed Compare for Equal (Dword)
return this->BuildBinaryRTL(SMP_COMPARE_EQ_AND_SET);
break;
- case NN_pcmpgtb: // Packed Compare for Greater Than (Byte)
- case NN_pcmpgtw: // Packed Compare for Greater Than (Word)
- case NN_pcmpgtd: // Packed Compare for Greater Than (Dword)
+ case STARS_NN_pcmpgtb: // Packed Compare for Greater Than (Byte)
+ case STARS_NN_pcmpgtw: // Packed Compare for Greater Than (Word)
+ case STARS_NN_pcmpgtd: // Packed Compare for Greater Than (Dword)
return this->BuildBinaryRTL(SMP_COMPARE_GT_AND_SET);
break;
- case NN_pmaddwd: // Packed Multiply and Add
+ case STARS_NN_pmaddwd: // Packed Multiply and Add
return this->BuildBinaryRTL(SMP_MULTIPLY_AND_ADD);
break;
- case NN_pmulhw: // Packed Multiply High
- case NN_pmullw: // Packed Multiply Low
+ case STARS_NN_pmulhw: // Packed Multiply High
+ case STARS_NN_pmullw: // Packed Multiply Low
return this->BuildBinaryRTL(SMP_U_MULTIPLY);
break;
- case NN_por: // Bitwise Logical Or
+ case STARS_NN_por: // Bitwise Logical Or
return this->BuildBinaryRTL(SMP_BITWISE_OR);
break;
- case NN_psllw: // Packed Shift Left Logical (Word)
- case NN_pslld: // Packed Shift Left Logical (Dword)
- case NN_psllq: // Packed Shift Left Logical (Qword)
+ case STARS_NN_psllw: // Packed Shift Left Logical (Word)
+ case STARS_NN_pslld: // Packed Shift Left Logical (Dword)
+ case STARS_NN_psllq: // Packed Shift Left Logical (Qword)
return this->BuildBinaryRTL(SMP_U_LEFT_SHIFT);
break;
- case NN_psraw: // Packed Shift Right Arithmetic (Word)
- case NN_psrad: // Packed Shift Right Arithmetic (Dword)
+ case STARS_NN_psraw: // Packed Shift Right Arithmetic (Word)
+ case STARS_NN_psrad: // Packed Shift Right Arithmetic (Dword)
return this->BuildBinaryRTL(SMP_S_RIGHT_SHIFT);
break;
- case NN_psrlw: // Packed Shift Right Logical (Word)
- case NN_psrld: // Packed Shift Right Logical (Dword)
- case NN_psrlq: // Packed Shift Right Logical (Qword)
+ case STARS_NN_psrlw: // Packed Shift Right Logical (Word)
+ case STARS_NN_psrld: // Packed Shift Right Logical (Dword)
+ case STARS_NN_psrlq: // Packed Shift Right Logical (Qword)
return this->BuildBinaryRTL(SMP_U_RIGHT_SHIFT);
break;
- case NN_psubb: // Packed Subtract Byte
- case NN_psubw: // Packed Subtract Word
- case NN_psubd: // Packed Subtract Dword
+ case STARS_NN_psubb: // Packed Subtract Byte
+ case STARS_NN_psubw: // Packed Subtract Word
+ case STARS_NN_psubd: // Packed Subtract Dword
return this->BuildBinaryRTL(SMP_SUBTRACT);
break;
- case NN_psubsb: // Packed Subtract with Saturation (Byte)
- case NN_psubsw: // Packed Subtract with Saturation (Word)
+ case STARS_NN_psubsb: // Packed Subtract with Saturation (Byte)
+ case STARS_NN_psubsw: // Packed Subtract with Saturation (Word)
return this->BuildBinaryRTL(SMP_SUBTRACT);
break;
- case NN_psubusb: // Packed Subtract Unsigned with Saturation (Byte)
- case NN_psubusw: // Packed Subtract Unsigned with Saturation (Word)
+ case STARS_NN_psubusb: // Packed Subtract Unsigned with Saturation (Byte)
+ case STARS_NN_psubusw: // Packed Subtract Unsigned with Saturation (Word)
return this->BuildBinaryRTL(SMP_SUBTRACT);
break;
- case NN_punpckhbw: // Unpack High Packed Data (Byte->Word)
- case NN_punpckhwd: // Unpack High Packed Data (Word->Dword)
- case NN_punpckhdq: // Unpack High Packed Data (Dword->Qword)
- case NN_punpcklbw: // Unpack Low Packed Data (Byte->Word)
- case NN_punpcklwd: // Unpack Low Packed Data (Word->Dword)
- case NN_punpckldq: // Unpack Low Packed Data (Dword->Qword)
+ case STARS_NN_punpckhbw: // Unpack High Packed Data (Byte->Word)
+ case STARS_NN_punpckhwd: // Unpack High Packed Data (Word->Dword)
+ case STARS_NN_punpckhdq: // Unpack High Packed Data (Dword->Qword)
+ case STARS_NN_punpcklbw: // Unpack Low Packed Data (Byte->Word)
+ case STARS_NN_punpcklwd: // Unpack Low Packed Data (Word->Dword)
+ case STARS_NN_punpckldq: // Unpack Low Packed Data (Dword->Qword)
return this->BuildBinaryRTL(SMP_INTERLEAVE);
break;
- case NN_pxor: // Bitwise Logical Exclusive Or
+ case STARS_NN_pxor: // Bitwise Logical Exclusive Or
return this->BuildBinaryRTL(SMP_BITWISE_XOR);
break;
@@ -16592,85 +16597,85 @@ bool SMPInstr::BuildRTL(void) {
// Undocumented Deschutes processor instructions
//
- case NN_fxsave: // Fast save FP context
- case NN_fxrstor: // Fast restore FP context
+ case STARS_NN_fxsave: // Fast save FP context
+ case STARS_NN_fxrstor: // Fast restore FP context
return false;
break;
// Pentium II instructions
- case NN_sysenter: // Fast Transition to System Call Entry Point
- case NN_sysexit: // Fast Transition from System Call Entry Point
+ case STARS_NN_sysenter: // Fast Transition to System Call Entry Point
+ case STARS_NN_sysexit: // Fast Transition from System Call Entry Point
return false;
break;
// 3DNow! instructions
- case NN_pavgusb: // Packed 8-bit Unsigned Integer Averaging
+ case STARS_NN_pavgusb: // Packed 8-bit Unsigned Integer Averaging
return this->BuildBinaryRTL(SMP_AVERAGE_U);
break;
- case NN_pfadd: // Packed Floating-Point Addition
+ case STARS_NN_pfadd: // Packed Floating-Point Addition
return this->BuildBinaryRTL(SMP_ADD);
break;
- case NN_pfsub: // Packed Floating-Point Subtraction
- case NN_pfsubr: // Packed Floating-Point Reverse Subtraction !!!!****!!!! Fix this reversal if we care about the details
+ case STARS_NN_pfsub: // Packed Floating-Point Subtraction
+ case STARS_NN_pfsubr: // Packed Floating-Point Reverse Subtraction !!!!****!!!! Fix this reversal if we care about the details
return this->BuildBinaryRTL(SMP_SUBTRACT);
break;
- case NN_pfacc: // Packed Floating-Point Accumulate
+ case STARS_NN_pfacc: // Packed Floating-Point Accumulate
return this->BuildBinaryRTL(SMP_ADD);
break;
- case NN_pfcmpge: // Packed Floating-Point Comparison: Greater or Equal
+ case STARS_NN_pfcmpge: // Packed Floating-Point Comparison: Greater or Equal
return this->BuildBinaryRTL(SMP_COMPARE_GE_AND_SET);
break;
- case NN_pfcmpgt: // Packed Floating-Point Comparison: Greater
+ case STARS_NN_pfcmpgt: // Packed Floating-Point Comparison: Greater
return this->BuildBinaryRTL(SMP_COMPARE_GT_AND_SET);
break;
- case NN_pfcmpeq: // Packed Floating-Point Comparison: Equal
+ case STARS_NN_pfcmpeq: // Packed Floating-Point Comparison: Equal
return this->BuildBinaryRTL(SMP_COMPARE_EQ_AND_SET);
break;
- case NN_pfmin: // Packed Floating-Point Minimum
+ case STARS_NN_pfmin: // Packed Floating-Point Minimum
return this->BuildBinaryRTL(SMP_MIN_S);
break;
- case NN_pfmax: // Packed Floating-Point Maximum
+ case STARS_NN_pfmax: // Packed Floating-Point Maximum
return this->BuildBinaryRTL(SMP_MAX_S);
break;
- case NN_pi2fd: // Packed 32-bit Integer to Floating-Point
+ case STARS_NN_pi2fd: // Packed 32-bit Integer to Floating-Point
return this->BuildBinaryRTL(SMP_CONVERT_INT_TO_FP);
break;
- case NN_pf2id: // Packed Floating-Point to 32-bit Integer
+ case STARS_NN_pf2id: // Packed Floating-Point to 32-bit Integer
return this->BuildBinaryRTL(SMP_CONVERT_FP_TO_INT);
break;
- case NN_pfrcp: // Packed Floating-Point Reciprocal Approximation
- case NN_pfrsqrt: // Packed Floating-Point Reciprocal Square Root Approximation
+ case STARS_NN_pfrcp: // Packed Floating-Point Reciprocal Approximation
+ case STARS_NN_pfrsqrt: // Packed Floating-Point Reciprocal Square Root Approximation
return this->BuildUnary2OpndRTL(SMP_UNARY_FLOATING_ARITHMETIC);
break;
- case NN_pfmul: // Packed Floating-Point Multiplication
+ case STARS_NN_pfmul: // Packed Floating-Point Multiplication
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_pfrcpit1: // Packed Floating-Point Reciprocal First Iteration Step
- case NN_pfrsqit1: // Packed Floating-Point Reciprocal Square Root First Iteration Step
- case NN_pfrcpit2: // Packed Floating-Point Reciprocal Second Iteration Step
+ case STARS_NN_pfrcpit1: // Packed Floating-Point Reciprocal First Iteration Step
+ case STARS_NN_pfrsqit1: // Packed Floating-Point Reciprocal Square Root First Iteration Step
+ case STARS_NN_pfrcpit2: // Packed Floating-Point Reciprocal Second Iteration Step
return this->BuildUnary2OpndRTL(SMP_UNARY_FLOATING_ARITHMETIC);
break;
- case NN_pmulhrw: // Packed Floating-Point 16-bit Integer Multiply with rounding
+ case STARS_NN_pmulhrw: // Packed Floating-Point 16-bit Integer Multiply with rounding
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_femms: // Faster entry/exit of the MMX or floating-point state
+ case STARS_NN_femms: // Faster entry/exit of the MMX or floating-point state
NopRT = new SMPRegTransfer;
NopRT->SetParentInst(this);
NopRT->SetOperator(SMP_NULL_OPERATOR);
@@ -16679,8 +16684,8 @@ bool SMPInstr::BuildRTL(void) {
return true;
break;
- case NN_prefetch: // Prefetch at least a 32-byte line into L1 data cache
- case NN_prefetchw: // Prefetch processor cache line into L1 data cache (mark as modified)
+ case STARS_NN_prefetch: // Prefetch at least a 32-byte line into L1 data cache
+ case STARS_NN_prefetchw: // Prefetch processor cache line into L1 data cache (mark as modified)
// Prefetch opcodes are no-ops to us.
NopRT = new SMPRegTransfer;
NopRT->SetParentInst(this);
@@ -16691,170 +16696,170 @@ bool SMPInstr::BuildRTL(void) {
// Pentium III instructions
- case NN_addps: // Packed Single-FP Add
- case NN_addss: // Scalar Single-FP Add
- case NN_andnps: // Bitwise Logical And Not for Single-FP
- case NN_andps: // Bitwise Logical And for Single-FP
+ case STARS_NN_addps: // Packed Single-FP Add
+ case STARS_NN_addss: // Scalar Single-FP Add
+ case STARS_NN_andnps: // Bitwise Logical And Not for Single-FP
+ case STARS_NN_andps: // Bitwise Logical And for Single-FP
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_cmpps: // Packed Single-FP Compare
- case NN_cmpss: // Scalar Single-FP Compare
- case NN_comiss: // Scalar Ordered Single-FP Compare and Set EFLAGS
+ case STARS_NN_cmpps: // Packed Single-FP Compare
+ case STARS_NN_cmpss: // Scalar Single-FP Compare
+ case STARS_NN_comiss: // Scalar Ordered Single-FP Compare and Set EFLAGS
return false;
break;
- case NN_cvtpi2ps: // Packed signed INT32 to Packed Single-FP conversion
+ case STARS_NN_cvtpi2ps: // Packed signed INT32 to Packed Single-FP conversion
return this->BuildBinaryRTL(SMP_CONVERT_INT_TO_FP);
break;
- case NN_cvtps2pi: // Packed Single-FP to Packed INT32 conversion
+ case STARS_NN_cvtps2pi: // Packed Single-FP to Packed INT32 conversion
return this->BuildBinaryRTL(SMP_CONVERT_FP_TO_INT);
break;
- case NN_cvtsi2ss: // Scalar signed INT32 to Single-FP conversion
+ case STARS_NN_cvtsi2ss: // Scalar signed INT32 to Single-FP conversion
return this->BuildBinaryRTL(SMP_CONVERT_INT_TO_FP);
break;
- case NN_cvtss2si: // Scalar Single-FP to signed INT32 conversion
- case NN_cvttps2pi: // Packed Single-FP to Packed INT32 conversion (truncate)
- case NN_cvttss2si: // Scalar Single-FP to signed INT32 conversion (truncate)
+ case STARS_NN_cvtss2si: // Scalar Single-FP to signed INT32 conversion
+ case STARS_NN_cvttps2pi: // Packed Single-FP to Packed INT32 conversion (truncate)
+ case STARS_NN_cvttss2si: // Scalar Single-FP to signed INT32 conversion (truncate)
return this->BuildBinaryRTL(SMP_CONVERT_FP_TO_INT);
break;
- case NN_divps: // Packed Single-FP Divide
- case NN_divss: // Scalar Single-FP Divide
+ case STARS_NN_divps: // Packed Single-FP Divide
+ case STARS_NN_divss: // Scalar Single-FP Divide
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_ldmxcsr: // Load Streaming SIMD Extensions Technology Control/Status Register
+ case STARS_NN_ldmxcsr: // Load Streaming SIMD Extensions Technology Control/Status Register
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
break;
- case NN_maxps: // Packed Single-FP Maximum
- case NN_maxss: // Scalar Single-FP Maximum
+ case STARS_NN_maxps: // Packed Single-FP Maximum
+ case STARS_NN_maxss: // Scalar Single-FP Maximum
return this->BuildBinaryRTL(SMP_MAX_S);
break;
- case NN_minps: // Packed Single-FP Minimum
- case NN_minss: // Scalar Single-FP Minimum
+ case STARS_NN_minps: // Packed Single-FP Minimum
+ case STARS_NN_minss: // Scalar Single-FP Minimum
return this->BuildBinaryRTL(SMP_MIN_S);
break;
- case NN_movaps: // Move Aligned Four Packed Single-FP
- case NN_movhlps: // Move High to Low Packed Single-FP
- case NN_movhps: // Move High Packed Single-FP
- case NN_movlhps: // Move Low to High Packed Single-FP
- case NN_movlps: // Move Low Packed Single-FP
- case NN_movmskps: // Move Mask to Register
- case NN_movss: // Move Scalar Single-FP
- case NN_movups: // Move Unaligned Four Packed Single-FP
+ case STARS_NN_movaps: // Move Aligned Four Packed Single-FP
+ case STARS_NN_movhlps: // Move High to Low Packed Single-FP
+ case STARS_NN_movhps: // Move High Packed Single-FP
+ case STARS_NN_movlhps: // Move Low to High Packed Single-FP
+ case STARS_NN_movlps: // Move Low Packed Single-FP
+ case STARS_NN_movmskps: // Move Mask to Register
+ case STARS_NN_movss: // Move Scalar Single-FP
+ case STARS_NN_movups: // Move Unaligned Four Packed Single-FP
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
break;
- case NN_mulps: // Packed Single-FP Multiply
- case NN_mulss: // Scalar Single-FP Multiply
- case NN_orps: // Bitwise Logical OR for Single-FP Data
+ case STARS_NN_mulps: // Packed Single-FP Multiply
+ case STARS_NN_mulss: // Scalar Single-FP Multiply
+ case STARS_NN_orps: // Bitwise Logical OR for Single-FP Data
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_rcpps: // Packed Single-FP Reciprocal
- case NN_rcpss: // Scalar Single-FP Reciprocal
- case NN_rsqrtps: // Packed Single-FP Square Root Reciprocal
- case NN_rsqrtss: // Scalar Single-FP Square Root Reciprocal
+ case STARS_NN_rcpps: // Packed Single-FP Reciprocal
+ case STARS_NN_rcpss: // Scalar Single-FP Reciprocal
+ case STARS_NN_rsqrtps: // Packed Single-FP Square Root Reciprocal
+ case STARS_NN_rsqrtss: // Scalar Single-FP Square Root Reciprocal
return this->BuildUnary2OpndRTL(SMP_UNARY_FLOATING_ARITHMETIC);
break;
- case NN_shufps: // Shuffle Single-FP
+ case STARS_NN_shufps: // Shuffle Single-FP
return this->BuildBinaryRTL(SMP_SHUFFLE);
break;
- case NN_sqrtps: // Packed Single-FP Square Root
- case NN_sqrtss: // Scalar Single-FP Square Root
+ case STARS_NN_sqrtps: // Packed Single-FP Square Root
+ case STARS_NN_sqrtss: // Scalar Single-FP Square Root
return this->BuildUnary2OpndRTL(SMP_UNARY_FLOATING_ARITHMETIC);
break;
- case NN_stmxcsr: // Store Streaming SIMD Extensions Technology Control/Status Register
+ case STARS_NN_stmxcsr: // Store Streaming SIMD Extensions Technology Control/Status Register
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
break;
- case NN_subps: // Packed Single-FP Subtract
- case NN_subss: // Scalar Single-FP Subtract
+ case STARS_NN_subps: // Packed Single-FP Subtract
+ case STARS_NN_subss: // Scalar Single-FP Subtract
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_ucomiss: // Scalar Unordered Single-FP Compare and Set EFLAGS
+ case STARS_NN_ucomiss: // Scalar Unordered Single-FP Compare and Set EFLAGS
return this->BuildFlagsDestBinaryRTL(SMP_S_COMPARE);
break;
- case NN_unpckhps: // Unpack High Packed Single-FP Data
- case NN_unpcklps: // Unpack Low Packed Single-FP Data
+ case STARS_NN_unpckhps: // Unpack High Packed Single-FP Data
+ case STARS_NN_unpcklps: // Unpack Low Packed Single-FP Data
return this->BuildBinaryRTL(SMP_INTERLEAVE);
break;
- case NN_xorps: // Bitwise Logical XOR for Single-FP Data
+ case STARS_NN_xorps: // Bitwise Logical XOR for Single-FP Data
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_pavgb: // Packed Average (Byte)
- case NN_pavgw: // Packed Average (Word)
+ case STARS_NN_pavgb: // Packed Average (Byte)
+ case STARS_NN_pavgw: // Packed Average (Word)
return this->BuildBinaryRTL(SMP_AVERAGE_U);
break;
- case NN_pextrw: // Extract Word
+ case STARS_NN_pextrw: // Extract Word
return this->BuildBinaryPlusImmedRTL(SMP_EXTRACT_ZERO_EXTEND, SMP_CREATE_MASK);
break;
- case NN_pinsrw: // Insert Word
+ case STARS_NN_pinsrw: // Insert Word
return this->BuildBinaryPlusImmedRTL(SMP_BITWISE_AND, SMP_CREATE_MASK);
break;
- case NN_pmaxsw: // Packed Signed Integer Word Maximum
+ case STARS_NN_pmaxsw: // Packed Signed Integer Word Maximum
return this->BuildBinaryRTL(SMP_MAX_S);
break;
- case NN_pmaxub: // Packed Unsigned Integer Byte Maximum
+ case STARS_NN_pmaxub: // Packed Unsigned Integer Byte Maximum
return this->BuildBinaryRTL(SMP_MAX_U);
break;
- case NN_pminsw: // Packed Signed Integer Word Minimum
+ case STARS_NN_pminsw: // Packed Signed Integer Word Minimum
return this->BuildBinaryRTL(SMP_MIN_S);
break;
- case NN_pminub: // Packed Unsigned Integer Byte Minimum
+ case STARS_NN_pminub: // Packed Unsigned Integer Byte Minimum
return this->BuildBinaryRTL(SMP_MIN_U);
break;
- case NN_pmovmskb: // Move Byte Mask to Integer
+ case STARS_NN_pmovmskb: // Move Byte Mask to Integer
return this->BuildBinaryRTL(SMP_SHUFFLE);
break;
- case NN_pmulhuw: // Packed Multiply High Unsigned
+ case STARS_NN_pmulhuw: // Packed Multiply High Unsigned
return this->BuildBinaryRTL(SMP_U_MULTIPLY);
break;
- case NN_psadbw: // Packed Sum of Absolute Differences
+ case STARS_NN_psadbw: // Packed Sum of Absolute Differences
return this->BuildBinaryRTL(SMP_SUM_OF_DIFFS);
break;
- case NN_pshufw: // Packed Shuffle Word
+ case STARS_NN_pshufw: // Packed Shuffle Word
return this->BuildBinaryRTL(SMP_SHUFFLE);
break;
- case NN_maskmovq: // Byte Mask write
+ case STARS_NN_maskmovq: // Byte Mask write
return false;
break;
- case NN_movntps: // Move Aligned Four Packed Single-FP Non Temporal
- case NN_movntq: // Move 64 Bits Non Temporal
+ case STARS_NN_movntps: // Move Aligned Four Packed Single-FP Non Temporal
+ case STARS_NN_movntq: // Move 64 Bits Non Temporal
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
break;
- case NN_prefetcht0: // Prefetch to all cache levels
- case NN_prefetcht1: // Prefetch to all cache levels
- case NN_prefetcht2: // Prefetch to L2 cache
- case NN_prefetchnta: // Prefetch to L1 cache
- case NN_sfence: // Store Fence
+ case STARS_NN_prefetcht0: // Prefetch to all cache levels
+ case STARS_NN_prefetcht1: // Prefetch to all cache levels
+ case STARS_NN_prefetcht2: // Prefetch to L2 cache
+ case STARS_NN_prefetchnta: // Prefetch to L1 cache
+ case STARS_NN_sfence: // Store Fence
// Cache prefetch and store fence opcodes are no-ops to us.
NopRT = new SMPRegTransfer;
NopRT->SetParentInst(this);
@@ -16865,100 +16870,100 @@ bool SMPInstr::BuildRTL(void) {
// Pentium III Pseudo instructions
- case NN_cmpeqps: // Packed Single-FP Compare EQ
+ case STARS_NN_cmpeqps: // Packed Single-FP Compare EQ
return this->BuildBinaryRTL(SMP_COMPARE_EQ_AND_SET);
break;
- case NN_cmpltps: // Packed Single-FP Compare LT
+ case STARS_NN_cmpltps: // Packed Single-FP Compare LT
return this->BuildBinaryRTL(SMP_COMPARE_LT_AND_SET);
break;
- case NN_cmpleps: // Packed Single-FP Compare LE
+ case STARS_NN_cmpleps: // Packed Single-FP Compare LE
return this->BuildBinaryRTL(SMP_COMPARE_LE_AND_SET);
break;
- case NN_cmpunordps: // Packed Single-FP Compare UNORD
+ case STARS_NN_cmpunordps: // Packed Single-FP Compare UNORD
return false;
break;
- case NN_cmpneqps: // Packed Single-FP Compare NOT EQ
+ case STARS_NN_cmpneqps: // Packed Single-FP Compare NOT EQ
return this->BuildBinaryRTL(SMP_COMPARE_NE_AND_SET);
break;
- case NN_cmpnltps: // Packed Single-FP Compare NOT LT
+ case STARS_NN_cmpnltps: // Packed Single-FP Compare NOT LT
return this->BuildBinaryRTL(SMP_COMPARE_LT_AND_SET);
break;
- case NN_cmpnleps: // Packed Single-FP Compare NOT LE
+ case STARS_NN_cmpnleps: // Packed Single-FP Compare NOT LE
return this->BuildBinaryRTL(SMP_COMPARE_GT_AND_SET);
break;
- case NN_cmpordps: // Packed Single-FP Compare ORDERED
+ case STARS_NN_cmpordps: // Packed Single-FP Compare ORDERED
return false;
break;
- case NN_cmpeqss: // Scalar Single-FP Compare EQ
+ case STARS_NN_cmpeqss: // Scalar Single-FP Compare EQ
return this->BuildBinaryRTL(SMP_COMPARE_EQ_AND_SET);
break;
- case NN_cmpltss: // Scalar Single-FP Compare LT
+ case STARS_NN_cmpltss: // Scalar Single-FP Compare LT
return this->BuildBinaryRTL(SMP_COMPARE_LT_AND_SET);
break;
- case NN_cmpless: // Scalar Single-FP Compare LE
+ case STARS_NN_cmpless: // Scalar Single-FP Compare LE
return this->BuildBinaryRTL(SMP_COMPARE_LE_AND_SET);
break;
- case NN_cmpunordss: // Scalar Single-FP Compare UNORD
+ case STARS_NN_cmpunordss: // Scalar Single-FP Compare UNORD
return false;
break;
- case NN_cmpneqss: // Scalar Single-FP Compare NOT EQ
+ case STARS_NN_cmpneqss: // Scalar Single-FP Compare NOT EQ
return this->BuildBinaryRTL(SMP_COMPARE_NE_AND_SET);
break;
- case NN_cmpnltss: // Scalar Single-FP Compare NOT LT
+ case STARS_NN_cmpnltss: // Scalar Single-FP Compare NOT LT
return this->BuildBinaryRTL(SMP_COMPARE_LT_AND_SET);
break;
- case NN_cmpnless: // Scalar Single-FP Compare NOT LE
+ case STARS_NN_cmpnless: // Scalar Single-FP Compare NOT LE
return this->BuildBinaryRTL(SMP_COMPARE_LE_AND_SET);
break;
- case NN_cmpordss: // Scalar Single-FP Compare ORDERED
+ case STARS_NN_cmpordss: // Scalar Single-FP Compare ORDERED
return false;
break;
// AMD K7 instructions
- case NN_pf2iw: // Packed Floating-Point to Integer with Sign Extend
+ case STARS_NN_pf2iw: // Packed Floating-Point to Integer with Sign Extend
return this->BuildBinaryRTL(SMP_CONVERT_FP_TO_INT);
break;
- case NN_pfnacc: // Packed Floating-Point Negative Accumulate
- case NN_pfpnacc: // Packed Floating-Point Mixed Positive-Negative Accumulate
+ case STARS_NN_pfnacc: // Packed Floating-Point Negative Accumulate
+ case STARS_NN_pfpnacc: // Packed Floating-Point Mixed Positive-Negative Accumulate
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_pi2fw: // Packed 16-bit Integer to Floating-Point
+ case STARS_NN_pi2fw: // Packed 16-bit Integer to Floating-Point
return this->BuildBinaryRTL(SMP_CONVERT_INT_TO_FP);
break;
- case NN_pswapd: // Packed Swap Double Word
+ case STARS_NN_pswapd: // Packed Swap Double Word
return this->BuildExchangeRTL();
break;
// Undocumented FP instructions (thanks to norbert.juffa@adm.com)
- case NN_fstp1: // Alias of Store Real and Pop
- case NN_fcom2: // Alias of Compare Real
- case NN_fcomp3: // Alias of Compare Real and Pop
- case NN_fxch4: // Alias of Exchange Registers
- case NN_fcomp5: // Alias of Compare Real and Pop
+ case STARS_NN_fstp1: // Alias of Store Real and Pop
+ case STARS_NN_fcom2: // Alias of Compare Real
+ case STARS_NN_fcomp3: // Alias of Compare Real and Pop
+ case STARS_NN_fxch4: // Alias of Exchange Registers
+ case STARS_NN_fcomp5: // Alias of Compare Real and Pop
return false;
break;
- case NN_ffreep: // Free Register and Pop; used in mplayer binary
+ case STARS_NN_ffreep: // Free Register and Pop; used in mplayer binary
// Floating point stack and control word and flags operations
// with no memory operands are no-ops to us.
NopRT = new SMPRegTransfer;
@@ -16969,69 +16974,69 @@ bool SMPInstr::BuildRTL(void) {
return true;
- case NN_fxch7: // Alias of Exchange Registers
- case NN_fstp8: // Alias of Store Real and Pop
- case NN_fstp9: // Alias of Store Real and Pop
+ case STARS_NN_fxch7: // Alias of Exchange Registers
+ case STARS_NN_fstp8: // Alias of Store Real and Pop
+ case STARS_NN_fstp9: // Alias of Store Real and Pop
return false;
break;
// Pentium 4 instructions
- case NN_addpd: // Add Packed Double-Precision Floating-Point Values
- case NN_addsd: // Add Scalar Double-Precision Floating-Point Values
- case NN_andnpd: // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
- case NN_andpd: // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
+ case STARS_NN_addpd: // Add Packed Double-Precision Floating-Point Values
+ case STARS_NN_addsd: // Add Scalar Double-Precision Floating-Point Values
+ case STARS_NN_andnpd: // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
+ case STARS_NN_andpd: // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_clflush: // Flush Cache Line
- case NN_cmppd: // Compare Packed Double-Precision Floating-Point Values
- case NN_cmpsd: // Compare Scalar Double-Precision Floating-Point Values
- case NN_comisd: // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ case STARS_NN_clflush: // Flush Cache Line
+ case STARS_NN_cmppd: // Compare Packed Double-Precision Floating-Point Values
+ case STARS_NN_cmpsd: // Compare Scalar Double-Precision Floating-Point Values
+ case STARS_NN_comisd: // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
return false;
break;
- case NN_cvtdq2pd: // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
- case NN_cvtdq2ps: // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
+ case STARS_NN_cvtdq2pd: // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
+ case STARS_NN_cvtdq2ps: // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
return this->BuildBinaryRTL(SMP_CONVERT_INT_TO_FP);
break;
- case NN_cvtpd2dq: // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_cvtpd2pi: // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_cvtpd2ps: // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
+ case STARS_NN_cvtpd2dq: // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_cvtpd2pi: // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_cvtpd2ps: // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
return this->BuildBinaryRTL(SMP_CONVERT_FP_TO_INT);
break;
- case NN_cvtpi2pd: // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
+ case STARS_NN_cvtpi2pd: // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
return this->BuildBinaryRTL(SMP_CONVERT_INT_TO_FP);
break;
- case NN_cvtps2dq: // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_cvtps2pd: // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
- case NN_cvtsd2si: // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
- case NN_cvtsd2ss: // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
+ case STARS_NN_cvtps2dq: // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_cvtps2pd: // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
+ case STARS_NN_cvtsd2si: // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ case STARS_NN_cvtsd2ss: // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
return this->BuildBinaryRTL(SMP_CONVERT_FP_TO_INT);
break;
- case NN_cvtsi2sd: // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
+ case STARS_NN_cvtsi2sd: // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
return this->BuildBinaryRTL(SMP_CONVERT_INT_TO_FP);
break;
- case NN_cvtss2sd: // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
- case NN_cvttpd2dq: // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_cvttpd2pi: // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_cvttps2dq: // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_cvttsd2si: // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ case STARS_NN_cvtss2sd: // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
+ case STARS_NN_cvttpd2dq: // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_cvttpd2pi: // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_cvttps2dq: // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_cvttsd2si: // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
return this->BuildBinaryRTL(SMP_CONVERT_FP_TO_INT);
break;
- case NN_divpd: // Divide Packed Double-Precision Floating-Point Values
- case NN_divsd: // Divide Scalar Double-Precision Floating-Point Values
+ case STARS_NN_divpd: // Divide Packed Double-Precision Floating-Point Values
+ case STARS_NN_divsd: // Divide Scalar Double-Precision Floating-Point Values
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_lfence: // Load Fence
+ case STARS_NN_lfence: // Load Fence
NopRT = new SMPRegTransfer;
NopRT->SetParentInst(this);
NopRT->SetOperator(SMP_NULL_OPERATOR);
@@ -17039,16 +17044,16 @@ bool SMPInstr::BuildRTL(void) {
NopRT = NULL;
return true;
- case NN_maskmovdqu: // Store Selected Bytes of Double Quadword
+ case STARS_NN_maskmovdqu: // Store Selected Bytes of Double Quadword
return false;
break;
- case NN_maxpd: // Return Maximum Packed Double-Precision Floating-Point Values
- case NN_maxsd: // Return Maximum Scalar Double-Precision Floating-Point Value
+ case STARS_NN_maxpd: // Return Maximum Packed Double-Precision Floating-Point Values
+ case STARS_NN_maxsd: // Return Maximum Scalar Double-Precision Floating-Point Value
return this->BuildBinaryRTL(SMP_MAX_S);
break;
- case NN_mfence: // Memory Fence
+ case STARS_NN_mfence: // Memory Fence
NopRT = new SMPRegTransfer;
NopRT->SetParentInst(this);
NopRT->SetOperator(SMP_NULL_OPERATOR);
@@ -17056,44 +17061,44 @@ bool SMPInstr::BuildRTL(void) {
NopRT = NULL;
return true;
- case NN_minpd: // Return Minimum Packed Double-Precision Floating-Point Values
- case NN_minsd: // Return Minimum Scalar Double-Precision Floating-Point Value
+ case STARS_NN_minpd: // Return Minimum Packed Double-Precision Floating-Point Values
+ case STARS_NN_minsd: // Return Minimum Scalar Double-Precision Floating-Point Value
return this->BuildBinaryRTL(SMP_MIN_S);
break;
- case NN_movapd: // Move Aligned Packed Double-Precision Floating-Point Values
- case NN_movdq2q: // Move Quadword from XMM to MMX Register
- case NN_movdqa: // Move Aligned Double Quadword
- case NN_movdqu: // Move Unaligned Double Quadword
- case NN_movhpd: // Move High Packed Double-Precision Floating-Point Values
- case NN_movlpd: // Move Low Packed Double-Precision Floating-Point Values
+ case STARS_NN_movapd: // Move Aligned Packed Double-Precision Floating-Point Values
+ case STARS_NN_movdq2q: // Move Quadword from XMM to MMX Register
+ case STARS_NN_movdqa: // Move Aligned Double Quadword
+ case STARS_NN_movdqu: // Move Unaligned Double Quadword
+ case STARS_NN_movhpd: // Move High Packed Double-Precision Floating-Point Values
+ case STARS_NN_movlpd: // Move Low Packed Double-Precision Floating-Point Values
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
break;
- case NN_movmskpd: // Extract Packed Double-Precision Floating-Point Sign Mask
+ case STARS_NN_movmskpd: // Extract Packed Double-Precision Floating-Point Sign Mask
return false;
break;
- case NN_movntdq: // Store Double Quadword Using Non-Temporal Hint
- case NN_movnti: // Store Doubleword Using Non-Temporal Hint
- case NN_movntpd: // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
- case NN_movq2dq: // Move Quadword from MMX to XMM Register
- case NN_movsd: // Move Scalar Double-Precision Floating-Point Values
- case NN_movupd: // Move Unaligned Packed Double-Precision Floating-Point Values
+ case STARS_NN_movntdq: // Store Double Quadword Using Non-Temporal Hint
+ case STARS_NN_movnti: // Store Doubleword Using Non-Temporal Hint
+ case STARS_NN_movntpd: // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
+ case STARS_NN_movq2dq: // Move Quadword from MMX to XMM Register
+ case STARS_NN_movsd: // Move Scalar Double-Precision Floating-Point Values
+ case STARS_NN_movupd: // Move Unaligned Packed Double-Precision Floating-Point Values
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
break;
- case NN_mulpd: // Multiply Packed Double-Precision Floating-Point Values
- case NN_mulsd: // Multiply Scalar Double-Precision Floating-Point Values
- case NN_orpd: // Bitwise Logical OR of Double-Precision Floating-Point Values
+ case STARS_NN_mulpd: // Multiply Packed Double-Precision Floating-Point Values
+ case STARS_NN_mulsd: // Multiply Scalar Double-Precision Floating-Point Values
+ case STARS_NN_orpd: // Bitwise Logical OR of Double-Precision Floating-Point Values
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_paddq: // Add Packed Quadword Integers
+ case STARS_NN_paddq: // Add Packed Quadword Integers
return this->BuildBinaryRTL(SMP_ADD);
break;
- case NN_pause: // Spin Loop Hint
+ case STARS_NN_pause: // Spin Loop Hint
NopRT = new SMPRegTransfer;
NopRT->SetParentInst(this);
NopRT->SetOperator(SMP_NULL_OPERATOR);
@@ -17101,995 +17106,995 @@ bool SMPInstr::BuildRTL(void) {
NopRT = NULL;
return true;
- case NN_pmuludq: // Multiply Packed Unsigned Doubleword Integers
+ case STARS_NN_pmuludq: // Multiply Packed Unsigned Doubleword Integers
return this->BuildBinaryRTL(SMP_U_MULTIPLY);
break;
- case NN_pshufd: // Shuffle Packed Doublewords
- case NN_pshufhw: // Shuffle Packed High Words
- case NN_pshuflw: // Shuffle Packed Low Words
+ case STARS_NN_pshufd: // Shuffle Packed Doublewords
+ case STARS_NN_pshufhw: // Shuffle Packed High Words
+ case STARS_NN_pshuflw: // Shuffle Packed Low Words
return this->BuildBinaryRTL(SMP_SHUFFLE);
break;
- case NN_pslldq: // Shift Double Quadword Left Logical
+ case STARS_NN_pslldq: // Shift Double Quadword Left Logical
return this->BuildBinaryRTL(SMP_U_LEFT_SHIFT);
break;
- case NN_psrldq: // Shift Double Quadword Right Logical
+ case STARS_NN_psrldq: // Shift Double Quadword Right Logical
return this->BuildBinaryRTL(SMP_U_RIGHT_SHIFT);
break;
- case NN_psubq: // Subtract Packed Quadword Integers
+ case STARS_NN_psubq: // Subtract Packed Quadword Integers
return this->BuildBinaryRTL(SMP_SUBTRACT);
break;
- case NN_punpckhqdq: // Unpack High Data
- case NN_punpcklqdq: // Unpack Low Data
+ case STARS_NN_punpckhqdq: // Unpack High Data
+ case STARS_NN_punpcklqdq: // Unpack Low Data
return this->BuildBinaryRTL(SMP_INTERLEAVE);
break;
- case NN_shufpd: // Shuffle Packed Double-Precision Floating-Point Values
+ case STARS_NN_shufpd: // Shuffle Packed Double-Precision Floating-Point Values
return this->BuildBinaryRTL(SMP_SHUFFLE);
break;
- case NN_sqrtpd: // Compute Square Roots of Packed Double-Precision Floating-Point Values
- case NN_sqrtsd: // Compute Square Rootof Scalar Double-Precision Floating-Point Value
+ case STARS_NN_sqrtpd: // Compute Square Roots of Packed Double-Precision Floating-Point Values
+ case STARS_NN_sqrtsd: // Compute Square Rootof Scalar Double-Precision Floating-Point Value
return this->BuildUnary2OpndRTL(SMP_UNARY_FLOATING_ARITHMETIC);
break;
- case NN_subpd: // Subtract Packed Double-Precision Floating-Point Values
- case NN_subsd: // Subtract Scalar Double-Precision Floating-Point Values
+ case STARS_NN_subpd: // Subtract Packed Double-Precision Floating-Point Values
+ case STARS_NN_subsd: // Subtract Scalar Double-Precision Floating-Point Values
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_ucomisd: // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ case STARS_NN_ucomisd: // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
return this->BuildFlagsDestBinaryRTL(SMP_S_COMPARE);
break;
- case NN_unpckhpd: // Unpack and Interleave High Packed Double-Precision Floating-Point Values
- case NN_unpcklpd: // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
+ case STARS_NN_unpckhpd: // Unpack and Interleave High Packed Double-Precision Floating-Point Values
+ case STARS_NN_unpcklpd: // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
return this->BuildBinaryRTL(SMP_INTERLEAVE);
break;
- case NN_xorpd: // Bitwise Logical OR of Double-Precision Floating-Point Values
+ case STARS_NN_xorpd: // Bitwise Logical OR of Double-Precision Floating-Point Values
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
// AMD syscall/sysret instructions
- case NN_syscall: // Low latency system call
- case NN_sysret: // Return from system call
+ case STARS_NN_syscall: // Low latency system call
+ case STARS_NN_sysret: // Return from system call
// AMD64 instructions
- case NN_swapgs: // Exchange GS base with KernelGSBase MSR
+ case STARS_NN_swapgs: // Exchange GS base with KernelGSBase MSR
return false;
break;
// New Pentium instructions (SSE3)
- case NN_movddup: // Move One Double-FP and Duplicate
- case NN_movshdup: // Move Packed Single-FP High and Duplicate
- case NN_movsldup: // Move Packed Single-FP Low and Duplicate
+ case STARS_NN_movddup: // Move One Double-FP and Duplicate
+ case STARS_NN_movshdup: // Move Packed Single-FP High and Duplicate
+ case STARS_NN_movsldup: // Move Packed Single-FP Low and Duplicate
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
break;
// Missing AMD64 instructions : NOTE: Also found in Intel manual -- clc
- case NN_movsxd: // Move with Sign-Extend Doubleword
+ case STARS_NN_movsxd: // Move with Sign-Extend Doubleword
return this->BuildUnary2OpndRTL(SMP_SIGN_EXTEND);
- case NN_cmpxchg16b: // Compare and Exchange 16 Bytes
+ case STARS_NN_cmpxchg16b: // Compare and Exchange 16 Bytes
return false;
break;
// SSE3 instructions
- case NN_addsubpd: // Add /Sub packed DP FP numbers
- case NN_addsubps: // Add /Sub packed SP FP numbers
- case NN_haddpd: // Add horizontally packed DP FP numbers
- case NN_haddps: // Add horizontally packed SP FP numbers
- case NN_hsubpd: // Sub horizontally packed DP FP numbers
- case NN_hsubps: // Sub horizontally packed SP FP numbers
+ case STARS_NN_addsubpd: // Add /Sub packed DP FP numbers
+ case STARS_NN_addsubps: // Add /Sub packed SP FP numbers
+ case STARS_NN_haddpd: // Add horizontally packed DP FP numbers
+ case STARS_NN_haddps: // Add horizontally packed SP FP numbers
+ case STARS_NN_hsubpd: // Sub horizontally packed DP FP numbers
+ case STARS_NN_hsubps: // Sub horizontally packed SP FP numbers
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_monitor: // Set up a linear address range to be monitored by hardware
- case NN_mwait: // Wait until write-back store performed within the range specified by the MONITOR instruction
+ case STARS_NN_monitor: // Set up a linear address range to be monitored by hardware
+ case STARS_NN_mwait: // Wait until write-back store performed within the range specified by the MONITOR instruction
return false;
break;
- case NN_fisttp: // Store ST in intXX (chop) and pop
+ case STARS_NN_fisttp: // Store ST in intXX (chop) and pop
return this->BuildBinaryRTL(SMP_CONVERT_FP_TO_INT);
break;
- case NN_lddqu: // Load unaligned integer 128-bit
+ case STARS_NN_lddqu: // Load unaligned integer 128-bit
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
break;
// SSSE3 instructions
- case NN_psignb: // Packed SIGN Byte
- case NN_psignw: // Packed SIGN Word
- case NN_psignd: // Packed SIGN Doubleword
- case NN_pshufb: // Packed Shuffle Bytes
+ case STARS_NN_psignb: // Packed SIGN Byte
+ case STARS_NN_psignw: // Packed SIGN Word
+ case STARS_NN_psignd: // Packed SIGN Doubleword
+ case STARS_NN_pshufb: // Packed Shuffle Bytes
return this->BuildBinaryRTL(SMP_SHUFFLE);
break;
- case NN_pmulhrsw: // Packed Multiply High with Round and Scale
+ case STARS_NN_pmulhrsw: // Packed Multiply High with Round and Scale
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_pmaddubsw: // Multiply and Add Packed Signed and Unsigned Bytes
+ case STARS_NN_pmaddubsw: // Multiply and Add Packed Signed and Unsigned Bytes
return this->BuildBinaryRTL(SMP_MULTIPLY_AND_ADD);
break;
- case NN_phsubsw: // Packed Horizontal Subtract and Saturate
+ case STARS_NN_phsubsw: // Packed Horizontal Subtract and Saturate
return this->BuildBinaryRTL(SMP_SUBTRACT);
break;
- case NN_phaddsw: // Packed Horizontal Add and Saturate
+ case STARS_NN_phaddsw: // Packed Horizontal Add and Saturate
return this->BuildBinaryRTL(SMP_ADD);
break;
- case NN_phaddw: // Packed Horizontal Add Word
- case NN_phaddd: // Packed Horizontal Add Doubleword
+ case STARS_NN_phaddw: // Packed Horizontal Add Word
+ case STARS_NN_phaddd: // Packed Horizontal Add Doubleword
return this->BuildBinaryRTL(SMP_ADD);
break;
- case NN_phsubw: // Packed Horizontal Subtract Word
- case NN_phsubd: // Packed Horizontal Subtract Doubleword
+ case STARS_NN_phsubw: // Packed Horizontal Subtract Word
+ case STARS_NN_phsubd: // Packed Horizontal Subtract Doubleword
return this->BuildBinaryRTL(SMP_SUBTRACT);
break;
- case NN_palignr: // Packed Align Right
+ case STARS_NN_palignr: // Packed Align Right
return this->BuildPackShiftRTL(SMP_CONCATENATE, SMP_REVERSE_SHIFT_U);
break;
- case NN_pabsb: // Packed Absolute Value Byte
- case NN_pabsw: // Packed Absolute Value Word
- case NN_pabsd: // Packed Absolute Value Doubleword
+ case STARS_NN_pabsb: // Packed Absolute Value Byte
+ case STARS_NN_pabsw: // Packed Absolute Value Word
+ case STARS_NN_pabsd: // Packed Absolute Value Doubleword
return this->BuildUnary2OpndRTL(SMP_ABSOLUTE_VALUE);
break;
// VMX instructions
- case NN_vmcall: // Call to VM Monitor
- case NN_vmclear: // Clear Virtual Machine Control Structure
- case NN_vmlaunch: // Launch Virtual Machine
- case NN_vmresume: // Resume Virtual Machine
- case NN_vmptrld: // Load Pointer to Virtual Machine Control Structure
- case NN_vmptrst: // Store Pointer to Virtual Machine Control Structure
- case NN_vmread: // Read Field from Virtual Machine Control Structure
- case NN_vmwrite: // Write Field from Virtual Machine Control Structure
- case NN_vmxoff: // Leave VMX Operation
- case NN_vmxon: // Enter VMX Operation
+ case STARS_NN_vmcall: // Call to VM Monitor
+ case STARS_NN_vmclear: // Clear Virtual Machine Control Structure
+ case STARS_NN_vmlaunch: // Launch Virtual Machine
+ case STARS_NN_vmresume: // Resume Virtual Machine
+ case STARS_NN_vmptrld: // Load Pointer to Virtual Machine Control Structure
+ case STARS_NN_vmptrst: // Store Pointer to Virtual Machine Control Structure
+ case STARS_NN_vmread: // Read Field from Virtual Machine Control Structure
+ case STARS_NN_vmwrite: // Write Field from Virtual Machine Control Structure
+ case STARS_NN_vmxoff: // Leave VMX Operation
+ case STARS_NN_vmxon: // Enter VMX Operation
return false;
break;
#if 599 < IDA_SDK_VERSION
- case NN_ud2: // Undefined Instruction
+ case STARS_NN_ud2: // Undefined Instruction
return false;
break;
// Added with x86-64
- case NN_rdtscp: // Read Time-Stamp Counter and Processor ID
+ case STARS_NN_rdtscp: // Read Time-Stamp Counter and Processor ID
return false;
break;
// Geode LX 3DNow! extensions
- case NN_pfrcpv: // Reciprocal Approximation for a Pair of 32-bit Floats
- case NN_pfrsqrtv: // Reciprocal Square Root Approximation for a Pair of 32-bit Floats
+ case STARS_NN_pfrcpv: // Reciprocal Approximation for a Pair of 32-bit Floats
+ case STARS_NN_pfrsqrtv: // Reciprocal Square Root Approximation for a Pair of 32-bit Floats
return false;
break;
// SSE2 pseudoinstructions
- case NN_cmpeqpd: // Packed Double-FP Compare EQ
+ case STARS_NN_cmpeqpd: // Packed Double-FP Compare EQ
return this->BuildBinaryRTL(SMP_COMPARE_EQ_AND_SET);
break;
- case NN_cmpltpd: // Packed Double-FP Compare LT
+ case STARS_NN_cmpltpd: // Packed Double-FP Compare LT
return this->BuildBinaryRTL(SMP_COMPARE_LT_AND_SET);
break;
- case NN_cmplepd: // Packed Double-FP Compare LE
+ case STARS_NN_cmplepd: // Packed Double-FP Compare LE
return this->BuildBinaryRTL(SMP_COMPARE_LE_AND_SET);
break;
- case NN_cmpunordpd: // Packed Double-FP Compare UNORD
+ case STARS_NN_cmpunordpd: // Packed Double-FP Compare UNORD
return this->BuildBinaryRTL(SMP_COMPARE_EQ_AND_SET);
break;
- case NN_cmpneqpd: // Packed Double-FP Compare NOT EQ
+ case STARS_NN_cmpneqpd: // Packed Double-FP Compare NOT EQ
return this->BuildBinaryRTL(SMP_COMPARE_NE_AND_SET);
break;
- case NN_cmpnltpd: // Packed Double-FP Compare NOT LT
+ case STARS_NN_cmpnltpd: // Packed Double-FP Compare NOT LT
return this->BuildBinaryRTL(SMP_COMPARE_GE_AND_SET);
break;
- case NN_cmpnlepd: // Packed Double-FP Compare NOT LE
+ case STARS_NN_cmpnlepd: // Packed Double-FP Compare NOT LE
return this->BuildBinaryRTL(SMP_COMPARE_GT_AND_SET);
break;
- case NN_cmpordpd: // Packed Double-FP Compare ORDERED
+ case STARS_NN_cmpordpd: // Packed Double-FP Compare ORDERED
return this->BuildBinaryRTL(SMP_COMPARE_EQ_AND_SET);
break;
- case NN_cmpeqsd: // Scalar Double-FP Compare EQ
+ case STARS_NN_cmpeqsd: // Scalar Double-FP Compare EQ
return this->BuildBinaryRTL(SMP_COMPARE_EQ_AND_SET);
break;
- case NN_cmpltsd: // Scalar Double-FP Compare LT
+ case STARS_NN_cmpltsd: // Scalar Double-FP Compare LT
return this->BuildBinaryRTL(SMP_COMPARE_LT_AND_SET);
break;
- case NN_cmplesd: // Scalar Double-FP Compare LE
+ case STARS_NN_cmplesd: // Scalar Double-FP Compare LE
return this->BuildBinaryRTL(SMP_COMPARE_LE_AND_SET);
break;
- case NN_cmpunordsd: // Scalar Double-FP Compare UNORD
+ case STARS_NN_cmpunordsd: // Scalar Double-FP Compare UNORD
return this->BuildBinaryRTL(SMP_COMPARE_EQ_AND_SET);
break;
- case NN_cmpneqsd: // Scalar Double-FP Compare NOT EQ
+ case STARS_NN_cmpneqsd: // Scalar Double-FP Compare NOT EQ
return this->BuildBinaryRTL(SMP_COMPARE_NE_AND_SET);
break;
- case NN_cmpnltsd: // Scalar Double-FP Compare NOT LT
+ case STARS_NN_cmpnltsd: // Scalar Double-FP Compare NOT LT
return this->BuildBinaryRTL(SMP_COMPARE_GE_AND_SET);
break;
- case NN_cmpnlesd: // Scalar Double-FP Compare NOT LE
+ case STARS_NN_cmpnlesd: // Scalar Double-FP Compare NOT LE
return this->BuildBinaryRTL(SMP_COMPARE_GT_AND_SET);
break;
- case NN_cmpordsd: // Scalar Double-FP Compare ORDERED
+ case STARS_NN_cmpordsd: // Scalar Double-FP Compare ORDERED
return this->BuildBinaryRTL(SMP_COMPARE_EQ_AND_SET);
break;
// SSSE4.1 instructions
- case NN_blendpd: // Blend Packed Double Precision Floating-Point Values
- case NN_blendps: // Blend Packed Single Precision Floating-Point Values
- case NN_blendvpd: // Variable Blend Packed Double Precision Floating-Point Values
- case NN_blendvps: // Variable Blend Packed Single Precision Floating-Point Values
+ case STARS_NN_blendpd: // Blend Packed Double Precision Floating-Point Values
+ case STARS_NN_blendps: // Blend Packed Single Precision Floating-Point Values
+ case STARS_NN_blendvpd: // Variable Blend Packed Double Precision Floating-Point Values
+ case STARS_NN_blendvps: // Variable Blend Packed Single Precision Floating-Point Values
return this->BuildBinaryRTL(SMP_SHUFFLE);
break;
- case NN_dppd: // Dot Product of Packed Double Precision Floating-Point Values
- case NN_dpps: // Dot Product of Packed Single Precision Floating-Point Values
+ case STARS_NN_dppd: // Dot Product of Packed Double Precision Floating-Point Values
+ case STARS_NN_dpps: // Dot Product of Packed Single Precision Floating-Point Values
return false;
break;
- case NN_extractps: // Extract Packed Single Precision Floating-Point Value
- case NN_insertps: // Insert Packed Single Precision Floating-Point Value
- case NN_movntdqa: // Load Double Quadword Non-Temporal Aligned Hint
- case NN_mpsadbw: // Compute Multiple Packed Sums of Absolute Difference
- case NN_packusdw: // Pack with Unsigned Saturation
+ case STARS_NN_extractps: // Extract Packed Single Precision Floating-Point Value
+ case STARS_NN_insertps: // Insert Packed Single Precision Floating-Point Value
+ case STARS_NN_movntdqa: // Load Double Quadword Non-Temporal Aligned Hint
+ case STARS_NN_mpsadbw: // Compute Multiple Packed Sums of Absolute Difference
+ case STARS_NN_packusdw: // Pack with Unsigned Saturation
return false;
break;
- case NN_pblendvb: // Variable Blend Packed Bytes
- case NN_pblendw: // Blend Packed Words
+ case STARS_NN_pblendvb: // Variable Blend Packed Bytes
+ case STARS_NN_pblendw: // Blend Packed Words
return this->BuildBinaryRTL(SMP_SHUFFLE);
break;
- case NN_pcmpeqq: // Compare Packed Qword Data for Equal
+ case STARS_NN_pcmpeqq: // Compare Packed Qword Data for Equal
return false;
break;
- case NN_pextrb: // Extract Byte
- case NN_pextrd: // Extract Dword
- case NN_pextrq: // Extract Qword
+ case STARS_NN_pextrb: // Extract Byte
+ case STARS_NN_pextrd: // Extract Dword
+ case STARS_NN_pextrq: // Extract Qword
return this->BuildBinaryPlusImmedRTL(SMP_EXTRACT_ZERO_EXTEND, SMP_CREATE_MASK);
- case NN_phminposuw: // Packed Horizontal Word Minimum
+ case STARS_NN_phminposuw: // Packed Horizontal Word Minimum
return false;
break;
- case NN_pinsrb: // Insert Byte
- case NN_pinsrd: // Insert Dword
- case NN_pinsrq: // Insert Qword
+ case STARS_NN_pinsrb: // Insert Byte
+ case STARS_NN_pinsrd: // Insert Dword
+ case STARS_NN_pinsrq: // Insert Qword
return this->BuildBinaryPlusImmedRTL(SMP_BITWISE_AND, SMP_CREATE_MASK);
break;
- case NN_pmaxsb: // Maximum of Packed Signed Byte Integers
- case NN_pmaxsd: // Maximum of Packed Signed Dword Integers
+ case STARS_NN_pmaxsb: // Maximum of Packed Signed Byte Integers
+ case STARS_NN_pmaxsd: // Maximum of Packed Signed Dword Integers
return this->BuildBinaryRTL(SMP_MAX_S);
break;
- case NN_pmaxud: // Maximum of Packed Unsigned Dword Integers
- case NN_pmaxuw: // Maximum of Packed Word Integers
+ case STARS_NN_pmaxud: // Maximum of Packed Unsigned Dword Integers
+ case STARS_NN_pmaxuw: // Maximum of Packed Word Integers
return this->BuildBinaryRTL(SMP_MAX_U);
break;
- case NN_pminsb: // Minimum of Packed Signed Byte Integers
- case NN_pminsd: // Minimum of Packed Signed Dword Integers
+ case STARS_NN_pminsb: // Minimum of Packed Signed Byte Integers
+ case STARS_NN_pminsd: // Minimum of Packed Signed Dword Integers
return this->BuildBinaryRTL(SMP_MIN_S);
break;
- case NN_pminud: // Minimum of Packed Unsigned Dword Integers
- case NN_pminuw: // Minimum of Packed Word Integers
+ case STARS_NN_pminud: // Minimum of Packed Unsigned Dword Integers
+ case STARS_NN_pminuw: // Minimum of Packed Word Integers
return this->BuildBinaryRTL(SMP_MIN_U);
break;
- case NN_pmovsxbw: // Packed Move with Sign Extend
- case NN_pmovsxbd: // Packed Move with Sign Extend
- case NN_pmovsxbq: // Packed Move with Sign Extend
- case NN_pmovsxwd: // Packed Move with Sign Extend
- case NN_pmovsxwq: // Packed Move with Sign Extend
- case NN_pmovsxdq: // Packed Move with Sign Extend
+ case STARS_NN_pmovsxbw: // Packed Move with Sign Extend
+ case STARS_NN_pmovsxbd: // Packed Move with Sign Extend
+ case STARS_NN_pmovsxbq: // Packed Move with Sign Extend
+ case STARS_NN_pmovsxwd: // Packed Move with Sign Extend
+ case STARS_NN_pmovsxwq: // Packed Move with Sign Extend
+ case STARS_NN_pmovsxdq: // Packed Move with Sign Extend
return this->BuildUnary2OpndRTL(SMP_SIGN_EXTEND);
break;
- case NN_pmovzxbw: // Packed Move with Zero Extend
- case NN_pmovzxbd: // Packed Move with Zero Extend
- case NN_pmovzxbq: // Packed Move with Zero Extend
- case NN_pmovzxwd: // Packed Move with Zero Extend
- case NN_pmovzxwq: // Packed Move with Zero Extend
- case NN_pmovzxdq: // Packed Move with Zero Extend
+ case STARS_NN_pmovzxbw: // Packed Move with Zero Extend
+ case STARS_NN_pmovzxbd: // Packed Move with Zero Extend
+ case STARS_NN_pmovzxbq: // Packed Move with Zero Extend
+ case STARS_NN_pmovzxwd: // Packed Move with Zero Extend
+ case STARS_NN_pmovzxwq: // Packed Move with Zero Extend
+ case STARS_NN_pmovzxdq: // Packed Move with Zero Extend
return this->BuildUnary2OpndRTL(SMP_ZERO_EXTEND);
break;
- case NN_pmuldq: // Multiply Packed Signed Dword Integers
- case NN_pmulld: // Multiply Packed Signed Dword Integers and Store Low Result
+ case STARS_NN_pmuldq: // Multiply Packed Signed Dword Integers
+ case STARS_NN_pmulld: // Multiply Packed Signed Dword Integers and Store Low Result
return false;
break;
- case NN_ptest: // Logical Compare
+ case STARS_NN_ptest: // Logical Compare
return this->BuildFlagsDestBinaryRTL(SMP_U_COMPARE);
- case NN_roundpd: // Round Packed Double Precision Floating-Point Values
- case NN_roundps: // Round Packed Single Precision Floating-Point Values
- case NN_roundsd: // Round Scalar Double Precision Floating-Point Values
- case NN_roundss: // Round Scalar Single Precision Floating-Point Values
+ case STARS_NN_roundpd: // Round Packed Double Precision Floating-Point Values
+ case STARS_NN_roundps: // Round Packed Single Precision Floating-Point Values
+ case STARS_NN_roundsd: // Round Scalar Double Precision Floating-Point Values
+ case STARS_NN_roundss: // Round Scalar Single Precision Floating-Point Values
return false;
break;
// SSSE4.2 instructions
- case NN_crc32: // Accumulate CRC32 Value
+ case STARS_NN_crc32: // Accumulate CRC32 Value
return false;
break;
- case NN_pcmpestri: // Packed Compare Explicit Length Strings, Return Index
- case NN_pcmpestrm: // Packed Compare Explicit Length Strings, Return Mask
- case NN_pcmpistri: // Packed Compare Implicit Length Strings, Return Index
- case NN_pcmpistrm: // Packed Compare Implicit Length Strings, Return Mask
+ case STARS_NN_pcmpestri: // Packed Compare Explicit Length Strings, Return Index
+ case STARS_NN_pcmpestrm: // Packed Compare Explicit Length Strings, Return Mask
+ case STARS_NN_pcmpistri: // Packed Compare Implicit Length Strings, Return Index
+ case STARS_NN_pcmpistrm: // Packed Compare Implicit Length Strings, Return Mask
return BuildBinaryIgnoreImmedRTL(SMP_GENERAL_COMPARE);
break;
- case NN_pcmpgtq: // Compare Packed Data for Greater Than
- case NN_popcnt: // Return the Count of Number of Bits Set to 1
+ case STARS_NN_pcmpgtq: // Compare Packed Data for Greater Than
+ case STARS_NN_popcnt: // Return the Count of Number of Bits Set to 1
return false;
break;
// AMD SSE4a instructions
- case NN_extrq: // Extract Field From Register
- case NN_insertq: // Insert Field
- case NN_movntsd: // Move Non-Temporal Scalar Double-Precision Floating-Point
- case NN_movntss: // Move Non-Temporal Scalar Single-Precision Floating-Point
- case NN_lzcnt: // Leading Zero Count
+ case STARS_NN_extrq: // Extract Field From Register
+ case STARS_NN_insertq: // Insert Field
+ case STARS_NN_movntsd: // Move Non-Temporal Scalar Double-Precision Floating-Point
+ case STARS_NN_movntss: // Move Non-Temporal Scalar Single-Precision Floating-Point
+ case STARS_NN_lzcnt: // Leading Zero Count
return false;
break;
// xsave/xrstor instructions
- case NN_xgetbv: // Get Value of Extended Control Register
+ case STARS_NN_xgetbv: // Get Value of Extended Control Register
return this->BuildOptType8RTL();
- case NN_xrstor: // Restore Processor Extended States
- case NN_xsave: // Save Processor Extended States
- case NN_xsetbv: // Set Value of Extended Control Register
+ case STARS_NN_xrstor: // Restore Processor Extended States
+ case STARS_NN_xsave: // Save Processor Extended States
+ case STARS_NN_xsetbv: // Set Value of Extended Control Register
return false;
break;
// Intel Safer Mode Extensions (SMX)
- case NN_getsec: // Safer Mode Extensions (SMX) Instruction
+ case STARS_NN_getsec: // Safer Mode Extensions (SMX) Instruction
return false;
break;
// AMD-V Virtualization ISA Extension
- case NN_clgi: // Clear Global Interrupt Flag
- case NN_invlpga: // Invalidate TLB Entry in a Specified ASID
- case NN_skinit: // Secure Init and Jump with Attestation
- case NN_stgi: // Set Global Interrupt Flag
- case NN_vmexit: // Stop Executing Guest, Begin Executing Host
- case NN_vmload: // Load State from VMCB
- case NN_vmmcall: // Call VMM
- case NN_vmrun: // Run Virtual Machine
- case NN_vmsave: // Save State to VMCB
+ case STARS_NN_clgi: // Clear Global Interrupt Flag
+ case STARS_NN_invlpga: // Invalidate TLB Entry in a Specified ASID
+ case STARS_NN_skinit: // Secure Init and Jump with Attestation
+ case STARS_NN_stgi: // Set Global Interrupt Flag
+ case STARS_NN_vmexit: // Stop Executing Guest, Begin Executing Host
+ case STARS_NN_vmload: // Load State from VMCB
+ case STARS_NN_vmmcall: // Call VMM
+ case STARS_NN_vmrun: // Run Virtual Machine
+ case STARS_NN_vmsave: // Save State to VMCB
return false;
break;
// VMX+ instructions
- case NN_invept: // Invalidate Translations Derived from EPT
- case NN_invvpid: // Invalidate Translations Based on VPID
+ case STARS_NN_invept: // Invalidate Translations Derived from EPT
+ case STARS_NN_invvpid: // Invalidate Translations Based on VPID
return false;
break;
// Intel Atom instructions
- case NN_movbe: // Move Data After Swapping Bytes
+ case STARS_NN_movbe: // Move Data After Swapping Bytes
return false;
break;
// Intel AES instructions
- case NN_aesenc: // Perform One Round of an AES Encryption Flow
- case NN_aesenclast: // Perform the Last Round of an AES Encryption Flow
- case NN_aesdec: // Perform One Round of an AES Decryption Flow
- case NN_aesdeclast: // Perform the Last Round of an AES Decryption Flow
- case NN_aesimc: // Perform the AES InvMixColumn Transformation
- case NN_aeskeygenassist: // AES Round Key Generation Assist
+ case STARS_NN_aesenc: // Perform One Round of an AES Encryption Flow
+ case STARS_NN_aesenclast: // Perform the Last Round of an AES Encryption Flow
+ case STARS_NN_aesdec: // Perform One Round of an AES Decryption Flow
+ case STARS_NN_aesdeclast: // Perform the Last Round of an AES Decryption Flow
+ case STARS_NN_aesimc: // Perform the AES InvMixColumn Transformation
+ case STARS_NN_aeskeygenassist: // AES Round Key Generation Assist
return this->BuildBinaryRTL(SMP_ENCRYPTION_OPERATION);
break;
// Carryless multiplication
- case NN_pclmulqdq: // Carry-Less Multiplication Quadword
+ case STARS_NN_pclmulqdq: // Carry-Less Multiplication Quadword
return BuildBinaryIgnoreImmedRTL(SMP_U_MULTIPLY);
break;
// Returns modified by operand size prefixes
- case NN_retnw: // Return Near from Procedure (use16)
- case NN_retnd: // Return Near from Procedure (use32)
- case NN_retnq: // Return Near from Procedure (use64)
- case NN_retfw: // Return Far from Procedure (use16)
- case NN_retfd: // Return Far from Procedure (use32)
- case NN_retfq: // Return Far from Procedure (use64)
+ case STARS_NN_retnw: // Return Near from Procedure (use16)
+ case STARS_NN_retnd: // Return Near from Procedure (use32)
+ case STARS_NN_retnq: // Return Near from Procedure (use64)
+ case STARS_NN_retfw: // Return Far from Procedure (use16)
+ case STARS_NN_retfd: // Return Far from Procedure (use32)
+ case STARS_NN_retfq: // Return Far from Procedure (use64)
return this->BuildReturnRTL();
// RDRAND support
- case NN_rdrand: // Read Random Number
+ case STARS_NN_rdrand: // Read Random Number
return this->BuildUnaryRTL(SMP_UNARY_NUMERIC_OPERATION);
// new GPR instructions
- case NN_adcx: // Unsigned Integer Addition of Two Operands with Carry Flag
+ case STARS_NN_adcx: // Unsigned Integer Addition of Two Operands with Carry Flag
return this->BuildBinaryPlusFlagsRTL(SMP_ADD_CARRY);
- case NN_adox: // Unsigned Integer Addition of Two Operands with Overflow Flag
- case NN_andn: // Logical AND NOT
- case NN_bextr: // Bit Field Extract
- case NN_blsi: // Extract Lowest Set Isolated Bit
- case NN_blsmsk: // Get Mask Up to Lowest Set Bit
- case NN_blsr: // Reset Lowest Set Bit
- case NN_bzhi: // Zero High Bits Starting with Specified Bit Position
+ case STARS_NN_adox: // Unsigned Integer Addition of Two Operands with Overflow Flag
+ case STARS_NN_andn: // Logical AND NOT
+ case STARS_NN_bextr: // Bit Field Extract
+ case STARS_NN_blsi: // Extract Lowest Set Isolated Bit
+ case STARS_NN_blsmsk: // Get Mask Up to Lowest Set Bit
+ case STARS_NN_blsr: // Reset Lowest Set Bit
+ case STARS_NN_bzhi: // Zero High Bits Starting with Specified Bit Position
return this->BuildBinaryPlusFlagsRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_clac: // Clear AC Flag in EFLAGS Register
+ case STARS_NN_clac: // Clear AC Flag in EFLAGS Register
return false;
- case NN_mulx: // Unsigned Multiply Without Affecting Flags
+ case STARS_NN_mulx: // Unsigned Multiply Without Affecting Flags
return this->BuildBinaryRTL(SMP_U_MULTIPLY);
- case NN_pdep: // Parallel Bits Deposit
- case NN_pext: // Parallel Bits Extract
+ case STARS_NN_pdep: // Parallel Bits Deposit
+ case STARS_NN_pext: // Parallel Bits Extract
return this->BuildBinaryRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_rorx: // Rotate Right Logical Without Affecting Flags
+ case STARS_NN_rorx: // Rotate Right Logical Without Affecting Flags
return this->BuildBinaryRTL(SMP_ROTATE_RIGHT);
- case NN_sarx: // Shift Arithmetically Right Without Affecting Flags
+ case STARS_NN_sarx: // Shift Arithmetically Right Without Affecting Flags
return this->BuildBinaryRTL(SMP_S_RIGHT_SHIFT);
- case NN_shlx: // Shift Logically Left Without Affecting Flags
+ case STARS_NN_shlx: // Shift Logically Left Without Affecting Flags
- case NN_shrx: // Shift Logically Right Without Affecting Flags
+ case STARS_NN_shrx: // Shift Logically Right Without Affecting Flags
return this->BuildBinaryRTL(SMP_U_RIGHT_SHIFT);
- case NN_stac: // Set AC Flag in EFLAGS Register
+ case STARS_NN_stac: // Set AC Flag in EFLAGS Register
return false;
- case NN_tzcnt: // Count the Number of Trailing Zero Bits
+ case STARS_NN_tzcnt: // Count the Number of Trailing Zero Bits
return this->BuildBinaryRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_xsaveopt: // Save Processor Extended States Optimized
- case NN_invpcid: // Invalidate Processor Context ID
+ case STARS_NN_xsaveopt: // Save Processor Extended States Optimized
+ case STARS_NN_invpcid: // Invalidate Processor Context ID
return false;
- case NN_rdseed: // Read Random Seed
+ case STARS_NN_rdseed: // Read Random Seed
return this->BuildBinaryRTL(SMP_BINARY_NUMERIC_OPERATION);
- case NN_rdfsbase: // Read FS Segment Base
- case NN_rdgsbase: // Read GS Segment Base
- case NN_wrfsbase: // Write FS Segment Base
- case NN_wrgsbase: // Write GS Segment Base
+ case STARS_NN_rdfsbase: // Read FS Segment Base
+ case STARS_NN_rdgsbase: // Read GS Segment Base
+ case STARS_NN_wrfsbase: // Write FS Segment Base
+ case STARS_NN_wrgsbase: // Write GS Segment Base
return false;
// new AVX instructions
- case NN_vaddpd: // Add Packed Double-Precision Floating-Point Values
- case NN_vaddps: // Packed Single-FP Add
- case NN_vaddsd: // Add Scalar Double-Precision Floating-Point Values
- case NN_vaddss: // Scalar Single-FP Add
- case NN_vaddsubpd: // Add /Sub packed DP FP numbers
- case NN_vaddsubps: // Add /Sub packed SP FP numbers
+ case STARS_NN_vaddpd: // Add Packed Double-Precision Floating-Point Values
+ case STARS_NN_vaddps: // Packed Single-FP Add
+ case STARS_NN_vaddsd: // Add Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vaddss: // Scalar Single-FP Add
+ case STARS_NN_vaddsubpd: // Add /Sub packed DP FP numbers
+ case STARS_NN_vaddsubps: // Add /Sub packed SP FP numbers
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_vaesdec: // Perform One Round of an AES Decryption Flow
- case NN_vaesdeclast: // Perform the Last Round of an AES Decryption Flow
- case NN_vaesenc: // Perform One Round of an AES Encryption Flow
- case NN_vaesenclast: // Perform the Last Round of an AES Encryption Flow
- case NN_vaesimc: // Perform the AES InvMixColumn Transformation
- case NN_vaeskeygenassist: // AES Round Key Generation Assist
+ case STARS_NN_vaesdec: // Perform One Round of an AES Decryption Flow
+ case STARS_NN_vaesdeclast: // Perform the Last Round of an AES Decryption Flow
+ case STARS_NN_vaesenc: // Perform One Round of an AES Encryption Flow
+ case STARS_NN_vaesenclast: // Perform the Last Round of an AES Encryption Flow
+ case STARS_NN_vaesimc: // Perform the AES InvMixColumn Transformation
+ case STARS_NN_vaeskeygenassist: // AES Round Key Generation Assist
return this->BuildBinaryRTL(SMP_ENCRYPTION_OPERATION);
break;
- case NN_vandnpd: // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
- case NN_vandnps: // Bitwise Logical And Not for Single-FP
- case NN_vandpd: // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
- case NN_vandps: // Bitwise Logical And for Single-FP
+ case STARS_NN_vandnpd: // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vandnps: // Bitwise Logical And Not for Single-FP
+ case STARS_NN_vandpd: // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vandps: // Bitwise Logical And for Single-FP
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_vblendpd: // Blend Packed Double Precision Floating-Point Values
- case NN_vblendps: // Blend Packed Single Precision Floating-Point Values
- case NN_vblendvpd: // Variable Blend Packed Double Precision Floating-Point Values
- case NN_vblendvps: // Variable Blend Packed Single Precision Floating-Point Values
+ case STARS_NN_vblendpd: // Blend Packed Double Precision Floating-Point Values
+ case STARS_NN_vblendps: // Blend Packed Single Precision Floating-Point Values
+ case STARS_NN_vblendvpd: // Variable Blend Packed Double Precision Floating-Point Values
+ case STARS_NN_vblendvps: // Variable Blend Packed Single Precision Floating-Point Values
return this->BuildBinaryRTL(SMP_SHUFFLE);
break;
- case NN_vbroadcastf128: // Broadcast 128 Bits of Floating-Point Data
- case NN_vbroadcasti128: // Broadcast 128 Bits of Integer Data
- case NN_vbroadcastsd: // Broadcast Double-Precision Floating-Point Element
- case NN_vbroadcastss: // Broadcast Single-Precision Floating-Point Element
+ case STARS_NN_vbroadcastf128: // Broadcast 128 Bits of Floating-Point Data
+ case STARS_NN_vbroadcasti128: // Broadcast 128 Bits of Integer Data
+ case STARS_NN_vbroadcastsd: // Broadcast Double-Precision Floating-Point Element
+ case STARS_NN_vbroadcastss: // Broadcast Single-Precision Floating-Point Element
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
break;
- case NN_vcmppd: // Compare Packed Double-Precision Floating-Point Values
- case NN_vcmpps: // Packed Single-FP Compare
- case NN_vcmpsd: // Compare Scalar Double-Precision Floating-Point Values
- case NN_vcmpss: // Scalar Single-FP Compare
- case NN_vcomisd: // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
- case NN_vcomiss: // Scalar Ordered Single-FP Compare and Set EFLAGS
- case NN_vcvtdq2pd: // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
- case NN_vcvtdq2ps: // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
- case NN_vcvtpd2dq: // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_vcvtpd2ps: // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
- case NN_vcvtph2ps: // Convert 16-bit FP Values to Single-Precision FP Values
- case NN_vcvtps2dq: // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_vcvtps2pd: // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
- case NN_vcvtps2ph: // Convert Single-Precision FP value to 16-bit FP value
- case NN_vcvtsd2si: // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
- case NN_vcvtsd2ss: // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
- case NN_vcvtsi2sd: // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
- case NN_vcvtsi2ss: // Scalar signed INT32 to Single-FP conversion
- case NN_vcvtss2sd: // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
- case NN_vcvtss2si: // Scalar Single-FP to signed INT32 conversion
- case NN_vcvttpd2dq: // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_vcvttps2dq: // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
- case NN_vcvttsd2si: // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
- case NN_vcvttss2si: // Scalar Single-FP to signed INT32 conversion (truncate)
- case NN_vdivpd: // Divide Packed Double-Precision Floating-Point Values
- case NN_vdivps: // Packed Single-FP Divide
- case NN_vdivsd: // Divide Scalar Double-Precision Floating-Point Values
- case NN_vdivss: // Scalar Single-FP Divide
- case NN_vdppd: // Dot Product of Packed Double Precision Floating-Point Values
- case NN_vdpps: // Dot Product of Packed Single Precision Floating-Point Values
+ case STARS_NN_vcmppd: // Compare Packed Double-Precision Floating-Point Values
+ case STARS_NN_vcmpps: // Packed Single-FP Compare
+ case STARS_NN_vcmpsd: // Compare Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vcmpss: // Scalar Single-FP Compare
+ case STARS_NN_vcomisd: // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ case STARS_NN_vcomiss: // Scalar Ordered Single-FP Compare and Set EFLAGS
+ case STARS_NN_vcvtdq2pd: // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
+ case STARS_NN_vcvtdq2ps: // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
+ case STARS_NN_vcvtpd2dq: // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_vcvtpd2ps: // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
+ case STARS_NN_vcvtph2ps: // Convert 16-bit FP Values to Single-Precision FP Values
+ case STARS_NN_vcvtps2dq: // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_vcvtps2pd: // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
+ case STARS_NN_vcvtps2ph: // Convert Single-Precision FP value to 16-bit FP value
+ case STARS_NN_vcvtsd2si: // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ case STARS_NN_vcvtsd2ss: // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
+ case STARS_NN_vcvtsi2sd: // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
+ case STARS_NN_vcvtsi2ss: // Scalar signed INT32 to Single-FP conversion
+ case STARS_NN_vcvtss2sd: // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
+ case STARS_NN_vcvtss2si: // Scalar Single-FP to signed INT32 conversion
+ case STARS_NN_vcvttpd2dq: // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_vcvttps2dq: // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ case STARS_NN_vcvttsd2si: // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ case STARS_NN_vcvttss2si: // Scalar Single-FP to signed INT32 conversion (truncate)
+ case STARS_NN_vdivpd: // Divide Packed Double-Precision Floating-Point Values
+ case STARS_NN_vdivps: // Packed Single-FP Divide
+ case STARS_NN_vdivsd: // Divide Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vdivss: // Scalar Single-FP Divide
+ case STARS_NN_vdppd: // Dot Product of Packed Double Precision Floating-Point Values
+ case STARS_NN_vdpps: // Dot Product of Packed Single Precision Floating-Point Values
return false;
break;
- case NN_vextractf128: // Extract Packed Floating-Point Values
- case NN_vextracti128: // Extract Packed Integer Values
- case NN_vextractps: // Extract Packed Floating-Point Values
+ case STARS_NN_vextractf128: // Extract Packed Floating-Point Values
+ case STARS_NN_vextracti128: // Extract Packed Integer Values
+ case STARS_NN_vextractps: // Extract Packed Floating-Point Values
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
break;
- case NN_vfmadd132pd: // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
- case NN_vfmadd132ps: // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
- case NN_vfmadd132sd: // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
- case NN_vfmadd132ss: // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
- case NN_vfmadd213pd: // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
- case NN_vfmadd213ps: // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
- case NN_vfmadd213sd: // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
- case NN_vfmadd213ss: // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
- case NN_vfmadd231pd: // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
- case NN_vfmadd231ps: // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
- case NN_vfmadd231sd: // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
- case NN_vfmadd231ss: // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
- case NN_vfmaddsub132pd: // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
- case NN_vfmaddsub132ps: // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
- case NN_vfmaddsub213pd: // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
- case NN_vfmaddsub213ps: // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
- case NN_vfmaddsub231pd: // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
- case NN_vfmaddsub231ps: // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
- case NN_vfmsub132pd: // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
- case NN_vfmsub132ps: // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
- case NN_vfmsub132sd: // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
- case NN_vfmsub132ss: // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
- case NN_vfmsub213pd: // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
- case NN_vfmsub213ps: // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
- case NN_vfmsub213sd: // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
- case NN_vfmsub213ss: // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
- case NN_vfmsub231pd: // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
- case NN_vfmsub231ps: // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
- case NN_vfmsub231sd: // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
- case NN_vfmsub231ss: // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
- case NN_vfmsubadd132pd: // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
- case NN_vfmsubadd132ps: // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
- case NN_vfmsubadd213pd: // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
- case NN_vfmsubadd213ps: // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
- case NN_vfmsubadd231pd: // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
- case NN_vfmsubadd231ps: // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
- case NN_vfnmadd132pd: // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
- case NN_vfnmadd132ps: // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
- case NN_vfnmadd132sd: // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
- case NN_vfnmadd132ss: // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
- case NN_vfnmadd213pd: // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
- case NN_vfnmadd213ps: // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
- case NN_vfnmadd213sd: // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
- case NN_vfnmadd213ss: // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
- case NN_vfnmadd231pd: // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
- case NN_vfnmadd231ps: // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
- case NN_vfnmadd231sd: // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
- case NN_vfnmadd231ss: // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
- case NN_vfnmsub132pd: // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
- case NN_vfnmsub132ps: // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
- case NN_vfnmsub132sd: // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
- case NN_vfnmsub132ss: // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
- case NN_vfnmsub213pd: // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
- case NN_vfnmsub213ps: // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
- case NN_vfnmsub213sd: // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
- case NN_vfnmsub213ss: // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
- case NN_vfnmsub231pd: // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
- case NN_vfnmsub231ps: // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
- case NN_vfnmsub231sd: // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
- case NN_vfnmsub231ss: // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfmadd132pd: // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmadd132ps: // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmadd132sd: // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfmadd132ss: // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfmadd213pd: // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmadd213ps: // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmadd213sd: // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfmadd213ss: // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfmadd231pd: // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmadd231ps: // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmadd231sd: // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfmadd231ss: // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfmaddsub132pd: // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmaddsub132ps: // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmaddsub213pd: // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmaddsub213ps: // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmaddsub231pd: // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmaddsub231ps: // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmsub132pd: // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmsub132ps: // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmsub132sd: // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfmsub132ss: // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfmsub213pd: // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmsub213ps: // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmsub213sd: // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfmsub213ss: // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfmsub231pd: // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmsub231ps: // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmsub231sd: // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfmsub231ss: // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfmsubadd132pd: // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmsubadd132ps: // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmsubadd213pd: // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmsubadd213ps: // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfmsubadd231pd: // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfmsubadd231ps: // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfnmadd132pd: // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfnmadd132ps: // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfnmadd132sd: // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfnmadd132ss: // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfnmadd213pd: // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfnmadd213ps: // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfnmadd213sd: // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfnmadd213ss: // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfnmadd231pd: // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfnmadd231ps: // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfnmadd231sd: // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfnmadd231ss: // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfnmsub132pd: // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfnmsub132ps: // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfnmsub132sd: // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfnmsub132ss: // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfnmsub213pd: // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfnmsub213ps: // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfnmsub213sd: // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfnmsub213ss: // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ case STARS_NN_vfnmsub231pd: // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vfnmsub231ps: // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ case STARS_NN_vfnmsub231sd: // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vfnmsub231ss: // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_vgatherdps: // Gather Packed SP FP Values Using Signed Dword Indices
- case NN_vgatherdpd: // Gather Packed DP FP Values Using Signed Dword Indices
- case NN_vgatherqps: // Gather Packed SP FP Values Using Signed Qword Indices
- case NN_vgatherqpd: // Gather Packed DP FP Values Using Signed Qword Indices
+ case STARS_NN_vgatherdps: // Gather Packed SP FP Values Using Signed Dword Indices
+ case STARS_NN_vgatherdpd: // Gather Packed DP FP Values Using Signed Dword Indices
+ case STARS_NN_vgatherqps: // Gather Packed SP FP Values Using Signed Qword Indices
+ case STARS_NN_vgatherqpd: // Gather Packed DP FP Values Using Signed Qword Indices
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
break;
- case NN_vhaddpd: // Add horizontally packed DP FP numbers
- case NN_vhaddps: // Add horizontally packed SP FP numbers
- case NN_vhsubpd: // Sub horizontally packed DP FP numbers
- case NN_vhsubps: // Sub horizontally packed SP FP numbers
+ case STARS_NN_vhaddpd: // Add horizontally packed DP FP numbers
+ case STARS_NN_vhaddps: // Add horizontally packed SP FP numbers
+ case STARS_NN_vhsubpd: // Sub horizontally packed DP FP numbers
+ case STARS_NN_vhsubps: // Sub horizontally packed SP FP numbers
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_vinsertf128: // Insert Packed Floating-Point Values
- case NN_vinserti128: // Insert Packed Integer Values
- case NN_vinsertps: // Insert Packed Single Precision Floating-Point Value
- case NN_vlddqu: // Load Unaligned Packed Integer Values
- case NN_vldmxcsr: // Load Streaming SIMD Extensions Technology Control/Status Register
+ case STARS_NN_vinsertf128: // Insert Packed Floating-Point Values
+ case STARS_NN_vinserti128: // Insert Packed Integer Values
+ case STARS_NN_vinsertps: // Insert Packed Single Precision Floating-Point Value
+ case STARS_NN_vlddqu: // Load Unaligned Packed Integer Values
+ case STARS_NN_vldmxcsr: // Load Streaming SIMD Extensions Technology Control/Status Register
return false;
break;
- case NN_vmaskmovdqu: // Store Selected Bytes of Double Quadword with NT Hint
- case NN_vmaskmovpd: // Conditionally Load Packed Double-Precision Floating-Point Values
- case NN_vmaskmovps: // Conditionally Load Packed Single-Precision Floating-Point Values
+ case STARS_NN_vmaskmovdqu: // Store Selected Bytes of Double Quadword with NT Hint
+ case STARS_NN_vmaskmovpd: // Conditionally Load Packed Double-Precision Floating-Point Values
+ case STARS_NN_vmaskmovps: // Conditionally Load Packed Single-Precision Floating-Point Values
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
break;
- case NN_vmaxpd: // Return Maximum Packed Double-Precision Floating-Point Values
- case NN_vmaxps: // Packed Single-FP Maximum
- case NN_vmaxsd: // Return Maximum Scalar Double-Precision Floating-Point Value
- case NN_vmaxss: // Scalar Single-FP Maximum
- case NN_vminpd: // Return Minimum Packed Double-Precision Floating-Point Values
- case NN_vminps: // Packed Single-FP Minimum
- case NN_vminsd: // Return Minimum Scalar Double-Precision Floating-Point Value
- case NN_vminss: // Scalar Single-FP Minimum
+ case STARS_NN_vmaxpd: // Return Maximum Packed Double-Precision Floating-Point Values
+ case STARS_NN_vmaxps: // Packed Single-FP Maximum
+ case STARS_NN_vmaxsd: // Return Maximum Scalar Double-Precision Floating-Point Value
+ case STARS_NN_vmaxss: // Scalar Single-FP Maximum
+ case STARS_NN_vminpd: // Return Minimum Packed Double-Precision Floating-Point Values
+ case STARS_NN_vminps: // Packed Single-FP Minimum
+ case STARS_NN_vminsd: // Return Minimum Scalar Double-Precision Floating-Point Value
+ case STARS_NN_vminss: // Scalar Single-FP Minimum
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_vmovapd: // Move Aligned Packed Double-Precision Floating-Point Values
- case NN_vmovaps: // Move Aligned Four Packed Single-FP
- case NN_vmovd: // Move 32 bits
- case NN_vmovddup: // Move One Double-FP and Duplicate
- case NN_vmovdqa: // Move Aligned Double Quadword
- case NN_vmovdqu: // Move Unaligned Double Quadword
- case NN_vmovhlps: // Move High to Low Packed Single-FP
- case NN_vmovhpd: // Move High Packed Double-Precision Floating-Point Values
- case NN_vmovhps: // Move High Packed Single-FP
- case NN_vmovlhps: // Move Low to High Packed Single-FP
- case NN_vmovlpd: // Move Low Packed Double-Precision Floating-Point Values
- case NN_vmovlps: // Move Low Packed Single-FP
- case NN_vmovmskpd: // Extract Packed Double-Precision Floating-Point Sign Mask
- case NN_vmovmskps: // Move Mask to Register
- case NN_vmovntdq: // Store Double Quadword Using Non-Temporal Hint
- case NN_vmovntdqa: // Load Double Quadword Non-Temporal Aligned Hint
- case NN_vmovntpd: // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
- case NN_vmovntps: // Move Aligned Four Packed Single-FP Non Temporal
- case NN_vmovntsd: // Move Non-Temporal Scalar Double-Precision Floating-Point
- case NN_vmovntss: // Move Non-Temporal Scalar Single-Precision Floating-Point
- case NN_vmovq: // Move 64 bits
- case NN_vmovsd: // Move Scalar Double-Precision Floating-Point Values
- case NN_vmovshdup: // Move Packed Single-FP High and Duplicate
- case NN_vmovsldup: // Move Packed Single-FP Low and Duplicate
- case NN_vmovss: // Move Scalar Single-FP
- case NN_vmovupd: // Move Unaligned Packed Double-Precision Floating-Point Values
- case NN_vmovups: // Move Unaligned Four Packed Single-FP
+ case STARS_NN_vmovapd: // Move Aligned Packed Double-Precision Floating-Point Values
+ case STARS_NN_vmovaps: // Move Aligned Four Packed Single-FP
+ case STARS_NN_vmovd: // Move 32 bits
+ case STARS_NN_vmovddup: // Move One Double-FP and Duplicate
+ case STARS_NN_vmovdqa: // Move Aligned Double Quadword
+ case STARS_NN_vmovdqu: // Move Unaligned Double Quadword
+ case STARS_NN_vmovhlps: // Move High to Low Packed Single-FP
+ case STARS_NN_vmovhpd: // Move High Packed Double-Precision Floating-Point Values
+ case STARS_NN_vmovhps: // Move High Packed Single-FP
+ case STARS_NN_vmovlhps: // Move Low to High Packed Single-FP
+ case STARS_NN_vmovlpd: // Move Low Packed Double-Precision Floating-Point Values
+ case STARS_NN_vmovlps: // Move Low Packed Single-FP
+ case STARS_NN_vmovmskpd: // Extract Packed Double-Precision Floating-Point Sign Mask
+ case STARS_NN_vmovmskps: // Move Mask to Register
+ case STARS_NN_vmovntdq: // Store Double Quadword Using Non-Temporal Hint
+ case STARS_NN_vmovntdqa: // Load Double Quadword Non-Temporal Aligned Hint
+ case STARS_NN_vmovntpd: // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
+ case STARS_NN_vmovntps: // Move Aligned Four Packed Single-FP Non Temporal
+ case STARS_NN_vmovntsd: // Move Non-Temporal Scalar Double-Precision Floating-Point
+ case STARS_NN_vmovntss: // Move Non-Temporal Scalar Single-Precision Floating-Point
+ case STARS_NN_vmovq: // Move 64 bits
+ case STARS_NN_vmovsd: // Move Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vmovshdup: // Move Packed Single-FP High and Duplicate
+ case STARS_NN_vmovsldup: // Move Packed Single-FP Low and Duplicate
+ case STARS_NN_vmovss: // Move Scalar Single-FP
+ case STARS_NN_vmovupd: // Move Unaligned Packed Double-Precision Floating-Point Values
+ case STARS_NN_vmovups: // Move Unaligned Four Packed Single-FP
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
break;
- case NN_vmpsadbw: // Compute Multiple Packed Sums of Absolute Difference
- case NN_vmulpd: // Multiply Packed Double-Precision Floating-Point Values
- case NN_vmulps: // Packed Single-FP Multiply
- case NN_vmulsd: // Multiply Scalar Double-Precision Floating-Point Values
- case NN_vmulss: // Scalar Single-FP Multiply
- case NN_vorpd: // Bitwise Logical OR of Double-Precision Floating-Point Values
- case NN_vorps: // Bitwise Logical OR for Single-FP Data
- case NN_vpabsb: // Packed Absolute Value Byte
- case NN_vpabsd: // Packed Absolute Value Doubleword
- case NN_vpabsw: // Packed Absolute Value Word
- case NN_vpackssdw: // Pack with Signed Saturation (Dword->Word)
- case NN_vpacksswb: // Pack with Signed Saturation (Word->Byte)
- case NN_vpackusdw: // Pack with Unsigned Saturation
- case NN_vpackuswb: // Pack with Unsigned Saturation (Word->Byte)
- case NN_vpaddb: // Packed Add Byte
- case NN_vpaddd: // Packed Add Dword
- case NN_vpaddq: // Add Packed Quadword Integers
- case NN_vpaddsb: // Packed Add with Saturation (Byte)
- case NN_vpaddsw: // Packed Add with Saturation (Word)
- case NN_vpaddusb: // Packed Add Unsigned with Saturation (Byte)
- case NN_vpaddusw: // Packed Add Unsigned with Saturation (Word)
- case NN_vpaddw: // Packed Add Word
- case NN_vpalignr: // Packed Align Right
- case NN_vpand: // Bitwise Logical And
- case NN_vpandn: // Bitwise Logical And Not
- case NN_vpavgb: // Packed Average (Byte)
- case NN_vpavgw: // Packed Average (Word)
+ case STARS_NN_vmpsadbw: // Compute Multiple Packed Sums of Absolute Difference
+ case STARS_NN_vmulpd: // Multiply Packed Double-Precision Floating-Point Values
+ case STARS_NN_vmulps: // Packed Single-FP Multiply
+ case STARS_NN_vmulsd: // Multiply Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vmulss: // Scalar Single-FP Multiply
+ case STARS_NN_vorpd: // Bitwise Logical OR of Double-Precision Floating-Point Values
+ case STARS_NN_vorps: // Bitwise Logical OR for Single-FP Data
+ case STARS_NN_vpabsb: // Packed Absolute Value Byte
+ case STARS_NN_vpabsd: // Packed Absolute Value Doubleword
+ case STARS_NN_vpabsw: // Packed Absolute Value Word
+ case STARS_NN_vpackssdw: // Pack with Signed Saturation (Dword->Word)
+ case STARS_NN_vpacksswb: // Pack with Signed Saturation (Word->Byte)
+ case STARS_NN_vpackusdw: // Pack with Unsigned Saturation
+ case STARS_NN_vpackuswb: // Pack with Unsigned Saturation (Word->Byte)
+ case STARS_NN_vpaddb: // Packed Add Byte
+ case STARS_NN_vpaddd: // Packed Add Dword
+ case STARS_NN_vpaddq: // Add Packed Quadword Integers
+ case STARS_NN_vpaddsb: // Packed Add with Saturation (Byte)
+ case STARS_NN_vpaddsw: // Packed Add with Saturation (Word)
+ case STARS_NN_vpaddusb: // Packed Add Unsigned with Saturation (Byte)
+ case STARS_NN_vpaddusw: // Packed Add Unsigned with Saturation (Word)
+ case STARS_NN_vpaddw: // Packed Add Word
+ case STARS_NN_vpalignr: // Packed Align Right
+ case STARS_NN_vpand: // Bitwise Logical And
+ case STARS_NN_vpandn: // Bitwise Logical And Not
+ case STARS_NN_vpavgb: // Packed Average (Byte)
+ case STARS_NN_vpavgw: // Packed Average (Word)
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_vpblendd: // Blend Packed Dwords
- case NN_vpblendvb: // Variable Blend Packed Bytes
- case NN_vpblendw: // Blend Packed Words
+ case STARS_NN_vpblendd: // Blend Packed Dwords
+ case STARS_NN_vpblendvb: // Variable Blend Packed Bytes
+ case STARS_NN_vpblendw: // Blend Packed Words
return this->BuildBinaryRTL(SMP_SHUFFLE);
break;
- case NN_vpbroadcastb: // Broadcast a Byte Integer
- case NN_vpbroadcastd: // Broadcast a Dword Integer
- case NN_vpbroadcastq: // Broadcast a Qword Integer
- case NN_vpbroadcastw: // Broadcast a Word Integer
- case NN_vpclmulqdq: // Carry-Less Multiplication Quadword
- case NN_vpcmpeqb: // Packed Compare for Equal (Byte)
- case NN_vpcmpeqd: // Packed Compare for Equal (Dword)
- case NN_vpcmpeqq: // Compare Packed Qword Data for Equal
- case NN_vpcmpeqw: // Packed Compare for Equal (Word)
- case NN_vpcmpestri: // Packed Compare Explicit Length Strings, Return Index
- case NN_vpcmpestrm: // Packed Compare Explicit Length Strings, Return Mask
- case NN_vpcmpgtb: // Packed Compare for Greater Than (Byte)
- case NN_vpcmpgtd: // Packed Compare for Greater Than (Dword)
- case NN_vpcmpgtq: // Compare Packed Data for Greater Than
- case NN_vpcmpgtw: // Packed Compare for Greater Than (Word)
- case NN_vpcmpistri: // Packed Compare Implicit Length Strings, Return Index
- case NN_vpcmpistrm: // Packed Compare Implicit Length Strings, Return Mask
- case NN_vperm2f128: // Permute Floating-Point Values
- case NN_vperm2i128: // Permute Integer Values
- case NN_vpermd: // Full Doublewords Element Permutation
- case NN_vpermilpd: // Permute Double-Precision Floating-Point Values
- case NN_vpermilps: // Permute Single-Precision Floating-Point Values
- case NN_vpermpd: // Permute Double-Precision Floating-Point Elements
- case NN_vpermps: // Permute Single-Precision Floating-Point Elements
- case NN_vpermq: // Qwords Element Permutation
- case NN_vpextrb: // Extract Byte
- case NN_vpextrd: // Extract Dword
- case NN_vpextrq: // Extract Qword
- case NN_vpextrw: // Extract Word
- case NN_vpgatherdd: // Gather Packed Dword Values Using Signed Dword Indices
- case NN_vpgatherdq: // Gather Packed Qword Values Using Signed Dword Indices
- case NN_vpgatherqd: // Gather Packed Dword Values Using Signed Qword Indices
- case NN_vpgatherqq: // Gather Packed Qword Values Using Signed Qword Indices
+ case STARS_NN_vpbroadcastb: // Broadcast a Byte Integer
+ case STARS_NN_vpbroadcastd: // Broadcast a Dword Integer
+ case STARS_NN_vpbroadcastq: // Broadcast a Qword Integer
+ case STARS_NN_vpbroadcastw: // Broadcast a Word Integer
+ case STARS_NN_vpclmulqdq: // Carry-Less Multiplication Quadword
+ case STARS_NN_vpcmpeqb: // Packed Compare for Equal (Byte)
+ case STARS_NN_vpcmpeqd: // Packed Compare for Equal (Dword)
+ case STARS_NN_vpcmpeqq: // Compare Packed Qword Data for Equal
+ case STARS_NN_vpcmpeqw: // Packed Compare for Equal (Word)
+ case STARS_NN_vpcmpestri: // Packed Compare Explicit Length Strings, Return Index
+ case STARS_NN_vpcmpestrm: // Packed Compare Explicit Length Strings, Return Mask
+ case STARS_NN_vpcmpgtb: // Packed Compare for Greater Than (Byte)
+ case STARS_NN_vpcmpgtd: // Packed Compare for Greater Than (Dword)
+ case STARS_NN_vpcmpgtq: // Compare Packed Data for Greater Than
+ case STARS_NN_vpcmpgtw: // Packed Compare for Greater Than (Word)
+ case STARS_NN_vpcmpistri: // Packed Compare Implicit Length Strings, Return Index
+ case STARS_NN_vpcmpistrm: // Packed Compare Implicit Length Strings, Return Mask
+ case STARS_NN_vperm2f128: // Permute Floating-Point Values
+ case STARS_NN_vperm2i128: // Permute Integer Values
+ case STARS_NN_vpermd: // Full Doublewords Element Permutation
+ case STARS_NN_vpermilpd: // Permute Double-Precision Floating-Point Values
+ case STARS_NN_vpermilps: // Permute Single-Precision Floating-Point Values
+ case STARS_NN_vpermpd: // Permute Double-Precision Floating-Point Elements
+ case STARS_NN_vpermps: // Permute Single-Precision Floating-Point Elements
+ case STARS_NN_vpermq: // Qwords Element Permutation
+ case STARS_NN_vpextrb: // Extract Byte
+ case STARS_NN_vpextrd: // Extract Dword
+ case STARS_NN_vpextrq: // Extract Qword
+ case STARS_NN_vpextrw: // Extract Word
+ case STARS_NN_vpgatherdd: // Gather Packed Dword Values Using Signed Dword Indices
+ case STARS_NN_vpgatherdq: // Gather Packed Qword Values Using Signed Dword Indices
+ case STARS_NN_vpgatherqd: // Gather Packed Dword Values Using Signed Qword Indices
+ case STARS_NN_vpgatherqq: // Gather Packed Qword Values Using Signed Qword Indices
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_vphaddd: // Packed Horizontal Add Doubleword
- case NN_vphaddsw: // Packed Horizontal Add and Saturate
- case NN_vphaddw: // Packed Horizontal Add Word
- case NN_vphminposuw: // Packed Horizontal Word Minimum
- case NN_vphsubd: // Packed Horizontal Subtract Doubleword
- case NN_vphsubsw: // Packed Horizontal Subtract and Saturate
- case NN_vphsubw: // Packed Horizontal Subtract Word
+ case STARS_NN_vphaddd: // Packed Horizontal Add Doubleword
+ case STARS_NN_vphaddsw: // Packed Horizontal Add and Saturate
+ case STARS_NN_vphaddw: // Packed Horizontal Add Word
+ case STARS_NN_vphminposuw: // Packed Horizontal Word Minimum
+ case STARS_NN_vphsubd: // Packed Horizontal Subtract Doubleword
+ case STARS_NN_vphsubsw: // Packed Horizontal Subtract and Saturate
+ case STARS_NN_vphsubw: // Packed Horizontal Subtract Word
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_vpinsrb: // Insert Byte
- case NN_vpinsrd: // Insert Dword
- case NN_vpinsrq: // Insert Qword
- case NN_vpinsrw: // Insert Word
+ case STARS_NN_vpinsrb: // Insert Byte
+ case STARS_NN_vpinsrd: // Insert Dword
+ case STARS_NN_vpinsrq: // Insert Qword
+ case STARS_NN_vpinsrw: // Insert Word
return false;
break;
- case NN_vpmaddubsw: // Multiply and Add Packed Signed and Unsigned Bytes
- case NN_vpmaddwd: // Packed Multiply and Add
+ case STARS_NN_vpmaddubsw: // Multiply and Add Packed Signed and Unsigned Bytes
+ case STARS_NN_vpmaddwd: // Packed Multiply and Add
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_vpmaskmovd: // Conditionally Store Dword Values Using Mask
- case NN_vpmaskmovq: // Conditionally Store Qword Values Using Mask
+ case STARS_NN_vpmaskmovd: // Conditionally Store Dword Values Using Mask
+ case STARS_NN_vpmaskmovq: // Conditionally Store Qword Values Using Mask
return false;
break;
- case NN_vpmaxsb: // Maximum of Packed Signed Byte Integers
- case NN_vpmaxsd: // Maximum of Packed Signed Dword Integers
- case NN_vpmaxsw: // Packed Signed Integer Word Maximum
+ case STARS_NN_vpmaxsb: // Maximum of Packed Signed Byte Integers
+ case STARS_NN_vpmaxsd: // Maximum of Packed Signed Dword Integers
+ case STARS_NN_vpmaxsw: // Packed Signed Integer Word Maximum
return this->BuildBinaryRTL(SMP_MAX_S);
break;
- case NN_vpmaxub: // Packed Unsigned Integer Byte Maximum
- case NN_vpmaxud: // Maximum of Packed Unsigned Dword Integers
- case NN_vpmaxuw: // Maximum of Packed Word Integers
+ case STARS_NN_vpmaxub: // Packed Unsigned Integer Byte Maximum
+ case STARS_NN_vpmaxud: // Maximum of Packed Unsigned Dword Integers
+ case STARS_NN_vpmaxuw: // Maximum of Packed Word Integers
return this->BuildBinaryRTL(SMP_MAX_U);
break;
- case NN_vpminsb: // Minimum of Packed Signed Byte Integers
- case NN_vpminsd: // Minimum of Packed Signed Dword Integers
- case NN_vpminsw: // Packed Signed Integer Word Minimum
+ case STARS_NN_vpminsb: // Minimum of Packed Signed Byte Integers
+ case STARS_NN_vpminsd: // Minimum of Packed Signed Dword Integers
+ case STARS_NN_vpminsw: // Packed Signed Integer Word Minimum
return this->BuildBinaryRTL(SMP_MIN_S);
break;
- case NN_vpminub: // Packed Unsigned Integer Byte Minimum
- case NN_vpminud: // Minimum of Packed Unsigned Dword Integers
- case NN_vpminuw: // Minimum of Packed Word Integers
+ case STARS_NN_vpminub: // Packed Unsigned Integer Byte Minimum
+ case STARS_NN_vpminud: // Minimum of Packed Unsigned Dword Integers
+ case STARS_NN_vpminuw: // Minimum of Packed Word Integers
return this->BuildBinaryRTL(SMP_MIN_U);
break;
- case NN_vpmovmskb: // Move Byte Mask to Integer
+ case STARS_NN_vpmovmskb: // Move Byte Mask to Integer
return this->BuildMoveRTL(SMP_NULL_OPERATOR);
break;
- case NN_vpmovsxbd: // Packed Move with Sign Extend
- case NN_vpmovsxbq: // Packed Move with Sign Extend
- case NN_vpmovsxbw: // Packed Move with Sign Extend
- case NN_vpmovsxdq: // Packed Move with Sign Extend
- case NN_vpmovsxwd: // Packed Move with Sign Extend
- case NN_vpmovsxwq: // Packed Move with Sign Extend
+ case STARS_NN_vpmovsxbd: // Packed Move with Sign Extend
+ case STARS_NN_vpmovsxbq: // Packed Move with Sign Extend
+ case STARS_NN_vpmovsxbw: // Packed Move with Sign Extend
+ case STARS_NN_vpmovsxdq: // Packed Move with Sign Extend
+ case STARS_NN_vpmovsxwd: // Packed Move with Sign Extend
+ case STARS_NN_vpmovsxwq: // Packed Move with Sign Extend
return this->BuildUnary2OpndRTL(SMP_SIGN_EXTEND);
break;
- case NN_vpmovzxbd: // Packed Move with Zero Extend
- case NN_vpmovzxbq: // Packed Move with Zero Extend
- case NN_vpmovzxbw: // Packed Move with Zero Extend
- case NN_vpmovzxdq: // Packed Move with Zero Extend
- case NN_vpmovzxwd: // Packed Move with Zero Extend
- case NN_vpmovzxwq: // Packed Move with Zero Extend
+ case STARS_NN_vpmovzxbd: // Packed Move with Zero Extend
+ case STARS_NN_vpmovzxbq: // Packed Move with Zero Extend
+ case STARS_NN_vpmovzxbw: // Packed Move with Zero Extend
+ case STARS_NN_vpmovzxdq: // Packed Move with Zero Extend
+ case STARS_NN_vpmovzxwd: // Packed Move with Zero Extend
+ case STARS_NN_vpmovzxwq: // Packed Move with Zero Extend
return this->BuildUnary2OpndRTL(SMP_ZERO_EXTEND);
break;
- case NN_vpmuldq: // Multiply Packed Signed Dword Integers
- case NN_vpmulhrsw: // Packed Multiply High with Round and Scale
- case NN_vpmulhuw: // Packed Multiply High Unsigned
- case NN_vpmulhw: // Packed Multiply High
- case NN_vpmulld: // Multiply Packed Signed Dword Integers and Store Low Result
- case NN_vpmullw: // Packed Multiply Low
- case NN_vpmuludq: // Multiply Packed Unsigned Doubleword Integers
- case NN_vpor: // Bitwise Logical Or
- case NN_vpsadbw: // Packed Sum of Absolute Differences
+ case STARS_NN_vpmuldq: // Multiply Packed Signed Dword Integers
+ case STARS_NN_vpmulhrsw: // Packed Multiply High with Round and Scale
+ case STARS_NN_vpmulhuw: // Packed Multiply High Unsigned
+ case STARS_NN_vpmulhw: // Packed Multiply High
+ case STARS_NN_vpmulld: // Multiply Packed Signed Dword Integers and Store Low Result
+ case STARS_NN_vpmullw: // Packed Multiply Low
+ case STARS_NN_vpmuludq: // Multiply Packed Unsigned Doubleword Integers
+ case STARS_NN_vpor: // Bitwise Logical Or
+ case STARS_NN_vpsadbw: // Packed Sum of Absolute Differences
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_vpshufb: // Packed Shuffle Bytes
- case NN_vpshufd: // Shuffle Packed Doublewords
- case NN_vpshufhw: // Shuffle Packed High Words
- case NN_vpshuflw: // Shuffle Packed Low Words
+ case STARS_NN_vpshufb: // Packed Shuffle Bytes
+ case STARS_NN_vpshufd: // Shuffle Packed Doublewords
+ case STARS_NN_vpshufhw: // Shuffle Packed High Words
+ case STARS_NN_vpshuflw: // Shuffle Packed Low Words
return this->BuildBinaryRTL(SMP_SHUFFLE);
break;
- case NN_vpsignb: // Packed SIGN Byte
- case NN_vpsignd: // Packed SIGN Doubleword
- case NN_vpsignw: // Packed SIGN Word
+ case STARS_NN_vpsignb: // Packed SIGN Byte
+ case STARS_NN_vpsignd: // Packed SIGN Doubleword
+ case STARS_NN_vpsignw: // Packed SIGN Word
return false;
break;
- case NN_vpslld: // Packed Shift Left Logical (Dword)
- case NN_vpslldq: // Shift Double Quadword Left Logical
- case NN_vpsllq: // Packed Shift Left Logical (Qword)
- case NN_vpsllvd: // Variable Bit Shift Left Logical (Dword)
- case NN_vpsllvq: // Variable Bit Shift Left Logical (Qword)
- case NN_vpsllw: // Packed Shift Left Logical (Word)
- case NN_vpsrad: // Packed Shift Right Arithmetic (Dword)
- case NN_vpsravd: // Variable Bit Shift Right Arithmetic
- case NN_vpsraw: // Packed Shift Right Arithmetic (Word)
- case NN_vpsrld: // Packed Shift Right Logical (Dword)
- case NN_vpsrldq: // Shift Double Quadword Right Logical (Qword)
- case NN_vpsrlq: // Packed Shift Right Logical (Qword)
- case NN_vpsrlvd: // Variable Bit Shift Right Logical (Dword)
- case NN_vpsrlvq: // Variable Bit Shift Right Logical (Qword)
- case NN_vpsrlw: // Packed Shift Right Logical (Word)
+ case STARS_NN_vpslld: // Packed Shift Left Logical (Dword)
+ case STARS_NN_vpslldq: // Shift Double Quadword Left Logical
+ case STARS_NN_vpsllq: // Packed Shift Left Logical (Qword)
+ case STARS_NN_vpsllvd: // Variable Bit Shift Left Logical (Dword)
+ case STARS_NN_vpsllvq: // Variable Bit Shift Left Logical (Qword)
+ case STARS_NN_vpsllw: // Packed Shift Left Logical (Word)
+ case STARS_NN_vpsrad: // Packed Shift Right Arithmetic (Dword)
+ case STARS_NN_vpsravd: // Variable Bit Shift Right Arithmetic
+ case STARS_NN_vpsraw: // Packed Shift Right Arithmetic (Word)
+ case STARS_NN_vpsrld: // Packed Shift Right Logical (Dword)
+ case STARS_NN_vpsrldq: // Shift Double Quadword Right Logical (Qword)
+ case STARS_NN_vpsrlq: // Packed Shift Right Logical (Qword)
+ case STARS_NN_vpsrlvd: // Variable Bit Shift Right Logical (Dword)
+ case STARS_NN_vpsrlvq: // Variable Bit Shift Right Logical (Qword)
+ case STARS_NN_vpsrlw: // Packed Shift Right Logical (Word)
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_vpsubb: // Packed Subtract Byte
- case NN_vpsubd: // Packed Subtract Dword
- case NN_vpsubq: // Subtract Packed Quadword Integers
- case NN_vpsubsb: // Packed Subtract with Saturation (Byte)
- case NN_vpsubsw: // Packed Subtract with Saturation (Word)
- case NN_vpsubusb: // Packed Subtract Unsigned with Saturation (Byte)
- case NN_vpsubusw: // Packed Subtract Unsigned with Saturation (Word)
- case NN_vpsubw: // Packed Subtract Word
+ case STARS_NN_vpsubb: // Packed Subtract Byte
+ case STARS_NN_vpsubd: // Packed Subtract Dword
+ case STARS_NN_vpsubq: // Subtract Packed Quadword Integers
+ case STARS_NN_vpsubsb: // Packed Subtract with Saturation (Byte)
+ case STARS_NN_vpsubsw: // Packed Subtract with Saturation (Word)
+ case STARS_NN_vpsubusb: // Packed Subtract Unsigned with Saturation (Byte)
+ case STARS_NN_vpsubusw: // Packed Subtract Unsigned with Saturation (Word)
+ case STARS_NN_vpsubw: // Packed Subtract Word
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_vptest: // Logical Compare
+ case STARS_NN_vptest: // Logical Compare
return false;
break;
- case NN_vpunpckhbw: // Unpack High Packed Data (Byte->Word)
- case NN_vpunpckhdq: // Unpack High Packed Data (Dword->Qword)
- case NN_vpunpckhqdq: // Unpack High Packed Data (Qword->Xmmword)
- case NN_vpunpckhwd: // Unpack High Packed Data (Word->Dword)
- case NN_vpunpcklbw: // Unpack Low Packed Data (Byte->Word)
- case NN_vpunpckldq: // Unpack Low Packed Data (Dword->Qword)
- case NN_vpunpcklqdq: // Unpack Low Packed Data (Qword->Xmmword)
- case NN_vpunpcklwd: // Unpack Low Packed Data (Word->Dword)
+ case STARS_NN_vpunpckhbw: // Unpack High Packed Data (Byte->Word)
+ case STARS_NN_vpunpckhdq: // Unpack High Packed Data (Dword->Qword)
+ case STARS_NN_vpunpckhqdq: // Unpack High Packed Data (Qword->Xmmword)
+ case STARS_NN_vpunpckhwd: // Unpack High Packed Data (Word->Dword)
+ case STARS_NN_vpunpcklbw: // Unpack Low Packed Data (Byte->Word)
+ case STARS_NN_vpunpckldq: // Unpack Low Packed Data (Dword->Qword)
+ case STARS_NN_vpunpcklqdq: // Unpack Low Packed Data (Qword->Xmmword)
+ case STARS_NN_vpunpcklwd: // Unpack Low Packed Data (Word->Dword)
return this->BuildBinaryRTL(SMP_INTERLEAVE);
break;
- case NN_vpxor: // Bitwise Logical Exclusive Or
- case NN_vrcpps: // Packed Single-FP Reciprocal
- case NN_vrcpss: // Scalar Single-FP Reciprocal
+ case STARS_NN_vpxor: // Bitwise Logical Exclusive Or
+ case STARS_NN_vrcpps: // Packed Single-FP Reciprocal
+ case STARS_NN_vrcpss: // Scalar Single-FP Reciprocal
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_vroundpd: // Round Packed Double Precision Floating-Point Values
- case NN_vroundps: // Round Packed Single Precision Floating-Point Values
- case NN_vroundsd: // Round Scalar Double Precision Floating-Point Values
- case NN_vroundss: // Round Scalar Single Precision Floating-Point Values
- case NN_vrsqrtps: // Packed Single-FP Square Root Reciprocal
- case NN_vrsqrtss: // Scalar Single-FP Square Root Reciprocal
+ case STARS_NN_vroundpd: // Round Packed Double Precision Floating-Point Values
+ case STARS_NN_vroundps: // Round Packed Single Precision Floating-Point Values
+ case STARS_NN_vroundsd: // Round Scalar Double Precision Floating-Point Values
+ case STARS_NN_vroundss: // Round Scalar Single Precision Floating-Point Values
+ case STARS_NN_vrsqrtps: // Packed Single-FP Square Root Reciprocal
+ case STARS_NN_vrsqrtss: // Scalar Single-FP Square Root Reciprocal
return false;
break;
- case NN_vshufpd: // Shuffle Packed Double-Precision Floating-Point Values
- case NN_vshufps: // Shuffle Single-FP
+ case STARS_NN_vshufpd: // Shuffle Packed Double-Precision Floating-Point Values
+ case STARS_NN_vshufps: // Shuffle Single-FP
return this->BuildBinaryRTL(SMP_SHUFFLE);
break;
- case NN_vsqrtpd: // Compute Square Roots of Packed Double-Precision Floating-Point Values
- case NN_vsqrtps: // Packed Single-FP Square Root
- case NN_vsqrtsd: // Compute Square Rootof Scalar Double-Precision Floating-Point Value
- case NN_vsqrtss: // Scalar Single-FP Square Root
- case NN_vstmxcsr: // Store Streaming SIMD Extensions Technology Control/Status Register
+ case STARS_NN_vsqrtpd: // Compute Square Roots of Packed Double-Precision Floating-Point Values
+ case STARS_NN_vsqrtps: // Packed Single-FP Square Root
+ case STARS_NN_vsqrtsd: // Compute Square Rootof Scalar Double-Precision Floating-Point Value
+ case STARS_NN_vsqrtss: // Scalar Single-FP Square Root
+ case STARS_NN_vstmxcsr: // Store Streaming SIMD Extensions Technology Control/Status Register
return false;
break;
- case NN_vsubpd: // Subtract Packed Double-Precision Floating-Point Values
- case NN_vsubps: // Packed Single-FP Subtract
- case NN_vsubsd: // Subtract Scalar Double-Precision Floating-Point Values
- case NN_vsubss: // Scalar Single-FP Subtract
+ case STARS_NN_vsubpd: // Subtract Packed Double-Precision Floating-Point Values
+ case STARS_NN_vsubps: // Packed Single-FP Subtract
+ case STARS_NN_vsubsd: // Subtract Scalar Double-Precision Floating-Point Values
+ case STARS_NN_vsubss: // Scalar Single-FP Subtract
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_vtestpd: // Packed Double-Precision Floating-Point Bit Test
- case NN_vtestps: // Packed Single-Precision Floating-Point Bit Test
- case NN_vucomisd: // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
- case NN_vucomiss: // Scalar Unordered Single-FP Compare and Set EFLAGS
+ case STARS_NN_vtestpd: // Packed Double-Precision Floating-Point Bit Test
+ case STARS_NN_vtestps: // Packed Single-Precision Floating-Point Bit Test
+ case STARS_NN_vucomisd: // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ case STARS_NN_vucomiss: // Scalar Unordered Single-FP Compare and Set EFLAGS
return false;
break;
- case NN_vunpckhpd: // Unpack and Interleave High Packed Double-Precision Floating-Point Values
- case NN_vunpckhps: // Unpack High Packed Single-FP Data
- case NN_vunpcklpd: // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
- case NN_vunpcklps: // Unpack Low Packed Single-FP Data
+ case STARS_NN_vunpckhpd: // Unpack and Interleave High Packed Double-Precision Floating-Point Values
+ case STARS_NN_vunpckhps: // Unpack High Packed Single-FP Data
+ case STARS_NN_vunpcklpd: // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
+ case STARS_NN_vunpcklps: // Unpack Low Packed Single-FP Data
return this->BuildBinaryRTL(SMP_INTERLEAVE);
break;
- case NN_vxorpd: // Bitwise Logical OR of Double-Precision Floating-Point Values
- case NN_vxorps: // Bitwise Logical XOR for Single-FP Data
+ case STARS_NN_vxorpd: // Bitwise Logical OR of Double-Precision Floating-Point Values
+ case STARS_NN_vxorps: // Bitwise Logical XOR for Single-FP Data
return this->BuildBinaryRTL(SMP_BINARY_FLOATING_ARITHMETIC);
break;
- case NN_vzeroall: // Zero All YMM Registers
- case NN_vzeroupper: // Zero Upper Bits of YMM Registers
+ case STARS_NN_vzeroall: // Zero All YMM Registers
+ case STARS_NN_vzeroupper: // Zero Upper Bits of YMM Registers
NopRT = new SMPRegTransfer;
NopRT->SetParentInst(this);
NopRT->SetOperator(SMP_NULL_OPERATOR);
@@ -18099,33 +18104,33 @@ bool SMPInstr::BuildRTL(void) {
// Transactional Synchronization Extensions
- case NN_xabort: // Transaction Abort
- case NN_xbegin: // Transaction Begin
- case NN_xend: // Transaction End
- case NN_xtest: // Test If In Transactional Execution
+ case STARS_NN_xabort: // Transaction Abort
+ case STARS_NN_xbegin: // Transaction Begin
+ case STARS_NN_xend: // Transaction End
+ case STARS_NN_xtest: // Test If In Transactional Execution
return false;
break;
// Virtual PC synthetic instructions
- case NN_vmgetinfo: // Virtual PC - Get VM Information
- case NN_vmsetinfo: // Virtual PC - Set VM Information
- case NN_vmdxdsbl: // Virtual PC - Disable Direct Execution
- case NN_vmdxenbl: // Virtual PC - Enable Direct Execution
- case NN_vmcpuid: // Virtual PC - Virtualized CPU Information
- case NN_vmhlt: // Virtual PC - Halt
- case NN_vmsplaf: // Virtual PC - Spin Lock Acquisition Failed
- case NN_vmpushfd: // Virtual PC - Push virtualized flags register
- case NN_vmpopfd: // Virtual PC - Pop virtualized flags register
- case NN_vmcli: // Virtual PC - Clear Interrupt Flag
- case NN_vmsti: // Virtual PC - Set Interrupt Flag
- case NN_vmiretd: // Virtual PC - Return From Interrupt
- case NN_vmsgdt: // Virtual PC - Store Global Descriptor Table
- case NN_vmsidt: // Virtual PC - Store Interrupt Descriptor Table
- case NN_vmsldt: // Virtual PC - Store Local Descriptor Table
- case NN_vmstr: // Virtual PC - Store Task Register
- case NN_vmsdte: // Virtual PC - Store to Descriptor Table Entry
- case NN_vpcext: // Virtual PC - ISA extension
+ case STARS_NN_vmgetinfo: // Virtual PC - Get VM Information
+ case STARS_NN_vmsetinfo: // Virtual PC - Set VM Information
+ case STARS_NN_vmdxdsbl: // Virtual PC - Disable Direct Execution
+ case STARS_NN_vmdxenbl: // Virtual PC - Enable Direct Execution
+ case STARS_NN_vmcpuid: // Virtual PC - Virtualized CPU Information
+ case STARS_NN_vmhlt: // Virtual PC - Halt
+ case STARS_NN_vmsplaf: // Virtual PC - Spin Lock Acquisition Failed
+ case STARS_NN_vmpushfd: // Virtual PC - Push virtualized flags register
+ case STARS_NN_vmpopfd: // Virtual PC - Pop virtualized flags register
+ case STARS_NN_vmcli: // Virtual PC - Clear Interrupt Flag
+ case STARS_NN_vmsti: // Virtual PC - Set Interrupt Flag
+ case STARS_NN_vmiretd: // Virtual PC - Return From Interrupt
+ case STARS_NN_vmsgdt: // Virtual PC - Store Global Descriptor Table
+ case STARS_NN_vmsidt: // Virtual PC - Store Interrupt Descriptor Table
+ case STARS_NN_vmsldt: // Virtual PC - Store Local Descriptor Table
+ case STARS_NN_vmstr: // Virtual PC - Store Task Register
+ case STARS_NN_vmsdte: // Virtual PC - Store to Descriptor Table Entry
+ case STARS_NN_vpcext: // Virtual PC - ISA extension
return false;
break;
@@ -18141,7 +18146,7 @@ bool SMPInstr::BuildRTL(void) {
} // end SMPInstr::BuildRTL()
// Iterate through all reg transfers and call SyncRTLDefUse for each.
-void SMPInstr::SyncAllRTs(bool UseFP, sval_t FPDelta) {
+void SMPInstr::SyncAllRTs(bool UseFP, STARS_sval_t FPDelta) {
for (std::size_t index = 0; index < this->RTL.GetCount(); ++index) {
this->SyncRTLDefUse(this->RTL.GetRT(index), UseFP, FPDelta);
}
@@ -18149,7 +18154,7 @@ void SMPInstr::SyncAllRTs(bool UseFP, sval_t FPDelta) {
} // end of SMPInstr:SyncAllRTs()
// Ensure that each operand of the RTL is found in the appropriate DEF or USE list.
-void SMPInstr::SyncRTLDefUse(SMPRegTransfer *CurrRT, bool UseFP, sval_t FPDelta) {
+void SMPInstr::SyncRTLDefUse(SMPRegTransfer *CurrRT, bool UseFP, STARS_sval_t FPDelta) {
// The ExtraKills are almost never represented in the DEF
// lists. When they are, they are added in MDFixupDefUseLists(), so we ignore them here.
@@ -18172,7 +18177,7 @@ void SMPInstr::SyncRTLDefUse(SMPRegTransfer *CurrRT, bool UseFP, sval_t FPDelta)
assert(! LeftOp->IsVoidOp());
assert(! LeftOp->IsImmedOp());
CurrDef = this->Defs.FindRef(LeftOp);
- if (CurrDef == this->GetLastDef() && !LeftOp->MatchesReg(R_ip)) {
+ if (CurrDef == this->GetLastDef() && !LeftOp->MatchesReg(STARS_x86_R_ip)) {
#if SMP_VERBOSE_DEBUG_BUILD_RTL
SMP_msg("WARNING: DEF not found for SMP_ASSIGN in %s ; added op:", DisAsmText.GetDisAsm(this->GetAddr()));
PrintOperand(LeftOp);
@@ -18265,7 +18270,7 @@ bool SMPInstr::MDIsAddImmediateToReg(STARSOpndTypePtr &DefOp, STARSOpndTypePtr &
bool FoundImmed = false;
bool FoundRegUse = false;
- if (NN_add == this->GetIDAOpcode()) {
+ if (STARS_NN_add == this->GetIDAOpcode()) {
set<DefOrUse, LessDefUse>::iterator UseIter = this->GetFirstUse();
while (UseIter != this->GetLastUse()) {
STARSOpndTypePtr UseOp = UseIter->GetOp();
diff --git a/src/base/SMPProgram.cpp b/src/base/SMPProgram.cpp
index 6ee6bd59..4101edc0 100644
--- a/src/base/SMPProgram.cpp
+++ b/src/base/SMPProgram.cpp
@@ -19,7 +19,7 @@
* e-mail: jwd@virginia.com
* URL : http://www.cs.virginia.edu/
*
- * Additional copyrights 2010, 2011, 2014 by Zephyr Software LLC
+ * Additional copyrights 2010, 2011, 2012, 2013, 2014, 2015 by Zephyr Software LLC
* e-mail: {clc,jwd}@zephyr-software.com
* URL : http://www.zephyr-software.com/
*
@@ -42,25 +42,27 @@
#include <cstring>
#include <cstdlib>
+#include <cassert>
#include <pro.h>
#include <ua.hpp>
-#include <assert.h>
+#include <intel.hpp>
+
+#if 0
#include <ida.hpp>
#include <idp.hpp>
#include <auto.hpp>
#include <bytes.hpp>
#include <funcs.hpp>
-#include <intel.hpp>
#include <name.hpp>
+#endif
-#include "SMPDBInterface.h"
-#include "SMPDataFlowAnalysis.h"
-#include "SMPStaticAnalyzer.h"
-#include "SMPFunction.h"
-#include "SMPBasicBlock.h"
-#include "SMPInstr.h"
-#include "SMPProgram.h"
+#include "interfaces/SMPDBInterface.h"
+#include "base/SMPDataFlowAnalysis.h"
+#include "base/SMPFunction.h"
+#include "base/SMPBasicBlock.h"
+#include "base/SMPInstr.h"
+#include "base/SMPProgram.h"
using namespace std;
@@ -88,6 +90,12 @@ STARS_ea_t HighestGlobalVarAddress;
STARS_ea_t LowestCodeAddress;
STARS_ea_t HighestCodeAddress;
+// The types of data objects based on their first operand flags.
+static const char *DataTypes[] = { "VOID", "NUMHEX", "NUMDEC", "CHAR",
+"SEG", "OFFSET", "NUMBIN", "NUMOCT", "ENUM", "FORCED",
+"STRUCTOFFSET", "STACKVAR", "NUMFLOAT", "UNKNOWN",
+"UNKNOWN", "UNKNOWN", 0};
+
#if 0
// Is Address in a data segment?
bool IsDataAddress(STARS_ea_t Address) {
@@ -118,18 +126,18 @@ bool MDIsIndexedAccess(STARS_ea_t InstAddr, STARS_ea_t GlobalAddr) {
#if SMP_DETECT_INDEXED_ACCESSES
for (int i = 0; i < UA_MAXOP; ++i) {
STARSOpndTypePtr CurrOp = LocalCmd.Operands[i];
- if ((CurrOp.type == o_mem) || (CurrOp.type == o_displ)) {
+ if (CurrOp->IsStaticMemOp() || CurrOp->IsMemDisplacementOp()) {
if (GlobalAddr == CurrOp.addr) {
- if (CurrOp.hasSIB) {
+ if (CurrOp->HasSIBByte()) {
// GlobalAddr is referenced, and SIB byte is present, so we might have
// an indexed access to GlobalAddr.
- regnum_t IndexReg = sib_index(CurrOp);
- if (R_sp != IndexReg) {
- // R_sp is a SIB index dummy value; means no index register
+ short IndexReg = sib_index(CurrOp);
+ if (STARS_x86_R_sp != IndexReg) {
+ // STARS_x86_R_sp is a SIB index dummy value; means no index register
return true;
}
}
- else if (o_displ == CurrOp.type) { // index reg in reg field, not in SIB byte
+ else if (CurrOp->IsMemDisplacementOp()) { // index reg in reg field, not in SIB byte
return true;
}
else if (DebugFlag) {
@@ -308,7 +316,7 @@ void SMPProgram::InitStaticDataTable(void) {
if ((NULL != SegInfo) && (SegInfo->IsCodeSegment())) {
bool NewTarget = this->InsertDataToCodeXref(TargetAddr);
if (NewTarget)
- PrintDataToCodeXref(TempAddr, TargetAddr, 0);
+ global_STARS_program->PrintDataToCodeXref(TempAddr, TargetAddr, 0);
}
}
}
@@ -324,7 +332,7 @@ void SMPProgram::InitStaticDataTable(void) {
if ((NULL != SegInfo) && (SegInfo->IsCodeSegment())) {
bool NewTarget = this->InsertDataToCodeXref(PossibleCodeAddr);
if (NewTarget)
- PrintDataToCodeXref(TempAddr, PossibleCodeAddr, 0);
+ global_STARS_program->PrintDataToCodeXref(TempAddr, PossibleCodeAddr, 0);
}
}
TempAddr += MD_DEFAULT_RETURN_ADDRESS_SIZE;
@@ -551,8 +559,8 @@ void SMPProgram::Analyze(ProfilerInformation *pi, FILE *AnnotFile, FILE *InfoAnn
#if SMP_DEBUG
SMP_msg("INFO: Number of functions: %zu Total Code Size: %llu\n", NumFuncs, STARS_TotalCodeSize);
#endif
- if (STARS_CODESIZE_FULL_ANALYSIS_LIMIT < STARS_TotalCodeSize) {
- STARS_PerformReducedAnalysis = true;
+ global_STARS_program->ReportTotalCodeSize(STARS_TotalCodeSize);
+ if (global_STARS_program->ShouldSTARSPerformReducedAnalysis()) {
SMP_msg("INFO: Performing reduced STARS analyses due to code size.\n");
}
@@ -590,7 +598,7 @@ void SMPProgram::Analyze(ProfilerInformation *pi, FILE *AnnotFile, FILE *InfoAnn
else {
pair<STARS_ea_t, SMPFunction *> TempFunc(FuncInfo->get_startEA(), CurrFunc);
this->FuncMap.insert(TempFunc);
- if (STARS_PerformReducedAnalysis) {
+ if (global_STARS_program->ShouldSTARSPerformReducedAnalysis()) {
// Not enough memory to hold all functions. Emit reduced annotations and release memory.
CurrFunc->EmitAnnotations(AnnotFile, InfoAnnotFile); // memory released in EmitAnnotations()
}
@@ -631,7 +639,7 @@ void SMPProgram::Analyze(ProfilerInformation *pi, FILE *AnnotFile, FILE *InfoAnn
SMP_msg("INFO: Number of functions in FuncMap: %zu\n", this->FuncMap.size());
#endif
- if (STARS_PerformReducedAnalysis) {
+ if (global_STARS_program->ShouldSTARSPerformReducedAnalysis()) {
this->EmitDataAnnotations(this->AnnotationFile, this->InfoAnnotationFile);
this->GlobalVarTable.clear();
this->GlobalNameMap.clear();
@@ -950,7 +958,8 @@ void SMPProgram::EmitDataAnnotations(FILE *AnnotFile, FILE *InfoAnnotFile) {
SMP_msg("Inserted offset 0 for global var %s\n", TempGlobal.name);
#endif
}
- unsigned long ParentReferentID = DataReferentID++;
+ unsigned long ParentReferentID = global_STARS_program->GetDataReferentID();
+ global_STARS_program->IncrementDataReferentID();
bool DirectAccesses = false; // Any direct field accesses in this global?
set<pair<size_t, bool>, LessOff>::iterator CurrOffset;
for (CurrOffset = TempGlobal.FieldOffsets.begin(); CurrOffset != TempGlobal.FieldOffsets.end(); ++CurrOffset) {
@@ -1005,7 +1014,7 @@ void SMPProgram::EmitDataAnnotations(FILE *AnnotFile, FILE *InfoAnnotFile) {
}
SMP_fprintf(AnnotFile,
"%10x %6zu DATAREF GLOBAL %8lu %llx CHILDOF %lu OFFSET %zu %s + %zu FIELD",
- 0, FieldSize, DataReferentID, (uint64) TempGlobal.addr, ParentReferentID,
+ 0, FieldSize, global_STARS_program->GetDataReferentID(), (uint64) TempGlobal.addr, ParentReferentID,
CurrOffset.first, TempGlobal.name, CurrOffset.first);
if (CurrOffset.second) { // indexed accesses to this field
SMP_fprintf(AnnotFile, " INDEXED\n");
@@ -1013,7 +1022,7 @@ void SMPProgram::EmitDataAnnotations(FILE *AnnotFile, FILE *InfoAnnotFile) {
else { // only direct accesses to this field
SMP_fprintf(AnnotFile, " DIRECT\n");
}
- ++DataReferentID;
+ global_STARS_program->IncrementDataReferentID();
}
} // end if unstructured data ... else ...
} // end for all globals in the global var table
@@ -1180,7 +1189,7 @@ FuncType SMPProgram::RecurseAndMarkRetAdd(SMPFunction* FuncAttrib) {
// If exception throwing code is detected, mark exception-handling functions as unsafe for fast returns.
void SMPProgram::ProcessExceptionHandlingFileSections(void) {
- string EHFileName(RootFileName);
+ string EHFileName(global_STARS_program->GetRootFileName());
string FileSuffix(".eh_frame_addrs");
EHFileName += FileSuffix;
diff --git a/src/base/SMPStaticAnalyzer.cpp b/src/base/SMPStaticAnalyzer.cpp
index 3103453d..6c0755e0 100644
--- a/src/base/SMPStaticAnalyzer.cpp
+++ b/src/base/SMPStaticAnalyzer.cpp
@@ -19,7 +19,7 @@
* e-mail: jwd@virginia.com
* URL : http://www.cs.virginia.edu/
*
- * Additional copyrights 2010, 2011 by Zephyr Software LLC
+ * Additional copyrights 2010, 2011, 2012, 2013, 2014, 2015 by Zephyr Software LLC
* e-mail: {clc,jwd}@zephyr-software.com
* URL : http://www.zephyr-software.com/
*/
@@ -35,10 +35,14 @@
#include <list>
#include <vector>
#include <set>
-
#include <string>
+
#include <ctime>
+#include <pro.h>
+#include <ua.hpp>
+#include <bytes.hpp>
+
#include "interfaces/SMPDBInterface.h"
#include "base/SMPStaticAnalyzer.h"
#include "base/SMPDataFlowAnalysis.h"
@@ -47,7 +51,9 @@
#include "base/SMPInstr.h"
#include "base/ProfilerInformation.h"
#include "interfaces/abstract/STARSOp.h"
+#include "interfaces/abstract/STARSInterface.h"
#include "interfaces/idapro/STARSInterface.h"
+#include "interfaces/idapro/STARSProgram.h"
using namespace std;
@@ -68,7 +74,7 @@ using namespace std;
#define SMP_DEBUG_COUNT 356 // How many funcs to process in problem search
int FuncsProcessed = 0;
-#define SMP_FIXUP_IDB 0 // Try to fix the IDA database?
+#define SMP_FIXUP_IDB 0 // Try to fix the IDA database? NOTE: Needs lots of updating before re-enabling.
#define SMP_DEBUG_FIXUP_IDB 0 // debugging output for FixupIDB chain
#define SMP_FIND_ORPHANS 1 // find code outside of functions
#define SMP_DEBUG_CODE_ORPHANS 1 // Detect whether we are causing code to be orphaned
@@ -78,175 +84,41 @@ int FuncsProcessed = 0;
#define STARS_GENERATE_ASM_FILE 1 // Generate ASM file at end of processing?
#define STARS_GENERATE_DIF_FILE STARS_SCCP_CONVERT_UNREACHABLE_BLOCKS // If we optimize, generate DIF file
+typedef op_t STARSOpndType;
+
static SMPProgram *CurrProg = NULL;
-STARS_Interface_t* global_stars_interface=NULL;
+STARS_Interface_t* global_stars_interface = NULL;
+STARS_Program_t *global_STARS_program = NULL;
#if SMP_DEBUG_CODE_ORPHANS
-set<ea_t> CodeOrphans;
+set<STARS_ea_t> CodeOrphans;
#endif
+// Should we convert the x86 LOCK prefix byte to a no-op to avoid
+// IDA Pro problems with instructions that jump past the LOCK
+// prefix and look like they are jumping into the middle of an
+// instruction?
+#define STARS_REMOVE_LOCK_PREFIX 0
// Lock prefix for x86 code; jumping around this prefix conditionally looks like jumping
// into the middle of an instruction to IDA Pro, causing it to not collect instructions
// into a procedure. We replace these bytes with no-op opcodes because none of our analyses
// care about LOCK prefices. We store the addresses where we have done the replacement in a
// set in case we ever care.
#define X86_LOCK_PREFIX 0xF0
-set<ea_t> LockPreficesRemoved; // Addresses where x86 LOCK prefix byte was turned into a no-op by STARS_custom_ana() callback.
+set<STARS_ea_t> LockPreficesRemoved; // Addresses where x86 LOCK prefix byte was turned into a no-op by STARS_custom_ana() callback.
static unsigned long CustomAnaCallCount = 0;
-// Define optimization categories for instructions.
-int OptCategory[NN_last + 1];
-// Initialize the OptCategory[] array.
-void InitOptCategory(void);
-
-// Flag to force reduced analysis so we don't run out of virtual memory
-bool STARS_PerformReducedAnalysis;
-
-// Indentation level when emitting SPARK Ada translation of the RTLs.
-unsigned short STARS_SPARK_IndentCount;
-
-// Record which opcodes change the stack pointer, and by how many
-// bytes up (reduction in stack size for stacks that grow downward)
-// or down (increase in stack size for stacks that grow downward).
-sval_t StackAlteration[NN_last + 1];
-// Initialize the StackAlteration[] array.
-void InitStackAlteration(void);
-
-// Keep statistics on how many instructions we saw in each optimization
-// category, and how many optimizing annotations were emitted for
-// each category.
-int OptCount[LAST_OPT_CATEGORY + 1];
-int AnnotationCount[LAST_OPT_CATEGORY + 1];
-
-// Unique data referent number to use in data annotations.
-unsigned long DataReferentID;
-
-// Debugging counters for analyzing memory usage.
-unsigned long UnusedInstrCount;
-unsigned long UnusedBlockCount;
-unsigned long UnusedStructCount;
-unsigned long UnusedIntCount;
-
-// Counters for dead metadata analysis.
-unsigned long DeadMetadataCount;
-unsigned long LiveMetadataCount;
-
-// Counters for indirect jump resolution.
-unsigned long ResolvedIndirectJumpCount;
-unsigned long UnresolvedIndirectJumpCount;
-
-// Counters for measuring SCCP success in finding constant DEFs.
-unsigned long ConstantDEFCount;
-unsigned long AlwaysTakenBranchCount;
-unsigned long NeverTakenBranchCount;
-
-// Counters for accessing less than machine register width.
-unsigned long SubwordRegCount;
-unsigned long SubwordMemCount;
-unsigned long SubwordAddressRegCount;
-unsigned long SPARKOperandCount; // total operands printed
-
-#if SMP_COUNT_MEMORY_ALLOCATIONS
-// Counters for analyzing memory use for allocated and used objects.
-unsigned long SMPInstCount;
-unsigned long SMPBlockCount;
-unsigned long SMPFuncCount;
-unsigned long SMPGlobalVarCount;
-unsigned long SMPLocalVarCount;
-unsigned long SMPDefUseChainCount;
-unsigned long SMPInstBytes;
-unsigned long SMPDefUseChainBytes;
-#endif
-
-#if SMP_MEASURE_NUMERIC_ANNOTATIONS
-unsigned long NumericAnnotationsCount12; // cases 1 and 2
-unsigned long NumericAnnotationsCount3; // case 3
-unsigned long TruncationAnnotationsCount; // case 4
-unsigned long SignednessWithoutTruncationCount; // case 5
-unsigned long LeaInstOverflowCount; // case 6
-unsigned long WidthDoublingTruncationCount; // case 7
-unsigned long BenignOverflowInstCount;
-unsigned long BenignOverflowDefCount;
-unsigned long SuppressStackPtrOverflowCount;
-unsigned long SuppressLiveFlagsOverflowCount;
-unsigned long LiveMultiplyBitsCount;
-unsigned long BenignTruncationCount;
-unsigned long SuppressTruncationRegPiecesAllUsed;
-unsigned long SuppressSignednessOnTruncation;
-#endif
-
-#if STARS_SCCP_GATHER_STATISTICS
-// Counters for analyzing Sparse Conditional Constant Propagation effectiveness.
-unsigned long SCCPFuncsWithArgWriteCount;
-unsigned long SCCPFuncsWithConstantArgWriteCount;
-unsigned long SCCPOutgoingArgWriteCount;
-unsigned long SCCPConstantOutgoingArgWriteCount;
-#endif
-
-// Counter for max # of basic blocks seen in one function.
-unsigned long STARS_MaxBlockCount;
-
-// Is the binary a 32-bit, 64-bit, etc. instruction set architecture
-size_t STARS_ISA_Bitwidth;
-size_t STARS_ISA_Bytewidth;
-char STARS_ISA_dtyp;
-int STARS_MD_LAST_SAVED_REG_NUM;
-
-
-// The types of data objects based on their first operand flags.
-const char *DataTypes[] = { "VOID", "NUMHEX", "NUMDEC", "CHAR",
- "SEG", "OFFSET", "NUMBIN", "NUMOCT", "ENUM", "FORCED",
- "STRUCTOFFSET", "STACKVAR", "NUMFLOAT", "UNKNOWN",
- "UNKNOWN", "UNKNOWN", 0};
-
-// Filename (not including path) of executable being analyzed.
-char RootFileName[MAXSTR];
-
-// strings for printing ZST_SysCallType
-const char *CallTypeNames[4] = { "Unrestricted", "High-Privilege", "File-Access", "Network-Access" };
-
-DisAsmString DisAsmText;
-
-// Operand type that can have all fields initialized to o_void and zero
-// values, to be used to copy-initialize operands that we are adding to
-// RTLs and DEF and USE lists.
-STARSOpndType InitOp;
-
-// File foo.exe.alarms for Zephyr Security Toolkit security alarm messages.
-FILE *ZST_AlarmFile;
-
-// File for code xref targets (helps ILR, makes IRDB more complete)
-FILE *STARS_XrefsFile;
-
-// File to provide details on fast returns, safe and unsafe return-address functions, etc.
-FILE *STARS_CallReturnFile;
-
-FILE *ZST_SPARKSourceFile;
-FILE *ZST_SPARKHeaderFile;
-
// Code addresses identified by a disassembler, such as objdump on
// Linux. These can be used to improve the code vs. data identification
// of IDA Pro.
-vector<ea_t> DisasmLocs;
+vector<STARS_ea_t> DisasmLocs;
// Code addresses as identified by IDA Pro, to be compared to DisasmLocs.
-vector<ea_t> IDAProLocs;
-
-// Bit masks for extracting bits from a STARSBitSet unsigned char.
-const unsigned char STARSBitMasks[8] = { 1, 2, 4, 8, 16, 32, 64, 128 };
-
-// Function start and end addresses (for function entry chunks only).
-// Kept here because IDA Pro 5.1 seems to have a memory overwriting
-// problem when iterating through all functions in the program. An existing
-// STARS_Function_t *ChunkInfo data structure was getting overwritten by one of the
-// function STARS_Function_t data structures, causing changes of startEA and endEA among
-// other things.
-
-vector<SMP_bounds_t> FuncBounds;
+vector<STARS_ea_t> IDAProLocs;
// List of functions that need to be reanalyzed after all the code fixup
// and code discovery is complete. Kept as a list of addresses; any address
// within the function is good enough to designate it.
-list<ea_t> FuncReanalyzeList;
+list<STARS_ea_t> FuncReanalyzeList;
// A code region that has been converted from data but has code addresses that
// need to be reanalyzed. This is usually because a former data address is
@@ -255,10 +127,10 @@ list<ea_t> FuncReanalyzeList;
class FixupRegion {
public:
FixupRegion(SMP_bounds_t);
- inline ea_t GetStart(void) const { return CodeRegion.startEA; };
- inline ea_t GetEnd(void) const { return CodeRegion.endEA; };
- inline void SetStart(ea_t addr) { CodeRegion.startEA = addr; };
- list<ea_t> FixupInstrs; // easier to expose than to encapsulate
+ inline STARS_ea_t GetStart(void) const { return CodeRegion.startEA; };
+ inline STARS_ea_t GetEnd(void) const { return CodeRegion.endEA; };
+ inline void SetStart(STARS_ea_t addr) { CodeRegion.startEA = addr; };
+ list<STARS_ea_t> FixupInstrs; // easier to expose than to encapsulate
private:
SMP_bounds_t CodeRegion;
};
@@ -305,14 +177,13 @@ void FixCodeIdentification(void);
int FixupNewCodeChunks(void);
void AuditCodeTargets(void);
void SpecialDebugOutput(void);
-void RemoveIDACodeAddr(ea_t);
-void ZST_InitPolicies(const char *);
+void RemoveIDACodeAddr(STARS_ea_t);
static unsigned long DebugCounter = 0;
// Turn LOCK prefix into no-op when detected. Each is one byte in length.
-bool STARS_custom_ana(ea_t CurrentAddr) {
- // static_assert(sizeof(ea_t) == sizeof(uintptr_t), "Sizeof mismatch between ea_t and uintptr_t");
+bool STARS_custom_ana(STARS_ea_t CurrentAddr) {
+ // static_assert(sizeof(STARS_ea_t) == sizeof(uintptr_t), "Sizeof mismatch between STARS_ea_t and uintptr_t");
int code = get_byte(CurrentAddr);
++CustomAnaCallCount;
if (X86_LOCK_PREFIX != code) {
@@ -333,7 +204,7 @@ bool STARS_custom_ana(ea_t CurrentAddr) {
++DebugCounter;
}
#endif
- pair<set<ea_t>::iterator, bool> InsertResult;
+ pair<set<STARS_ea_t>::iterator, bool> InsertResult;
InsertResult = LockPreficesRemoved.insert(CurrentAddr);
assert(InsertResult.second);
cmd.itype = NN_nop; // make it a no-op
@@ -351,12 +222,12 @@ bool STARS_custom_ana(ea_t CurrentAddr) {
static int idaapi idp_callback(void *, int event_id, va_list va) {
#if STARS_REMOVE_LOCK_PREFIX
if (event_id == processor_t::custom_ana) {
- ea_t CurrentAddr = cmd.ea;
+ STARS_ea_t CurrentAddr = cmd.ea;
#if 1
int code = ua_next_byte();
++CustomAnaCallCount;
if (X86_LOCK_PREFIX == code) {
- pair<set<ea_t>::iterator, bool> InsertResult;
+ pair<set<STARS_ea_t>::iterator, bool> InsertResult;
InsertResult = LockPreficesRemoved.insert(CurrentAddr);
cmd.itype = NN_nop; // make it a no-op
return (int) (cmd.size + 1);
@@ -395,7 +266,8 @@ static int idaapi idp_callback(void *, int event_id, va_list va) {
int IDAP_init(void) {
/* init the interface */
- global_stars_interface=new STARS_IDA_Interface_t;
+ global_stars_interface = new STARS_IDA_Interface_t;
+ global_STARS_program = new STARS_IDA_Program_t;
#if 0 // We are now calling from the SMP.idc script.
@@ -426,73 +298,6 @@ int IDAP_init(void) {
#endif
hook_to_notification_point(HT_IDP, idp_callback, NULL);
- STARS_PerformReducedAnalysis = false;
- STARS_SPARK_IndentCount = 1;
- DataReferentID = 1;
- UnusedStructCount = 0;
- UnusedIntCount = 0;
- DeadMetadataCount = 0;
- LiveMetadataCount = 0;
- ResolvedIndirectJumpCount = 0;
- UnresolvedIndirectJumpCount = 0;
- ConstantDEFCount = 0;
- AlwaysTakenBranchCount = 0;
- NeverTakenBranchCount = 0;
- SubwordRegCount = 0;
- SubwordMemCount = 0;
- SubwordAddressRegCount = 0;
- SPARKOperandCount = 0;
-#if SMP_COUNT_MEMORY_ALLOCATIONS
- SMPInstCount = 0;
- SMPBlockCount = 0;
- SMPDefUseChainCount = 0;
- SMPFuncCount = 0;
- SMPGlobalVarCount = 0;
- SMPLocalVarCount = 0;
- SMPInstBytes = 0;
- SMPDefUseChainBytes = 0;
-#endif
-#if SMP_MEASURE_NUMERIC_ANNOTATIONS
- NumericAnnotationsCount12 = 0;
- NumericAnnotationsCount3 = 0;
- TruncationAnnotationsCount = 0;
- SignednessWithoutTruncationCount = 0;
- LeaInstOverflowCount = 0;
- WidthDoublingTruncationCount = 0;
- BenignOverflowInstCount = 0;
- BenignOverflowDefCount = 0;
- SuppressStackPtrOverflowCount = 0;
- SuppressLiveFlagsOverflowCount = 0;
- LiveMultiplyBitsCount = 0;
- BenignTruncationCount = 0;
- SuppressTruncationRegPiecesAllUsed = 0;
- SuppressSignednessOnTruncation = 0;
-#endif
-#if STARS_SCCP_GATHER_STATISTICS
- SCCPFuncsWithArgWriteCount = 0;
- SCCPFuncsWithConstantArgWriteCount = 0;
- SCCPOutgoingArgWriteCount = 0;
- SCCPConstantOutgoingArgWriteCount = 0;
-#endif
- STARS_MaxBlockCount = 0;
- InitOp.n = 0;
- InitOp.type = o_void;
- InitOp.offb = 0;
- InitOp.offo = 0;
- InitOp.flags = 0;
- InitOp.set_showed();
- // NOTE: InitOp.dtyp field is initialized in IDAP_run() to 32 or 64 bits.
- InitOp.reg = R_none;
- InitOp.value = 0;
- InitOp.addr = 0;
- InitOp.specval = 0;
- InitOp.specflag1 = 0;
- InitOp.specflag2 = 0;
- InitOp.specflag3 = 0;
- InitOp.specflag4 = 0;
- ZST_AlarmFile = NULL;
- ZST_SPARKSourceFile = NULL;
- ZST_SPARKHeaderFile = NULL;
#ifdef STARS_IRDB_INTERFACE
SMPLogFile = NULL;
#endif
@@ -523,37 +328,41 @@ void IDAP_run(int arg) {
} while(difftime(current,start) < 15.0);
#endif
+#if SMP_DEBUG
+ SMP_msg("Beginning IDAP_run.\n");
+#endif
+
+ SMP_msg("IDA SDK version: %d \n", IDA_SDK_VERSION);
+
+#ifdef STARS_IDA_INTERFACE
+ DefOrUse DummyRef;
+ STARSOpndType DummyOperand;
+ size_t RefObjectSize = sizeof(DummyRef), OpndSize = sizeof(DummyOperand);
+ SMP_msg("INFO: Size of DefOrUse: %zu Size of op_t: %zu \n", RefObjectSize, OpndSize);
+ SMP_msg("INFO: Size of STARS_ea_t: %zu Size of uintptr_t: %zu \n", sizeof(STARS_ea_t), sizeof(uintptr_t));
+#endif
+
if (inf.is_64bit()) {
- STARS_ISA_Bitwidth = 64;
- STARS_ISA_dtyp = dt_qword;
- STARS_MD_LAST_SAVED_REG_NUM = R_r15;
+ global_STARS_program->Set64BitBinary();
SMP_msg("INFO: 64-bit binary detected.\n");
}
else {
- STARS_ISA_Bitwidth = 32;
- STARS_ISA_dtyp = dt_dword;
- STARS_MD_LAST_SAVED_REG_NUM = R_di;
+ global_STARS_program->Set32BitBinary();
SMP_msg("INFO: 32-bit binary detected.\n");
}
- STARS_ISA_Bytewidth = (STARS_ISA_Bitwidth / 8);
- InitOp.dtyp = STARS_ISA_dtyp;
-
- InitOptCategory();
- InitDFACategory();
- InitTypeCategory();
- InitSMPDefsFlags();
- InitSMPUsesFlags();
- InitLibFuncFGInfoMaps();
- InitIntegerErrorCallSinkMap();
- InitUnsignedArgPositionMap();
- InitTaintWarningArgPositionMap();
- InitPointerArgPositionMap();
- InitStackAlteration();
- MDInitializeCallerSavedRegs();
- MDInitializeArgumentRegs();
+
+ global_STARS_program->InitData();
+ global_STARS_program->DetermineRootFileName();
+ if (!(global_STARS_program->OpenFiles())) {
+ SMP_msg("FATAL ERROR: At least one file could not be opened.\n");
+ error("FATAL ERROR: At least one file could not be opened.\n");
+ delete global_STARS_program;
+ delete global_stars_interface;
+ return;
+ }
#ifdef STARS_IRDB_INTERFACE
- string ZSTLogFileName(RootFileName);
+ string ZSTLogFileName(global_STARS_program->GetRootFileName());
string LogFileSuffix(".STARSlog");
ZSTLogFileName += LogFileSuffix;
SMPLogFile = SMP_fopen(ZSTLogFileName.c_str(), "w");
@@ -564,55 +373,19 @@ void IDAP_run(int arg) {
}
#endif
-#if SMP_DEBUG
- SMP_msg("Beginning IDAP_run.\n");
-#endif
-
- SMP_msg("IDA SDK version: %d \n", IDA_SDK_VERSION);
-
-#if 1
- DefOrUse DummyRef;
- STARSOpndType DummyOperand;
- size_t RefObjectSize = sizeof(DummyRef), OpndSize = sizeof(DummyOperand);
- SMP_msg("INFO: Size of DefOrUse: %zu Size of op_t: %zu \n", RefObjectSize, OpndSize);
- SMP_msg("INFO: Size of ea_t: %zu Size of uintptr_t: %zu \n", sizeof(ea_t), sizeof(uintptr_t));
-#endif
-
// Open the output file.
- STARS_ssize_t FileLen;
- FileLen = get_root_filename(RootFileName, sizeof(RootFileName) - 1);
- string AnnotFileName(RootFileName);
+ string AnnotFileName(global_STARS_program->GetRootFileName());
string FileSuffix(".annot");
AnnotFileName += FileSuffix;
- string InfoAnnotFileName(RootFileName);
+ string InfoAnnotFileName(global_STARS_program->GetRootFileName());
string InfoFileSuffix(".infoannot");
InfoAnnotFileName += InfoFileSuffix;
- string ZSTPolicyFileName(RootFileName);
- string PolicyFileSuffix(".policy");
- ZSTPolicyFileName += PolicyFileSuffix;
- string ZSTAlarmFileName(RootFileName);
- string AlarmFileSuffix(".alarms");
- ZSTAlarmFileName += AlarmFileSuffix;
- string AsmFileName(RootFileName);
+ string AsmFileName(global_STARS_program->GetRootFileName());
string AsmFileSuffix(".asm");
AsmFileName += AsmFileSuffix;
- string DifFileName(RootFileName);
+ string DifFileName(global_STARS_program->GetRootFileName());
string DifFileSuffix(".dif");
DifFileName += DifFileSuffix;
- string XrefsFileName(RootFileName);
- string XrefsFileSuffix(".STARSxrefs");
- XrefsFileName += XrefsFileSuffix;
- string CallRetFileName(RootFileName);
- string CallRetFileSuffix(".STARScallreturn");
- CallRetFileName += CallRetFileSuffix;
-#if ZST_EMIT_SPARK_ADA_TRANSLATION
- string SPARKSourceFileName(RootFileName);
- string SPARKSourceFileSuffix(".ZSTSPARK.adb");
- SPARKSourceFileName += SPARKSourceFileSuffix;
- string SPARKHeaderFileName(RootFileName);
- string SPARKHeaderFileSuffix(".ZSTSPARK.ads");
- SPARKHeaderFileName += SPARKHeaderFileSuffix;
-#endif
// For debugging, we can add a delay loop so we have time to attach gdb to the
// running process and set a breakpoint.
@@ -627,7 +400,7 @@ void IDAP_run(int arg) {
} while(difftime(current,start) < 15.0);
#endif
- ea_t RecentAddr;
+ STARS_ea_t RecentAddr;
#if SMP_DEBUG_CODE_ORPHANS
CodeOrphans.clear();
RecentAddr = BADADDR;
@@ -638,102 +411,48 @@ void IDAP_run(int arg) {
}
#endif
- STARS_XrefsFile = SMP_fopen(XrefsFileName.c_str(), "w");
- if (NULL == STARS_XrefsFile) {
- error("FATAL ERROR: Cannot open STARS code xrefs file %s\n", XrefsFileName.c_str());
- return;
- }
-
- STARS_CallReturnFile = SMP_fopen(CallRetFileName.c_str(), "w");
- if (NULL == STARS_CallReturnFile) {
- error("FATAL ERROR: Cannot open STARS calls and returns info file %s\n", CallRetFileName.c_str());
- SMP_fclose(STARS_XrefsFile);
- return;
- }
-
CurrProg = new SMPProgram();
CurrProg->AnalyzeData(); // Analyze static data in the executable
// read the Profiler generated information into a new prof_info class
ProfilerInformation *prof_info = new ProfilerInformation(AnnotFileName.c_str(), CurrProg);
+ // NOTE: ProfilerInformation fopen's the AnnotFile, reads it, then closes it. Then we re-open for writing below.
AnnotFile = SMP_fopen(AnnotFileName.c_str(), "w");
if (NULL == AnnotFile) {
error("FATAL ERROR: Cannot open output file %s\n", AnnotFileName.c_str());
- SMP_fclose(STARS_XrefsFile);
- SMP_fclose(STARS_CallReturnFile);
+ global_STARS_program->CloseFiles();
delete prof_info;
+ delete CurrProg;
+ delete global_STARS_program;
+ delete global_stars_interface;
return;
}
InfoAnnotFile = SMP_fopen(InfoAnnotFileName.c_str(), "w");
if (NULL == InfoAnnotFile) {
error("FATAL ERROR: Cannot open output file %s\n", InfoAnnotFileName.c_str());
- SMP_fclose(STARS_XrefsFile);
- SMP_fclose(STARS_CallReturnFile);
- SMP_fclose(AnnotFile);
- delete prof_info;
- return;
- }
- ZST_AlarmFile = SMP_fopen(ZSTAlarmFileName.c_str(), "w");
- if (NULL == ZST_AlarmFile) {
- error("FATAL ERROR: Cannot open security alarms file %s\n", ZSTAlarmFileName.c_str());
- SMP_fclose(STARS_XrefsFile);
- SMP_fclose(STARS_CallReturnFile);
- SMP_fclose(AnnotFile);
- SMP_fclose(InfoAnnotFile);
- delete prof_info;
- return;
- }
-#if ZST_EMIT_SPARK_ADA_TRANSLATION
- ZST_SPARKSourceFile = SMP_fopen(SPARKSourceFileName.c_str(), "w");
- if (NULL == ZST_SPARKSourceFile) {
- error("FATAL ERROR: Cannot open SPARK-Ada source output file %s\n", SPARKSourceFileName.c_str());
- SMP_fclose(STARS_XrefsFile);
- SMP_fclose(STARS_CallReturnFile);
- SMP_fclose(AnnotFile);
- SMP_fclose(InfoAnnotFile);
- SMP_fclose(ZST_AlarmFile);
- delete prof_info;
- return;
- }
- ZST_SPARKHeaderFile = SMP_fopen(SPARKHeaderFileName.c_str(), "w");
- if (NULL == ZST_SPARKHeaderFile) {
- error("FATAL ERROR: Cannot open SPARK-Ada header output file %s\n", SPARKHeaderFileName.c_str());
- SMP_fclose(STARS_XrefsFile);
- SMP_fclose(STARS_CallReturnFile);
+ global_STARS_program->CloseFiles();
SMP_fclose(AnnotFile);
- SMP_fclose(InfoAnnotFile);
- SMP_fclose(ZST_AlarmFile);
- SMP_fclose(ZST_SPARKSourceFile);
delete prof_info;
+ delete CurrProg;
+ delete global_STARS_program;
+ delete global_stars_interface;
return;
}
-#endif
// Read the Zephyr Security Toolkit system call security policies, if available.
- ZST_InitPolicies(ZSTPolicyFileName.c_str());
-
- (void) memset(OptCount, 0, sizeof(OptCount));
- (void) memset(AnnotationCount, 0, sizeof(AnnotationCount));
+ global_STARS_program->ZST_InitPolicies();
try { // We will catch memory exhaustion errors.
- // Record the start and end addresses for all function entry
- // chunks in the program.
- FuncBounds.reserve(10 + get_func_qty());
- for (size_t FuncIndex = 0; FuncIndex < SMP_get_func_qty(); ++FuncIndex) {
- STARS_Function_t *FuncInfo = SMP_getn_func(FuncIndex);
- SMP_bounds_t temp;
- temp.startEA = FuncInfo->get_startEA();
- temp.endEA = FuncInfo->get_endEA();
- FuncBounds.push_back(temp);
- }
-
#if SMP_DEBUG_DATA_ONLY
FindDataInCode();
FixCodeIdentification();
SMP_fclose(SymsFile);
delete prof_info;
+ delete CurrProg;
+ delete global_STARS_program;
+ delete global_stars_interface;
return;
#endif
@@ -752,10 +471,12 @@ void IDAP_run(int arg) {
}
CurrProg->ProfGranularityFinished(AnnotFile, InfoAnnotFile);
CurrProg->Analyze(prof_info, AnnotFile, InfoAnnotFile);
- if (!STARS_PerformReducedAnalysis) {
+ if (!global_STARS_program->ShouldSTARSPerformReducedAnalysis()) {
CurrProg->EmitAnnotations(AnnotFile, InfoAnnotFile);
}
+ // Process the instructions that are not in functions (generally, an IDA problem, or just no-ops for
+ // alignment purposes).
#if SMP_DEBUG_CODE_ORPHANS
RecentAddr = BADADDR;
for (STARS_Segment_t *seg = SMP_get_first_seg(); NULL != seg; seg = SMP_get_next_seg(RecentAddr)) {
@@ -774,23 +495,18 @@ void IDAP_run(int arg) {
}
#endif
+ // Output statistics.
for (int OptType = 0; OptType <= LAST_OPT_CATEGORY; ++OptType) {
SMP_msg("Optimization Category Count %d: %d Annotations: %d\n",
- OptType, OptCount[OptType], AnnotationCount[OptType]);
+ OptType, global_STARS_program->GetOptCount(OptType), global_STARS_program->GetAnnotationCount(OptType));
}
+ global_STARS_program->CloseFiles();
SMP_fclose(AnnotFile);
SMP_fprintf(InfoAnnotFile, " 8000000 2 SUCCESS ANALYSISCOMPLETED\n");
SMP_fclose(InfoAnnotFile);
- SMP_fclose(ZST_AlarmFile);
- SMP_fclose(STARS_XrefsFile);
- SMP_fclose(STARS_CallReturnFile);
-#if ZST_EMIT_SPARK_ADA_TRANSLATION
- SMP_fclose(ZST_SPARKSourceFile);
- SMP_fclose(ZST_SPARKHeaderFile);
-#endif
- if (!STARS_PerformReducedAnalysis) {
+ if (!global_STARS_program->ShouldSTARSPerformReducedAnalysis()) {
#if STARS_GENERATE_ASM_FILE
AsmFile = SMP_fopen(AsmFileName.c_str(), "w");
if (NULL == AsmFile) {
@@ -823,24 +539,26 @@ void IDAP_run(int arg) {
SMP_msg("INFO: Deleted prof_info.\n");
delete CurrProg;
SMP_msg("INFO: Deleted CurrProg. Returning to IDA Pro.\n");
+ delete global_STARS_program;
+ delete global_stars_interface;
return;
}
catch (std::bad_alloc) {
- delete CurrProg;
- delete prof_info;
error("FATAL ERROR: Memory exhausted.\n");
SMP_fprintf(InfoAnnotFile, " 8000000 2 ERROR MEMORYEXHAUSTED\n");
SMP_fclose(AnnotFile);
SMP_fclose(InfoAnnotFile);
- SMP_fclose(ZST_AlarmFile);
- SMP_fclose(STARS_XrefsFile);
+ delete CurrProg;
+ delete prof_info;
+ delete global_STARS_program;
+ delete global_stars_interface;
return;
}
} // end IDAP_run()
-char IDAP_comment[] = "ZephyrSoftware STARS (Static Analyzer for Reliability and Security)";
+char IDAP_comment[] = "Zephyr Software STARS (Static Analyzer for Reliability and Security)";
char IDAP_help[] = "Good luck";
-char IDAP_name[] = "SMPStaticAnalyzer";
+char IDAP_name[] = "STARS";
char IDAP_hotkey[] = "Alt-J";
plugin_t PLUGIN = {
@@ -860,8 +578,8 @@ plugin_t PLUGIN = {
// disassembler (e.g. objdump) and enter them into DisasmLocs.
void FindCodeAddresses(void) {
// Read in code addresses as found by an external disassembler.
- ea_t CurrDisasmAddr;
- string DisasmFileName(RootFileName);
+ STARS_ea_t CurrDisasmAddr;
+ string DisasmFileName(global_STARS_program->GetRootFileName());
string FileSuffix(".SMPobjdump");
DisasmFileName += FileSuffix;
FILE *DisasmFile = SMP_fopen(DisasmFileName.c_str(), "r");
@@ -874,7 +592,7 @@ void FindCodeAddresses(void) {
DisasmLocs.reserve(DISASM_RESERVE_SIZE);
unsigned long TempAddr;
int ScanReturn = qfscanf(DisasmFile, "%lx", &TempAddr);
- CurrDisasmAddr = (ea_t) TempAddr;
+ CurrDisasmAddr = (STARS_ea_t) TempAddr;
while (1 == ScanReturn) {
int NextChar;
DisasmLocs.push_back(CurrDisasmAddr);
@@ -883,7 +601,7 @@ void FindCodeAddresses(void) {
NextChar = qfgetc(DisasmFile);
} while ((EOF != NextChar) && ('\n' != NextChar));
ScanReturn = qfscanf(DisasmFile, "%lx", &TempAddr);
- CurrDisasmAddr = (ea_t) TempAddr;
+ CurrDisasmAddr = (STARS_ea_t) TempAddr;
} // end while (1 == ScanReturn)
if (0 >= DisasmLocs.size()) {
SMP_msg("ERROR: No addresses read from %s\n", DisasmFileName.c_str());
@@ -899,13 +617,13 @@ void FindCodeAddresses(void) {
// Find all the code locs in the IDA Pro database. As we find
// them, store them in IDAProLocs.
- ea_t RecentAddr = BADADDR;
+ STARS_ea_t RecentAddr = BADADDR;
for (STARS_Segment_t *seg = SMP_get_first_seg(); NULL != seg; seg = SMP_get_next_seg(RecentAddr)) {
RecentAddr = seg->get_startEA();
if (!seg->IsCodeSegment())
continue;
- for (ea_t addr = seg->get_startEA(); addr < seg->get_endEA(); addr = get_item_end(addr)) {
+ for (STARS_ea_t addr = seg->get_startEA(); addr < seg->get_endEA(); addr = SMP_get_item_end(addr)) {
flags_t InstrFlags = getFlags(addr);
if (isHead(InstrFlags) && isCode(InstrFlags)) {
IDAProLocs.push_back(addr);
@@ -923,7 +641,7 @@ void FindCodeAddresses(void) {
}
}
#endif
- } // end for (ea_t addr = seg->startEA; ...)
+ } // end for (STARS_ea_t addr = seg->startEA; ...)
} // end for all segments
return;
} // end FindCodeAddresses()
@@ -935,7 +653,7 @@ void FindCodeAddresses(void) {
// code identification, in which a large code section is identified as data,
// but some instructions in the middle of the "data" are identified as
// code but IDA often starts on the wrong boundary in these cases.
-bool IsCodeMisaligned(ea_t addr) {
+bool IsCodeMisaligned(STARS_ea_t addr) {
// Do a binary search for addr within DisasmLocs, which is sorted
// in ascending address order because of the way in which it was
// generated.
@@ -960,7 +678,7 @@ bool IsCodeMisaligned(ea_t addr) {
return false;
} // end of IsCodeMisaligned()
-void RemoveIDACodeAddr(ea_t addr) {
+void RemoveIDACodeAddr(STARS_ea_t addr) {
// Do a binary search for addr within IDAProLocs, which is sorted
// in ascending address order because of the way in which it was
// generated. Delete the element of IDAProLocs if found.
@@ -983,7 +701,7 @@ void RemoveIDACodeAddr(ea_t addr) {
}
// IDAProLocs[index] contains addr.
- vector<ea_t>::iterator RemovalIterator = IDAProLocs.begin();
+ vector<STARS_ea_t>::iterator RemovalIterator = IDAProLocs.begin();
RemovalIterator += index;
RemovalIterator = IDAProLocs.erase(RemovalIterator);
return;
@@ -1030,14 +748,14 @@ void FindDataInCode(void) {
size_t DataRunLen = 0; // How many data bytes in a row have we seen?
bool IsolatedCodeTrigger = false; // Have seen data, then isolated code
// Now looking for data
- ea_t IsolatedCodeAddr;
+ STARS_ea_t IsolatedCodeAddr;
int IsolatedCodeLen;
int InstrLen;
bool InstOK;
insn_t LocalCmd;
uint32 LocalFeatures;
- ea_t RecentAddr = BADADDR;
+ STARS_ea_t RecentAddr = BADADDR;
for (STARS_Segment_t *seg = SMP_get_first_seg(); NULL != seg; seg = SMP_get_next_seg(RecentAddr)) {
RecentAddr = seg->get_startEA();
if (!seg->IsCodeSegment())
@@ -1048,7 +766,7 @@ void FindDataInCode(void) {
SMP_msg("Non-code addresses for code segment %s from %x to %x\n",
SegName, seg->startEA, seg->endEA);
#endif
- for (ea_t addr = seg->get_startEA(); addr < seg->get_endEA(); addr = get_item_end(addr)) {
+ for (STARS_ea_t addr = seg->get_startEA(); addr < seg->get_endEA(); addr = SMP_get_item_end(addr)) {
flags_t AddrFlags = getFlags(addr);
if (isHead(AddrFlags)) {
if (isData(AddrFlags)) {
@@ -1102,10 +820,10 @@ void FindDataInCode(void) {
#if SMP_DEBUG_FIXUP_IDB
SMP_msg("DataRunLen: %d at %x\n", DataRunLen, addr);
#endif
- InstOK = SMPGetCmd(addr, LocalCmd, LocalFeatures);
- assert(InstOK);
+ SMPInstr TempInst(addr);
+ TempInst.Analyze();
- InstrLen = (int) LocalCmd.size;
+ InstrLen = (int) TempInst.GetSize();
// We don't check the returned InstrLen for validity because IsCodeMisaligned()
// will check for validity immediately below.
@@ -1116,7 +834,7 @@ void FindDataInCode(void) {
#if SMP_DEBUG_FIXUP_IDB
SMP_msg("Code was misaligned.\n");
#endif
- do_unknown_range(addr, InstrLen, DOUNK_SIMPLE);
+ ::do_unknown_range(addr, InstrLen, DOUNK_SIMPLE);
RemoveIDACodeAddr(addr);
if (do_data_ex(addr, byteflag(), InstrLen, BADNODE)) {
#if SMP_DEBUG_FIXUP_IDB
@@ -1181,7 +899,7 @@ void FindDataInCode(void) {
}
}
}
- } // end for (ea_t addr = seg->startEA; ...)
+ } // end for (STARS_ea_t addr = seg->startEA; ...)
} // end for all segments
return;
} // end of FindDataInCode()
@@ -1203,10 +921,10 @@ void AuditTailChunkOwnership(void) {
// converted.
// Return value: true -> skip to IDAProIndex; false -> convert AreaSize bytes.
bool FindDataToConvert(size_t IDAProIndex, size_t DisasmIndex, int &AreaSize) {
- ea_t PrevIDAAddr;
- ea_t NextIDAAddr;
+ STARS_ea_t PrevIDAAddr;
+ STARS_ea_t NextIDAAddr;
size_t ShadowDisasmIndex = DisasmIndex - 1;
- ea_t DisasmAddr = DisasmLocs[ShadowDisasmIndex];
+ STARS_ea_t DisasmAddr = DisasmLocs[ShadowDisasmIndex];
bool CannotConvert = false; // return value
bool DebugAddress = false;
#if SMP_DEBUG_FIXUP_IDB
@@ -1261,11 +979,11 @@ bool FindDataToConvert(size_t IDAProIndex, size_t DisasmIndex, int &AreaSize) {
flags_t DataFlags = getFlags(DisasmAddr);
if (isTail(DataFlags)) {
if (DebugAddress) SMP_msg(" tail byte: %lx\n", (unsigned long) DisasmAddr);
- DisasmAddr = get_item_end(DisasmAddr);
+ DisasmAddr = SMP_get_item_end(DisasmAddr);
}
else if (isData(DataFlags)) {
if (DebugAddress) SMP_msg(" data byte: %lx\n", (unsigned long) DisasmAddr);
- DisasmAddr = get_item_end(DisasmAddr);
+ DisasmAddr = SMP_get_item_end(DisasmAddr);
}
else if (isCode(DataFlags)) {
// How could this ever happen?
@@ -1299,7 +1017,7 @@ bool FindDataToConvert(size_t IDAProIndex, size_t DisasmIndex, int &AreaSize) {
// Does a converted code region look like a function prologue? If so,
// we should not include it in the previous function.
-bool IsFunctionPrologue(ea_t StartAddr, ea_t EndAddr) {
+bool IsFunctionPrologue(STARS_ea_t StartAddr, STARS_ea_t EndAddr) {
return false; // **!!** TODO
} // end of IsFunctionPrologue()
@@ -1315,7 +1033,7 @@ bool IsFunctionPrologue(ea_t StartAddr, ea_t EndAddr) {
// no-ops permits us to continue converting a contiguous range of data to
// code, and permits IDA to reanalyze the function later.
// Returns true if program bytes were patched.
-bool MDPatchUnconvertedBytes(ea_t CurrDisasmAddr) {
+bool MDPatchUnconvertedBytes(STARS_ea_t CurrDisasmAddr) {
flags_t AddrFlags = getFlags(CurrDisasmAddr);
if (isData(AddrFlags) || isTail(AddrFlags)) {
// Bytes should have been converted to unknown already.
@@ -1349,7 +1067,7 @@ bool MDPatchUnconvertedBytes(ea_t CurrDisasmAddr) {
#endif
return false;
}
- ea_t PatchAddr = CurrDisasmAddr;
+ STARS_ea_t PatchAddr = CurrDisasmAddr;
for (int i = 0; i < InstrLen; ++i) {
bool ok = patch_byte(PatchAddr, 0x90); // x86 no-op
if (!ok) {
@@ -1385,9 +1103,9 @@ bool MDPatchUnconvertedBytes(ea_t CurrDisasmAddr) {
// not found in DisasmLocs.
void FixCodeIdentification(void) {
size_t DisasmIndex = 0;
- ea_t CurrDisasmAddr = DisasmLocs[DisasmIndex++];
+ STARS_ea_t CurrDisasmAddr = DisasmLocs[DisasmIndex++];
size_t IDAProIndex = 0;
- ea_t CurrAddr = IDAProLocs[IDAProIndex++];
+ STARS_ea_t CurrAddr = IDAProLocs[IDAProIndex++];
while (DisasmIndex <= DisasmLocs.size()) {
// If the current address is less than the current
@@ -1438,8 +1156,8 @@ void FixCodeIdentification(void) {
// contiguous areas of data-to-code conversion that do NOT
// follow a return statement.
int AreaSize = 0;
- ea_t AreaStart = CurrDisasmAddr;
- ea_t AreaEnd;
+ STARS_ea_t AreaStart = CurrDisasmAddr;
+ STARS_ea_t AreaEnd;
#if SMP_DEBUG_FIXUP_IDB
SMP_msg("CurrDisasmAddr: %x CurrAddr: %x\n", CurrDisasmAddr, CurrAddr);
#endif
@@ -1593,7 +1311,7 @@ int FixupNewCodeChunks(void) {
CurrRegion->SetStart(BADADDR); // mark for removal
continue; // skip to next region
}
- list<ea_t>::iterator CurrInstr;
+ list<STARS_ea_t>::iterator CurrInstr;
for (CurrInstr = CurrRegion->FixupInstrs.begin(); CurrInstr != CurrRegion->FixupInstrs.end(); ++CurrInstr) {
#if IDA_SDK_VERSION < 600
int InstrLen = ua_code(*CurrInstr);
@@ -1667,7 +1385,7 @@ int FixupNewCodeChunks(void) {
else {
// Extend the previous chunk to include the
// converted code.
- ea_t PrevIDAAddr = IDAProLocs[IDAProIndex - 2];
+ STARS_ea_t PrevIDAAddr = IDAProLocs[IDAProIndex - 2];
STARS_Function_t *PrevChunk = get_fchunk(PrevIDAAddr);
#if SMP_DEBUG_FIXUP_IDB
SMP_msg(" addr in chunk to extend: %x\n", PrevIDAAddr);
@@ -1717,14 +1435,14 @@ int FixupNewCodeChunks(void) {
// emit on a per-instruction basis.
void FindOrphanedCode(STARS_Segment_t *CurrSeg, FILE *AnnotFile, FILE *InfoAnnotFile) {
char disasm[MAXSTR];
- for (ea_t addr = CurrSeg->get_startEA(); addr < CurrSeg->get_endEA();
- addr = get_item_end(addr)) {
+ for (STARS_ea_t addr = CurrSeg->get_startEA(); addr < CurrSeg->get_endEA();
+ addr = SMP_get_item_end(addr)) {
flags_t InstrFlags = getFlags(addr);
if (isTail(InstrFlags))
continue;
if (isHead(InstrFlags) && isCode(InstrFlags)) {
- ea_t FirstFuncAddr;
+ STARS_ea_t FirstFuncAddr;
if (!(CurrProg->IsInstAddrStillInFunction(addr, FirstFuncAddr))) {
SMPInstr CurrInst(addr);
CurrInst.Analyze();
@@ -1755,7 +1473,7 @@ void FindOrphanedCode(STARS_Segment_t *CurrSeg, FILE *AnnotFile, FILE *InfoAnnot
if (xrefs.GetTo() != 0) {
if (xrefs.GetIscode() && (xrefs.GetType() != fl_F)) {
// Found a code target, with its address in xrefs.to
- PrintCodeToCodeXref(addr, xrefs.GetTo(), CurrInst.GetSize());
+ global_STARS_program->PrintCodeToCodeXref(addr, xrefs.GetTo(), CurrInst.GetSize());
}
}
}
@@ -1806,15 +1524,15 @@ void FindOrphanedCode(STARS_Segment_t *CurrSeg, FILE *AnnotFile, FILE *InfoAnnot
// Version of FindOrphanedCode that does not emit annotations but can be used
// to determine at what point in time code becomes orphaned.
void Debug_FindOrphanedCode(STARS_Segment_t *CurrSeg, bool FirstRun) {
- ea_t DebugAddr = 0x8050db0;
- for (ea_t addr = CurrSeg->get_startEA(); addr < CurrSeg->get_endEA();
- addr = get_item_end(addr)) {
+ STARS_ea_t DebugAddr = 0x8050db0;
+ for (STARS_ea_t addr = CurrSeg->get_startEA(); addr < CurrSeg->get_endEA();
+ addr = SMP_get_item_end(addr)) {
flags_t InstrFlags = getFlags(addr);
if (isHead(InstrFlags) && isCode(InstrFlags)) {
STARS_Function_t *CurrFunc = SMP_get_func(addr);
if (NULL == CurrFunc) { // Code not in a func; orphaned
- pair<set<ea_t>::iterator, bool> pairib;
+ pair<set<STARS_ea_t>::iterator, bool> pairib;
pairib = CodeOrphans.insert(addr);
if (DebugAddr == addr) {
SMP_msg("DEBUG: Orphaned code addr %lx found.\n", (unsigned long) addr);
@@ -1824,7 +1542,7 @@ void Debug_FindOrphanedCode(STARS_Segment_t *CurrSeg, bool FirstRun) {
}
}
}
- } // end for (ea_t addr = CurrSeg->startEA; ...)
+ } // end for (STARS_ea_t addr = CurrSeg->startEA; ...)
} // end of Debug_FindOrphanedCode()
// Audit the IDA database with respect to branches and calls. They should
@@ -1837,7 +1555,7 @@ void AuditCodeTargets(void) {
void SpecialDebugOutput(void) {
char disasm[MAXSTR];
- vector<ea_t> ProblemAddrs;
+ vector<STARS_ea_t> ProblemAddrs;
ProblemAddrs.push_back(0x8066d08);
bool IDAsuccess;
int InstLen;
@@ -1846,7 +1564,7 @@ void SpecialDebugOutput(void) {
uint32 LocalFeatures;
for (size_t index = 0; index < ProblemAddrs.size(); ++index) {
- ea_t addr = ProblemAddrs[index];
+ STARS_ea_t addr = ProblemAddrs[index];
flags_t InstrFlags = getFlags(addr);
if (isCode(InstrFlags) && isHead(InstrFlags)) {
IDAsuccess = SMPGetCmd(addr, LocalCmd, LocalFeatures);
@@ -1873,1914 +1591,6 @@ void SpecialDebugOutput(void) {
return;
} // end of SpecialDebugOutput()
-// Convert a call type string from the policy file, such as "FILECALLS", to the
-// corresponding ZST_SysCallType, such as ZST_FILE_CALL.
-ZST_SysCallType ConvertStringToCallType(char *Str2) {
- ZST_SysCallType ReturnVal;
- if (0 == strcmp("PRIVILEGECALLS", Str2)) {
- ReturnVal = ZST_HIGHPRIVILEGE_CALL;
- }
- else if (0 == strcmp("FILECALLS", Str2)) {
- ReturnVal = ZST_FILE_CALL;
- }
- else if (0 == strcmp("NETWORKCALLS", Str2)) {
- ReturnVal = ZST_NETWORK_CALL;
- }
- else {
- ReturnVal = ZST_UNMONITORED_CALL;
- }
- return ReturnVal;
-} // end of ConvertStringToCallType()
-
-// Convert a policy string from the policy file, such as "DISALLOW", to
-// the corresponding ZST_Policy value, such as ZST_DISALLOW.
-ZST_Policy ConvertStringToPolicy(char *Str3) {
- ZST_Policy ReturnVal;
- if (0 == strcmp("DISALLOW", Str3)) {
- ReturnVal = ZST_DISALLOW;
- }
- else if (0 == strcmp("WHITELIST", Str3)) {
- ReturnVal = ZST_WHITELIST;
- }
- else if (0 == strcmp("BLACKLIST", Str3)) {
- ReturnVal = ZST_BLACKLIST;
- }
- else { // error handling precedes calls to this function
- ReturnVal = ZST_ALLOWALL;
- }
- return ReturnVal;
-} // end of ConvertStringToPolicy()
-
-// Given a function name, return its Zephyr Security Toolkit call type.
-ZST_SysCallType GetCallTypeFromFuncName(string SysCallName) {
- ZST_SysCallType ReturnVal;
- map<string, ZST_SysCallType>::iterator FindIter = ZST_FuncTypeMap.find(SysCallName);
- if (FindIter == ZST_FuncTypeMap.end()) { // not found; might not even be system call
- ReturnVal = ZST_UNMONITORED_CALL;
- }
- else {
- ReturnVal = FindIter->second;
- }
- return ReturnVal;
-} // end of GetCallTypeFromFuncName()
-
-// Get the user-specified security policy for the given call type.
-ZST_Policy GetPolicyFromCallType(ZST_SysCallType CallType) {
- ZST_Policy ReturnVal;
- map<ZST_SysCallType, ZST_Policy>::iterator FindIter = ZST_TypePolicyMap.find(CallType);
- if (FindIter == ZST_TypePolicyMap.end()) {
- // Policy not found; default to ALLOW_ALL
- ReturnVal = ZST_ALLOWALL;
- }
- else {
- ReturnVal = FindIter->second;
- }
- return ReturnVal;
-} // end of GetPolicyFromCallType()
-
-// Given a call type and called function name, is it on the location whitelist
-// for that call type?
-// NOTE: HANDLE CASE IN WHICH WHITELISTED LOCATION IS A PREFIX, TERMINATING in a slash.
-bool IsLocationWhitelisted(ZST_SysCallType CallType, string LocationName) {
- set<string>::iterator FindIter;
- bool ReturnVal;
-
- if (CallType == ZST_FILE_CALL) {
- FindIter = ZST_FileLocWhitelist.find(LocationName);
- ReturnVal = (FindIter != ZST_FileLocWhitelist.end());
- }
- else if (CallType == ZST_NETWORK_CALL) {
- FindIter = ZST_NetworkLocWhitelist.find(LocationName);
- ReturnVal = (FindIter != ZST_NetworkLocWhitelist.end());
- }
- else { // should not be here
- ReturnVal = false;
- }
- return ReturnVal;
-} // end of IsLocationWhitelisted()
-
-// Given a call type and called function name, is it on the location blacklist
-// for that call type?
-// NOTE: HANDLE CASE IN WHICH BLACKLISTED LOCATION IS A PREFIX, TERMINATING in a slash.
-bool IsLocationBlacklisted(ZST_SysCallType CallType, string LocationName) {
- set<string>::iterator FindIter;
- bool ReturnVal;
-
- if (CallType == ZST_FILE_CALL) {
- FindIter = ZST_FileLocBlacklist.find(LocationName);
- ReturnVal = (FindIter != ZST_FileLocBlacklist.end());
- }
- else if (CallType == ZST_NETWORK_CALL) {
- FindIter = ZST_NetworkLocBlacklist.find(LocationName);
- ReturnVal = (FindIter != ZST_NetworkLocBlacklist.end());
- }
- else { // should not be here
- ReturnVal = false;
- }
- return ReturnVal;
-}
-
-// Given a called function name, does it produce only benign numeric errors when
-// its returned values are used in arithmetic? (i.e. it is a trusted input)
-bool IsNumericSafeSystemCall(string CallName) {
- set<string>::iterator FindIter = ZST_SystemCallNumericWhitelist.find(CallName);
- bool ReturnVal = (FindIter != ZST_SystemCallNumericWhitelist.end());
- return ReturnVal;
-}
-
-// Utility functions to print code xrefs to STARS_XrefsFile
-void PrintCodeToCodeXref(ea_t FromAddr, ea_t ToAddr, size_t InstrSize) {
- SMP_fprintf(STARS_XrefsFile, "%10lx %6zu INSTR XREF IBT FROMIB %10lx \n",
- (unsigned long) ToAddr, InstrSize, (unsigned long) FromAddr);
- return;
-}
-
-void PrintDataToCodeXref(ea_t FromDataAddr, ea_t ToCodeAddr, size_t InstrSize) {
- SMP_fprintf(STARS_XrefsFile, "%10lx %6zu INSTR XREF IBT FROMDATA %10lx \n",
- (unsigned long) ToCodeAddr, InstrSize, (unsigned long) FromDataAddr);
- return;
-}
-
-// These two constants should agree with their counterparts in ZST-policy.c.
-#define ZST_MAX_FILE_NAME_LEN 1024
-#define ZST_MAX_CALL_NAME_LEN 64
-
-// Read the foo.exe.policy file to initialize our security policies for system calls.
-void ZST_InitPolicies(const char *PolicyFileName) {
- FILE *PolicyFile = SMP_fopen(PolicyFileName, "r");
- char Str1[ZST_MAX_CALL_NAME_LEN], Str2[ZST_MAX_CALL_NAME_LEN], Str3[ZST_MAX_FILE_NAME_LEN];
-
- string SafeSystemCall1("gettimeofday");
- ZST_SystemCallNumericWhitelist.insert(SafeSystemCall1);
-
- if (NULL != PolicyFile) {
- while (!SMP_feof(PolicyFile)) {
- int ItemsRead = qfscanf(PolicyFile, "%63s %63s %1023s", Str1, Str2, Str3);
- if (3 != ItemsRead) {
- SMP_msg("ERROR: Line in %s had %d items instead of the required 3; line ignored.\n", PolicyFileName, ItemsRead);
- }
- else {
- string ThirdStr(Str3);
- pair<set<string>::iterator, bool> SetInsertResult;
- if (0 == strcmp(Str1, "SECURITYPOLICY")) {
- ZST_SysCallType TempCallType = ConvertStringToCallType(Str2);
- ZST_Policy TempPolicy = ConvertStringToPolicy(Str3);
- pair<map<ZST_SysCallType, ZST_Policy>::iterator, bool> InsertResult;
- pair<ZST_SysCallType, ZST_Policy> TempPair(TempCallType, TempPolicy);
- InsertResult = ZST_TypePolicyMap.insert(TempPair);
- if (!(InsertResult.second)) {
- SMP_msg("ERROR: Could not insert security policy %s for %s. Possible duplicate or conflicting policies.\n",
- Str3, Str2);
- }
- }
- else if (0 == strcmp(Str1, "FILELOCATION")) {
- if (0 == strcmp(Str2, "WHITELIST")) {
- SetInsertResult = ZST_FileLocWhitelist.insert(ThirdStr);
- if (!(SetInsertResult.second)) {
- SMP_msg("WARNING: Duplicate file whitelist location %s ignored.\n", Str3);
- }
- }
- else if (0 == strcmp(Str2, "BLACKLIST")) {
- SetInsertResult = ZST_FileLocBlacklist.insert(ThirdStr);
- if (!(SetInsertResult.second)) {
- SMP_msg("WARNING: Duplicate file blacklist location %s ignored.\n", Str3);
- }
- }
- else {
- SMP_msg("ERROR: Unknown second field value in policy line: %s %s %s ; ignored\n", Str1, Str2, Str3);
- }
- }
- else if (0 == strcmp(Str1, "NETWORKLOCATION")) {
- if (0 == strcmp(Str2, "WHITELIST")) {
- SetInsertResult = ZST_NetworkLocWhitelist.insert(ThirdStr);
- if (!(SetInsertResult.second)) {
- SMP_msg("WARNING: Duplicate network whitelist location %s ignored.\n", Str3);
- }
- }
- else if (0 == strcmp(Str2, "BLACKLIST")) {
- SetInsertResult = ZST_NetworkLocBlacklist.insert(ThirdStr);
- if (!(SetInsertResult.second)) {
- SMP_msg("WARNING: Duplicate network blacklist location %s ignored.\n", Str3);
- }
- }
- else {
- SMP_msg("ERROR: Unknown second field value in policy line: %s %s %s ; ignored\n", Str1, Str2, Str3);
- }
- }
- else {
- SMP_msg("ERROR: Unknown first field value in policy line: %s %s %s ; ignored\n", Str1, Str2, Str3);
- }
- }
- }
- if (0 == SMP_fclose(PolicyFile)) {
- SMP_msg("Policy file %s successfully closed; all policies recorded.\n", PolicyFileName);
- }
- else {
- SMP_msg("ERROR: fclose failed on policy file %s. However, policies should be in effect.\n", PolicyFileName);
- }
- // Now, initialize the system call name maps.
- pair<map<string, ZST_SysCallType>::iterator, bool> FuncInsertResult;
- // Do all the high privilege calls first.
- string SysFuncName("putenv");
- pair<string, ZST_SysCallType> FuncNamePolicyPair(SysFuncName, ZST_HIGHPRIVILEGE_CALL);
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("setenv");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("setegid");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("seteuid");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("setgid");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("setpgid");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("setregid");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("setreuid");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("setuid");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("execl");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("execv");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("execle");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("execve");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("execlp");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("execvp");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("system");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
-
- // Now do all the file operation calls.
- FuncNamePolicyPair.second = ZST_FILE_CALL;
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("chdir");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("chmod");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("chown");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("creat");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("creat64");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("fopen");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("freopen");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("open");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("open64");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("mknod");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("remove");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("rmdir");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("unlink");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
-
- // Finally, handle all the network connection calls.
- FuncNamePolicyPair.second = ZST_NETWORK_CALL;
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("socket");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("socketpair");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("pipe");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("bind");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("listen");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("accept");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- FuncNamePolicyPair.first.clear();
- FuncNamePolicyPair.first.append("connect");
- FuncInsertResult = ZST_FuncTypeMap.insert(FuncNamePolicyPair);
- assert(FuncInsertResult.second);
- }
- else {
- SMP_msg("WARNING: No policy file %s found. System call policies not in effect.\n", PolicyFileName);
- }
- return;
-} // end of ZST_InitPolicies()
-
-// Initialize the OptCategory[] array to define how we emit
-// optimizing annotations.
-void InitOptCategory(void) {
- // Default category is 0, no optimization without knowing context.
- (void) memset(OptCategory, 0, sizeof(OptCategory));
- // Category 1 instructions never need updating of their memory
- // metadata by the Memory Monitor SDT. Currently, this is because
- // these instructions only have effects on registers we do not maintain
- // metadata for, such as the EIP and the FLAGS, e.g. jumps, compares,
- // or because they are no-ops, including machine-dependent no-op idioms.
- // Effects on floating-point regs are always NUMERIC and can be put into
- // categury 1 because mmStrata knows these registers are NUMERIC and does
- // not keep a metadata map for them.
- // Category 2 instructions always have a result type of 'n' (number).
- // Category 3 instructions have a result type of 'n' (number)
- // whenever the second source operand is an operand of type 'n'.
- // NOTE: MOV is only current example, and this will take some thought if
- // other examples arise.
- // Category 4 instructions have a result type identical to the 1st source operand type.
- // NOTE: This is currently set for single-operand instructions such as
- // INC, DEC. As a result, these are treated pretty much as if
- // they were category 1 instructions, as there is no metadata update,
- // unless the operand is a memory operand (i.e. mem or [reg]).
- // If new instructions are added to this category that are not single
- // operand and do require some updating, the category should be split.
- // Category 5 instructions have a result type identical to the 1st source operand
- // type whenever the 2nd source operand is an operand of type 'n'.
- // If the destination is memory, metadata still needs to be checked; if
- // not, no metadata check is needed, so it becomes category 1.
- // Category 6 instructions always have a result type of 'p' (pointer).
- // Category 7 instructions are category 2 instructions with two destinations,
- // such as multiply and divide instructions that affect EDX:EAX. There are
- // forms of these instructions that only have one destination, so they have
- // to be distinguished via the operand info.
- // Category 8 instructions implicitly write a numeric value to EDX:EAX, but
- // EDX and EAX are not listed as operands. RDTSC, RDPMC, RDMSR, and other
- // instructions that copy machine registers into EDX:EAX are category 8.
- // Category 9 instructions are floating point instructions that either
- // have a memory destination (treat as category 0) or a FP reg destination
- // (treat as category 1).
- // Category 10 instructions are the same as category 8, but also write
- // to register ECX in addition to EDX:EAX.
-
- // NOTE: The Memory Monitor SDT needs just three categories, corresponding
- // to categories 0, 1, and all others. For all categories > 1, the
- // annotation should tell the SDT exactly how to update its metadata.
- // For example, a division instruction will write type 'n' (NUM) as
- // the metadata for result registers EDX:EAX. So, the annotation should
- // list 'n', EDX, EAX, and a terminator of ZZ. CWD (convert word to
- // doubleword) should have a list of 'n', EAX, ZZ.
-
-OptCategory[NN_null] = 0; // Unknown Operation
-OptCategory[NN_aaa] = 2; // ASCII Adjust after Addition
-OptCategory[NN_aad] = 2; // ASCII Adjust AX before Division
-OptCategory[NN_aam] = 2; // ASCII Adjust AX after Multiply
-OptCategory[NN_aas] = 2; // ASCII Adjust AL after Subtraction
-OptCategory[NN_adc] = 5; // Add with Carry
-OptCategory[NN_add] = 5; // Add
-OptCategory[NN_and] = 0; // Logical AND
-OptCategory[NN_arpl] = 1; // Adjust RPL Field of Selector
-OptCategory[NN_bound] = 1; // Check Array Index Against Bounds
-OptCategory[NN_bsf] = 2; // Bit Scan Forward
-OptCategory[NN_bsr] = 2; // Bit Scan Reverse
-OptCategory[NN_bt] = 0; // Bit Test
-OptCategory[NN_btc] = 0; // Bit Test and Complement
-OptCategory[NN_btr] = 0; // Bit Test and Reset
-OptCategory[NN_bts] = 0; // Bit Test and Set
-OptCategory[NN_call] = 1; // Call Procedure
-OptCategory[NN_callfi] = 1; // Indirect Call Far Procedure
-OptCategory[NN_callni] = 1; // Indirect Call Near Procedure
-OptCategory[NN_cbw] = 2; // AL -> AX (with sign) ** No ops?
-OptCategory[NN_cwde] = 2; // AX -> EAX (with sign) **
-OptCategory[NN_cdqe] = 2; // EAX -> RAX (with sign) **
-OptCategory[NN_clc] = 1; // Clear Carry Flag
-OptCategory[NN_cld] = 1; // Clear Direction Flag
-OptCategory[NN_cli] = 1; // Clear Interrupt Flag
-OptCategory[NN_clts] = 1; // Clear Task-Switched Flag in CR0
-OptCategory[NN_cmc] = 1; // Complement Carry Flag
-OptCategory[NN_cmp] = 1; // Compare Two Operands
-OptCategory[NN_cmps] = 1; // Compare Strings
-OptCategory[NN_cwd] = 2; // AX -> DX:AX (with sign)
-OptCategory[NN_cdq] = 2; // EAX -> EDX:EAX (with sign)
-OptCategory[NN_cqo] = 2; // RAX -> RDX:RAX (with sign)
-OptCategory[NN_daa] = 2; // Decimal Adjust AL after Addition
-OptCategory[NN_das] = 2; // Decimal Adjust AL after Subtraction
-OptCategory[NN_dec] = 4; // Decrement by 1
-OptCategory[NN_div] = 7; // Unsigned Divide
-OptCategory[NN_enterw] = 0; // Make Stack Frame for Procedure Parameters **
-OptCategory[NN_enter] = 0; // Make Stack Frame for Procedure Parameters **
-OptCategory[NN_enterd] = 0; // Make Stack Frame for Procedure Parameters **
-OptCategory[NN_enterq] = 0; // Make Stack Frame for Procedure Parameters **
-OptCategory[NN_hlt] = 0; // Halt
-OptCategory[NN_idiv] = 7; // Signed Divide
-OptCategory[NN_imul] = 7; // Signed Multiply
-OptCategory[NN_in] = 0; // Input from Port **
-OptCategory[NN_inc] = 4; // Increment by 1
-OptCategory[NN_ins] = 2; // Input Byte(s) from Port to String **
-OptCategory[NN_int] = 0; // Call to Interrupt Procedure
-OptCategory[NN_into] = 0; // Call to Interrupt Procedure if Overflow Flag = 1
-OptCategory[NN_int3] = 0; // Trap to Debugger
-OptCategory[NN_iretw] = 0; // Interrupt Return
-OptCategory[NN_iret] = 0; // Interrupt Return
-OptCategory[NN_iretd] = 0; // Interrupt Return (use32)
-OptCategory[NN_iretq] = 0; // Interrupt Return (use64)
-OptCategory[NN_ja] = 1; // Jump if Above (CF=0 & ZF=0)
-OptCategory[NN_jae] = 1; // Jump if Above or Equal (CF=0)
-OptCategory[NN_jb] = 1; // Jump if Below (CF=1)
-OptCategory[NN_jbe] = 1; // Jump if Below or Equal (CF=1 | ZF=1)
-OptCategory[NN_jc] = 1; // Jump if Carry (CF=1)
-OptCategory[NN_jcxz] = 1; // Jump if CX is 0
-OptCategory[NN_jecxz] = 1; // Jump if ECX is 0
-OptCategory[NN_jrcxz] = 1; // Jump if RCX is 0
-OptCategory[NN_je] = 1; // Jump if Equal (ZF=1)
-OptCategory[NN_jg] = 1; // Jump if Greater (ZF=0 & SF=OF)
-OptCategory[NN_jge] = 1; // Jump if Greater or Equal (SF=OF)
-OptCategory[NN_jl] = 1; // Jump if Less (SF!=OF)
-OptCategory[NN_jle] = 1; // Jump if Less or Equal (ZF=1 | SF!=OF)
-OptCategory[NN_jna] = 1; // Jump if Not Above (CF=1 | ZF=1)
-OptCategory[NN_jnae] = 1; // Jump if Not Above or Equal (CF=1)
-OptCategory[NN_jnb] = 1; // Jump if Not Below (CF=0)
-OptCategory[NN_jnbe] = 1; // Jump if Not Below or Equal (CF=0 & ZF=0)
-OptCategory[NN_jnc] = 1; // Jump if Not Carry (CF=0)
-OptCategory[NN_jne] = 1; // Jump if Not Equal (ZF=0)
-OptCategory[NN_jng] = 1; // Jump if Not Greater (ZF=1 | SF!=OF)
-OptCategory[NN_jnge] = 1; // Jump if Not Greater or Equal (SF!=OF)
-OptCategory[NN_jnl] = 1; // Jump if Not Less (SF=OF)
-OptCategory[NN_jnle] = 1; // Jump if Not Less or Equal (ZF=0 & SF=OF)
-OptCategory[NN_jno] = 1; // Jump if Not Overflow (OF=0)
-OptCategory[NN_jnp] = 1; // Jump if Not Parity (PF=0)
-OptCategory[NN_jns] = 1; // Jump if Not Sign (SF=0)
-OptCategory[NN_jnz] = 1; // Jump if Not Zero (ZF=0)
-OptCategory[NN_jo] = 1; // Jump if Overflow (OF=1)
-OptCategory[NN_jp] = 1; // Jump if Parity (PF=1)
-OptCategory[NN_jpe] = 1; // Jump if Parity Even (PF=1)
-OptCategory[NN_jpo] = 1; // Jump if Parity Odd (PF=0)
-OptCategory[NN_js] = 1; // Jump if Sign (SF=1)
-OptCategory[NN_jz] = 1; // Jump if Zero (ZF=1)
-OptCategory[NN_jmp] = 1; // Jump
-OptCategory[NN_jmpfi] = 1; // Indirect Far Jump
-OptCategory[NN_jmpni] = 1; // Indirect Near Jump
-OptCategory[NN_jmpshort] = 1; // Jump Short (not used)
-OptCategory[NN_lahf] = 2; // Load Flags into AH Register
-OptCategory[NN_lar] = 2; // Load Access Rights Byte
-OptCategory[NN_lea] = 0; // Load Effective Address **
-OptCategory[NN_leavew] = 0; // High Level Procedure Exit **
-OptCategory[NN_leave] = 0; // High Level Procedure Exit **
-OptCategory[NN_leaved] = 0; // High Level Procedure Exit **
-OptCategory[NN_leaveq] = 0; // High Level Procedure Exit **
-OptCategory[NN_lgdt] = 0; // Load Global Descriptor Table Register
-OptCategory[NN_lidt] = 0; // Load Interrupt Descriptor Table Register
-OptCategory[NN_lgs] = 6; // Load Full Pointer to GS:xx
-OptCategory[NN_lss] = 6; // Load Full Pointer to SS:xx
-OptCategory[NN_lds] = 6; // Load Full Pointer to DS:xx
-OptCategory[NN_les] = 6; // Load Full Pointer to ES:xx
-OptCategory[NN_lfs] = 6; // Load Full Pointer to FS:xx
-OptCategory[NN_lldt] = 0; // Load Local Descriptor Table Register
-OptCategory[NN_lmsw] = 1; // Load Machine Status Word
-OptCategory[NN_lock] = 1; // Assert LOCK# Signal Prefix
-OptCategory[NN_lods] = 0; // Load String
-OptCategory[NN_loopw] = 1; // Loop while ECX != 0
-OptCategory[NN_loop] = 1; // Loop while CX != 0
-OptCategory[NN_loopd] = 1; // Loop while ECX != 0
-OptCategory[NN_loopq] = 1; // Loop while RCX != 0
-OptCategory[NN_loopwe] = 1; // Loop while CX != 0 and ZF=1
-OptCategory[NN_loope] = 1; // Loop while rCX != 0 and ZF=1
-OptCategory[NN_loopde] = 1; // Loop while ECX != 0 and ZF=1
-OptCategory[NN_loopqe] = 1; // Loop while RCX != 0 and ZF=1
-OptCategory[NN_loopwne] = 1; // Loop while CX != 0 and ZF=0
-OptCategory[NN_loopne] = 1; // Loop while rCX != 0 and ZF=0
-OptCategory[NN_loopdne] = 1; // Loop while ECX != 0 and ZF=0
-OptCategory[NN_loopqne] = 1; // Loop while RCX != 0 and ZF=0
-OptCategory[NN_lsl] = 6; // Load Segment Limit
-OptCategory[NN_ltr] = 1; // Load Task Register
-OptCategory[NN_mov] = 3; // Move Data
-OptCategory[NN_movsp] = 3; // Move to/from Special Registers
-OptCategory[NN_movs] = 0; // Move Byte(s) from String to String
-OptCategory[NN_movsx] = 3; // Move with Sign-Extend
-OptCategory[NN_movzx] = 3; // Move with Zero-Extend
-OptCategory[NN_mul] = 7; // Unsigned Multiplication of AL or AX
-OptCategory[NN_neg] = 2; // Two's Complement Negation !!!!****!!!! Change this when mmStrata handles NEGATEDPTR type.
-OptCategory[NN_nop] = 1; // No Operation
-OptCategory[NN_not] = 2; // One's Complement Negation
-OptCategory[NN_or] = 0; // Logical Inclusive OR
-OptCategory[NN_out] = 0; // Output to Port
-OptCategory[NN_outs] = 0; // Output Byte(s) to Port
-OptCategory[NN_pop] = 0; // Pop a word from the Stack
-OptCategory[NN_popaw] = 0; // Pop all General Registers
-OptCategory[NN_popa] = 0; // Pop all General Registers
-OptCategory[NN_popad] = 0; // Pop all General Registers (use32)
-OptCategory[NN_popaq] = 0; // Pop all General Registers (use64)
-OptCategory[NN_popfw] = 1; // Pop Stack into Flags Register **
-OptCategory[NN_popf] = 1; // Pop Stack into Flags Register **
-OptCategory[NN_popfd] = 1; // Pop Stack into Eflags Register **
-OptCategory[NN_popfq] = 1; // Pop Stack into Rflags Register **
-OptCategory[NN_push] = 0; // Push Operand onto the Stack
-OptCategory[NN_pushaw] = 0; // Push all General Registers
-OptCategory[NN_pusha] = 0; // Push all General Registers
-OptCategory[NN_pushad] = 0; // Push all General Registers (use32)
-OptCategory[NN_pushaq] = 0; // Push all General Registers (use64)
-OptCategory[NN_pushfw] = 0; // Push Flags Register onto the Stack
-OptCategory[NN_pushf] = 0; // Push Flags Register onto the Stack
-OptCategory[NN_pushfd] = 0; // Push Flags Register onto the Stack (use32)
-OptCategory[NN_pushfq] = 0; // Push Flags Register onto the Stack (use64)
-OptCategory[NN_rcl] = 2; // Rotate Through Carry Left
-OptCategory[NN_rcr] = 2; // Rotate Through Carry Right
-OptCategory[NN_rol] = 2; // Rotate Left
-OptCategory[NN_ror] = 2; // Rotate Right
-OptCategory[NN_rep] = 0; // Repeat String Operation
-OptCategory[NN_repe] = 0; // Repeat String Operation while ZF=1
-OptCategory[NN_repne] = 0; // Repeat String Operation while ZF=0
-OptCategory[NN_retn] = 0; // Return Near from Procedure
-OptCategory[NN_retf] = 0; // Return Far from Procedure
-OptCategory[NN_sahf] = 1; // Store AH into Flags Register
-OptCategory[NN_sal] = 2; // Shift Arithmetic Left
-OptCategory[NN_sar] = 2; // Shift Arithmetic Right
-OptCategory[NN_shl] = 2; // Shift Logical Left
-OptCategory[NN_shr] = 2; // Shift Logical Right
-OptCategory[NN_sbb] = 5; // Integer Subtraction with Borrow
-OptCategory[NN_scas] = 1; // Compare String
-OptCategory[NN_seta] = 2; // Set Byte if Above (CF=0 & ZF=0)
-OptCategory[NN_setae] = 2; // Set Byte if Above or Equal (CF=0)
-OptCategory[NN_setb] = 2; // Set Byte if Below (CF=1)
-OptCategory[NN_setbe] = 2; // Set Byte if Below or Equal (CF=1 | ZF=1)
-OptCategory[NN_setc] = 2; // Set Byte if Carry (CF=1)
-OptCategory[NN_sete] = 2; // Set Byte if Equal (ZF=1)
-OptCategory[NN_setg] = 2; // Set Byte if Greater (ZF=0 & SF=OF)
-OptCategory[NN_setge] = 2; // Set Byte if Greater or Equal (SF=OF)
-OptCategory[NN_setl] = 2; // Set Byte if Less (SF!=OF)
-OptCategory[NN_setle] = 2; // Set Byte if Less or Equal (ZF=1 | SF!=OF)
-OptCategory[NN_setna] = 2; // Set Byte if Not Above (CF=1 | ZF=1)
-OptCategory[NN_setnae] = 2; // Set Byte if Not Above or Equal (CF=1)
-OptCategory[NN_setnb] = 2; // Set Byte if Not Below (CF=0)
-OptCategory[NN_setnbe] = 2; // Set Byte if Not Below or Equal (CF=0 & ZF=0)
-OptCategory[NN_setnc] = 2; // Set Byte if Not Carry (CF=0)
-OptCategory[NN_setne] = 2; // Set Byte if Not Equal (ZF=0)
-OptCategory[NN_setng] = 2; // Set Byte if Not Greater (ZF=1 | SF!=OF)
-OptCategory[NN_setnge] = 2; // Set Byte if Not Greater or Equal (SF!=OF)
-OptCategory[NN_setnl] = 2; // Set Byte if Not Less (SF=OF)
-OptCategory[NN_setnle] = 2; // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
-OptCategory[NN_setno] = 2; // Set Byte if Not Overflow (OF=0)
-OptCategory[NN_setnp] = 2; // Set Byte if Not Parity (PF=0)
-OptCategory[NN_setns] = 2; // Set Byte if Not Sign (SF=0)
-OptCategory[NN_setnz] = 2; // Set Byte if Not Zero (ZF=0)
-OptCategory[NN_seto] = 2; // Set Byte if Overflow (OF=1)
-OptCategory[NN_setp] = 2; // Set Byte if Parity (PF=1)
-OptCategory[NN_setpe] = 2; // Set Byte if Parity Even (PF=1)
-OptCategory[NN_setpo] = 2; // Set Byte if Parity Odd (PF=0)
-OptCategory[NN_sets] = 2; // Set Byte if Sign (SF=1)
-OptCategory[NN_setz] = 2; // Set Byte if Zero (ZF=1)
-OptCategory[NN_sgdt] = 0; // Store Global Descriptor Table Register
-OptCategory[NN_sidt] = 0; // Store Interrupt Descriptor Table Register
-OptCategory[NN_shld] = 2; // Double Precision Shift Left
-OptCategory[NN_shrd] = 2; // Double Precision Shift Right
-OptCategory[NN_sldt] = 6; // Store Local Descriptor Table Register
-OptCategory[NN_smsw] = 2; // Store Machine Status Word
-OptCategory[NN_stc] = 1; // Set Carry Flag
-OptCategory[NN_std] = 1; // Set Direction Flag
-OptCategory[NN_sti] = 1; // Set Interrupt Flag
-OptCategory[NN_stos] = 0; // Store String
-OptCategory[NN_str] = 6; // Store Task Register
-OptCategory[NN_sub] = 5; // Integer Subtraction
-OptCategory[NN_test] = 1; // Logical Compare
-OptCategory[NN_verr] = 1; // Verify a Segment for Reading
-OptCategory[NN_verw] = 1; // Verify a Segment for Writing
-OptCategory[NN_wait] = 1; // Wait until BUSY# Pin is Inactive (HIGH)
-OptCategory[NN_xchg] = 0; // Exchange Register/Memory with Register
-OptCategory[NN_xlat] = 0; // Table Lookup Translation
-OptCategory[NN_xor] = 2; // Logical Exclusive OR
-
-//
-// 486 instructions
-//
-
-OptCategory[NN_cmpxchg] = 0; // Compare and Exchange
-OptCategory[NN_bswap] = 2; // Swap bytes in register
-OptCategory[NN_xadd] = 0; // t<-dest; dest<-src+dest; src<-t
-OptCategory[NN_invd] = 1; // Invalidate Data Cache
-OptCategory[NN_wbinvd] = 1; // Invalidate Data Cache (write changes)
-OptCategory[NN_invlpg] = 1; // Invalidate TLB entry
-
-//
-// Pentium instructions
-//
-
-OptCategory[NN_rdmsr] = 8; // Read Machine Status Register
-OptCategory[NN_wrmsr] = 1; // Write Machine Status Register
-OptCategory[NN_cpuid] = 8; // Get CPU ID
-OptCategory[NN_cmpxchg8b] = 0; // Compare and Exchange Eight Bytes
-OptCategory[NN_rdtsc] = 8; // Read Time Stamp Counter
-OptCategory[NN_rsm] = 1; // Resume from System Management Mode
-
-//
-// Pentium Pro instructions
-//
-
-OptCategory[NN_cmova] = 0; // Move if Above (CF=0 & ZF=0)
-OptCategory[NN_cmovb] = 0; // Move if Below (CF=1)
-OptCategory[NN_cmovbe] = 0; // Move if Below or Equal (CF=1 | ZF=1)
-OptCategory[NN_cmovg] = 0; // Move if Greater (ZF=0 & SF=OF)
-OptCategory[NN_cmovge] = 0; // Move if Greater or Equal (SF=OF)
-OptCategory[NN_cmovl] = 0; // Move if Less (SF!=OF)
-OptCategory[NN_cmovle] = 0; // Move if Less or Equal (ZF=1 | SF!=OF)
-OptCategory[NN_cmovnb] = 0; // Move if Not Below (CF=0)
-OptCategory[NN_cmovno] = 0; // Move if Not Overflow (OF=0)
-OptCategory[NN_cmovnp] = 0; // Move if Not Parity (PF=0)
-OptCategory[NN_cmovns] = 0; // Move if Not Sign (SF=0)
-OptCategory[NN_cmovnz] = 0; // Move if Not Zero (ZF=0)
-OptCategory[NN_cmovo] = 0; // Move if Overflow (OF=1)
-OptCategory[NN_cmovp] = 0; // Move if Parity (PF=1)
-OptCategory[NN_cmovs] = 0; // Move if Sign (SF=1)
-OptCategory[NN_cmovz] = 0; // Move if Zero (ZF=1)
-OptCategory[NN_fcmovb] = 1; // Floating Move if Below
-OptCategory[NN_fcmove] = 1; // Floating Move if Equal
-OptCategory[NN_fcmovbe] = 1; // Floating Move if Below or Equal
-OptCategory[NN_fcmovu] = 1; // Floating Move if Unordered
-OptCategory[NN_fcmovnb] = 1; // Floating Move if Not Below
-OptCategory[NN_fcmovne] = 1; // Floating Move if Not Equal
-OptCategory[NN_fcmovnbe] = 1; // Floating Move if Not Below or Equal
-OptCategory[NN_fcmovnu] = 1; // Floating Move if Not Unordered
-OptCategory[NN_fcomi] = 1; // FP Compare, result in EFLAGS
-OptCategory[NN_fucomi] = 1; // FP Unordered Compare, result in EFLAGS
-OptCategory[NN_fcomip] = 1; // FP Compare, result in EFLAGS, pop stack
-OptCategory[NN_fucomip] = 1; // FP Unordered Compare, result in EFLAGS, pop stack
-OptCategory[NN_rdpmc] = 8; // Read Performance Monitor Counter
-
-//
-// FPP instructions
-//
-
-OptCategory[NN_fld] = 1; // Load Real ** Infer src is 'n'
-OptCategory[NN_fst] = 9; // Store Real
-OptCategory[NN_fstp] = 9; // Store Real and Pop
-OptCategory[NN_fxch] = 1; // Exchange Registers
-OptCategory[NN_fild] = 1; // Load Integer ** Infer src is 'n'
-OptCategory[NN_fist] = 0; // Store Integer
-OptCategory[NN_fistp] = 0; // Store Integer and Pop
-OptCategory[NN_fbld] = 1; // Load BCD
-OptCategory[NN_fbstp] = 0; // Store BCD and Pop
-OptCategory[NN_fadd] = 1; // Add Real
-OptCategory[NN_faddp] = 1; // Add Real and Pop
-OptCategory[NN_fiadd] = 1; // Add Integer
-OptCategory[NN_fsub] = 1; // Subtract Real
-OptCategory[NN_fsubp] = 1; // Subtract Real and Pop
-OptCategory[NN_fisub] = 1; // Subtract Integer
-OptCategory[NN_fsubr] = 1; // Subtract Real Reversed
-OptCategory[NN_fsubrp] = 1; // Subtract Real Reversed and Pop
-OptCategory[NN_fisubr] = 1; // Subtract Integer Reversed
-OptCategory[NN_fmul] = 1; // Multiply Real
-OptCategory[NN_fmulp] = 1; // Multiply Real and Pop
-OptCategory[NN_fimul] = 1; // Multiply Integer
-OptCategory[NN_fdiv] = 1; // Divide Real
-OptCategory[NN_fdivp] = 1; // Divide Real and Pop
-OptCategory[NN_fidiv] = 1; // Divide Integer
-OptCategory[NN_fdivr] = 1; // Divide Real Reversed
-OptCategory[NN_fdivrp] = 1; // Divide Real Reversed and Pop
-OptCategory[NN_fidivr] = 1; // Divide Integer Reversed
-OptCategory[NN_fsqrt] = 1; // Square Root
-OptCategory[NN_fscale] = 1; // Scale: st(0) <- st(0) * 2^st(1)
-OptCategory[NN_fprem] = 1; // Partial Remainder
-OptCategory[NN_frndint] = 1; // Round to Integer
-OptCategory[NN_fxtract] = 1; // Extract exponent and significand
-OptCategory[NN_fabs] = 1; // Absolute value
-OptCategory[NN_fchs] = 1; // Change Sign
-OptCategory[NN_fcom] = 1; // Compare Real
-OptCategory[NN_fcomp] = 1; // Compare Real and Pop
-OptCategory[NN_fcompp] = 1; // Compare Real and Pop Twice
-OptCategory[NN_ficom] = 1; // Compare Integer
-OptCategory[NN_ficomp] = 1; // Compare Integer and Pop
-OptCategory[NN_ftst] = 1; // Test
-OptCategory[NN_fxam] = 1; // Examine
-OptCategory[NN_fptan] = 1; // Partial tangent
-OptCategory[NN_fpatan] = 1; // Partial arctangent
-OptCategory[NN_f2xm1] = 1; // 2^x - 1
-OptCategory[NN_fyl2x] = 1; // Y * lg2(X)
-OptCategory[NN_fyl2xp1] = 1; // Y * lg2(X+1)
-OptCategory[NN_fldz] = 1; // Load +0.0
-OptCategory[NN_fld1] = 1; // Load +1.0
-OptCategory[NN_fldpi] = 1; // Load PI=3.14...
-OptCategory[NN_fldl2t] = 1; // Load lg2(10)
-OptCategory[NN_fldl2e] = 1; // Load lg2(e)
-OptCategory[NN_fldlg2] = 1; // Load lg10(2)
-OptCategory[NN_fldln2] = 1; // Load ln(2)
-OptCategory[NN_finit] = 1; // Initialize Processor
-OptCategory[NN_fninit] = 1; // Initialize Processor (no wait)
-OptCategory[NN_fsetpm] = 1; // Set Protected Mode
-OptCategory[NN_fldcw] = 1; // Load Control Word
-OptCategory[NN_fstcw] = 0; // Store Control Word
-OptCategory[NN_fnstcw] = 0; // Store Control Word (no wait)
-OptCategory[NN_fstsw] = 2; // Store Status Word to memory or AX
-OptCategory[NN_fnstsw] = 2; // Store Status Word (no wait) to memory or AX
-OptCategory[NN_fclex] = 1; // Clear Exceptions
-OptCategory[NN_fnclex] = 1; // Clear Exceptions (no wait)
-OptCategory[NN_fstenv] = 0; // Store Environment
-OptCategory[NN_fnstenv] = 0; // Store Environment (no wait)
-OptCategory[NN_fldenv] = 1; // Load Environment
-OptCategory[NN_fsave] = 0; // Save State
-OptCategory[NN_fnsave] = 0; // Save State (no wait)
-OptCategory[NN_frstor] = 1; // Restore State ** infer src is 'n'
-OptCategory[NN_fincstp] = 1; // Increment Stack Pointer
-OptCategory[NN_fdecstp] = 1; // Decrement Stack Pointer
-OptCategory[NN_ffree] = 1; // Free Register
-OptCategory[NN_fnop] = 1; // No Operation
-OptCategory[NN_feni] = 1; // (8087 only)
-OptCategory[NN_fneni] = 1; // (no wait) (8087 only)
-OptCategory[NN_fdisi] = 1; // (8087 only)
-OptCategory[NN_fndisi] = 1; // (no wait) (8087 only)
-
-//
-// 80387 instructions
-//
-
-OptCategory[NN_fprem1] = 1; // Partial Remainder ( < half )
-OptCategory[NN_fsincos] = 1; // t<-cos(st); st<-sin(st); push t
-OptCategory[NN_fsin] = 1; // Sine
-OptCategory[NN_fcos] = 1; // Cosine
-OptCategory[NN_fucom] = 1; // Compare Unordered Real
-OptCategory[NN_fucomp] = 1; // Compare Unordered Real and Pop
-OptCategory[NN_fucompp] = 1; // Compare Unordered Real and Pop Twice
-
-//
-// Instructions added 28.02.96
-//
-
-OptCategory[NN_setalc] = 2; // Set AL to Carry Flag **
-OptCategory[NN_svdc] = 0; // Save Register and Descriptor
-OptCategory[NN_rsdc] = 0; // Restore Register and Descriptor
-OptCategory[NN_svldt] = 0; // Save LDTR and Descriptor
-OptCategory[NN_rsldt] = 0; // Restore LDTR and Descriptor
-OptCategory[NN_svts] = 1; // Save TR and Descriptor
-OptCategory[NN_rsts] = 1; // Restore TR and Descriptor
-OptCategory[NN_icebp] = 1; // ICE Break Point
-OptCategory[NN_loadall] = 0; // Load the entire CPU state from ES:EDI
-
-//
-// MMX instructions
-//
-
-OptCategory[NN_emms] = 1; // Empty MMX state
-OptCategory[NN_movd] = 9; // Move 32 bits
-OptCategory[NN_movq] = 9; // Move 64 bits
-OptCategory[NN_packsswb] = 1; // Pack with Signed Saturation (Word->Byte)
-OptCategory[NN_packssdw] = 1; // Pack with Signed Saturation (Dword->Word)
-OptCategory[NN_packuswb] = 1; // Pack with Unsigned Saturation (Word->Byte)
-OptCategory[NN_paddb] = 1; // Packed Add Byte
-OptCategory[NN_paddw] = 1; // Packed Add Word
-OptCategory[NN_paddd] = 1; // Packed Add Dword
-OptCategory[NN_paddsb] = 1; // Packed Add with Saturation (Byte)
-OptCategory[NN_paddsw] = 1; // Packed Add with Saturation (Word)
-OptCategory[NN_paddusb] = 1; // Packed Add Unsigned with Saturation (Byte)
-OptCategory[NN_paddusw] = 1; // Packed Add Unsigned with Saturation (Word)
-OptCategory[NN_pand] = 1; // Bitwise Logical And
-OptCategory[NN_pandn] = 1; // Bitwise Logical And Not
-OptCategory[NN_pcmpeqb] = 1; // Packed Compare for Equal (Byte)
-OptCategory[NN_pcmpeqw] = 1; // Packed Compare for Equal (Word)
-OptCategory[NN_pcmpeqd] = 1; // Packed Compare for Equal (Dword)
-OptCategory[NN_pcmpgtb] = 1; // Packed Compare for Greater Than (Byte)
-OptCategory[NN_pcmpgtw] = 1; // Packed Compare for Greater Than (Word)
-OptCategory[NN_pcmpgtd] = 1; // Packed Compare for Greater Than (Dword)
-OptCategory[NN_pmaddwd] = 1; // Packed Multiply and Add
-OptCategory[NN_pmulhw] = 1; // Packed Multiply High
-OptCategory[NN_pmullw] = 1; // Packed Multiply Low
-OptCategory[NN_por] = 1; // Bitwise Logical Or
-OptCategory[NN_psllw] = 1; // Packed Shift Left Logical (Word)
-OptCategory[NN_pslld] = 1; // Packed Shift Left Logical (Dword)
-OptCategory[NN_psllq] = 1; // Packed Shift Left Logical (Qword)
-OptCategory[NN_psraw] = 1; // Packed Shift Right Arithmetic (Word)
-OptCategory[NN_psrad] = 1; // Packed Shift Right Arithmetic (Dword)
-OptCategory[NN_psrlw] = 1; // Packed Shift Right Logical (Word)
-OptCategory[NN_psrld] = 1; // Packed Shift Right Logical (Dword)
-OptCategory[NN_psrlq] = 1; // Packed Shift Right Logical (Qword)
-OptCategory[NN_psubb] = 1; // Packed Subtract Byte
-OptCategory[NN_psubw] = 1; // Packed Subtract Word
-OptCategory[NN_psubd] = 1; // Packed Subtract Dword
-OptCategory[NN_psubsb] = 1; // Packed Subtract with Saturation (Byte)
-OptCategory[NN_psubsw] = 1; // Packed Subtract with Saturation (Word)
-OptCategory[NN_psubusb] = 1; // Packed Subtract Unsigned with Saturation (Byte)
-OptCategory[NN_psubusw] = 1; // Packed Subtract Unsigned with Saturation (Word)
-OptCategory[NN_punpckhbw] = 1; // Unpack High Packed Data (Byte->Word)
-OptCategory[NN_punpckhwd] = 1; // Unpack High Packed Data (Word->Dword)
-OptCategory[NN_punpckhdq] = 1; // Unpack High Packed Data (Dword->Qword)
-OptCategory[NN_punpcklbw] = 1; // Unpack Low Packed Data (Byte->Word)
-OptCategory[NN_punpcklwd] = 1; // Unpack Low Packed Data (Word->Dword)
-OptCategory[NN_punpckldq] = 1; // Unpack Low Packed Data (Dword->Qword)
-OptCategory[NN_pxor] = 1; // Bitwise Logical Exclusive Or
-
-//
-// Undocumented Deschutes processor instructions
-//
-
-OptCategory[NN_fxsave] = 1; // Fast save FP context ** to where?
-OptCategory[NN_fxrstor] = 1; // Fast restore FP context ** from where?
-
-// Pentium II instructions
-
-OptCategory[NN_sysenter] = 1; // Fast Transition to System Call Entry Point
-OptCategory[NN_sysexit] = 1; // Fast Transition from System Call Entry Point
-
-// 3DNow! instructions
-
-OptCategory[NN_pavgusb] = 1; // Packed 8-bit Unsigned Integer Averaging
-OptCategory[NN_pfadd] = 1; // Packed Floating-Point Addition
-OptCategory[NN_pfsub] = 1; // Packed Floating-Point Subtraction
-OptCategory[NN_pfsubr] = 1; // Packed Floating-Point Reverse Subtraction
-OptCategory[NN_pfacc] = 1; // Packed Floating-Point Accumulate
-OptCategory[NN_pfcmpge] = 1; // Packed Floating-Point Comparison, Greater or Equal
-OptCategory[NN_pfcmpgt] = 1; // Packed Floating-Point Comparison, Greater
-OptCategory[NN_pfcmpeq] = 1; // Packed Floating-Point Comparison, Equal
-OptCategory[NN_pfmin] = 1; // Packed Floating-Point Minimum
-OptCategory[NN_pfmax] = 1; // Packed Floating-Point Maximum
-OptCategory[NN_pi2fd] = 1; // Packed 32-bit Integer to Floating-Point
-OptCategory[NN_pf2id] = 1; // Packed Floating-Point to 32-bit Integer
-OptCategory[NN_pfrcp] = 1; // Packed Floating-Point Reciprocal Approximation
-OptCategory[NN_pfrsqrt] = 1; // Packed Floating-Point Reciprocal Square Root Approximation
-OptCategory[NN_pfmul] = 1; // Packed Floating-Point Multiplication
-OptCategory[NN_pfrcpit1] = 1; // Packed Floating-Point Reciprocal First Iteration Step
-OptCategory[NN_pfrsqit1] = 1; // Packed Floating-Point Reciprocal Square Root First Iteration Step
-OptCategory[NN_pfrcpit2] = 1; // Packed Floating-Point Reciprocal Second Iteration Step
-OptCategory[NN_pmulhrw] = 1; // Packed Floating-Point 16-bit Integer Multiply with rounding
-OptCategory[NN_femms] = 1; // Faster entry/exit of the MMX or floating-point state
-OptCategory[NN_prefetch] = 1; // Prefetch at least a 32-byte line into L1 data cache
-OptCategory[NN_prefetchw] = 1; // Prefetch processor cache line into L1 data cache (mark as modified)
-
-
-// Pentium III instructions
-
-OptCategory[NN_addps] = 1; // Packed Single-FP Add
-OptCategory[NN_addss] = 1; // Scalar Single-FP Add
-OptCategory[NN_andnps] = 1; // Bitwise Logical And Not for Single-FP
-OptCategory[NN_andps] = 1; // Bitwise Logical And for Single-FP
-OptCategory[NN_cmpps] = 1; // Packed Single-FP Compare
-OptCategory[NN_cmpss] = 1; // Scalar Single-FP Compare
-OptCategory[NN_comiss] = 1; // Scalar Ordered Single-FP Compare and Set EFLAGS
-OptCategory[NN_cvtpi2ps] = 1; // Packed signed INT32 to Packed Single-FP conversion
-OptCategory[NN_cvtps2pi] = 1; // Packed Single-FP to Packed INT32 conversion
-OptCategory[NN_cvtsi2ss] = 1; // Scalar signed INT32 to Single-FP conversion
-OptCategory[NN_cvtss2si] = 2; // Scalar Single-FP to signed INT32 conversion
-OptCategory[NN_cvttps2pi] = 1; // Packed Single-FP to Packed INT32 conversion (truncate)
-OptCategory[NN_cvttss2si] = 2; // Scalar Single-FP to signed INT32 conversion (truncate)
-OptCategory[NN_divps] = 1; // Packed Single-FP Divide
-OptCategory[NN_divss] = 1; // Scalar Single-FP Divide
-OptCategory[NN_ldmxcsr] = 1; // Load Streaming SIMD Extensions Technology Control/Status Register
-OptCategory[NN_maxps] = 1; // Packed Single-FP Maximum
-OptCategory[NN_maxss] = 1; // Scalar Single-FP Maximum
-OptCategory[NN_minps] = 1; // Packed Single-FP Minimum
-OptCategory[NN_minss] = 1; // Scalar Single-FP Minimum
-OptCategory[NN_movaps] = 9; // Move Aligned Four Packed Single-FP ** infer memsrc 'n'?
-OptCategory[NN_movhlps] = 1; // Move High to Low Packed Single-FP
-OptCategory[NN_movhps] = 1; // Move High Packed Single-FP
-OptCategory[NN_movlhps] = 1; // Move Low to High Packed Single-FP
-OptCategory[NN_movlps] = 1; // Move Low Packed Single-FP
-OptCategory[NN_movmskps] = 1; // Move Mask to Register
-OptCategory[NN_movss] = 9; // Move Scalar Single-FP
-OptCategory[NN_movups] = 9; // Move Unaligned Four Packed Single-FP
-OptCategory[NN_mulps] = 1; // Packed Single-FP Multiply
-OptCategory[NN_mulss] = 1; // Scalar Single-FP Multiply
-OptCategory[NN_orps] = 1; // Bitwise Logical OR for Single-FP Data
-OptCategory[NN_rcpps] = 1; // Packed Single-FP Reciprocal
-OptCategory[NN_rcpss] = 1; // Scalar Single-FP Reciprocal
-OptCategory[NN_rsqrtps] = 1; // Packed Single-FP Square Root Reciprocal
-OptCategory[NN_rsqrtss] = 1; // Scalar Single-FP Square Root Reciprocal
-OptCategory[NN_shufps] = 1; // Shuffle Single-FP
-OptCategory[NN_sqrtps] = 1; // Packed Single-FP Square Root
-OptCategory[NN_sqrtss] = 1; // Scalar Single-FP Square Root
-OptCategory[NN_stmxcsr] = 0; // Store Streaming SIMD Extensions Technology Control/Status Register ** Infer dest is 'n'
-OptCategory[NN_subps] = 1; // Packed Single-FP Subtract
-OptCategory[NN_subss] = 1; // Scalar Single-FP Subtract
-OptCategory[NN_ucomiss] = 1; // Scalar Unordered Single-FP Compare and Set EFLAGS
-OptCategory[NN_unpckhps] = 1; // Unpack High Packed Single-FP Data
-OptCategory[NN_unpcklps] = 1; // Unpack Low Packed Single-FP Data
-OptCategory[NN_xorps] = 1; // Bitwise Logical XOR for Single-FP Data
-OptCategory[NN_pavgb] = 1; // Packed Average (Byte)
-OptCategory[NN_pavgw] = 1; // Packed Average (Word)
-OptCategory[NN_pextrw] = 2; // Extract Word
-OptCategory[NN_pinsrw] = 1; // Insert Word
-OptCategory[NN_pmaxsw] = 1; // Packed Signed Integer Word Maximum
-OptCategory[NN_pmaxub] = 1; // Packed Unsigned Integer Byte Maximum
-OptCategory[NN_pminsw] = 1; // Packed Signed Integer Word Minimum
-OptCategory[NN_pminub] = 1; // Packed Unsigned Integer Byte Minimum
-OptCategory[NN_pmovmskb] = 1; // Move Byte Mask to Integer
-OptCategory[NN_pmulhuw] = 1; // Packed Multiply High Unsigned
-OptCategory[NN_psadbw] = 1; // Packed Sum of Absolute Differences
-OptCategory[NN_pshufw] = 1; // Packed Shuffle Word
-OptCategory[NN_maskmovq] = 0; // Byte Mask write ** Infer dest is 'n'
-OptCategory[NN_movntps] = 0; // Move Aligned Four Packed Single-FP Non Temporal * infer dest is 'n'
-OptCategory[NN_movntq] = 0; // Move 64 Bits Non Temporal ** Infer dest is 'n'
-OptCategory[NN_prefetcht0] = 1; // Prefetch to all cache levels
-OptCategory[NN_prefetcht1] = 1; // Prefetch to all cache levels
-OptCategory[NN_prefetcht2] = 1; // Prefetch to L2 cache
-OptCategory[NN_prefetchnta] = 1; // Prefetch to L1 cache
-OptCategory[NN_sfence] = 1; // Store Fence
-
-// Pentium III Pseudo instructions
-
-OptCategory[NN_cmpeqps] = 1; // Packed Single-FP Compare EQ
-OptCategory[NN_cmpltps] = 1; // Packed Single-FP Compare LT
-OptCategory[NN_cmpleps] = 1; // Packed Single-FP Compare LE
-OptCategory[NN_cmpunordps] = 1; // Packed Single-FP Compare UNORD
-OptCategory[NN_cmpneqps] = 1; // Packed Single-FP Compare NOT EQ
-OptCategory[NN_cmpnltps] = 1; // Packed Single-FP Compare NOT LT
-OptCategory[NN_cmpnleps] = 1; // Packed Single-FP Compare NOT LE
-OptCategory[NN_cmpordps] = 1; // Packed Single-FP Compare ORDERED
-OptCategory[NN_cmpeqss] = 1; // Scalar Single-FP Compare EQ
-OptCategory[NN_cmpltss] = 1; // Scalar Single-FP Compare LT
-OptCategory[NN_cmpless] = 1; // Scalar Single-FP Compare LE
-OptCategory[NN_cmpunordss] = 1; // Scalar Single-FP Compare UNORD
-OptCategory[NN_cmpneqss] = 1; // Scalar Single-FP Compare NOT EQ
-OptCategory[NN_cmpnltss] = 1; // Scalar Single-FP Compare NOT LT
-OptCategory[NN_cmpnless] = 1; // Scalar Single-FP Compare NOT LE
-OptCategory[NN_cmpordss] = 1; // Scalar Single-FP Compare ORDERED
-
-// AMD K7 instructions
-
-// Revisit AMD if we port to it.
-OptCategory[NN_pf2iw] = 0; // Packed Floating-Point to Integer with Sign Extend
-OptCategory[NN_pfnacc] = 0; // Packed Floating-Point Negative Accumulate
-OptCategory[NN_pfpnacc] = 0; // Packed Floating-Point Mixed Positive-Negative Accumulate
-OptCategory[NN_pi2fw] = 0; // Packed 16-bit Integer to Floating-Point
-OptCategory[NN_pswapd] = 0; // Packed Swap Double Word
-
-// Undocumented FP instructions (thanks to norbert.juffa@adm.com)
-
-OptCategory[NN_fstp1] = 9; // Alias of Store Real and Pop
-OptCategory[NN_fcom2] = 1; // Alias of Compare Real
-OptCategory[NN_fcomp3] = 1; // Alias of Compare Real and Pop
-OptCategory[NN_fxch4] = 1; // Alias of Exchange Registers
-OptCategory[NN_fcomp5] = 1; // Alias of Compare Real and Pop
-OptCategory[NN_ffreep] = 1; // Free Register and Pop
-OptCategory[NN_fxch7] = 1; // Alias of Exchange Registers
-OptCategory[NN_fstp8] = 9; // Alias of Store Real and Pop
-OptCategory[NN_fstp9] = 9; // Alias of Store Real and Pop
-
-// Pentium 4 instructions
-
-OptCategory[NN_addpd] = 1; // Add Packed Double-Precision Floating-Point Values
-OptCategory[NN_addsd] = 1; // Add Scalar Double-Precision Floating-Point Values
-OptCategory[NN_andnpd] = 1; // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
-OptCategory[NN_andpd] = 1; // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
-OptCategory[NN_clflush] = 1; // Flush Cache Line
-OptCategory[NN_cmppd] = 1; // Compare Packed Double-Precision Floating-Point Values
-OptCategory[NN_cmpsd] = 1; // Compare Scalar Double-Precision Floating-Point Values
-OptCategory[NN_comisd] = 1; // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
-OptCategory[NN_cvtdq2pd] = 1; // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
-OptCategory[NN_cvtdq2ps] = 1; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
-OptCategory[NN_cvtpd2dq] = 1; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
-OptCategory[NN_cvtpd2pi] = 1; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
-OptCategory[NN_cvtpd2ps] = 1; // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
-OptCategory[NN_cvtpi2pd] = 1; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
-OptCategory[NN_cvtps2dq] = 1; // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
-OptCategory[NN_cvtps2pd] = 1; // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
-OptCategory[NN_cvtsd2si] = 2; // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
-OptCategory[NN_cvtsd2ss] = 1; // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
-OptCategory[NN_cvtsi2sd] = 1; // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
-OptCategory[NN_cvtss2sd] = 1; // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
-OptCategory[NN_cvttpd2dq] = 1; // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
-OptCategory[NN_cvttpd2pi] = 1; // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
-OptCategory[NN_cvttps2dq] = 1; // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
-OptCategory[NN_cvttsd2si] = 2; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
-OptCategory[NN_divpd] = 1; // Divide Packed Double-Precision Floating-Point Values
-OptCategory[NN_divsd] = 1; // Divide Scalar Double-Precision Floating-Point Values
-OptCategory[NN_lfence] = 1; // Load Fence
-OptCategory[NN_maskmovdqu] = 0; // Store Selected Bytes of Double Quadword ** Infer dest is 'n'
-OptCategory[NN_maxpd] = 1; // Return Maximum Packed Double-Precision Floating-Point Values
-OptCategory[NN_maxsd] = 1; // Return Maximum Scalar Double-Precision Floating-Point Value
-OptCategory[NN_mfence] = 1; // Memory Fence
-OptCategory[NN_minpd] = 1; // Return Minimum Packed Double-Precision Floating-Point Values
-OptCategory[NN_minsd] = 1; // Return Minimum Scalar Double-Precision Floating-Point Value
-OptCategory[NN_movapd] = 9; // Move Aligned Packed Double-Precision Floating-Point Values ** Infer dest is 'n'
-OptCategory[NN_movdq2q] = 1; // Move Quadword from XMM to MMX Register
-OptCategory[NN_movdqa] = 9; // Move Aligned Double Quadword ** Infer dest is 'n'
-OptCategory[NN_movdqu] = 9; // Move Unaligned Double Quadword ** Infer dest is 'n'
-OptCategory[NN_movhpd] = 9; // Move High Packed Double-Precision Floating-Point Values ** Infer dest is 'n'
-OptCategory[NN_movlpd] = 9; // Move Low Packed Double-Precision Floating-Point Values ** Infer dest is 'n'
-OptCategory[NN_movmskpd] = 2; // Extract Packed Double-Precision Floating-Point Sign Mask
-OptCategory[NN_movntdq] = 0; // Store Double Quadword Using Non-Temporal Hint
-OptCategory[NN_movnti] = 0; // Store Doubleword Using Non-Temporal Hint
-OptCategory[NN_movntpd] = 0; // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
-OptCategory[NN_movq2dq] = 1; // Move Quadword from MMX to XMM Register
-OptCategory[NN_movsd] = 9; // Move Scalar Double-Precision Floating-Point Values
-OptCategory[NN_movupd] = 9; // Move Unaligned Packed Double-Precision Floating-Point Values
-OptCategory[NN_mulpd] = 1; // Multiply Packed Double-Precision Floating-Point Values
-OptCategory[NN_mulsd] = 1; // Multiply Scalar Double-Precision Floating-Point Values
-OptCategory[NN_orpd] = 1; // Bitwise Logical OR of Double-Precision Floating-Point Values
-OptCategory[NN_paddq] = 1; // Add Packed Quadword Integers
-OptCategory[NN_pause] = 1; // Spin Loop Hint
-OptCategory[NN_pmuludq] = 1; // Multiply Packed Unsigned Doubleword Integers
-OptCategory[NN_pshufd] = 1; // Shuffle Packed Doublewords
-OptCategory[NN_pshufhw] = 1; // Shuffle Packed High Words
-OptCategory[NN_pshuflw] = 1; // Shuffle Packed Low Words
-OptCategory[NN_pslldq] = 1; // Shift Double Quadword Left Logical
-OptCategory[NN_psrldq] = 1; // Shift Double Quadword Right Logical
-OptCategory[NN_psubq] = 1; // Subtract Packed Quadword Integers
-OptCategory[NN_punpckhqdq] = 1; // Unpack High Data
-OptCategory[NN_punpcklqdq] = 1; // Unpack Low Data
-OptCategory[NN_shufpd] = 1; // Shuffle Packed Double-Precision Floating-Point Values
-OptCategory[NN_sqrtpd] = 1; // Compute Square Roots of Packed Double-Precision Floating-Point Values
-OptCategory[NN_sqrtsd] = 1; // Compute Square Rootof Scalar Double-Precision Floating-Point Value
-OptCategory[NN_subpd] = 1; // Subtract Packed Double-Precision Floating-Point Values
-OptCategory[NN_subsd] = 1; // Subtract Scalar Double-Precision Floating-Point Values
-OptCategory[NN_ucomisd] = 1; // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
-OptCategory[NN_unpckhpd] = 1; // Unpack and Interleave High Packed Double-Precision Floating-Point Values
-OptCategory[NN_unpcklpd] = 1; // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
-OptCategory[NN_xorpd] = 1; // Bitwise Logical OR of Double-Precision Floating-Point Values
-
-
-// AMD syscall/sysret instructions NOTE: not AMD, found in Intel manual
-
-OptCategory[NN_syscall] = 1; // Low latency system call
-OptCategory[NN_sysret] = 1; // Return from system call
-
-// AMD64 instructions NOTE: not AMD, found in Intel manual
-
-OptCategory[NN_swapgs] = 1; // Exchange GS base with KernelGSBase MSR
-
-// New Pentium instructions (SSE3)
-
-OptCategory[NN_movddup] = 9; // Move One Double-FP and Duplicate
-OptCategory[NN_movshdup] = 9; // Move Packed Single-FP High and Duplicate
-OptCategory[NN_movsldup] = 9; // Move Packed Single-FP Low and Duplicate
-
-// Missing AMD64 instructions NOTE: also found in Intel manual
-
-OptCategory[NN_movsxd] = 2; // Move with Sign-Extend Doubleword
-OptCategory[NN_cmpxchg16b] = 0; // Compare and Exchange 16 Bytes
-
-// SSE3 instructions
-
-OptCategory[NN_addsubpd] = 1; // Add /Sub packed DP FP numbers
-OptCategory[NN_addsubps] = 1; // Add /Sub packed SP FP numbers
-OptCategory[NN_haddpd] = 1; // Add horizontally packed DP FP numbers
-OptCategory[NN_haddps] = 1; // Add horizontally packed SP FP numbers
-OptCategory[NN_hsubpd] = 1; // Sub horizontally packed DP FP numbers
-OptCategory[NN_hsubps] = 1; // Sub horizontally packed SP FP numbers
-OptCategory[NN_monitor] = 1; // Set up a linear address range to be monitored by hardware
-OptCategory[NN_mwait] = 1; // Wait until write-back store performed within the range specified by the MONITOR instruction
-OptCategory[NN_fisttp] = 0; // Store ST in intXX (chop) and pop
-OptCategory[NN_lddqu] = 1; // Load unaligned integer 128-bit
-
-// SSSE3 instructions
-
-OptCategory[NN_psignb] = 1; // Packed SIGN Byte
-OptCategory[NN_psignw] = 1; // Packed SIGN Word
-OptCategory[NN_psignd] = 1; // Packed SIGN Doubleword
-OptCategory[NN_pshufb] = 1; // Packed Shuffle Bytes
-OptCategory[NN_pmulhrsw] = 1; // Packed Multiply High with Round and Scale
-OptCategory[NN_pmaddubsw] = 1; // Multiply and Add Packed Signed and Unsigned Bytes
-OptCategory[NN_phsubsw] = 1; // Packed Horizontal Subtract and Saturate
-OptCategory[NN_phaddsw] = 1; // Packed Horizontal Add and Saturate
-OptCategory[NN_phaddw] = 1; // Packed Horizontal Add Word
-OptCategory[NN_phaddd] = 1; // Packed Horizontal Add Doubleword
-OptCategory[NN_phsubw] = 1; // Packed Horizontal Subtract Word
-OptCategory[NN_phsubd] = 1; // Packed Horizontal Subtract Doubleword
-OptCategory[NN_palignr] = 1; // Packed Align Right
-OptCategory[NN_pabsb] = 1; // Packed Absolute Value Byte
-OptCategory[NN_pabsw] = 1; // Packed Absolute Value Word
-OptCategory[NN_pabsd] = 1; // Packed Absolute Value Doubleword
-
-// VMX instructions
-
-OptCategory[NN_vmcall] = 1; // Call to VM Monitor
-OptCategory[NN_vmclear] = 0; // Clear Virtual Machine Control Structure
-OptCategory[NN_vmlaunch] = 1; // Launch Virtual Machine
-OptCategory[NN_vmresume] = 1; // Resume Virtual Machine
-OptCategory[NN_vmptrld] = 6; // Load Pointer to Virtual Machine Control Structure
-OptCategory[NN_vmptrst] = 0; // Store Pointer to Virtual Machine Control Structure
-OptCategory[NN_vmread] = 0; // Read Field from Virtual Machine Control Structure
-OptCategory[NN_vmwrite] = 0; // Write Field from Virtual Machine Control Structure
-OptCategory[NN_vmxoff] = 1; // Leave VMX Operation
-OptCategory[NN_vmxon] = 1; // Enter VMX Operation
-
-#if 599 < IDA_SDK_VERSION
-
-OptCategory[NN_ud2] = 1; // Undefined Instruction
-
-// Added with x86-64
-
-OptCategory[NN_rdtscp] = 10; // Read Time-Stamp Counter and Processor ID
-
-// Geode LX 3DNow! extensions
-
-OptCategory[NN_pfrcpv] = 1; // Reciprocal Approximation for a Pair of 32-bit Floats
-OptCategory[NN_pfrsqrtv] = 1; // Reciprocal Square Root Approximation for a Pair of 32-bit Floats
-
-// SSE2 pseudoinstructions
-
-OptCategory[NN_cmpeqpd] = 1; // Packed Double-FP Compare EQ
-OptCategory[NN_cmpltpd] = 1; // Packed Double-FP Compare LT
-OptCategory[NN_cmplepd] = 1; // Packed Double-FP Compare LE
-OptCategory[NN_cmpunordpd] = 1; // Packed Double-FP Compare UNORD
-OptCategory[NN_cmpneqpd] = 1; // Packed Double-FP Compare NOT EQ
-OptCategory[NN_cmpnltpd] = 1; // Packed Double-FP Compare NOT LT
-OptCategory[NN_cmpnlepd] = 1; // Packed Double-FP Compare NOT LE
-OptCategory[NN_cmpordpd] = 1; // Packed Double-FP Compare ORDERED
-OptCategory[NN_cmpeqsd] = 1; // Scalar Double-FP Compare EQ
-OptCategory[NN_cmpltsd] = 1; // Scalar Double-FP Compare LT
-OptCategory[NN_cmplesd] = 1; // Scalar Double-FP Compare LE
-OptCategory[NN_cmpunordsd] = 1; // Scalar Double-FP Compare UNORD
-OptCategory[NN_cmpneqsd] = 1; // Scalar Double-FP Compare NOT EQ
-OptCategory[NN_cmpnltsd] = 1; // Scalar Double-FP Compare NOT LT
-OptCategory[NN_cmpnlesd] = 1; // Scalar Double-FP Compare NOT LE
-OptCategory[NN_cmpordsd] = 1; // Scalar Double-FP Compare ORDERED
-
-// SSSE4.1 instructions
-
-OptCategory[NN_blendpd] = 1; // Blend Packed Double Precision Floating-Point Values
-OptCategory[NN_blendps] = 1; // Blend Packed Single Precision Floating-Point Values
-OptCategory[NN_blendvpd] = 1; // Variable Blend Packed Double Precision Floating-Point Values
-OptCategory[NN_blendvps] = 1; // Variable Blend Packed Single Precision Floating-Point Values
-OptCategory[NN_dppd] = 1; // Dot Product of Packed Double Precision Floating-Point Values
-OptCategory[NN_dpps] = 1; // Dot Product of Packed Single Precision Floating-Point Values
-OptCategory[NN_extractps] = 2; // Extract Packed Single Precision Floating-Point Value
-OptCategory[NN_insertps] = 1; // Insert Packed Single Precision Floating-Point Value
-OptCategory[NN_movntdqa] = 0; // Load Double Quadword Non-Temporal Aligned Hint
-OptCategory[NN_mpsadbw] = 1; // Compute Multiple Packed Sums of Absolute Difference
-OptCategory[NN_packusdw] = 1; // Pack with Unsigned Saturation
-OptCategory[NN_pblendvb] = 1; // Variable Blend Packed Bytes
-OptCategory[NN_pblendw] = 1; // Blend Packed Words
-OptCategory[NN_pcmpeqq] = 1; // Compare Packed Qword Data for Equal
-OptCategory[NN_pextrb] = 1; // Extract Byte
-OptCategory[NN_pextrd] = 1; // Extract Dword
-OptCategory[NN_pextrq] = 1; // Extract Qword
-OptCategory[NN_phminposuw] = 1; // Packed Horizontal Word Minimum
-OptCategory[NN_pinsrb] = 1; // Insert Byte
-OptCategory[NN_pinsrd] = 1; // Insert Dword
-OptCategory[NN_pinsrq] = 1; // Insert Qword
-OptCategory[NN_pmaxsb] = 1; // Maximum of Packed Signed Byte Integers
-OptCategory[NN_pmaxsd] = 1; // Maximum of Packed Signed Dword Integers
-OptCategory[NN_pmaxud] = 1; // Maximum of Packed Unsigned Dword Integers
-OptCategory[NN_pmaxuw] = 1; // Maximum of Packed Word Integers
-OptCategory[NN_pminsb] = 1; // Minimum of Packed Signed Byte Integers
-OptCategory[NN_pminsd] = 1; // Minimum of Packed Signed Dword Integers
-OptCategory[NN_pminud] = 1; // Minimum of Packed Unsigned Dword Integers
-OptCategory[NN_pminuw] = 1; // Minimum of Packed Word Integers
-OptCategory[NN_pmovsxbw] = 1; // Packed Move with Sign Extend
-OptCategory[NN_pmovsxbd] = 1; // Packed Move with Sign Extend
-OptCategory[NN_pmovsxbq] = 1; // Packed Move with Sign Extend
-OptCategory[NN_pmovsxwd] = 1; // Packed Move with Sign Extend
-OptCategory[NN_pmovsxwq] = 1; // Packed Move with Sign Extend
-OptCategory[NN_pmovsxdq] = 1; // Packed Move with Sign Extend
-OptCategory[NN_pmovzxbw] = 1; // Packed Move with Zero Extend
-OptCategory[NN_pmovzxbd] = 1; // Packed Move with Zero Extend
-OptCategory[NN_pmovzxbq] = 1; // Packed Move with Zero Extend
-OptCategory[NN_pmovzxwd] = 1; // Packed Move with Zero Extend
-OptCategory[NN_pmovzxwq] = 1; // Packed Move with Zero Extend
-OptCategory[NN_pmovzxdq] = 1; // Packed Move with Zero Extend
-OptCategory[NN_pmuldq] = 1; // Multiply Packed Signed Dword Integers
-OptCategory[NN_pmulld] = 1; // Multiply Packed Signed Dword Integers and Store Low Result
-OptCategory[NN_ptest] = 1; // Logical Compare
-OptCategory[NN_roundpd] = 1; // Round Packed Double Precision Floating-Point Values
-OptCategory[NN_roundps] = 1; // Round Packed Single Precision Floating-Point Values
-OptCategory[NN_roundsd] = 1; // Round Scalar Double Precision Floating-Point Values
-OptCategory[NN_roundss] = 1; // Round Scalar Single Precision Floating-Point Values
-
-// SSSE4.2 instructions
-OptCategory[NN_crc32] = 2; // Accumulate CRC32 Value
-OptCategory[NN_pcmpestri] = 2; // Packed Compare Explicit Length Strings, Return Index
-OptCategory[NN_pcmpestrm] = 2; // Packed Compare Explicit Length Strings, Return Mask
-OptCategory[NN_pcmpistri] = 2; // Packed Compare Implicit Length Strings, Return Index
-OptCategory[NN_pcmpistrm] = 2; // Packed Compare Implicit Length Strings, Return Mask
-OptCategory[NN_pcmpgtq] = 1; // Compare Packed Data for Greater Than
-OptCategory[NN_popcnt] = 2; // Return the Count of Number of Bits Set to 1
-
-// AMD SSE4a instructions
-
-OptCategory[NN_extrq] = 1; // Extract Field From Register
-OptCategory[NN_insertq] = 1; // Insert Field
-OptCategory[NN_movntsd] = 0; // Move Non-Temporal Scalar Double-Precision Floating-Point
-OptCategory[NN_movntss] = 0; // Move Non-Temporal Scalar Single-Precision Floating-Point
-OptCategory[NN_lzcnt] = 2; // Leading Zero Count
-
-// xsave/xrstor instructions
-
-OptCategory[NN_xgetbv] = 8; // Get Value of Extended Control Register
-OptCategory[NN_xrstor] = 0; // Restore Processor Extended States
-OptCategory[NN_xsave] = 1; // Save Processor Extended States
-OptCategory[NN_xsetbv] = 1; // Set Value of Extended Control Register
-
-// Intel Safer Mode Extensions (SMX)
-
-OptCategory[NN_getsec] = 1; // Safer Mode Extensions (SMX) Instruction
-
-// AMD-V Virtualization ISA Extension
-
-OptCategory[NN_clgi] = 0; // Clear Global Interrupt Flag
-OptCategory[NN_invlpga] = 1; // Invalidate TLB Entry in a Specified ASID
-OptCategory[NN_skinit] = 1; // Secure Init and Jump with Attestation
-OptCategory[NN_stgi] = 0; // Set Global Interrupt Flag
-OptCategory[NN_vmexit] = 1; // Stop Executing Guest, Begin Executing Host
-OptCategory[NN_vmload] = 0; // Load State from VMCB
-OptCategory[NN_vmmcall] = 1; // Call VMM
-OptCategory[NN_vmrun] = 1; // Run Virtual Machine
-OptCategory[NN_vmsave] = 0; // Save State to VMCB
-
-// VMX+ instructions
-
-OptCategory[NN_invept] = 1; // Invalidate Translations Derived from EPT
-OptCategory[NN_invvpid] = 1; // Invalidate Translations Based on VPID
-
-// Intel Atom instructions
-
-OptCategory[NN_movbe] = 3; // Move Data After Swapping Bytes
-
-// Intel AES instructions
-
-OptCategory[NN_aesenc] = 1; // Perform One Round of an AES Encryption Flow
-OptCategory[NN_aesenclast] = 1; // Perform the Last Round of an AES Encryption Flow
-OptCategory[NN_aesdec] = 1; // Perform One Round of an AES Decryption Flow
-OptCategory[NN_aesdeclast] = 1; // Perform the Last Round of an AES Decryption Flow
-OptCategory[NN_aesimc] = 1; // Perform the AES InvMixColumn Transformation
-OptCategory[NN_aeskeygenassist] = 1; // AES Round Key Generation Assist
-
-// Carryless multiplication
-
-OptCategory[NN_pclmulqdq] = 1; // Carry-Less Multiplication Quadword
-
-// Returns modified by operand size prefixes
-
-OptCategory[NN_retnw] = 0; // Return Near from Procedure (use16)
-OptCategory[NN_retnd] = 0; // Return Near from Procedure (use32)
-OptCategory[NN_retnq] = 0; // Return Near from Procedure (use64)
-OptCategory[NN_retfw] = 0; // Return Far from Procedure (use16)
-OptCategory[NN_retfd] = 0; // Return Far from Procedure (use32)
-OptCategory[NN_retfq] = 0; // Return Far from Procedure (use64)
-
-// RDRAND support
-
-OptCategory[NN_rdrand] = 2; // Read Random Number
-
-// new GPR instructions
-
-OptCategory[NN_adcx] = 5; // Unsigned Integer Addition of Two Operands with Carry Flag
-OptCategory[NN_adox] = 5; // Unsigned Integer Addition of Two Operands with Overflow Flag
-OptCategory[NN_andn] = 0; // Logical AND NOT
-OptCategory[NN_bextr] = 2; // Bit Field Extract
-OptCategory[NN_blsi] = 2; // Extract Lowest Set Isolated Bit
-OptCategory[NN_blsmsk] = 2; // Get Mask Up to Lowest Set Bit
-OptCategory[NN_blsr] = 2; // Reset Lowest Set Bit
-OptCategory[NN_bzhi] = 2; // Zero High Bits Starting with Specified Bit Position
-OptCategory[NN_clac] = 1; // Clear AC Flag in EFLAGS Register
-OptCategory[NN_mulx] = 2; // Unsigned Multiply Without Affecting Flags
-OptCategory[NN_pdep] = 2; // Parallel Bits Deposit
-OptCategory[NN_pext] = 2; // Parallel Bits Extract
-OptCategory[NN_rorx] = 2; // Rotate Right Logical Without Affecting Flags
-OptCategory[NN_sarx] = 2; // Shift Arithmetically Right Without Affecting Flags
-OptCategory[NN_shlx] = 2; // Shift Logically Left Without Affecting Flags
-OptCategory[NN_shrx] = 2; // Shift Logically Right Without Affecting Flags
-OptCategory[NN_stac] = 1; // Set AC Flag in EFLAGS Register
-OptCategory[NN_tzcnt] = 2; // Count the Number of Trailing Zero Bits
-OptCategory[NN_xsaveopt] = 1; // Save Processor Extended States Optimized
-OptCategory[NN_invpcid] = 1; // Invalidate Processor Context ID
-OptCategory[NN_rdseed] = 2; // Read Random Seed
-OptCategory[NN_rdfsbase] = 6; // Read FS Segment Base
-OptCategory[NN_rdgsbase] = 6; // Read GS Segment Base
-OptCategory[NN_wrfsbase] = 6; // Write FS Segment Base
-OptCategory[NN_wrgsbase] = 6; // Write GS Segment Base
-
-// new AVX instructions
-
-OptCategory[NN_vaddpd] = 1; // Add Packed Double-Precision Floating-Point Values
-OptCategory[NN_vaddps] = 1; // Packed Single-FP Add
-OptCategory[NN_vaddsd] = 1; // Add Scalar Double-Precision Floating-Point Values
-OptCategory[NN_vaddss] = 1; // Scalar Single-FP Add
-OptCategory[NN_vaddsubpd] = 1; // Add /Sub packed DP FP numbers
-OptCategory[NN_vaddsubps] = 1; // Add /Sub packed SP FP numbers
-OptCategory[NN_vaesdec] = 1; // Perform One Round of an AES Decryption Flow
-OptCategory[NN_vaesdeclast] = 1; // Perform the Last Round of an AES Decryption Flow
-OptCategory[NN_vaesenc] = 1; // Perform One Round of an AES Encryption Flow
-OptCategory[NN_vaesenclast] = 1; // Perform the Last Round of an AES Encryption Flow
-OptCategory[NN_vaesimc] = 1; // Perform the AES InvMixColumn Transformation
-OptCategory[NN_vaeskeygenassist] = 1; // AES Round Key Generation Assist
-OptCategory[NN_vandnpd] = 1; // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vandnps] = 1; // Bitwise Logical And Not for Single-FP
-OptCategory[NN_vandpd] = 1; // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vandps] = 1; // Bitwise Logical And for Single-FP
-OptCategory[NN_vblendpd] = 1; // Blend Packed Double Precision Floating-Point Values
-OptCategory[NN_vblendps] = 1; // Blend Packed Single Precision Floating-Point Values
-OptCategory[NN_vblendvpd] = 1; // Variable Blend Packed Double Precision Floating-Point Values
-OptCategory[NN_vblendvps] = 1; // Variable Blend Packed Single Precision Floating-Point Values
-OptCategory[NN_vbroadcastf128] = 1; // Broadcast 128 Bits of Floating-Point Data
-OptCategory[NN_vbroadcasti128] = 1; // Broadcast 128 Bits of Integer Data
-OptCategory[NN_vbroadcastsd] = 1; // Broadcast Double-Precision Floating-Point Element
-OptCategory[NN_vbroadcastss] = 1; // Broadcast Single-Precision Floating-Point Element
-OptCategory[NN_vcmppd] = 1; // Compare Packed Double-Precision Floating-Point Values
-OptCategory[NN_vcmpps] = 1; // Packed Single-FP Compare
-OptCategory[NN_vcmpsd] = 1; // Compare Scalar Double-Precision Floating-Point Values
-OptCategory[NN_vcmpss] = 1; // Scalar Single-FP Compare
-OptCategory[NN_vcomisd] = 1; // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
-OptCategory[NN_vcomiss] = 1; // Scalar Ordered Single-FP Compare and Set EFLAGS
-OptCategory[NN_vcvtdq2pd] = 1; // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
-OptCategory[NN_vcvtdq2ps] = 1; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
-OptCategory[NN_vcvtpd2dq] = 1; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
-OptCategory[NN_vcvtpd2ps] = 1; // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
-OptCategory[NN_vcvtph2ps] = 1; // Convert 16-bit FP Values to Single-Precision FP Values
-OptCategory[NN_vcvtps2dq] = 1; // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
-OptCategory[NN_vcvtps2pd] = 1; // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
-OptCategory[NN_vcvtps2ph] = 1; // Convert Single-Precision FP value to 16-bit FP value
-OptCategory[NN_vcvtsd2si] = 1; // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
-OptCategory[NN_vcvtsd2ss] = 1; // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
-OptCategory[NN_vcvtsi2sd] = 1; // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
-OptCategory[NN_vcvtsi2ss] = 1; // Scalar signed INT32 to Single-FP conversion
-OptCategory[NN_vcvtss2sd] = 1; // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
-OptCategory[NN_vcvtss2si] = 1; // Scalar Single-FP to signed INT32 conversion
-OptCategory[NN_vcvttpd2dq] = 1; // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
-OptCategory[NN_vcvttps2dq] = 1; // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
-OptCategory[NN_vcvttsd2si] = 1; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
-OptCategory[NN_vcvttss2si] = 1; // Scalar Single-FP to signed INT32 conversion (truncate)
-OptCategory[NN_vdivpd] = 1; // Divide Packed Double-Precision Floating-Point Values
-OptCategory[NN_vdivps] = 1; // Packed Single-FP Divide
-OptCategory[NN_vdivsd] = 1; // Divide Scalar Double-Precision Floating-Point Values
-OptCategory[NN_vdivss] = 1; // Scalar Single-FP Divide
-OptCategory[NN_vdppd] = 1; // Dot Product of Packed Double Precision Floating-Point Values
-OptCategory[NN_vdpps] = 1; // Dot Product of Packed Single Precision Floating-Point Values
-OptCategory[NN_vextractf128] = 1; // Extract Packed Floating-Point Values
-OptCategory[NN_vextracti128] = 1; // Extract Packed Integer Values
-OptCategory[NN_vextractps] = 1; // Extract Packed Floating-Point Values
-OptCategory[NN_vfmadd132pd] = 1; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vfmadd132ps] = 1; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
-OptCategory[NN_vfmadd132sd] = 1; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
-OptCategory[NN_vfmadd132ss] = 1; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
-OptCategory[NN_vfmadd213pd] = 1; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vfmadd213ps] = 1; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
-OptCategory[NN_vfmadd213sd] = 1; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
-OptCategory[NN_vfmadd213ss] = 1; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
-OptCategory[NN_vfmadd231pd] = 1; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vfmadd231ps] = 1; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
-OptCategory[NN_vfmadd231sd] = 1; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
-OptCategory[NN_vfmadd231ss] = 1; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
-OptCategory[NN_vfmaddsub132pd] = 1; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vfmaddsub132ps] = 1; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
-OptCategory[NN_vfmaddsub213pd] = 1; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vfmaddsub213ps] = 1; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
-OptCategory[NN_vfmaddsub231pd] = 1; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vfmaddsub231ps] = 1; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
-OptCategory[NN_vfmsub132pd] = 1; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vfmsub132ps] = 1; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
-OptCategory[NN_vfmsub132sd] = 1; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
-OptCategory[NN_vfmsub132ss] = 1; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
-OptCategory[NN_vfmsub213pd] = 1; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vfmsub213ps] = 1; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
-OptCategory[NN_vfmsub213sd] = 1; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
-OptCategory[NN_vfmsub213ss] = 1; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
-OptCategory[NN_vfmsub231pd] = 1; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vfmsub231ps] = 1; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
-OptCategory[NN_vfmsub231sd] = 1; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
-OptCategory[NN_vfmsub231ss] = 1; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
-OptCategory[NN_vfmsubadd132pd] = 1; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vfmsubadd132ps] = 1; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
-OptCategory[NN_vfmsubadd213pd] = 1; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vfmsubadd213ps] = 1; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
-OptCategory[NN_vfmsubadd231pd] = 1; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vfmsubadd231ps] = 1; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
-OptCategory[NN_vfnmadd132pd] = 1; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vfnmadd132ps] = 1; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
-OptCategory[NN_vfnmadd132sd] = 1; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
-OptCategory[NN_vfnmadd132ss] = 1; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
-OptCategory[NN_vfnmadd213pd] = 1; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vfnmadd213ps] = 1; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
-OptCategory[NN_vfnmadd213sd] = 1; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
-OptCategory[NN_vfnmadd213ss] = 1; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
-OptCategory[NN_vfnmadd231pd] = 1; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vfnmadd231ps] = 1; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
-OptCategory[NN_vfnmadd231sd] = 1; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
-OptCategory[NN_vfnmadd231ss] = 1; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
-OptCategory[NN_vfnmsub132pd] = 1; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vfnmsub132ps] = 1; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
-OptCategory[NN_vfnmsub132sd] = 1; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
-OptCategory[NN_vfnmsub132ss] = 1; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
-OptCategory[NN_vfnmsub213pd] = 1; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vfnmsub213ps] = 1; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
-OptCategory[NN_vfnmsub213sd] = 1; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
-OptCategory[NN_vfnmsub213ss] = 1; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
-OptCategory[NN_vfnmsub231pd] = 1; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vfnmsub231ps] = 1; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
-OptCategory[NN_vfnmsub231sd] = 1; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
-OptCategory[NN_vfnmsub231ss] = 1; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
-OptCategory[NN_vgatherdps] = 1; // Gather Packed SP FP Values Using Signed Dword Indices
-OptCategory[NN_vgatherdpd] = 1; // Gather Packed DP FP Values Using Signed Dword Indices
-OptCategory[NN_vgatherqps] = 1; // Gather Packed SP FP Values Using Signed Qword Indices
-OptCategory[NN_vgatherqpd] = 1; // Gather Packed DP FP Values Using Signed Qword Indices
-OptCategory[NN_vhaddpd] = 1; // Add horizontally packed DP FP numbers
-OptCategory[NN_vhaddps] = 1; // Add horizontally packed SP FP numbers
-OptCategory[NN_vhsubpd] = 1; // Sub horizontally packed DP FP numbers
-OptCategory[NN_vhsubps] = 1; // Sub horizontally packed SP FP numbers
-OptCategory[NN_vinsertf128] = 1; // Insert Packed Floating-Point Values
-OptCategory[NN_vinserti128] = 1; // Insert Packed Integer Values
-OptCategory[NN_vinsertps] = 1; // Insert Packed Single Precision Floating-Point Value
-OptCategory[NN_vlddqu] = 1; // Load Unaligned Packed Integer Values
-OptCategory[NN_vldmxcsr] = 1; // Load Streaming SIMD Extensions Technology Control/Status Register
-OptCategory[NN_vmaskmovdqu] = 9; // Store Selected Bytes of Double Quadword with NT Hint
-OptCategory[NN_vmaskmovpd] = 9; // Conditionally Load Packed Double-Precision Floating-Point Values
-OptCategory[NN_vmaskmovps] = 9; // Conditionally Load Packed Single-Precision Floating-Point Values
-OptCategory[NN_vmaxpd] = 1; // Return Maximum Packed Double-Precision Floating-Point Values
-OptCategory[NN_vmaxps] = 1; // Packed Single-FP Maximum
-OptCategory[NN_vmaxsd] = 1; // Return Maximum Scalar Double-Precision Floating-Point Value
-OptCategory[NN_vmaxss] = 1; // Scalar Single-FP Maximum
-OptCategory[NN_vminpd] = 1; // Return Minimum Packed Double-Precision Floating-Point Values
-OptCategory[NN_vminps] = 1; // Packed Single-FP Minimum
-OptCategory[NN_vminsd] = 1; // Return Minimum Scalar Double-Precision Floating-Point Value
-OptCategory[NN_vminss] = 1; // Scalar Single-FP Minimum
-OptCategory[NN_vmovapd] = 9; // Move Aligned Packed Double-Precision Floating-Point Values
-OptCategory[NN_vmovaps] = 9; // Move Aligned Four Packed Single-FP
-OptCategory[NN_vmovd] = 9; // Move 32 bits
-OptCategory[NN_vmovddup] = 1; // Move One Double-FP and Duplicate
-OptCategory[NN_vmovdqa] = 1; // Move Aligned Double Quadword
-OptCategory[NN_vmovdqu] = 1; // Move Unaligned Double Quadword
-OptCategory[NN_vmovhlps] = 1; // Move High to Low Packed Single-FP
-OptCategory[NN_vmovhpd] = 1; // Move High Packed Double-Precision Floating-Point Values
-OptCategory[NN_vmovhps] = 1; // Move High Packed Single-FP
-OptCategory[NN_vmovlhps] = 1; // Move Low to High Packed Single-FP
-OptCategory[NN_vmovlpd] = 1; // Move Low Packed Double-Precision Floating-Point Values
-OptCategory[NN_vmovlps] = 1; // Move Low Packed Single-FP
-OptCategory[NN_vmovmskpd] = 1; // Extract Packed Double-Precision Floating-Point Sign Mask
-OptCategory[NN_vmovmskps] = 1; // Move Mask to Register
-OptCategory[NN_vmovntdq] = 1; // Store Double Quadword Using Non-Temporal Hint
-OptCategory[NN_vmovntdqa] = 1; // Load Double Quadword Non-Temporal Aligned Hint
-OptCategory[NN_vmovntpd] = 1; // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
-OptCategory[NN_vmovntps] = 1; // Move Aligned Four Packed Single-FP Non Temporal
-OptCategory[NN_vmovntsd] = 1; // Move Non-Temporal Scalar Double-Precision Floating-Point
-OptCategory[NN_vmovntss] = 1; // Move Non-Temporal Scalar Single-Precision Floating-Point
-OptCategory[NN_vmovq] = 1; // Move 64 bits
-OptCategory[NN_vmovsd] = 1; // Move Scalar Double-Precision Floating-Point Values
-OptCategory[NN_vmovshdup] = 1; // Move Packed Single-FP High and Duplicate
-OptCategory[NN_vmovsldup] = 1; // Move Packed Single-FP Low and Duplicate
-OptCategory[NN_vmovss] = 1; // Move Scalar Single-FP
-OptCategory[NN_vmovupd] = 1; // Move Unaligned Packed Double-Precision Floating-Point Values
-OptCategory[NN_vmovups] = 1; // Move Unaligned Four Packed Single-FP
-OptCategory[NN_vmpsadbw] = 1; // Compute Multiple Packed Sums of Absolute Difference
-OptCategory[NN_vmulpd] = 1; // Multiply Packed Double-Precision Floating-Point Values
-OptCategory[NN_vmulps] = 1; // Packed Single-FP Multiply
-OptCategory[NN_vmulsd] = 1; // Multiply Scalar Double-Precision Floating-Point Values
-OptCategory[NN_vmulss] = 1; // Scalar Single-FP Multiply
-OptCategory[NN_vorpd] = 1; // Bitwise Logical OR of Double-Precision Floating-Point Values
-OptCategory[NN_vorps] = 1; // Bitwise Logical OR for Single-FP Data
-OptCategory[NN_vpabsb] = 1; // Packed Absolute Value Byte
-OptCategory[NN_vpabsd] = 1; // Packed Absolute Value Doubleword
-OptCategory[NN_vpabsw] = 1; // Packed Absolute Value Word
-OptCategory[NN_vpackssdw] = 1; // Pack with Signed Saturation (Dword->Word)
-OptCategory[NN_vpacksswb] = 1; // Pack with Signed Saturation (Word->Byte)
-OptCategory[NN_vpackusdw] = 1; // Pack with Unsigned Saturation
-OptCategory[NN_vpackuswb] = 1; // Pack with Unsigned Saturation (Word->Byte)
-OptCategory[NN_vpaddb] = 1; // Packed Add Byte
-OptCategory[NN_vpaddd] = 1; // Packed Add Dword
-OptCategory[NN_vpaddq] = 1; // Add Packed Quadword Integers
-OptCategory[NN_vpaddsb] = 1; // Packed Add with Saturation (Byte)
-OptCategory[NN_vpaddsw] = 1; // Packed Add with Saturation (Word)
-OptCategory[NN_vpaddusb] = 1; // Packed Add Unsigned with Saturation (Byte)
-OptCategory[NN_vpaddusw] = 1; // Packed Add Unsigned with Saturation (Word)
-OptCategory[NN_vpaddw] = 1; // Packed Add Word
-OptCategory[NN_vpalignr] = 1; // Packed Align Right
-OptCategory[NN_vpand] = 1; // Bitwise Logical And
-OptCategory[NN_vpandn] = 1; // Bitwise Logical And Not
-OptCategory[NN_vpavgb] = 1; // Packed Average (Byte)
-OptCategory[NN_vpavgw] = 1; // Packed Average (Word)
-OptCategory[NN_vpblendd] = 1; // Blend Packed Dwords
-OptCategory[NN_vpblendvb] = 1; // Variable Blend Packed Bytes
-OptCategory[NN_vpblendw] = 1; // Blend Packed Words
-OptCategory[NN_vpbroadcastb] = 1; // Broadcast a Byte Integer
-OptCategory[NN_vpbroadcastd] = 1; // Broadcast a Dword Integer
-OptCategory[NN_vpbroadcastq] = 1; // Broadcast a Qword Integer
-OptCategory[NN_vpbroadcastw] = 1; // Broadcast a Word Integer
-OptCategory[NN_vpclmulqdq] = 1; // Carry-Less Multiplication Quadword
-OptCategory[NN_vpcmpeqb] = 1; // Packed Compare for Equal (Byte)
-OptCategory[NN_vpcmpeqd] = 1; // Packed Compare for Equal (Dword)
-OptCategory[NN_vpcmpeqq] = 1; // Compare Packed Qword Data for Equal
-OptCategory[NN_vpcmpeqw] = 1; // Packed Compare for Equal (Word)
-OptCategory[NN_vpcmpestri] = 1; // Packed Compare Explicit Length Strings, Return Index
-OptCategory[NN_vpcmpestrm] = 1; // Packed Compare Explicit Length Strings, Return Mask
-OptCategory[NN_vpcmpgtb] = 1; // Packed Compare for Greater Than (Byte)
-OptCategory[NN_vpcmpgtd] = 1; // Packed Compare for Greater Than (Dword)
-OptCategory[NN_vpcmpgtq] = 1; // Compare Packed Data for Greater Than
-OptCategory[NN_vpcmpgtw] = 1; // Packed Compare for Greater Than (Word)
-OptCategory[NN_vpcmpistri] = 1; // Packed Compare Implicit Length Strings, Return Index
-OptCategory[NN_vpcmpistrm] = 1; // Packed Compare Implicit Length Strings, Return Mask
-OptCategory[NN_vperm2f128] = 1; // Permute Floating-Point Values
-OptCategory[NN_vperm2i128] = 1; // Permute Integer Values
-OptCategory[NN_vpermd] = 1; // Full Doublewords Element Permutation
-OptCategory[NN_vpermilpd] = 1; // Permute Double-Precision Floating-Point Values
-OptCategory[NN_vpermilps] = 1; // Permute Single-Precision Floating-Point Values
-OptCategory[NN_vpermpd] = 1; // Permute Double-Precision Floating-Point Elements
-OptCategory[NN_vpermps] = 1; // Permute Single-Precision Floating-Point Elements
-OptCategory[NN_vpermq] = 1; // Qwords Element Permutation
-OptCategory[NN_vpextrb] = 1; // Extract Byte
-OptCategory[NN_vpextrd] = 1; // Extract Dword
-OptCategory[NN_vpextrq] = 1; // Extract Qword
-OptCategory[NN_vpextrw] = 1; // Extract Word
-OptCategory[NN_vpgatherdd] = 1; // Gather Packed Dword Values Using Signed Dword Indices
-OptCategory[NN_vpgatherdq] = 1; // Gather Packed Qword Values Using Signed Dword Indices
-OptCategory[NN_vpgatherqd] = 1; // Gather Packed Dword Values Using Signed Qword Indices
-OptCategory[NN_vpgatherqq] = 1; // Gather Packed Qword Values Using Signed Qword Indices
-OptCategory[NN_vphaddd] = 1; // Packed Horizontal Add Doubleword
-OptCategory[NN_vphaddsw] = 1; // Packed Horizontal Add and Saturate
-OptCategory[NN_vphaddw] = 1; // Packed Horizontal Add Word
-OptCategory[NN_vphminposuw] = 1; // Packed Horizontal Word Minimum
-OptCategory[NN_vphsubd] = 1; // Packed Horizontal Subtract Doubleword
-OptCategory[NN_vphsubsw] = 1; // Packed Horizontal Subtract and Saturate
-OptCategory[NN_vphsubw] = 1; // Packed Horizontal Subtract Word
-OptCategory[NN_vpinsrb] = 1; // Insert Byte
-OptCategory[NN_vpinsrd] = 1; // Insert Dword
-OptCategory[NN_vpinsrq] = 1; // Insert Qword
-OptCategory[NN_vpinsrw] = 1; // Insert Word
-OptCategory[NN_vpmaddubsw] = 1; // Multiply and Add Packed Signed and Unsigned Bytes
-OptCategory[NN_vpmaddwd] = 1; // Packed Multiply and Add
-OptCategory[NN_vpmaskmovd] = 1; // Conditionally Store Dword Values Using Mask
-OptCategory[NN_vpmaskmovq] = 1; // Conditionally Store Qword Values Using Mask
-OptCategory[NN_vpmaxsb] = 1; // Maximum of Packed Signed Byte Integers
-OptCategory[NN_vpmaxsd] = 1; // Maximum of Packed Signed Dword Integers
-OptCategory[NN_vpmaxsw] = 1; // Packed Signed Integer Word Maximum
-OptCategory[NN_vpmaxub] = 1; // Packed Unsigned Integer Byte Maximum
-OptCategory[NN_vpmaxud] = 1; // Maximum of Packed Unsigned Dword Integers
-OptCategory[NN_vpmaxuw] = 1; // Maximum of Packed Word Integers
-OptCategory[NN_vpminsb] = 1; // Minimum of Packed Signed Byte Integers
-OptCategory[NN_vpminsd] = 1; // Minimum of Packed Signed Dword Integers
-OptCategory[NN_vpminsw] = 1; // Packed Signed Integer Word Minimum
-OptCategory[NN_vpminub] = 1; // Packed Unsigned Integer Byte Minimum
-OptCategory[NN_vpminud] = 1; // Minimum of Packed Unsigned Dword Integers
-OptCategory[NN_vpminuw] = 1; // Minimum of Packed Word Integers
-OptCategory[NN_vpmovmskb] = 1; // Move Byte Mask to Integer
-OptCategory[NN_vpmovsxbd] = 1; // Packed Move with Sign Extend
-OptCategory[NN_vpmovsxbq] = 1; // Packed Move with Sign Extend
-OptCategory[NN_vpmovsxbw] = 1; // Packed Move with Sign Extend
-OptCategory[NN_vpmovsxdq] = 1; // Packed Move with Sign Extend
-OptCategory[NN_vpmovsxwd] = 1; // Packed Move with Sign Extend
-OptCategory[NN_vpmovsxwq] = 1; // Packed Move with Sign Extend
-OptCategory[NN_vpmovzxbd] = 1; // Packed Move with Zero Extend
-OptCategory[NN_vpmovzxbq] = 1; // Packed Move with Zero Extend
-OptCategory[NN_vpmovzxbw] = 1; // Packed Move with Zero Extend
-OptCategory[NN_vpmovzxdq] = 1; // Packed Move with Zero Extend
-OptCategory[NN_vpmovzxwd] = 1; // Packed Move with Zero Extend
-OptCategory[NN_vpmovzxwq] = 1; // Packed Move with Zero Extend
-OptCategory[NN_vpmuldq] = 1; // Multiply Packed Signed Dword Integers
-OptCategory[NN_vpmulhrsw] = 1; // Packed Multiply High with Round and Scale
-OptCategory[NN_vpmulhuw] = 1; // Packed Multiply High Unsigned
-OptCategory[NN_vpmulhw] = 1; // Packed Multiply High
-OptCategory[NN_vpmulld] = 1; // Multiply Packed Signed Dword Integers and Store Low Result
-OptCategory[NN_vpmullw] = 1; // Packed Multiply Low
-OptCategory[NN_vpmuludq] = 1; // Multiply Packed Unsigned Doubleword Integers
-OptCategory[NN_vpor] = 1; // Bitwise Logical Or
-OptCategory[NN_vpsadbw] = 1; // Packed Sum of Absolute Differences
-OptCategory[NN_vpshufb] = 1; // Packed Shuffle Bytes
-OptCategory[NN_vpshufd] = 1; // Shuffle Packed Doublewords
-OptCategory[NN_vpshufhw] = 1; // Shuffle Packed High Words
-OptCategory[NN_vpshuflw] = 1; // Shuffle Packed Low Words
-OptCategory[NN_vpsignb] = 1; // Packed SIGN Byte
-OptCategory[NN_vpsignd] = 1; // Packed SIGN Doubleword
-OptCategory[NN_vpsignw] = 1; // Packed SIGN Word
-OptCategory[NN_vpslld] = 1; // Packed Shift Left Logical (Dword)
-OptCategory[NN_vpslldq] = 1; // Shift Double Quadword Left Logical
-OptCategory[NN_vpsllq] = 1; // Packed Shift Left Logical (Qword)
-OptCategory[NN_vpsllvd] = 1; // Variable Bit Shift Left Logical (Dword)
-OptCategory[NN_vpsllvq] = 1; // Variable Bit Shift Left Logical (Qword)
-OptCategory[NN_vpsllw] = 1; // Packed Shift Left Logical (Word)
-OptCategory[NN_vpsrad] = 1; // Packed Shift Right Arithmetic (Dword)
-OptCategory[NN_vpsravd] = 1; // Variable Bit Shift Right Arithmetic
-OptCategory[NN_vpsraw] = 1; // Packed Shift Right Arithmetic (Word)
-OptCategory[NN_vpsrld] = 1; // Packed Shift Right Logical (Dword)
-OptCategory[NN_vpsrldq] = 1; // Shift Double Quadword Right Logical (Qword)
-OptCategory[NN_vpsrlq] = 1; // Packed Shift Right Logical (Qword)
-OptCategory[NN_vpsrlvd] = 1; // Variable Bit Shift Right Logical (Dword)
-OptCategory[NN_vpsrlvq] = 1; // Variable Bit Shift Right Logical (Qword)
-OptCategory[NN_vpsrlw] = 1; // Packed Shift Right Logical (Word)
-OptCategory[NN_vpsubb] = 1; // Packed Subtract Byte
-OptCategory[NN_vpsubd] = 1; // Packed Subtract Dword
-OptCategory[NN_vpsubq] = 1; // Subtract Packed Quadword Integers
-OptCategory[NN_vpsubsb] = 1; // Packed Subtract with Saturation (Byte)
-OptCategory[NN_vpsubsw] = 1; // Packed Subtract with Saturation (Word)
-OptCategory[NN_vpsubusb] = 1; // Packed Subtract Unsigned with Saturation (Byte)
-OptCategory[NN_vpsubusw] = 1; // Packed Subtract Unsigned with Saturation (Word)
-OptCategory[NN_vpsubw] = 1; // Packed Subtract Word
-OptCategory[NN_vptest] = 1; // Logical Compare
-OptCategory[NN_vpunpckhbw] = 1; // Unpack High Packed Data (Byte->Word)
-OptCategory[NN_vpunpckhdq] = 1; // Unpack High Packed Data (Dword->Qword)
-OptCategory[NN_vpunpckhqdq] = 1; // Unpack High Packed Data (Qword->Xmmword)
-OptCategory[NN_vpunpckhwd] = 1; // Unpack High Packed Data (Word->Dword)
-OptCategory[NN_vpunpcklbw] = 1; // Unpack Low Packed Data (Byte->Word)
-OptCategory[NN_vpunpckldq] = 1; // Unpack Low Packed Data (Dword->Qword)
-OptCategory[NN_vpunpcklqdq] = 1; // Unpack Low Packed Data (Qword->Xmmword)
-OptCategory[NN_vpunpcklwd] = 1; // Unpack Low Packed Data (Word->Dword)
-OptCategory[NN_vpxor] = 1; // Bitwise Logical Exclusive Or
-OptCategory[NN_vrcpps] = 1; // Packed Single-FP Reciprocal
-OptCategory[NN_vrcpss] = 1; // Scalar Single-FP Reciprocal
-OptCategory[NN_vroundpd] = 1; // Round Packed Double Precision Floating-Point Values
-OptCategory[NN_vroundps] = 1; // Round Packed Single Precision Floating-Point Values
-OptCategory[NN_vroundsd] = 1; // Round Scalar Double Precision Floating-Point Values
-OptCategory[NN_vroundss] = 1; // Round Scalar Single Precision Floating-Point Values
-OptCategory[NN_vrsqrtps] = 1; // Packed Single-FP Square Root Reciprocal
-OptCategory[NN_vrsqrtss] = 1; // Scalar Single-FP Square Root Reciprocal
-OptCategory[NN_vshufpd] = 1; // Shuffle Packed Double-Precision Floating-Point Values
-OptCategory[NN_vshufps] = 1; // Shuffle Single-FP
-OptCategory[NN_vsqrtpd] = 1; // Compute Square Roots of Packed Double-Precision Floating-Point Values
-OptCategory[NN_vsqrtps] = 1; // Packed Single-FP Square Root
-OptCategory[NN_vsqrtsd] = 1; // Compute Square Rootof Scalar Double-Precision Floating-Point Value
-OptCategory[NN_vsqrtss] = 1; // Scalar Single-FP Square Root
-OptCategory[NN_vstmxcsr] = 1; // Store Streaming SIMD Extensions Technology Control/Status Register
-OptCategory[NN_vsubpd] = 1; // Subtract Packed Double-Precision Floating-Point Values
-OptCategory[NN_vsubps] = 1; // Packed Single-FP Subtract
-OptCategory[NN_vsubsd] = 1; // Subtract Scalar Double-Precision Floating-Point Values
-OptCategory[NN_vsubss] = 1; // Scalar Single-FP Subtract
-OptCategory[NN_vtestpd] = 1; // Packed Double-Precision Floating-Point Bit Test
-OptCategory[NN_vtestps] = 1; // Packed Single-Precision Floating-Point Bit Test
-OptCategory[NN_vucomisd] = 1; // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
-OptCategory[NN_vucomiss] = 1; // Scalar Unordered Single-FP Compare and Set EFLAGS
-OptCategory[NN_vunpckhpd] = 1; // Unpack and Interleave High Packed Double-Precision Floating-Point Values
-OptCategory[NN_vunpckhps] = 1; // Unpack High Packed Single-FP Data
-OptCategory[NN_vunpcklpd] = 1; // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
-OptCategory[NN_vunpcklps] = 1; // Unpack Low Packed Single-FP Data
-OptCategory[NN_vxorpd] = 1; // Bitwise Logical OR of Double-Precision Floating-Point Values
-OptCategory[NN_vxorps] = 1; // Bitwise Logical XOR for Single-FP Data
-OptCategory[NN_vzeroall] = 1; // Zero All YMM Registers
-OptCategory[NN_vzeroupper] = 1; // Zero Upper Bits of YMM Registers
-
-// Transactional Synchronization Extensions
-
-OptCategory[NN_xabort] = 1; // Transaction Abort
-OptCategory[NN_xbegin] = 1; // Transaction Begin
-OptCategory[NN_xend] = 1; // Transaction End
-OptCategory[NN_xtest] = 1; // Test If In Transactional Execution
-
-// Virtual PC synthetic instructions
-
-OptCategory[NN_vmgetinfo] = 1; // Virtual PC - Get VM Information
-OptCategory[NN_vmsetinfo] = 1; // Virtual PC - Set VM Information
-OptCategory[NN_vmdxdsbl] = 1; // Virtual PC - Disable Direct Execution
-OptCategory[NN_vmdxenbl] = 1; // Virtual PC - Enable Direct Execution
-OptCategory[NN_vmcpuid] = 1; // Virtual PC - Virtualized CPU Information
-OptCategory[NN_vmhlt] = 1; // Virtual PC - Halt
-OptCategory[NN_vmsplaf] = 1; // Virtual PC - Spin Lock Acquisition Failed
-OptCategory[NN_vmpushfd] = 1; // Virtual PC - Push virtualized flags register
-OptCategory[NN_vmpopfd] = 1; // Virtual PC - Pop virtualized flags register
-OptCategory[NN_vmcli] = 1; // Virtual PC - Clear Interrupt Flag
-OptCategory[NN_vmsti] = 1; // Virtual PC - Set Interrupt Flag
-OptCategory[NN_vmiretd] = 1; // Virtual PC - Return From Interrupt
-OptCategory[NN_vmsgdt] = 1; // Virtual PC - Store Global Descriptor Table
-OptCategory[NN_vmsidt] = 1; // Virtual PC - Store Interrupt Descriptor Table
-OptCategory[NN_vmsldt] = 1; // Virtual PC - Store Local Descriptor Table
-OptCategory[NN_vmstr] = 1; // Virtual PC - Store Task Register
-OptCategory[NN_vmsdte] = 1; // Virtual PC - Store to Descriptor Table Entry
-OptCategory[NN_vpcext] = 1; // Virtual PC - ISA extension
-
-#endif // 599 < IDA_SDK_VERSION
-
-OptCategory[NN_last] = 1;
-
- return;
-
-} // end InitOptCategory()
-
-// Initialize the StackAlteration[] array to define how opcodes
-// adjust the stack pointer.
-void InitStackAlteration(void) {
- // Default category is 0; most instructions do not alter the stack pointer.
- (void) memset(StackAlteration, 0, sizeof(StackAlteration));
-
- // Many arithmetic instructions could alter the stack pointer. We will have to
- // examine each instruction that performs addition, subtraction, logical AND, etc.,
- // to determine if the stack pointer was the DEF operand. We cannot use a purely
- // table driven approach to compute stack pointer alteration. The table is used for
- // the deterministic cases, e.g. push, pop, call, return. Because of variability on
- // a few of these instructions, a value of 1 in the table below is a trigger to investigate RTLs
- // that might or might not alter the stack pointer, e.g. add, subtract, etc., or that might
- // have operand-dependent effects on the stack pointer.
-
-StackAlteration[NN_add] = 1; // Addition; check operands for stack pointer
-StackAlteration[NN_adc] = 1; // Addition; check operands for stack pointer ; RARE for stack pointer
-StackAlteration[NN_and] = 1; // Logical AND; check operands for stack pointer
-StackAlteration[NN_call] = -((sval_t) STARS_ISA_Bytewidth); // Call Procedure; -4, but return cancels it to zero
-StackAlteration[NN_callfi] = -2 * ((sval_t) STARS_ISA_Bytewidth); // Indirect Call Far Procedure; -8, but far return cancels it to zero
-StackAlteration[NN_callni] = -((sval_t) STARS_ISA_Bytewidth); // Indirect Call Near Procedure; -4, but return cancels it to zero
-StackAlteration[NN_enterw] = 1; // Make Stack Frame for Procedure Parameters **
-StackAlteration[NN_enter] = 1; // Make Stack Frame for Procedure Parameters **
-StackAlteration[NN_enterd] = 1; // Make Stack Frame for Procedure Parameters **
-StackAlteration[NN_enterq] = 1; // Make Stack Frame for Procedure Parameters **
-StackAlteration[NN_int] = 0; // Call to Interrupt Procedure
-StackAlteration[NN_into] = 0; // Call to Interrupt Procedure if Overflow Flag = 1
-StackAlteration[NN_int3] = 0; // Trap to Debugger
-StackAlteration[NN_iretw] = 6; // Interrupt Return
-StackAlteration[NN_iret] = 12; // Interrupt Return
-StackAlteration[NN_iretd] = 12; // Interrupt Return (use32)
-StackAlteration[NN_iretq] = 40; // Interrupt Return (use64)
-StackAlteration[NN_lea] = 1; // Load Effective Address (can be used for basic arithmetic assignments)
-StackAlteration[NN_leavew] = 1; // High Level Procedure Exit **
-StackAlteration[NN_leave] = 1; // High Level Procedure Exit **
-StackAlteration[NN_leaved] = 1; // High Level Procedure Exit **
-StackAlteration[NN_leaveq] = 1; // High Level Procedure Exit **
-StackAlteration[NN_mov] = 1; // Move Data ; could be esp := ebp (deallocate stack frame) or esp := ebx (unknown)
-StackAlteration[NN_pop] = 1; // Pop a word from the Stack ; could be 16-bit or 32-bit operand, etc.
-StackAlteration[NN_popaw] = 14; // Pop all General Registers
-StackAlteration[NN_popa] = 28; // Pop all General Registers
-StackAlteration[NN_popad] = 28; // Pop all General Registers (use32)
-StackAlteration[NN_popaq] = 56; // Pop all General Registers (use64)
-StackAlteration[NN_popfw] = 2; // Pop Stack into Flags Register **
-StackAlteration[NN_popf] = 4; // Pop Stack into Flags Register **
-StackAlteration[NN_popfd] = 4; // Pop Stack into Eflags Register **
-StackAlteration[NN_popfq] = 8; // Pop Stack into Rflags Register **
-StackAlteration[NN_push] = 1; // Push Operand onto the Stack ; could be 16-bit or 32-bit operand, etc.
-StackAlteration[NN_pushaw] = -14; // Push all General Registers
-StackAlteration[NN_pusha] = -28; // Push all General Registers
-StackAlteration[NN_pushad] = -28; // Push all General Registers (use32)
-StackAlteration[NN_pushaq] = -56; // Push all General Registers (use64)
-StackAlteration[NN_pushfw] = -2; // Push Flags Register onto the Stack
-StackAlteration[NN_pushf] = -4; // Push Flags Register onto the Stack
-StackAlteration[NN_pushfd] = -4; // Push Flags Register onto the Stack (use32)
-StackAlteration[NN_pushfq] = -8; // Push Flags Register onto the Stack (use64)
-StackAlteration[NN_retn] = 1; // Return Near from Procedure (usually 4 bytes)
-StackAlteration[NN_retf] = 1; // Return Far from Procedure (usually 8 bytes)
-StackAlteration[NN_sub] = 1; // Subtraction; check operands for stack pointer
-StackAlteration[NN_sbb] = 1; // Subtraction; check operands for stack pointer ; RARE for stack pointer
-
-//
-// 486 instructions
-//
-
-
-//
-// Pentium instructions
-//
-
-
-//
-// Pentium Pro instructions
-//
-
-
-//
-// FPP instructions
-//
-
-
-//
-// 80387 instructions
-//
-
-//
-// Instructions added 28.02.96
-//
-
-StackAlteration[NN_loadall] = 0; // Load the entire CPU state from ES:EDI ?? Cannot find in Intel manuals
-
-//
-// MMX instructions
-//
-
-
-//
-// Undocumented Deschutes processor instructions
-//
-
-// Pentium II instructions
-
-StackAlteration[NN_sysenter] = 0; // Fast Transition to System Call Entry Point
-StackAlteration[NN_sysexit] = 0; // Fast Transition from System Call Entry Point
-
-// 3DNow! instructions
-
-
-// Pentium III instructions
-
-
-// Pentium III Pseudo instructions
-
-// AMD K7 instructions
-
-// Revisit AMD if we port to it.
-
-// Undocumented FP instructions (thanks to norbert.juffa@adm.com)
-
-// Pentium 4 instructions
-
-
-// AMD syscall/sysret instructions NOTE: not AMD, found in Intel manual
-
-StackAlteration[NN_syscall] = 0; // Low latency system call
-StackAlteration[NN_sysret] = 0; // Return from system call
-
-// AMD64 instructions NOTE: not AMD, found in Intel manual
-
-// New Pentium instructions (SSE3)
-
-
-// Missing AMD64 instructions NOTE: also found in Intel manual
-
-// SSE3 instructions
-
-// SSSE3 instructions
-
-
-// VMX instructions
-
-#if 599 < IDA_SDK_VERSION
-
-// Added with x86-64
-
-// Geode LX 3DNow! extensions
-
-// SSE2 pseudoinstructions
-
-
-// SSSE4.1 instructions
-
-
-// SSSE4.2 instructions
-
-// AMD SSE4a instructions
-
-// xsave/xrstor instructions
-
-// Intel Safer Mode Extensions (SMX)
-
-// AMD-V Virtualization ISA Extension
-
-// VMX+ instructions
-
-// Intel Atom instructions
-
-// Intel AES instructions
-
-// Carryless multiplication
-
-// Returns modified by operand size prefixes
-
-StackAlteration[NN_retnw] = 1; // Return Near from Procedure (use16)
-StackAlteration[NN_retnd] = 1; // Return Near from Procedure (use32)
-StackAlteration[NN_retnq] = 1; // Return Near from Procedure (use64)
-StackAlteration[NN_retfw] = 1; // Return Far from Procedure (use16)
-StackAlteration[NN_retfd] = 1; // Return Far from Procedure (use32)
-StackAlteration[NN_retfq] = 1; // Return Far from Procedure (use64)
-
-// RDRAND support
-
-// new GPR instructions
-
-// new AVX instructions
-
-// Transactional Synchronization Extensions
-
-// Virtual PC synthetic instructions
-
-#endif // 599 < IDA_SDK_VERSION
-
-StackAlteration[NN_last] = 0;
-
- return;
-
-} // end InitStackAlteration()
-
diff --git a/src/interfaces/abstract/Makefile.in b/src/interfaces/abstract/Makefile.in
index ab34b722..8bc9624e 100644
--- a/src/interfaces/abstract/Makefile.in
+++ b/src/interfaces/abstract/Makefile.in
@@ -1,5 +1,5 @@
-OBJS=STARSInstruction.o
+OBJS=STARSProgram.o STARSInstruction.o
CXX=@CXX@
LD=@LD@
EXTRA_CXXFLAGS=@EXTRA_CXXFLAGS@
diff --git a/src/interfaces/abstract/STARSProgram.cpp b/src/interfaces/abstract/STARSProgram.cpp
new file mode 100644
index 00000000..9c3711d5
--- /dev/null
+++ b/src/interfaces/abstract/STARSProgram.cpp
@@ -0,0 +1,5276 @@
+/* STARSProgram.cpp: Base class
+ * Copyright 2015 by Zephyr Software LLC
+ */
+
+#include "interfaces/STARSTypes.h"
+#include "interfaces/SMPDBInterface.h"
+// #include "interfaces/abstract/all.h"
+#include "base/SMPDataFlowAnalysis.h"
+
+using namespace std;
+
+// Data initialization
+bool STARS_Program_t::OpenFiles(void) {
+ string ZSTAlarmFileName(this->GetRootFileName());
+ string AlarmFileSuffix(".alarms");
+ ZSTAlarmFileName += AlarmFileSuffix;
+ string XrefsFileName(this->GetRootFileName());
+ string XrefsFileSuffix(".STARSxrefs");
+ XrefsFileName += XrefsFileSuffix;
+ string CallRetFileName(this->GetRootFileName());
+ string CallRetFileSuffix(".STARScallreturn");
+ CallRetFileName += CallRetFileSuffix;
+#if ZST_EMIT_SPARK_ADA_TRANSLATION
+ string SPARKSourceFileName(this->GetRootFileName());
+ string SPARKSourceFileSuffix(".ZSTSPARK.adb");
+ SPARKSourceFileName += SPARKSourceFileSuffix;
+ string SPARKHeaderFileName(this->GetRootFileName());
+ string SPARKHeaderFileSuffix(".ZSTSPARK.ads");
+ SPARKHeaderFileName += SPARKHeaderFileSuffix;
+#endif
+
+ this->STARS_XrefsFile = SMP_fopen(XrefsFileName.c_str(), "w");
+ if (NULL == this->STARS_XrefsFile) {
+ error("FATAL ERROR: Cannot open STARS code xrefs file %s\n", XrefsFileName.c_str());
+ return false;
+ }
+
+ this->STARS_CallReturnFile = SMP_fopen(CallRetFileName.c_str(), "w");
+ if (NULL == this->STARS_CallReturnFile) {
+ error("FATAL ERROR: Cannot open STARS calls and returns info file %s\n", CallRetFileName.c_str());
+ (void)SMP_fclose(this->STARS_XrefsFile);
+ return false;
+ }
+
+ this->ZST_AlarmFile = SMP_fopen(ZSTAlarmFileName.c_str(), "w");
+ if (NULL == this->ZST_AlarmFile) {
+ error("FATAL ERROR: Cannot open security alarms file %s\n", ZSTAlarmFileName.c_str());
+ SMP_fclose(this->STARS_XrefsFile);
+ SMP_fclose(this->STARS_CallReturnFile);
+ return false;
+ }
+
+#if ZST_EMIT_SPARK_ADA_TRANSLATION
+ this->ZST_SPARKSourceFile = SMP_fopen(SPARKSourceFileName.c_str(), "w");
+ if (NULL == this->ZST_SPARKSourceFile) {
+ error("FATAL ERROR: Cannot open SPARK-Ada source output file %s\n", SPARKSourceFileName.c_str());
+ SMP_fclose(this->STARS_XrefsFile);
+ SMP_fclose(this->STARS_CallReturnFile);
+ SMP_fclose(this->ZST_AlarmFile);
+ return false;
+ }
+ this->ZST_SPARKHeaderFile = SMP_fopen(SPARKHeaderFileName.c_str(), "w");
+ if (NULL == this->ZST_SPARKHeaderFile) {
+ error("FATAL ERROR: Cannot open SPARK-Ada header output file %s\n", SPARKHeaderFileName.c_str());
+ SMP_fclose(this->STARS_XrefsFile);
+ SMP_fclose(this->STARS_CallReturnFile);
+ SMP_fclose(this->ZST_AlarmFile);
+ SMP_fclose(this->ZST_SPARKSourceFile);
+ return false;
+ }
+#endif
+ return true;
+} // end of STARS_Program_t::OpenFiles()
+
+void STARS_Program_t::CloseFiles(void) {
+#if ZST_EMIT_SPARK_ADA_TRANSLATION
+ (void) SMP_fclose(this->ZST_SPARKSourceFile);
+ (void) SMP_fclose(this->ZST_SPARKHeaderFile);
+#endif
+ (void) SMP_fclose(this->ZST_AlarmFile);
+ (void) SMP_fclose(this->STARS_CallReturnFile);
+ (void) SMP_fclose(this->STARS_XrefsFile);
+ return;
+} // end of STARS_Program_t::CloseFiles()
+
+void STARS_Program_t::InitData(void) {
+ this->ZST_AlarmFile = NULL;
+ this->STARS_CallReturnFile = NULL;
+ this->STARS_XrefsFile = NULL;
+
+ // Initialize global counters for statistics-gathering purposes.
+ STARS_SPARK_IndentCount = 1;
+ UnusedStructCount = 0;
+ UnusedIntCount = 0;
+ DeadMetadataCount = 0;
+ LiveMetadataCount = 0;
+ ResolvedIndirectJumpCount = 0;
+ UnresolvedIndirectJumpCount = 0;
+ ConstantDEFCount = 0;
+ AlwaysTakenBranchCount = 0;
+ NeverTakenBranchCount = 0;
+ SubwordRegCount = 0;
+ SubwordMemCount = 0;
+ SubwordAddressRegCount = 0;
+ SPARKOperandCount = 0;
+#if SMP_COUNT_MEMORY_ALLOCATIONS
+ SMPInstCount = 0;
+ SMPBlockCount = 0;
+ SMPDefUseChainCount = 0;
+ SMPFuncCount = 0;
+ SMPGlobalVarCount = 0;
+ SMPLocalVarCount = 0;
+ SMPInstBytes = 0;
+ SMPDefUseChainBytes = 0;
+#endif
+#if SMP_MEASURE_NUMERIC_ANNOTATIONS
+ NumericAnnotationsCount12 = 0;
+ NumericAnnotationsCount3 = 0;
+ TruncationAnnotationsCount = 0;
+ SignednessWithoutTruncationCount = 0;
+ LeaInstOverflowCount = 0;
+ WidthDoublingTruncationCount = 0;
+ BenignOverflowInstCount = 0;
+ BenignOverflowDefCount = 0;
+ SuppressStackPtrOverflowCount = 0;
+ SuppressLiveFlagsOverflowCount = 0;
+ LiveMultiplyBitsCount = 0;
+ BenignTruncationCount = 0;
+ SuppressTruncationRegPiecesAllUsed = 0;
+ SuppressSignednessOnTruncation = 0;
+#endif
+#if STARS_SCCP_GATHER_STATISTICS
+ SCCPFuncsWithArgWriteCount = 0;
+ SCCPFuncsWithConstantArgWriteCount = 0;
+ SCCPOutgoingArgWriteCount = 0;
+ SCCPConstantOutgoingArgWriteCount = 0;
+#endif
+ STARS_MaxBlockCount = 0;
+
+ (void) memset(this->OptCount, 0, sizeof(this->OptCount));
+ (void) memset(this->AnnotationCount, 0, sizeof(this->AnnotationCount));
+ this->STARS_PerformReducedAnalysis = false;
+ this->DataReferentID = 1;
+ this->STARS_TotalCodeSize = 0;
+
+ this->InitOptCategory();
+ this->InitStackAlteration();
+ this->InitDFACategory();
+ this->InitTypeCategory();
+ this->InitSMPDefsFlags();
+ this->InitSMPUsesFlags();
+ this->InitLibFuncFGInfoMaps();
+ InitIntegerErrorCallSinkMap();
+ InitUnsignedArgPositionMap();
+ InitTaintWarningArgPositionMap();
+ InitPointerArgPositionMap();
+
+ return;
+} // end of STARS_Program_t::InitData()
+
+// These two constants should agree with their counterparts in ZST-policy.c.
+#define ZST_MAX_FILE_NAME_LEN 1024
+#define ZST_MAX_CALL_NAME_LEN 64
+
+// Convert a call type string from the policy file, such as "FILECALLS", to the
+// corresponding ZST_SysCallType, such as ZST_FILE_CALL.
+ZST_SysCallType STARS_Program_t::ConvertStringToCallType(char *Str2) {
+ ZST_SysCallType ReturnVal;
+ if (0 == strcmp("PRIVILEGECALLS", Str2)) {
+ ReturnVal = ZST_HIGHPRIVILEGE_CALL;
+ }
+ else if (0 == strcmp("FILECALLS", Str2)) {
+ ReturnVal = ZST_FILE_CALL;
+ }
+ else if (0 == strcmp("NETWORKCALLS", Str2)) {
+ ReturnVal = ZST_NETWORK_CALL;
+ }
+ else {
+ ReturnVal = ZST_UNMONITORED_CALL;
+ }
+ return ReturnVal;
+} // end of STARS_Program_t::ConvertStringToCallType()
+
+// Convert a policy string from the policy file, such as "DISALLOW", to
+// the corresponding ZST_Policy value, such as ZST_DISALLOW.
+ZST_Policy STARS_Program_t::ConvertStringToPolicy(char *Str3) {
+ ZST_Policy ReturnVal;
+ if (0 == strcmp("DISALLOW", Str3)) {
+ ReturnVal = ZST_DISALLOW;
+ }
+ else if (0 == strcmp("WHITELIST", Str3)) {
+ ReturnVal = ZST_WHITELIST;
+ }
+ else if (0 == strcmp("BLACKLIST", Str3)) {
+ ReturnVal = ZST_BLACKLIST;
+ }
+ else { // error handling precedes calls to this function
+ ReturnVal = ZST_ALLOWALL;
+ }
+ return ReturnVal;
+} // end of STARS_Program_t::ConvertStringToPolicy()
+
+// Given a function name, return its Zephyr Security Toolkit call type.
+ZST_SysCallType STARS_Program_t::GetCallTypeFromFuncName(string SysCallName) const {
+ ZST_SysCallType ReturnVal;
+ map<string, ZST_SysCallType>::const_iterator FindIter = this->ZST_FuncTypeMap.find(SysCallName);
+ if (FindIter == this->ZST_FuncTypeMap.end()) { // not found; might not even be system call
+ ReturnVal = ZST_UNMONITORED_CALL;
+ }
+ else {
+ ReturnVal = FindIter->second;
+ }
+ return ReturnVal;
+} // end of GetCallTypeFromFuncName()
+
+// Get the user-specified security policy for the given call type.
+ZST_Policy STARS_Program_t::GetPolicyFromCallType(ZST_SysCallType CallType) const {
+ ZST_Policy ReturnVal;
+ map<ZST_SysCallType, ZST_Policy>::const_iterator FindIter = ZST_TypePolicyMap.find(CallType);
+ if (FindIter == ZST_TypePolicyMap.end()) {
+ // Policy not found; default to ALLOW_ALL
+ ReturnVal = ZST_ALLOWALL;
+ }
+ else {
+ ReturnVal = FindIter->second;
+ }
+ return ReturnVal;
+} // end of STARS_Program_t::GetPolicyFromCallType()
+
+// Given a call type and called function name, is it on the location whitelist
+// for that call type?
+// NOTE: HANDLE CASE IN WHICH WHITELISTED LOCATION IS A PREFIX, TERMINATING in a slash.
+bool STARS_Program_t::IsLocationWhitelisted(ZST_SysCallType CallType, string LocationName) const {
+ set<string>::const_iterator FindIter;
+ bool ReturnVal;
+
+ if (CallType == ZST_FILE_CALL) {
+ FindIter = ZST_FileLocWhitelist.find(LocationName);
+ ReturnVal = (FindIter != ZST_FileLocWhitelist.end());
+ }
+ else if (CallType == ZST_NETWORK_CALL) {
+ FindIter = ZST_NetworkLocWhitelist.find(LocationName);
+ ReturnVal = (FindIter != ZST_NetworkLocWhitelist.end());
+ }
+ else { // should not be here
+ ReturnVal = false;
+ }
+ return ReturnVal;
+} // end of STARS_Program_t::IsLocationWhitelisted()
+
+// Given a call type and called function name, is it on the location blacklist
+// for that call type?
+// NOTE: HANDLE CASE IN WHICH BLACKLISTED LOCATION IS A PREFIX, TERMINATING in a slash.
+bool STARS_Program_t::IsLocationBlacklisted(ZST_SysCallType CallType, string LocationName) const {
+ set<string>::const_iterator FindIter;
+ bool ReturnVal;
+
+ if (CallType == ZST_FILE_CALL) {
+ FindIter = ZST_FileLocBlacklist.find(LocationName);
+ ReturnVal = (FindIter != ZST_FileLocBlacklist.end());
+ }
+ else if (CallType == ZST_NETWORK_CALL) {
+ FindIter = ZST_NetworkLocBlacklist.find(LocationName);
+ ReturnVal = (FindIter != ZST_NetworkLocBlacklist.end());
+ }
+ else { // should not be here
+ ReturnVal = false;
+ }
+ return ReturnVal;
+} // end of STARS_Program_t::IsLocationBlacklisted()
+
+// Given a called function name, does it produce only benign numeric errors when
+// its returned values are used in arithmetic? (i.e. it is a trusted input)
+bool STARS_Program_t::IsNumericSafeSystemCall(string CallName) const {
+ set<string>::const_iterator FindIter = ZST_SystemCallNumericWhitelist.find(CallName);
+ bool ReturnVal = (FindIter != ZST_SystemCallNumericWhitelist.end());
+ return ReturnVal;
+}
+
+// Utility functions to print code xrefs to STARS_XrefsFile
+void STARS_Program_t::PrintCodeToCodeXref(STARS_ea_t FromAddr, STARS_ea_t ToAddr, std::size_t InstrSize) {
+ SMP_fprintf(this->GetXrefsFile(), "%10lx %6zu INSTR XREF IBT FROMIB %10lx \n",
+ (unsigned long) ToAddr, InstrSize, (unsigned long) FromAddr);
+ return;
+}
+
+void STARS_Program_t::PrintDataToCodeXref(STARS_ea_t FromDataAddr, STARS_ea_t ToCodeAddr, std::size_t InstrSize) {
+ SMP_fprintf(this->GetXrefsFile(), "%10lx %6zu INSTR XREF IBT FROMDATA %10lx \n",
+ (unsigned long) ToCodeAddr, InstrSize, (unsigned long) FromDataAddr);
+ return;
+}
+
+// Read the foo.exe.policy file to initialize our security policies for system calls.
+void STARS_Program_t::ZST_InitPolicies(void) {
+ string ZSTPolicyFileName(this->GetRootFileName());
+ string PolicyFileSuffix(".policy");
+ ZSTPolicyFileName += PolicyFileSuffix;
+ FILE *PolicyFile = SMP_fopen(ZSTPolicyFileName.c_str(), "r");
+ char Str1[ZST_MAX_CALL_NAME_LEN], Str2[ZST_MAX_CALL_NAME_LEN], Str3[ZST_MAX_FILE_NAME_LEN];
+
+ string SafeSystemCall1("gettimeofday");
+ this->ZST_SystemCallNumericWhitelist.insert(SafeSystemCall1);
+
+ if (NULL != PolicyFile) {
+ while (!SMP_feof(PolicyFile)) {
+ int ItemsRead = qfscanf(PolicyFile, "%63s %63s %1023s", Str1, Str2, Str3);
+ if (3 != ItemsRead) {
+ SMP_msg("ERROR: Line in %s had %d items instead of the required 3; line ignored.\n", ZSTPolicyFileName.c_str(), ItemsRead);
+ }
+ else {
+ string ThirdStr(Str3);
+ pair<set<string>::iterator, bool> SetInsertResult;
+ if (0 == strcmp(Str1, "SECURITYPOLICY")) {
+ ZST_SysCallType TempCallType = ConvertStringToCallType(Str2);
+ ZST_Policy TempPolicy = ConvertStringToPolicy(Str3);
+ pair<map<ZST_SysCallType, ZST_Policy>::iterator, bool> InsertResult;
+ pair<ZST_SysCallType, ZST_Policy> TempPair(TempCallType, TempPolicy);
+ InsertResult = this->ZST_TypePolicyMap.insert(TempPair);
+ if (!(InsertResult.second)) {
+ SMP_msg("ERROR: Could not insert security policy %s for %s. Possible duplicate or conflicting policies.\n",
+ Str3, Str2);
+ }
+ }
+ else if (0 == strcmp(Str1, "FILELOCATION")) {
+ if (0 == strcmp(Str2, "WHITELIST")) {
+ SetInsertResult = this->ZST_FileLocWhitelist.insert(ThirdStr);
+ if (!(SetInsertResult.second)) {
+ SMP_msg("WARNING: Duplicate file whitelist location %s ignored.\n", Str3);
+ }
+ }
+ else if (0 == strcmp(Str2, "BLACKLIST")) {
+ SetInsertResult = this->ZST_FileLocBlacklist.insert(ThirdStr);
+ if (!(SetInsertResult.second)) {
+ SMP_msg("WARNING: Duplicate file blacklist location %s ignored.\n", Str3);
+ }
+ }
+ else {
+ SMP_msg("ERROR: Unknown second field value in policy line: %s %s %s ; ignored\n", Str1, Str2, Str3);
+ }
+ }
+ else if (0 == strcmp(Str1, "NETWORKLOCATION")) {
+ if (0 == strcmp(Str2, "WHITELIST")) {
+ SetInsertResult = this->ZST_NetworkLocWhitelist.insert(ThirdStr);
+ if (!(SetInsertResult.second)) {
+ SMP_msg("WARNING: Duplicate network whitelist location %s ignored.\n", Str3);
+ }
+ }
+ else if (0 == strcmp(Str2, "BLACKLIST")) {
+ SetInsertResult = this->ZST_NetworkLocBlacklist.insert(ThirdStr);
+ if (!(SetInsertResult.second)) {
+ SMP_msg("WARNING: Duplicate network blacklist location %s ignored.\n", Str3);
+ }
+ }
+ else {
+ SMP_msg("ERROR: Unknown second field value in policy line: %s %s %s ; ignored\n", Str1, Str2, Str3);
+ }
+ }
+ else {
+ SMP_msg("ERROR: Unknown first field value in policy line: %s %s %s ; ignored\n", Str1, Str2, Str3);
+ }
+ }
+ }
+ if (0 == SMP_fclose(PolicyFile)) {
+ SMP_msg("Policy file %s successfully closed; all policies recorded.\n", ZSTPolicyFileName.c_str());
+ }
+ else {
+ SMP_msg("ERROR: fclose failed on policy file %s. However, policies should be in effect.\n", ZSTPolicyFileName.c_str());
+ }
+ // Now, initialize the system call name maps.
+ pair<map<string, ZST_SysCallType>::iterator, bool> FuncInsertResult;
+ // Do all the high privilege calls first.
+ string SysFuncName("putenv");
+ pair<string, ZST_SysCallType> FuncNamePolicyPair(SysFuncName, ZST_HIGHPRIVILEGE_CALL);
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("setenv");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("setegid");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("seteuid");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("setgid");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("setpgid");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("setregid");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("setreuid");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("setuid");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("execl");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("execv");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("execle");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("execve");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("execlp");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("execvp");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("system");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+
+ // Now do all the file operation calls.
+ FuncNamePolicyPair.second = ZST_FILE_CALL;
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("chdir");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("chmod");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("chown");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("creat");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("creat64");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("fopen");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("freopen");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("open");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("open64");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("mknod");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("remove");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("rmdir");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("unlink");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+
+ // Finally, handle all the network connection calls.
+ FuncNamePolicyPair.second = ZST_NETWORK_CALL;
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("socket");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("socketpair");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("pipe");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("bind");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("listen");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("accept");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ FuncNamePolicyPair.first.clear();
+ FuncNamePolicyPair.first.append("connect");
+ FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
+ assert(FuncInsertResult.second);
+ }
+ else {
+ SMP_msg("WARNING: No policy file %s found. System call policies not in effect.\n", ZSTPolicyFileName.c_str());
+ }
+ return;
+} // end of STARS_Program_t::ZST_InitPolicies()
+
+// Initialize the OptCategory[] array to define how we emit optimizing annotations.
+void STARS_Program_t::InitOptCategory(void) {
+ // Default category is 0, no optimization without knowing context.
+ (void)memset(OptCategory, 0, sizeof(OptCategory));
+ // Category 1 instructions never need updating of their memory
+ // metadata by the Memory Monitor SDT. Currently, this is because
+ // these instructions only have effects on registers we do not maintain
+ // metadata for, such as the EIP and the FLAGS, e.g. jumps, compares,
+ // or because they are no-ops, including machine-dependent no-op idioms.
+ // Effects on floating-point regs are always NUMERIC and can be put into
+ // categury 1 because mmStrata knows these registers are NUMERIC and does
+ // not keep a metadata map for them.
+ // Category 2 instructions always have a result type of 'n' (number).
+ // Category 3 instructions have a result type of 'n' (number)
+ // whenever the second source operand is an operand of type 'n'.
+ // NOTE: MOV is only current example, and this will take some thought if
+ // other examples arise.
+ // Category 4 instructions have a result type identical to the 1st source operand type.
+ // NOTE: This is currently set for single-operand instructions such as
+ // INC, DEC. As a result, these are treated pretty much as if
+ // they were category 1 instructions, as there is no metadata update,
+ // unless the operand is a memory operand (i.e. mem or [reg]).
+ // If new instructions are added to this category that are not single
+ // operand and do require some updating, the category should be split.
+ // Category 5 instructions have a result type identical to the 1st source operand
+ // type whenever the 2nd source operand is an operand of type 'n'.
+ // If the destination is memory, metadata still needs to be checked; if
+ // not, no metadata check is needed, so it becomes category 1.
+ // Category 6 instructions always have a result type of 'p' (pointer).
+ // Category 7 instructions are category 2 instructions with two destinations,
+ // such as multiply and divide instructions that affect EDX:EAX. There are
+ // forms of these instructions that only have one destination, so they have
+ // to be distinguished via the operand info.
+ // Category 8 instructions implicitly write a numeric value to EDX:EAX, but
+ // EDX and EAX are not listed as operands. RDTSC, RDPMC, RDMSR, and other
+ // instructions that copy machine registers into EDX:EAX are category 8.
+ // Category 9 instructions are floating point instructions that either
+ // have a memory destination (treat as category 0) or a FP reg destination
+ // (treat as category 1).
+ // Category 10 instructions are the same as category 8, but also write
+ // to register ECX in addition to EDX:EAX.
+
+ // NOTE: The Memory Monitor SDT needs just three categories, corresponding
+ // to categories 0, 1, and all others. For all categories > 1, the
+ // annotation should tell the SDT exactly how to update its metadata.
+ // For example, a division instruction will write type 'n' (NUM) as
+ // the metadata for result registers EDX:EAX. So, the annotation should
+ // list 'n', EDX, EAX, and a terminator of ZZ. CWD (convert word to
+ // doubleword) should have a list of 'n', EAX, ZZ.
+
+ OptCategory[STARS_NN_null] = 0; // Unknown Operation
+ OptCategory[STARS_NN_aaa] = 2; // ASCII Adjust after Addition
+ OptCategory[STARS_NN_aad] = 2; // ASCII Adjust AX before Division
+ OptCategory[STARS_NN_aam] = 2; // ASCII Adjust AX after Multiply
+ OptCategory[STARS_NN_aas] = 2; // ASCII Adjust AL after Subtraction
+ OptCategory[STARS_NN_adc] = 5; // Add with Carry
+ OptCategory[STARS_NN_add] = 5; // Add
+ OptCategory[STARS_NN_and] = 0; // Logical AND
+ OptCategory[STARS_NN_arpl] = 1; // Adjust RPL Field of Selector
+ OptCategory[STARS_NN_bound] = 1; // Check Array Index Against Bounds
+ OptCategory[STARS_NN_bsf] = 2; // Bit Scan Forward
+ OptCategory[STARS_NN_bsr] = 2; // Bit Scan Reverse
+ OptCategory[STARS_NN_bt] = 0; // Bit Test
+ OptCategory[STARS_NN_btc] = 0; // Bit Test and Complement
+ OptCategory[STARS_NN_btr] = 0; // Bit Test and Reset
+ OptCategory[STARS_NN_bts] = 0; // Bit Test and Set
+ OptCategory[STARS_NN_call] = 1; // Call Procedure
+ OptCategory[STARS_NN_callfi] = 1; // Indirect Call Far Procedure
+ OptCategory[STARS_NN_callni] = 1; // Indirect Call Near Procedure
+ OptCategory[STARS_NN_cbw] = 2; // AL -> AX (with sign) ** No ops?
+ OptCategory[STARS_NN_cwde] = 2; // AX -> EAX (with sign) **
+ OptCategory[STARS_NN_cdqe] = 2; // EAX -> RAX (with sign) **
+ OptCategory[STARS_NN_clc] = 1; // Clear Carry Flag
+ OptCategory[STARS_NN_cld] = 1; // Clear Direction Flag
+ OptCategory[STARS_NN_cli] = 1; // Clear Interrupt Flag
+ OptCategory[STARS_NN_clts] = 1; // Clear Task-Switched Flag in CR0
+ OptCategory[STARS_NN_cmc] = 1; // Complement Carry Flag
+ OptCategory[STARS_NN_cmp] = 1; // Compare Two Operands
+ OptCategory[STARS_NN_cmps] = 1; // Compare Strings
+ OptCategory[STARS_NN_cwd] = 2; // AX -> DX:AX (with sign)
+ OptCategory[STARS_NN_cdq] = 2; // EAX -> EDX:EAX (with sign)
+ OptCategory[STARS_NN_cqo] = 2; // RAX -> RDX:RAX (with sign)
+ OptCategory[STARS_NN_daa] = 2; // Decimal Adjust AL after Addition
+ OptCategory[STARS_NN_das] = 2; // Decimal Adjust AL after Subtraction
+ OptCategory[STARS_NN_dec] = 4; // Decrement by 1
+ OptCategory[STARS_NN_div] = 7; // Unsigned Divide
+ OptCategory[STARS_NN_enterw] = 0; // Make Stack Frame for Procedure Parameters **
+ OptCategory[STARS_NN_enter] = 0; // Make Stack Frame for Procedure Parameters **
+ OptCategory[STARS_NN_enterd] = 0; // Make Stack Frame for Procedure Parameters **
+ OptCategory[STARS_NN_enterq] = 0; // Make Stack Frame for Procedure Parameters **
+ OptCategory[STARS_NN_hlt] = 0; // Halt
+ OptCategory[STARS_NN_idiv] = 7; // Signed Divide
+ OptCategory[STARS_NN_imul] = 7; // Signed Multiply
+ OptCategory[STARS_NN_in] = 0; // Input from Port **
+ OptCategory[STARS_NN_inc] = 4; // Increment by 1
+ OptCategory[STARS_NN_ins] = 2; // Input Byte(s) from Port to String **
+ OptCategory[STARS_NN_int] = 0; // Call to Interrupt Procedure
+ OptCategory[STARS_NN_into] = 0; // Call to Interrupt Procedure if Overflow Flag = 1
+ OptCategory[STARS_NN_int3] = 0; // Trap to Debugger
+ OptCategory[STARS_NN_iretw] = 0; // Interrupt Return
+ OptCategory[STARS_NN_iret] = 0; // Interrupt Return
+ OptCategory[STARS_NN_iretd] = 0; // Interrupt Return (use32)
+ OptCategory[STARS_NN_iretq] = 0; // Interrupt Return (use64)
+ OptCategory[STARS_NN_ja] = 1; // Jump if Above (CF=0 & ZF=0)
+ OptCategory[STARS_NN_jae] = 1; // Jump if Above or Equal (CF=0)
+ OptCategory[STARS_NN_jb] = 1; // Jump if Below (CF=1)
+ OptCategory[STARS_NN_jbe] = 1; // Jump if Below or Equal (CF=1 | ZF=1)
+ OptCategory[STARS_NN_jc] = 1; // Jump if Carry (CF=1)
+ OptCategory[STARS_NN_jcxz] = 1; // Jump if CX is 0
+ OptCategory[STARS_NN_jecxz] = 1; // Jump if ECX is 0
+ OptCategory[STARS_NN_jrcxz] = 1; // Jump if RCX is 0
+ OptCategory[STARS_NN_je] = 1; // Jump if Equal (ZF=1)
+ OptCategory[STARS_NN_jg] = 1; // Jump if Greater (ZF=0 & SF=OF)
+ OptCategory[STARS_NN_jge] = 1; // Jump if Greater or Equal (SF=OF)
+ OptCategory[STARS_NN_jl] = 1; // Jump if Less (SF!=OF)
+ OptCategory[STARS_NN_jle] = 1; // Jump if Less or Equal (ZF=1 | SF!=OF)
+ OptCategory[STARS_NN_jna] = 1; // Jump if Not Above (CF=1 | ZF=1)
+ OptCategory[STARS_NN_jnae] = 1; // Jump if Not Above or Equal (CF=1)
+ OptCategory[STARS_NN_jnb] = 1; // Jump if Not Below (CF=0)
+ OptCategory[STARS_NN_jnbe] = 1; // Jump if Not Below or Equal (CF=0 & ZF=0)
+ OptCategory[STARS_NN_jnc] = 1; // Jump if Not Carry (CF=0)
+ OptCategory[STARS_NN_jne] = 1; // Jump if Not Equal (ZF=0)
+ OptCategory[STARS_NN_jng] = 1; // Jump if Not Greater (ZF=1 | SF!=OF)
+ OptCategory[STARS_NN_jnge] = 1; // Jump if Not Greater or Equal (SF!=OF)
+ OptCategory[STARS_NN_jnl] = 1; // Jump if Not Less (SF=OF)
+ OptCategory[STARS_NN_jnle] = 1; // Jump if Not Less or Equal (ZF=0 & SF=OF)
+ OptCategory[STARS_NN_jno] = 1; // Jump if Not Overflow (OF=0)
+ OptCategory[STARS_NN_jnp] = 1; // Jump if Not Parity (PF=0)
+ OptCategory[STARS_NN_jns] = 1; // Jump if Not Sign (SF=0)
+ OptCategory[STARS_NN_jnz] = 1; // Jump if Not Zero (ZF=0)
+ OptCategory[STARS_NN_jo] = 1; // Jump if Overflow (OF=1)
+ OptCategory[STARS_NN_jp] = 1; // Jump if Parity (PF=1)
+ OptCategory[STARS_NN_jpe] = 1; // Jump if Parity Even (PF=1)
+ OptCategory[STARS_NN_jpo] = 1; // Jump if Parity Odd (PF=0)
+ OptCategory[STARS_NN_js] = 1; // Jump if Sign (SF=1)
+ OptCategory[STARS_NN_jz] = 1; // Jump if Zero (ZF=1)
+ OptCategory[STARS_NN_jmp] = 1; // Jump
+ OptCategory[STARS_NN_jmpfi] = 1; // Indirect Far Jump
+ OptCategory[STARS_NN_jmpni] = 1; // Indirect Near Jump
+ OptCategory[STARS_NN_jmpshort] = 1; // Jump Short (not used)
+ OptCategory[STARS_NN_lahf] = 2; // Load Flags into AH Register
+ OptCategory[STARS_NN_lar] = 2; // Load Access Rights Byte
+ OptCategory[STARS_NN_lea] = 0; // Load Effective Address **
+ OptCategory[STARS_NN_leavew] = 0; // High Level Procedure Exit **
+ OptCategory[STARS_NN_leave] = 0; // High Level Procedure Exit **
+ OptCategory[STARS_NN_leaved] = 0; // High Level Procedure Exit **
+ OptCategory[STARS_NN_leaveq] = 0; // High Level Procedure Exit **
+ OptCategory[STARS_NN_lgdt] = 0; // Load Global Descriptor Table Register
+ OptCategory[STARS_NN_lidt] = 0; // Load Interrupt Descriptor Table Register
+ OptCategory[STARS_NN_lgs] = 6; // Load Full Pointer to GS:xx
+ OptCategory[STARS_NN_lss] = 6; // Load Full Pointer to SS:xx
+ OptCategory[STARS_NN_lds] = 6; // Load Full Pointer to DS:xx
+ OptCategory[STARS_NN_les] = 6; // Load Full Pointer to ES:xx
+ OptCategory[STARS_NN_lfs] = 6; // Load Full Pointer to FS:xx
+ OptCategory[STARS_NN_lldt] = 0; // Load Local Descriptor Table Register
+ OptCategory[STARS_NN_lmsw] = 1; // Load Machine Status Word
+ OptCategory[STARS_NN_lock] = 1; // Assert LOCK# Signal Prefix
+ OptCategory[STARS_NN_lods] = 0; // Load String
+ OptCategory[STARS_NN_loopw] = 1; // Loop while ECX != 0
+ OptCategory[STARS_NN_loop] = 1; // Loop while CX != 0
+ OptCategory[STARS_NN_loopd] = 1; // Loop while ECX != 0
+ OptCategory[STARS_NN_loopq] = 1; // Loop while RCX != 0
+ OptCategory[STARS_NN_loopwe] = 1; // Loop while CX != 0 and ZF=1
+ OptCategory[STARS_NN_loope] = 1; // Loop while rCX != 0 and ZF=1
+ OptCategory[STARS_NN_loopde] = 1; // Loop while ECX != 0 and ZF=1
+ OptCategory[STARS_NN_loopqe] = 1; // Loop while RCX != 0 and ZF=1
+ OptCategory[STARS_NN_loopwne] = 1; // Loop while CX != 0 and ZF=0
+ OptCategory[STARS_NN_loopne] = 1; // Loop while rCX != 0 and ZF=0
+ OptCategory[STARS_NN_loopdne] = 1; // Loop while ECX != 0 and ZF=0
+ OptCategory[STARS_NN_loopqne] = 1; // Loop while RCX != 0 and ZF=0
+ OptCategory[STARS_NN_lsl] = 6; // Load Segment Limit
+ OptCategory[STARS_NN_ltr] = 1; // Load Task Register
+ OptCategory[STARS_NN_mov] = 3; // Move Data
+ OptCategory[STARS_NN_movsp] = 3; // Move to/from Special Registers
+ OptCategory[STARS_NN_movs] = 0; // Move Byte(s) from String to String
+ OptCategory[STARS_NN_movsx] = 3; // Move with Sign-Extend
+ OptCategory[STARS_NN_movzx] = 3; // Move with Zero-Extend
+ OptCategory[STARS_NN_mul] = 7; // Unsigned Multiplication of AL or AX
+ OptCategory[STARS_NN_neg] = 2; // Two's Complement Negation !!!!****!!!! Change this when mmStrata handles NEGATEDPTR type.
+ OptCategory[STARS_NN_nop] = 1; // No Operation
+ OptCategory[STARS_NN_not] = 2; // One's Complement Negation
+ OptCategory[STARS_NN_or] = 0; // Logical Inclusive OR
+ OptCategory[STARS_NN_out] = 0; // Output to Port
+ OptCategory[STARS_NN_outs] = 0; // Output Byte(s) to Port
+ OptCategory[STARS_NN_pop] = 0; // Pop a word from the Stack
+ OptCategory[STARS_NN_popaw] = 0; // Pop all General Registers
+ OptCategory[STARS_NN_popa] = 0; // Pop all General Registers
+ OptCategory[STARS_NN_popad] = 0; // Pop all General Registers (use32)
+ OptCategory[STARS_NN_popaq] = 0; // Pop all General Registers (use64)
+ OptCategory[STARS_NN_popfw] = 1; // Pop Stack into Flags Register **
+ OptCategory[STARS_NN_popf] = 1; // Pop Stack into Flags Register **
+ OptCategory[STARS_NN_popfd] = 1; // Pop Stack into Eflags Register **
+ OptCategory[STARS_NN_popfq] = 1; // Pop Stack into Rflags Register **
+ OptCategory[STARS_NN_push] = 0; // Push Operand onto the Stack
+ OptCategory[STARS_NN_pushaw] = 0; // Push all General Registers
+ OptCategory[STARS_NN_pusha] = 0; // Push all General Registers
+ OptCategory[STARS_NN_pushad] = 0; // Push all General Registers (use32)
+ OptCategory[STARS_NN_pushaq] = 0; // Push all General Registers (use64)
+ OptCategory[STARS_NN_pushfw] = 0; // Push Flags Register onto the Stack
+ OptCategory[STARS_NN_pushf] = 0; // Push Flags Register onto the Stack
+ OptCategory[STARS_NN_pushfd] = 0; // Push Flags Register onto the Stack (use32)
+ OptCategory[STARS_NN_pushfq] = 0; // Push Flags Register onto the Stack (use64)
+ OptCategory[STARS_NN_rcl] = 2; // Rotate Through Carry Left
+ OptCategory[STARS_NN_rcr] = 2; // Rotate Through Carry Right
+ OptCategory[STARS_NN_rol] = 2; // Rotate Left
+ OptCategory[STARS_NN_ror] = 2; // Rotate Right
+ OptCategory[STARS_NN_rep] = 0; // Repeat String Operation
+ OptCategory[STARS_NN_repe] = 0; // Repeat String Operation while ZF=1
+ OptCategory[STARS_NN_repne] = 0; // Repeat String Operation while ZF=0
+ OptCategory[STARS_NN_retn] = 0; // Return Near from Procedure
+ OptCategory[STARS_NN_retf] = 0; // Return Far from Procedure
+ OptCategory[STARS_NN_sahf] = 1; // Store AH into Flags Register
+ OptCategory[STARS_NN_sal] = 2; // Shift Arithmetic Left
+ OptCategory[STARS_NN_sar] = 2; // Shift Arithmetic Right
+ OptCategory[STARS_NN_shl] = 2; // Shift Logical Left
+ OptCategory[STARS_NN_shr] = 2; // Shift Logical Right
+ OptCategory[STARS_NN_sbb] = 5; // Integer Subtraction with Borrow
+ OptCategory[STARS_NN_scas] = 1; // Compare String
+ OptCategory[STARS_NN_seta] = 2; // Set Byte if Above (CF=0 & ZF=0)
+ OptCategory[STARS_NN_setae] = 2; // Set Byte if Above or Equal (CF=0)
+ OptCategory[STARS_NN_setb] = 2; // Set Byte if Below (CF=1)
+ OptCategory[STARS_NN_setbe] = 2; // Set Byte if Below or Equal (CF=1 | ZF=1)
+ OptCategory[STARS_NN_setc] = 2; // Set Byte if Carry (CF=1)
+ OptCategory[STARS_NN_sete] = 2; // Set Byte if Equal (ZF=1)
+ OptCategory[STARS_NN_setg] = 2; // Set Byte if Greater (ZF=0 & SF=OF)
+ OptCategory[STARS_NN_setge] = 2; // Set Byte if Greater or Equal (SF=OF)
+ OptCategory[STARS_NN_setl] = 2; // Set Byte if Less (SF!=OF)
+ OptCategory[STARS_NN_setle] = 2; // Set Byte if Less or Equal (ZF=1 | SF!=OF)
+ OptCategory[STARS_NN_setna] = 2; // Set Byte if Not Above (CF=1 | ZF=1)
+ OptCategory[STARS_NN_setnae] = 2; // Set Byte if Not Above or Equal (CF=1)
+ OptCategory[STARS_NN_setnb] = 2; // Set Byte if Not Below (CF=0)
+ OptCategory[STARS_NN_setnbe] = 2; // Set Byte if Not Below or Equal (CF=0 & ZF=0)
+ OptCategory[STARS_NN_setnc] = 2; // Set Byte if Not Carry (CF=0)
+ OptCategory[STARS_NN_setne] = 2; // Set Byte if Not Equal (ZF=0)
+ OptCategory[STARS_NN_setng] = 2; // Set Byte if Not Greater (ZF=1 | SF!=OF)
+ OptCategory[STARS_NN_setnge] = 2; // Set Byte if Not Greater or Equal (SF!=OF)
+ OptCategory[STARS_NN_setnl] = 2; // Set Byte if Not Less (SF=OF)
+ OptCategory[STARS_NN_setnle] = 2; // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
+ OptCategory[STARS_NN_setno] = 2; // Set Byte if Not Overflow (OF=0)
+ OptCategory[STARS_NN_setnp] = 2; // Set Byte if Not Parity (PF=0)
+ OptCategory[STARS_NN_setns] = 2; // Set Byte if Not Sign (SF=0)
+ OptCategory[STARS_NN_setnz] = 2; // Set Byte if Not Zero (ZF=0)
+ OptCategory[STARS_NN_seto] = 2; // Set Byte if Overflow (OF=1)
+ OptCategory[STARS_NN_setp] = 2; // Set Byte if Parity (PF=1)
+ OptCategory[STARS_NN_setpe] = 2; // Set Byte if Parity Even (PF=1)
+ OptCategory[STARS_NN_setpo] = 2; // Set Byte if Parity Odd (PF=0)
+ OptCategory[STARS_NN_sets] = 2; // Set Byte if Sign (SF=1)
+ OptCategory[STARS_NN_setz] = 2; // Set Byte if Zero (ZF=1)
+ OptCategory[STARS_NN_sgdt] = 0; // Store Global Descriptor Table Register
+ OptCategory[STARS_NN_sidt] = 0; // Store Interrupt Descriptor Table Register
+ OptCategory[STARS_NN_shld] = 2; // Double Precision Shift Left
+ OptCategory[STARS_NN_shrd] = 2; // Double Precision Shift Right
+ OptCategory[STARS_NN_sldt] = 6; // Store Local Descriptor Table Register
+ OptCategory[STARS_NN_smsw] = 2; // Store Machine Status Word
+ OptCategory[STARS_NN_stc] = 1; // Set Carry Flag
+ OptCategory[STARS_NN_std] = 1; // Set Direction Flag
+ OptCategory[STARS_NN_sti] = 1; // Set Interrupt Flag
+ OptCategory[STARS_NN_stos] = 0; // Store String
+ OptCategory[STARS_NN_str] = 6; // Store Task Register
+ OptCategory[STARS_NN_sub] = 5; // Integer Subtraction
+ OptCategory[STARS_NN_test] = 1; // Logical Compare
+ OptCategory[STARS_NN_verr] = 1; // Verify a Segment for Reading
+ OptCategory[STARS_NN_verw] = 1; // Verify a Segment for Writing
+ OptCategory[STARS_NN_wait] = 1; // Wait until BUSY# Pin is Inactive (HIGH)
+ OptCategory[STARS_NN_xchg] = 0; // Exchange Register/Memory with Register
+ OptCategory[STARS_NN_xlat] = 0; // Table Lookup Translation
+ OptCategory[STARS_NN_xor] = 2; // Logical Exclusive OR
+
+ //
+ // 486 instructions
+ //
+
+ OptCategory[STARS_NN_cmpxchg] = 0; // Compare and Exchange
+ OptCategory[STARS_NN_bswap] = 2; // Swap bytes in register
+ OptCategory[STARS_NN_xadd] = 0; // t<-dest; dest<-src+dest; src<-t
+ OptCategory[STARS_NN_invd] = 1; // Invalidate Data Cache
+ OptCategory[STARS_NN_wbinvd] = 1; // Invalidate Data Cache (write changes)
+ OptCategory[STARS_NN_invlpg] = 1; // Invalidate TLB entry
+
+ //
+ // Pentium instructions
+ //
+
+ OptCategory[STARS_NN_rdmsr] = 8; // Read Machine Status Register
+ OptCategory[STARS_NN_wrmsr] = 1; // Write Machine Status Register
+ OptCategory[STARS_NN_cpuid] = 8; // Get CPU ID
+ OptCategory[STARS_NN_cmpxchg8b] = 0; // Compare and Exchange Eight Bytes
+ OptCategory[STARS_NN_rdtsc] = 8; // Read Time Stamp Counter
+ OptCategory[STARS_NN_rsm] = 1; // Resume from System Management Mode
+
+ //
+ // Pentium Pro instructions
+ //
+
+ OptCategory[STARS_NN_cmova] = 0; // Move if Above (CF=0 & ZF=0)
+ OptCategory[STARS_NN_cmovb] = 0; // Move if Below (CF=1)
+ OptCategory[STARS_NN_cmovbe] = 0; // Move if Below or Equal (CF=1 | ZF=1)
+ OptCategory[STARS_NN_cmovg] = 0; // Move if Greater (ZF=0 & SF=OF)
+ OptCategory[STARS_NN_cmovge] = 0; // Move if Greater or Equal (SF=OF)
+ OptCategory[STARS_NN_cmovl] = 0; // Move if Less (SF!=OF)
+ OptCategory[STARS_NN_cmovle] = 0; // Move if Less or Equal (ZF=1 | SF!=OF)
+ OptCategory[STARS_NN_cmovnb] = 0; // Move if Not Below (CF=0)
+ OptCategory[STARS_NN_cmovno] = 0; // Move if Not Overflow (OF=0)
+ OptCategory[STARS_NN_cmovnp] = 0; // Move if Not Parity (PF=0)
+ OptCategory[STARS_NN_cmovns] = 0; // Move if Not Sign (SF=0)
+ OptCategory[STARS_NN_cmovnz] = 0; // Move if Not Zero (ZF=0)
+ OptCategory[STARS_NN_cmovo] = 0; // Move if Overflow (OF=1)
+ OptCategory[STARS_NN_cmovp] = 0; // Move if Parity (PF=1)
+ OptCategory[STARS_NN_cmovs] = 0; // Move if Sign (SF=1)
+ OptCategory[STARS_NN_cmovz] = 0; // Move if Zero (ZF=1)
+ OptCategory[STARS_NN_fcmovb] = 1; // Floating Move if Below
+ OptCategory[STARS_NN_fcmove] = 1; // Floating Move if Equal
+ OptCategory[STARS_NN_fcmovbe] = 1; // Floating Move if Below or Equal
+ OptCategory[STARS_NN_fcmovu] = 1; // Floating Move if Unordered
+ OptCategory[STARS_NN_fcmovnb] = 1; // Floating Move if Not Below
+ OptCategory[STARS_NN_fcmovne] = 1; // Floating Move if Not Equal
+ OptCategory[STARS_NN_fcmovnbe] = 1; // Floating Move if Not Below or Equal
+ OptCategory[STARS_NN_fcmovnu] = 1; // Floating Move if Not Unordered
+ OptCategory[STARS_NN_fcomi] = 1; // FP Compare, result in EFLAGS
+ OptCategory[STARS_NN_fucomi] = 1; // FP Unordered Compare, result in EFLAGS
+ OptCategory[STARS_NN_fcomip] = 1; // FP Compare, result in EFLAGS, pop stack
+ OptCategory[STARS_NN_fucomip] = 1; // FP Unordered Compare, result in EFLAGS, pop stack
+ OptCategory[STARS_NN_rdpmc] = 8; // Read Performance Monitor Counter
+
+ //
+ // FPP instructions
+ //
+
+ OptCategory[STARS_NN_fld] = 1; // Load Real ** Infer src is 'n'
+ OptCategory[STARS_NN_fst] = 9; // Store Real
+ OptCategory[STARS_NN_fstp] = 9; // Store Real and Pop
+ OptCategory[STARS_NN_fxch] = 1; // Exchange Registers
+ OptCategory[STARS_NN_fild] = 1; // Load Integer ** Infer src is 'n'
+ OptCategory[STARS_NN_fist] = 0; // Store Integer
+ OptCategory[STARS_NN_fistp] = 0; // Store Integer and Pop
+ OptCategory[STARS_NN_fbld] = 1; // Load BCD
+ OptCategory[STARS_NN_fbstp] = 0; // Store BCD and Pop
+ OptCategory[STARS_NN_fadd] = 1; // Add Real
+ OptCategory[STARS_NN_faddp] = 1; // Add Real and Pop
+ OptCategory[STARS_NN_fiadd] = 1; // Add Integer
+ OptCategory[STARS_NN_fsub] = 1; // Subtract Real
+ OptCategory[STARS_NN_fsubp] = 1; // Subtract Real and Pop
+ OptCategory[STARS_NN_fisub] = 1; // Subtract Integer
+ OptCategory[STARS_NN_fsubr] = 1; // Subtract Real Reversed
+ OptCategory[STARS_NN_fsubrp] = 1; // Subtract Real Reversed and Pop
+ OptCategory[STARS_NN_fisubr] = 1; // Subtract Integer Reversed
+ OptCategory[STARS_NN_fmul] = 1; // Multiply Real
+ OptCategory[STARS_NN_fmulp] = 1; // Multiply Real and Pop
+ OptCategory[STARS_NN_fimul] = 1; // Multiply Integer
+ OptCategory[STARS_NN_fdiv] = 1; // Divide Real
+ OptCategory[STARS_NN_fdivp] = 1; // Divide Real and Pop
+ OptCategory[STARS_NN_fidiv] = 1; // Divide Integer
+ OptCategory[STARS_NN_fdivr] = 1; // Divide Real Reversed
+ OptCategory[STARS_NN_fdivrp] = 1; // Divide Real Reversed and Pop
+ OptCategory[STARS_NN_fidivr] = 1; // Divide Integer Reversed
+ OptCategory[STARS_NN_fsqrt] = 1; // Square Root
+ OptCategory[STARS_NN_fscale] = 1; // Scale: st(0) <- st(0) * 2^st(1)
+ OptCategory[STARS_NN_fprem] = 1; // Partial Remainder
+ OptCategory[STARS_NN_frndint] = 1; // Round to Integer
+ OptCategory[STARS_NN_fxtract] = 1; // Extract exponent and significand
+ OptCategory[STARS_NN_fabs] = 1; // Absolute value
+ OptCategory[STARS_NN_fchs] = 1; // Change Sign
+ OptCategory[STARS_NN_fcom] = 1; // Compare Real
+ OptCategory[STARS_NN_fcomp] = 1; // Compare Real and Pop
+ OptCategory[STARS_NN_fcompp] = 1; // Compare Real and Pop Twice
+ OptCategory[STARS_NN_ficom] = 1; // Compare Integer
+ OptCategory[STARS_NN_ficomp] = 1; // Compare Integer and Pop
+ OptCategory[STARS_NN_ftst] = 1; // Test
+ OptCategory[STARS_NN_fxam] = 1; // Examine
+ OptCategory[STARS_NN_fptan] = 1; // Partial tangent
+ OptCategory[STARS_NN_fpatan] = 1; // Partial arctangent
+ OptCategory[STARS_NN_f2xm1] = 1; // 2^x - 1
+ OptCategory[STARS_NN_fyl2x] = 1; // Y * lg2(X)
+ OptCategory[STARS_NN_fyl2xp1] = 1; // Y * lg2(X+1)
+ OptCategory[STARS_NN_fldz] = 1; // Load +0.0
+ OptCategory[STARS_NN_fld1] = 1; // Load +1.0
+ OptCategory[STARS_NN_fldpi] = 1; // Load PI=3.14...
+ OptCategory[STARS_NN_fldl2t] = 1; // Load lg2(10)
+ OptCategory[STARS_NN_fldl2e] = 1; // Load lg2(e)
+ OptCategory[STARS_NN_fldlg2] = 1; // Load lg10(2)
+ OptCategory[STARS_NN_fldln2] = 1; // Load ln(2)
+ OptCategory[STARS_NN_finit] = 1; // Initialize Processor
+ OptCategory[STARS_NN_fninit] = 1; // Initialize Processor (no wait)
+ OptCategory[STARS_NN_fsetpm] = 1; // Set Protected Mode
+ OptCategory[STARS_NN_fldcw] = 1; // Load Control Word
+ OptCategory[STARS_NN_fstcw] = 0; // Store Control Word
+ OptCategory[STARS_NN_fnstcw] = 0; // Store Control Word (no wait)
+ OptCategory[STARS_NN_fstsw] = 2; // Store Status Word to memory or AX
+ OptCategory[STARS_NN_fnstsw] = 2; // Store Status Word (no wait) to memory or AX
+ OptCategory[STARS_NN_fclex] = 1; // Clear Exceptions
+ OptCategory[STARS_NN_fnclex] = 1; // Clear Exceptions (no wait)
+ OptCategory[STARS_NN_fstenv] = 0; // Store Environment
+ OptCategory[STARS_NN_fnstenv] = 0; // Store Environment (no wait)
+ OptCategory[STARS_NN_fldenv] = 1; // Load Environment
+ OptCategory[STARS_NN_fsave] = 0; // Save State
+ OptCategory[STARS_NN_fnsave] = 0; // Save State (no wait)
+ OptCategory[STARS_NN_frstor] = 1; // Restore State ** infer src is 'n'
+ OptCategory[STARS_NN_fincstp] = 1; // Increment Stack Pointer
+ OptCategory[STARS_NN_fdecstp] = 1; // Decrement Stack Pointer
+ OptCategory[STARS_NN_ffree] = 1; // Free Register
+ OptCategory[STARS_NN_fnop] = 1; // No Operation
+ OptCategory[STARS_NN_feni] = 1; // (8087 only)
+ OptCategory[STARS_NN_fneni] = 1; // (no wait) (8087 only)
+ OptCategory[STARS_NN_fdisi] = 1; // (8087 only)
+ OptCategory[STARS_NN_fndisi] = 1; // (no wait) (8087 only)
+
+ //
+ // 80387 instructions
+ //
+
+ OptCategory[STARS_NN_fprem1] = 1; // Partial Remainder ( < half )
+ OptCategory[STARS_NN_fsincos] = 1; // t<-cos(st); st<-sin(st); push t
+ OptCategory[STARS_NN_fsin] = 1; // Sine
+ OptCategory[STARS_NN_fcos] = 1; // Cosine
+ OptCategory[STARS_NN_fucom] = 1; // Compare Unordered Real
+ OptCategory[STARS_NN_fucomp] = 1; // Compare Unordered Real and Pop
+ OptCategory[STARS_NN_fucompp] = 1; // Compare Unordered Real and Pop Twice
+
+ //
+ // Instructions added 28.02.96
+ //
+
+ OptCategory[STARS_NN_setalc] = 2; // Set AL to Carry Flag **
+ OptCategory[STARS_NN_svdc] = 0; // Save Register and Descriptor
+ OptCategory[STARS_NN_rsdc] = 0; // Restore Register and Descriptor
+ OptCategory[STARS_NN_svldt] = 0; // Save LDTR and Descriptor
+ OptCategory[STARS_NN_rsldt] = 0; // Restore LDTR and Descriptor
+ OptCategory[STARS_NN_svts] = 1; // Save TR and Descriptor
+ OptCategory[STARS_NN_rsts] = 1; // Restore TR and Descriptor
+ OptCategory[STARS_NN_icebp] = 1; // ICE Break Point
+ OptCategory[STARS_NN_loadall] = 0; // Load the entire CPU state from ES:EDI
+
+ //
+ // MMX instructions
+ //
+
+ OptCategory[STARS_NN_emms] = 1; // Empty MMX state
+ OptCategory[STARS_NN_movd] = 9; // Move 32 bits
+ OptCategory[STARS_NN_movq] = 9; // Move 64 bits
+ OptCategory[STARS_NN_packsswb] = 1; // Pack with Signed Saturation (Word->Byte)
+ OptCategory[STARS_NN_packssdw] = 1; // Pack with Signed Saturation (Dword->Word)
+ OptCategory[STARS_NN_packuswb] = 1; // Pack with Unsigned Saturation (Word->Byte)
+ OptCategory[STARS_NN_paddb] = 1; // Packed Add Byte
+ OptCategory[STARS_NN_paddw] = 1; // Packed Add Word
+ OptCategory[STARS_NN_paddd] = 1; // Packed Add Dword
+ OptCategory[STARS_NN_paddsb] = 1; // Packed Add with Saturation (Byte)
+ OptCategory[STARS_NN_paddsw] = 1; // Packed Add with Saturation (Word)
+ OptCategory[STARS_NN_paddusb] = 1; // Packed Add Unsigned with Saturation (Byte)
+ OptCategory[STARS_NN_paddusw] = 1; // Packed Add Unsigned with Saturation (Word)
+ OptCategory[STARS_NN_pand] = 1; // Bitwise Logical And
+ OptCategory[STARS_NN_pandn] = 1; // Bitwise Logical And Not
+ OptCategory[STARS_NN_pcmpeqb] = 1; // Packed Compare for Equal (Byte)
+ OptCategory[STARS_NN_pcmpeqw] = 1; // Packed Compare for Equal (Word)
+ OptCategory[STARS_NN_pcmpeqd] = 1; // Packed Compare for Equal (Dword)
+ OptCategory[STARS_NN_pcmpgtb] = 1; // Packed Compare for Greater Than (Byte)
+ OptCategory[STARS_NN_pcmpgtw] = 1; // Packed Compare for Greater Than (Word)
+ OptCategory[STARS_NN_pcmpgtd] = 1; // Packed Compare for Greater Than (Dword)
+ OptCategory[STARS_NN_pmaddwd] = 1; // Packed Multiply and Add
+ OptCategory[STARS_NN_pmulhw] = 1; // Packed Multiply High
+ OptCategory[STARS_NN_pmullw] = 1; // Packed Multiply Low
+ OptCategory[STARS_NN_por] = 1; // Bitwise Logical Or
+ OptCategory[STARS_NN_psllw] = 1; // Packed Shift Left Logical (Word)
+ OptCategory[STARS_NN_pslld] = 1; // Packed Shift Left Logical (Dword)
+ OptCategory[STARS_NN_psllq] = 1; // Packed Shift Left Logical (Qword)
+ OptCategory[STARS_NN_psraw] = 1; // Packed Shift Right Arithmetic (Word)
+ OptCategory[STARS_NN_psrad] = 1; // Packed Shift Right Arithmetic (Dword)
+ OptCategory[STARS_NN_psrlw] = 1; // Packed Shift Right Logical (Word)
+ OptCategory[STARS_NN_psrld] = 1; // Packed Shift Right Logical (Dword)
+ OptCategory[STARS_NN_psrlq] = 1; // Packed Shift Right Logical (Qword)
+ OptCategory[STARS_NN_psubb] = 1; // Packed Subtract Byte
+ OptCategory[STARS_NN_psubw] = 1; // Packed Subtract Word
+ OptCategory[STARS_NN_psubd] = 1; // Packed Subtract Dword
+ OptCategory[STARS_NN_psubsb] = 1; // Packed Subtract with Saturation (Byte)
+ OptCategory[STARS_NN_psubsw] = 1; // Packed Subtract with Saturation (Word)
+ OptCategory[STARS_NN_psubusb] = 1; // Packed Subtract Unsigned with Saturation (Byte)
+ OptCategory[STARS_NN_psubusw] = 1; // Packed Subtract Unsigned with Saturation (Word)
+ OptCategory[STARS_NN_punpckhbw] = 1; // Unpack High Packed Data (Byte->Word)
+ OptCategory[STARS_NN_punpckhwd] = 1; // Unpack High Packed Data (Word->Dword)
+ OptCategory[STARS_NN_punpckhdq] = 1; // Unpack High Packed Data (Dword->Qword)
+ OptCategory[STARS_NN_punpcklbw] = 1; // Unpack Low Packed Data (Byte->Word)
+ OptCategory[STARS_NN_punpcklwd] = 1; // Unpack Low Packed Data (Word->Dword)
+ OptCategory[STARS_NN_punpckldq] = 1; // Unpack Low Packed Data (Dword->Qword)
+ OptCategory[STARS_NN_pxor] = 1; // Bitwise Logical Exclusive Or
+
+ //
+ // Undocumented Deschutes processor instructions
+ //
+
+ OptCategory[STARS_NN_fxsave] = 1; // Fast save FP context ** to where?
+ OptCategory[STARS_NN_fxrstor] = 1; // Fast restore FP context ** from where?
+
+ // Pentium II instructions
+
+ OptCategory[STARS_NN_sysenter] = 1; // Fast Transition to System Call Entry Point
+ OptCategory[STARS_NN_sysexit] = 1; // Fast Transition from System Call Entry Point
+
+ // 3DNow! instructions
+
+ OptCategory[STARS_NN_pavgusb] = 1; // Packed 8-bit Unsigned Integer Averaging
+ OptCategory[STARS_NN_pfadd] = 1; // Packed Floating-Point Addition
+ OptCategory[STARS_NN_pfsub] = 1; // Packed Floating-Point Subtraction
+ OptCategory[STARS_NN_pfsubr] = 1; // Packed Floating-Point Reverse Subtraction
+ OptCategory[STARS_NN_pfacc] = 1; // Packed Floating-Point Accumulate
+ OptCategory[STARS_NN_pfcmpge] = 1; // Packed Floating-Point Comparison, Greater or Equal
+ OptCategory[STARS_NN_pfcmpgt] = 1; // Packed Floating-Point Comparison, Greater
+ OptCategory[STARS_NN_pfcmpeq] = 1; // Packed Floating-Point Comparison, Equal
+ OptCategory[STARS_NN_pfmin] = 1; // Packed Floating-Point Minimum
+ OptCategory[STARS_NN_pfmax] = 1; // Packed Floating-Point Maximum
+ OptCategory[STARS_NN_pi2fd] = 1; // Packed 32-bit Integer to Floating-Point
+ OptCategory[STARS_NN_pf2id] = 1; // Packed Floating-Point to 32-bit Integer
+ OptCategory[STARS_NN_pfrcp] = 1; // Packed Floating-Point Reciprocal Approximation
+ OptCategory[STARS_NN_pfrsqrt] = 1; // Packed Floating-Point Reciprocal Square Root Approximation
+ OptCategory[STARS_NN_pfmul] = 1; // Packed Floating-Point Multiplication
+ OptCategory[STARS_NN_pfrcpit1] = 1; // Packed Floating-Point Reciprocal First Iteration Step
+ OptCategory[STARS_NN_pfrsqit1] = 1; // Packed Floating-Point Reciprocal Square Root First Iteration Step
+ OptCategory[STARS_NN_pfrcpit2] = 1; // Packed Floating-Point Reciprocal Second Iteration Step
+ OptCategory[STARS_NN_pmulhrw] = 1; // Packed Floating-Point 16-bit Integer Multiply with rounding
+ OptCategory[STARS_NN_femms] = 1; // Faster entry/exit of the MMX or floating-point state
+ OptCategory[STARS_NN_prefetch] = 1; // Prefetch at least a 32-byte line into L1 data cache
+ OptCategory[STARS_NN_prefetchw] = 1; // Prefetch processor cache line into L1 data cache (mark as modified)
+
+
+ // Pentium III instructions
+
+ OptCategory[STARS_NN_addps] = 1; // Packed Single-FP Add
+ OptCategory[STARS_NN_addss] = 1; // Scalar Single-FP Add
+ OptCategory[STARS_NN_andnps] = 1; // Bitwise Logical And Not for Single-FP
+ OptCategory[STARS_NN_andps] = 1; // Bitwise Logical And for Single-FP
+ OptCategory[STARS_NN_cmpps] = 1; // Packed Single-FP Compare
+ OptCategory[STARS_NN_cmpss] = 1; // Scalar Single-FP Compare
+ OptCategory[STARS_NN_comiss] = 1; // Scalar Ordered Single-FP Compare and Set EFLAGS
+ OptCategory[STARS_NN_cvtpi2ps] = 1; // Packed signed INT32 to Packed Single-FP conversion
+ OptCategory[STARS_NN_cvtps2pi] = 1; // Packed Single-FP to Packed INT32 conversion
+ OptCategory[STARS_NN_cvtsi2ss] = 1; // Scalar signed INT32 to Single-FP conversion
+ OptCategory[STARS_NN_cvtss2si] = 2; // Scalar Single-FP to signed INT32 conversion
+ OptCategory[STARS_NN_cvttps2pi] = 1; // Packed Single-FP to Packed INT32 conversion (truncate)
+ OptCategory[STARS_NN_cvttss2si] = 2; // Scalar Single-FP to signed INT32 conversion (truncate)
+ OptCategory[STARS_NN_divps] = 1; // Packed Single-FP Divide
+ OptCategory[STARS_NN_divss] = 1; // Scalar Single-FP Divide
+ OptCategory[STARS_NN_ldmxcsr] = 1; // Load Streaming SIMD Extensions Technology Control/Status Register
+ OptCategory[STARS_NN_maxps] = 1; // Packed Single-FP Maximum
+ OptCategory[STARS_NN_maxss] = 1; // Scalar Single-FP Maximum
+ OptCategory[STARS_NN_minps] = 1; // Packed Single-FP Minimum
+ OptCategory[STARS_NN_minss] = 1; // Scalar Single-FP Minimum
+ OptCategory[STARS_NN_movaps] = 9; // Move Aligned Four Packed Single-FP ** infer memsrc 'n'?
+ OptCategory[STARS_NN_movhlps] = 1; // Move High to Low Packed Single-FP
+ OptCategory[STARS_NN_movhps] = 1; // Move High Packed Single-FP
+ OptCategory[STARS_NN_movlhps] = 1; // Move Low to High Packed Single-FP
+ OptCategory[STARS_NN_movlps] = 1; // Move Low Packed Single-FP
+ OptCategory[STARS_NN_movmskps] = 1; // Move Mask to Register
+ OptCategory[STARS_NN_movss] = 9; // Move Scalar Single-FP
+ OptCategory[STARS_NN_movups] = 9; // Move Unaligned Four Packed Single-FP
+ OptCategory[STARS_NN_mulps] = 1; // Packed Single-FP Multiply
+ OptCategory[STARS_NN_mulss] = 1; // Scalar Single-FP Multiply
+ OptCategory[STARS_NN_orps] = 1; // Bitwise Logical OR for Single-FP Data
+ OptCategory[STARS_NN_rcpps] = 1; // Packed Single-FP Reciprocal
+ OptCategory[STARS_NN_rcpss] = 1; // Scalar Single-FP Reciprocal
+ OptCategory[STARS_NN_rsqrtps] = 1; // Packed Single-FP Square Root Reciprocal
+ OptCategory[STARS_NN_rsqrtss] = 1; // Scalar Single-FP Square Root Reciprocal
+ OptCategory[STARS_NN_shufps] = 1; // Shuffle Single-FP
+ OptCategory[STARS_NN_sqrtps] = 1; // Packed Single-FP Square Root
+ OptCategory[STARS_NN_sqrtss] = 1; // Scalar Single-FP Square Root
+ OptCategory[STARS_NN_stmxcsr] = 0; // Store Streaming SIMD Extensions Technology Control/Status Register ** Infer dest is 'n'
+ OptCategory[STARS_NN_subps] = 1; // Packed Single-FP Subtract
+ OptCategory[STARS_NN_subss] = 1; // Scalar Single-FP Subtract
+ OptCategory[STARS_NN_ucomiss] = 1; // Scalar Unordered Single-FP Compare and Set EFLAGS
+ OptCategory[STARS_NN_unpckhps] = 1; // Unpack High Packed Single-FP Data
+ OptCategory[STARS_NN_unpcklps] = 1; // Unpack Low Packed Single-FP Data
+ OptCategory[STARS_NN_xorps] = 1; // Bitwise Logical XOR for Single-FP Data
+ OptCategory[STARS_NN_pavgb] = 1; // Packed Average (Byte)
+ OptCategory[STARS_NN_pavgw] = 1; // Packed Average (Word)
+ OptCategory[STARS_NN_pextrw] = 2; // Extract Word
+ OptCategory[STARS_NN_pinsrw] = 1; // Insert Word
+ OptCategory[STARS_NN_pmaxsw] = 1; // Packed Signed Integer Word Maximum
+ OptCategory[STARS_NN_pmaxub] = 1; // Packed Unsigned Integer Byte Maximum
+ OptCategory[STARS_NN_pminsw] = 1; // Packed Signed Integer Word Minimum
+ OptCategory[STARS_NN_pminub] = 1; // Packed Unsigned Integer Byte Minimum
+ OptCategory[STARS_NN_pmovmskb] = 1; // Move Byte Mask to Integer
+ OptCategory[STARS_NN_pmulhuw] = 1; // Packed Multiply High Unsigned
+ OptCategory[STARS_NN_psadbw] = 1; // Packed Sum of Absolute Differences
+ OptCategory[STARS_NN_pshufw] = 1; // Packed Shuffle Word
+ OptCategory[STARS_NN_maskmovq] = 0; // Byte Mask write ** Infer dest is 'n'
+ OptCategory[STARS_NN_movntps] = 0; // Move Aligned Four Packed Single-FP Non Temporal * infer dest is 'n'
+ OptCategory[STARS_NN_movntq] = 0; // Move 64 Bits Non Temporal ** Infer dest is 'n'
+ OptCategory[STARS_NN_prefetcht0] = 1; // Prefetch to all cache levels
+ OptCategory[STARS_NN_prefetcht1] = 1; // Prefetch to all cache levels
+ OptCategory[STARS_NN_prefetcht2] = 1; // Prefetch to L2 cache
+ OptCategory[STARS_NN_prefetchnta] = 1; // Prefetch to L1 cache
+ OptCategory[STARS_NN_sfence] = 1; // Store Fence
+
+ // Pentium III Pseudo instructions
+
+ OptCategory[STARS_NN_cmpeqps] = 1; // Packed Single-FP Compare EQ
+ OptCategory[STARS_NN_cmpltps] = 1; // Packed Single-FP Compare LT
+ OptCategory[STARS_NN_cmpleps] = 1; // Packed Single-FP Compare LE
+ OptCategory[STARS_NN_cmpunordps] = 1; // Packed Single-FP Compare UNORD
+ OptCategory[STARS_NN_cmpneqps] = 1; // Packed Single-FP Compare NOT EQ
+ OptCategory[STARS_NN_cmpnltps] = 1; // Packed Single-FP Compare NOT LT
+ OptCategory[STARS_NN_cmpnleps] = 1; // Packed Single-FP Compare NOT LE
+ OptCategory[STARS_NN_cmpordps] = 1; // Packed Single-FP Compare ORDERED
+ OptCategory[STARS_NN_cmpeqss] = 1; // Scalar Single-FP Compare EQ
+ OptCategory[STARS_NN_cmpltss] = 1; // Scalar Single-FP Compare LT
+ OptCategory[STARS_NN_cmpless] = 1; // Scalar Single-FP Compare LE
+ OptCategory[STARS_NN_cmpunordss] = 1; // Scalar Single-FP Compare UNORD
+ OptCategory[STARS_NN_cmpneqss] = 1; // Scalar Single-FP Compare NOT EQ
+ OptCategory[STARS_NN_cmpnltss] = 1; // Scalar Single-FP Compare NOT LT
+ OptCategory[STARS_NN_cmpnless] = 1; // Scalar Single-FP Compare NOT LE
+ OptCategory[STARS_NN_cmpordss] = 1; // Scalar Single-FP Compare ORDERED
+
+ // AMD K7 instructions
+
+ // Revisit AMD if we port to it.
+ OptCategory[STARS_NN_pf2iw] = 0; // Packed Floating-Point to Integer with Sign Extend
+ OptCategory[STARS_NN_pfnacc] = 0; // Packed Floating-Point Negative Accumulate
+ OptCategory[STARS_NN_pfpnacc] = 0; // Packed Floating-Point Mixed Positive-Negative Accumulate
+ OptCategory[STARS_NN_pi2fw] = 0; // Packed 16-bit Integer to Floating-Point
+ OptCategory[STARS_NN_pswapd] = 0; // Packed Swap Double Word
+
+ // Undocumented FP instructions (thanks to norbert.juffa@adm.com)
+
+ OptCategory[STARS_NN_fstp1] = 9; // Alias of Store Real and Pop
+ OptCategory[STARS_NN_fcom2] = 1; // Alias of Compare Real
+ OptCategory[STARS_NN_fcomp3] = 1; // Alias of Compare Real and Pop
+ OptCategory[STARS_NN_fxch4] = 1; // Alias of Exchange Registers
+ OptCategory[STARS_NN_fcomp5] = 1; // Alias of Compare Real and Pop
+ OptCategory[STARS_NN_ffreep] = 1; // Free Register and Pop
+ OptCategory[STARS_NN_fxch7] = 1; // Alias of Exchange Registers
+ OptCategory[STARS_NN_fstp8] = 9; // Alias of Store Real and Pop
+ OptCategory[STARS_NN_fstp9] = 9; // Alias of Store Real and Pop
+
+ // Pentium 4 instructions
+
+ OptCategory[STARS_NN_addpd] = 1; // Add Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_addsd] = 1; // Add Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_andnpd] = 1; // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_andpd] = 1; // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_clflush] = 1; // Flush Cache Line
+ OptCategory[STARS_NN_cmppd] = 1; // Compare Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_cmpsd] = 1; // Compare Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_comisd] = 1; // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ OptCategory[STARS_NN_cvtdq2pd] = 1; // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_cvtdq2ps] = 1; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_cvtpd2dq] = 1; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ OptCategory[STARS_NN_cvtpd2pi] = 1; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ OptCategory[STARS_NN_cvtpd2ps] = 1; // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_cvtpi2pd] = 1; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_cvtps2dq] = 1; // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ OptCategory[STARS_NN_cvtps2pd] = 1; // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_cvtsd2si] = 2; // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ OptCategory[STARS_NN_cvtsd2ss] = 1; // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
+ OptCategory[STARS_NN_cvtsi2sd] = 1; // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
+ OptCategory[STARS_NN_cvtss2sd] = 1; // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
+ OptCategory[STARS_NN_cvttpd2dq] = 1; // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ OptCategory[STARS_NN_cvttpd2pi] = 1; // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ OptCategory[STARS_NN_cvttps2dq] = 1; // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ OptCategory[STARS_NN_cvttsd2si] = 2; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ OptCategory[STARS_NN_divpd] = 1; // Divide Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_divsd] = 1; // Divide Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_lfence] = 1; // Load Fence
+ OptCategory[STARS_NN_maskmovdqu] = 0; // Store Selected Bytes of Double Quadword ** Infer dest is 'n'
+ OptCategory[STARS_NN_maxpd] = 1; // Return Maximum Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_maxsd] = 1; // Return Maximum Scalar Double-Precision Floating-Point Value
+ OptCategory[STARS_NN_mfence] = 1; // Memory Fence
+ OptCategory[STARS_NN_minpd] = 1; // Return Minimum Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_minsd] = 1; // Return Minimum Scalar Double-Precision Floating-Point Value
+ OptCategory[STARS_NN_movapd] = 9; // Move Aligned Packed Double-Precision Floating-Point Values ** Infer dest is 'n'
+ OptCategory[STARS_NN_movdq2q] = 1; // Move Quadword from XMM to MMX Register
+ OptCategory[STARS_NN_movdqa] = 9; // Move Aligned Double Quadword ** Infer dest is 'n'
+ OptCategory[STARS_NN_movdqu] = 9; // Move Unaligned Double Quadword ** Infer dest is 'n'
+ OptCategory[STARS_NN_movhpd] = 9; // Move High Packed Double-Precision Floating-Point Values ** Infer dest is 'n'
+ OptCategory[STARS_NN_movlpd] = 9; // Move Low Packed Double-Precision Floating-Point Values ** Infer dest is 'n'
+ OptCategory[STARS_NN_movmskpd] = 2; // Extract Packed Double-Precision Floating-Point Sign Mask
+ OptCategory[STARS_NN_movntdq] = 0; // Store Double Quadword Using Non-Temporal Hint
+ OptCategory[STARS_NN_movnti] = 0; // Store Doubleword Using Non-Temporal Hint
+ OptCategory[STARS_NN_movntpd] = 0; // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
+ OptCategory[STARS_NN_movq2dq] = 1; // Move Quadword from MMX to XMM Register
+ OptCategory[STARS_NN_movsd] = 9; // Move Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_movupd] = 9; // Move Unaligned Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_mulpd] = 1; // Multiply Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_mulsd] = 1; // Multiply Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_orpd] = 1; // Bitwise Logical OR of Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_paddq] = 1; // Add Packed Quadword Integers
+ OptCategory[STARS_NN_pause] = 1; // Spin Loop Hint
+ OptCategory[STARS_NN_pmuludq] = 1; // Multiply Packed Unsigned Doubleword Integers
+ OptCategory[STARS_NN_pshufd] = 1; // Shuffle Packed Doublewords
+ OptCategory[STARS_NN_pshufhw] = 1; // Shuffle Packed High Words
+ OptCategory[STARS_NN_pshuflw] = 1; // Shuffle Packed Low Words
+ OptCategory[STARS_NN_pslldq] = 1; // Shift Double Quadword Left Logical
+ OptCategory[STARS_NN_psrldq] = 1; // Shift Double Quadword Right Logical
+ OptCategory[STARS_NN_psubq] = 1; // Subtract Packed Quadword Integers
+ OptCategory[STARS_NN_punpckhqdq] = 1; // Unpack High Data
+ OptCategory[STARS_NN_punpcklqdq] = 1; // Unpack Low Data
+ OptCategory[STARS_NN_shufpd] = 1; // Shuffle Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_sqrtpd] = 1; // Compute Square Roots of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_sqrtsd] = 1; // Compute Square Rootof Scalar Double-Precision Floating-Point Value
+ OptCategory[STARS_NN_subpd] = 1; // Subtract Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_subsd] = 1; // Subtract Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_ucomisd] = 1; // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ OptCategory[STARS_NN_unpckhpd] = 1; // Unpack and Interleave High Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_unpcklpd] = 1; // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_xorpd] = 1; // Bitwise Logical OR of Double-Precision Floating-Point Values
+
+
+ // AMD syscall/sysret instructions NOTE: not AMD, found in Intel manual
+
+ OptCategory[STARS_NN_syscall] = 1; // Low latency system call
+ OptCategory[STARS_NN_sysret] = 1; // Return from system call
+
+ // AMD64 instructions NOTE: not AMD, found in Intel manual
+
+ OptCategory[STARS_NN_swapgs] = 1; // Exchange GS base with KernelGSBase MSR
+
+ // New Pentium instructions (SSE3)
+
+ OptCategory[STARS_NN_movddup] = 9; // Move One Double-FP and Duplicate
+ OptCategory[STARS_NN_movshdup] = 9; // Move Packed Single-FP High and Duplicate
+ OptCategory[STARS_NN_movsldup] = 9; // Move Packed Single-FP Low and Duplicate
+
+ // Missing AMD64 instructions NOTE: also found in Intel manual
+
+ OptCategory[STARS_NN_movsxd] = 2; // Move with Sign-Extend Doubleword
+ OptCategory[STARS_NN_cmpxchg16b] = 0; // Compare and Exchange 16 Bytes
+
+ // SSE3 instructions
+
+ OptCategory[STARS_NN_addsubpd] = 1; // Add /Sub packed DP FP numbers
+ OptCategory[STARS_NN_addsubps] = 1; // Add /Sub packed SP FP numbers
+ OptCategory[STARS_NN_haddpd] = 1; // Add horizontally packed DP FP numbers
+ OptCategory[STARS_NN_haddps] = 1; // Add horizontally packed SP FP numbers
+ OptCategory[STARS_NN_hsubpd] = 1; // Sub horizontally packed DP FP numbers
+ OptCategory[STARS_NN_hsubps] = 1; // Sub horizontally packed SP FP numbers
+ OptCategory[STARS_NN_monitor] = 1; // Set up a linear address range to be monitored by hardware
+ OptCategory[STARS_NN_mwait] = 1; // Wait until write-back store performed within the range specified by the MONITOR instruction
+ OptCategory[STARS_NN_fisttp] = 0; // Store ST in intXX (chop) and pop
+ OptCategory[STARS_NN_lddqu] = 1; // Load unaligned integer 128-bit
+
+ // SSSE3 instructions
+
+ OptCategory[STARS_NN_psignb] = 1; // Packed SIGN Byte
+ OptCategory[STARS_NN_psignw] = 1; // Packed SIGN Word
+ OptCategory[STARS_NN_psignd] = 1; // Packed SIGN Doubleword
+ OptCategory[STARS_NN_pshufb] = 1; // Packed Shuffle Bytes
+ OptCategory[STARS_NN_pmulhrsw] = 1; // Packed Multiply High with Round and Scale
+ OptCategory[STARS_NN_pmaddubsw] = 1; // Multiply and Add Packed Signed and Unsigned Bytes
+ OptCategory[STARS_NN_phsubsw] = 1; // Packed Horizontal Subtract and Saturate
+ OptCategory[STARS_NN_phaddsw] = 1; // Packed Horizontal Add and Saturate
+ OptCategory[STARS_NN_phaddw] = 1; // Packed Horizontal Add Word
+ OptCategory[STARS_NN_phaddd] = 1; // Packed Horizontal Add Doubleword
+ OptCategory[STARS_NN_phsubw] = 1; // Packed Horizontal Subtract Word
+ OptCategory[STARS_NN_phsubd] = 1; // Packed Horizontal Subtract Doubleword
+ OptCategory[STARS_NN_palignr] = 1; // Packed Align Right
+ OptCategory[STARS_NN_pabsb] = 1; // Packed Absolute Value Byte
+ OptCategory[STARS_NN_pabsw] = 1; // Packed Absolute Value Word
+ OptCategory[STARS_NN_pabsd] = 1; // Packed Absolute Value Doubleword
+
+ // VMX instructions
+
+ OptCategory[STARS_NN_vmcall] = 1; // Call to VM Monitor
+ OptCategory[STARS_NN_vmclear] = 0; // Clear Virtual Machine Control Structure
+ OptCategory[STARS_NN_vmlaunch] = 1; // Launch Virtual Machine
+ OptCategory[STARS_NN_vmresume] = 1; // Resume Virtual Machine
+ OptCategory[STARS_NN_vmptrld] = 6; // Load Pointer to Virtual Machine Control Structure
+ OptCategory[STARS_NN_vmptrst] = 0; // Store Pointer to Virtual Machine Control Structure
+ OptCategory[STARS_NN_vmread] = 0; // Read Field from Virtual Machine Control Structure
+ OptCategory[STARS_NN_vmwrite] = 0; // Write Field from Virtual Machine Control Structure
+ OptCategory[STARS_NN_vmxoff] = 1; // Leave VMX Operation
+ OptCategory[STARS_NN_vmxon] = 1; // Enter VMX Operation
+
+#if 599 < IDA_SDK_VERSION
+
+ OptCategory[STARS_NN_ud2] = 1; // Undefined Instruction
+
+ // Added with x86-64
+
+ OptCategory[STARS_NN_rdtscp] = 10; // Read Time-Stamp Counter and Processor ID
+
+ // Geode LX 3DNow! extensions
+
+ OptCategory[STARS_NN_pfrcpv] = 1; // Reciprocal Approximation for a Pair of 32-bit Floats
+ OptCategory[STARS_NN_pfrsqrtv] = 1; // Reciprocal Square Root Approximation for a Pair of 32-bit Floats
+
+ // SSE2 pseudoinstructions
+
+ OptCategory[STARS_NN_cmpeqpd] = 1; // Packed Double-FP Compare EQ
+ OptCategory[STARS_NN_cmpltpd] = 1; // Packed Double-FP Compare LT
+ OptCategory[STARS_NN_cmplepd] = 1; // Packed Double-FP Compare LE
+ OptCategory[STARS_NN_cmpunordpd] = 1; // Packed Double-FP Compare UNORD
+ OptCategory[STARS_NN_cmpneqpd] = 1; // Packed Double-FP Compare NOT EQ
+ OptCategory[STARS_NN_cmpnltpd] = 1; // Packed Double-FP Compare NOT LT
+ OptCategory[STARS_NN_cmpnlepd] = 1; // Packed Double-FP Compare NOT LE
+ OptCategory[STARS_NN_cmpordpd] = 1; // Packed Double-FP Compare ORDERED
+ OptCategory[STARS_NN_cmpeqsd] = 1; // Scalar Double-FP Compare EQ
+ OptCategory[STARS_NN_cmpltsd] = 1; // Scalar Double-FP Compare LT
+ OptCategory[STARS_NN_cmplesd] = 1; // Scalar Double-FP Compare LE
+ OptCategory[STARS_NN_cmpunordsd] = 1; // Scalar Double-FP Compare UNORD
+ OptCategory[STARS_NN_cmpneqsd] = 1; // Scalar Double-FP Compare NOT EQ
+ OptCategory[STARS_NN_cmpnltsd] = 1; // Scalar Double-FP Compare NOT LT
+ OptCategory[STARS_NN_cmpnlesd] = 1; // Scalar Double-FP Compare NOT LE
+ OptCategory[STARS_NN_cmpordsd] = 1; // Scalar Double-FP Compare ORDERED
+
+ // SSSE4.1 instructions
+
+ OptCategory[STARS_NN_blendpd] = 1; // Blend Packed Double Precision Floating-Point Values
+ OptCategory[STARS_NN_blendps] = 1; // Blend Packed Single Precision Floating-Point Values
+ OptCategory[STARS_NN_blendvpd] = 1; // Variable Blend Packed Double Precision Floating-Point Values
+ OptCategory[STARS_NN_blendvps] = 1; // Variable Blend Packed Single Precision Floating-Point Values
+ OptCategory[STARS_NN_dppd] = 1; // Dot Product of Packed Double Precision Floating-Point Values
+ OptCategory[STARS_NN_dpps] = 1; // Dot Product of Packed Single Precision Floating-Point Values
+ OptCategory[STARS_NN_extractps] = 2; // Extract Packed Single Precision Floating-Point Value
+ OptCategory[STARS_NN_insertps] = 1; // Insert Packed Single Precision Floating-Point Value
+ OptCategory[STARS_NN_movntdqa] = 0; // Load Double Quadword Non-Temporal Aligned Hint
+ OptCategory[STARS_NN_mpsadbw] = 1; // Compute Multiple Packed Sums of Absolute Difference
+ OptCategory[STARS_NN_packusdw] = 1; // Pack with Unsigned Saturation
+ OptCategory[STARS_NN_pblendvb] = 1; // Variable Blend Packed Bytes
+ OptCategory[STARS_NN_pblendw] = 1; // Blend Packed Words
+ OptCategory[STARS_NN_pcmpeqq] = 1; // Compare Packed Qword Data for Equal
+ OptCategory[STARS_NN_pextrb] = 1; // Extract Byte
+ OptCategory[STARS_NN_pextrd] = 1; // Extract Dword
+ OptCategory[STARS_NN_pextrq] = 1; // Extract Qword
+ OptCategory[STARS_NN_phminposuw] = 1; // Packed Horizontal Word Minimum
+ OptCategory[STARS_NN_pinsrb] = 1; // Insert Byte
+ OptCategory[STARS_NN_pinsrd] = 1; // Insert Dword
+ OptCategory[STARS_NN_pinsrq] = 1; // Insert Qword
+ OptCategory[STARS_NN_pmaxsb] = 1; // Maximum of Packed Signed Byte Integers
+ OptCategory[STARS_NN_pmaxsd] = 1; // Maximum of Packed Signed Dword Integers
+ OptCategory[STARS_NN_pmaxud] = 1; // Maximum of Packed Unsigned Dword Integers
+ OptCategory[STARS_NN_pmaxuw] = 1; // Maximum of Packed Word Integers
+ OptCategory[STARS_NN_pminsb] = 1; // Minimum of Packed Signed Byte Integers
+ OptCategory[STARS_NN_pminsd] = 1; // Minimum of Packed Signed Dword Integers
+ OptCategory[STARS_NN_pminud] = 1; // Minimum of Packed Unsigned Dword Integers
+ OptCategory[STARS_NN_pminuw] = 1; // Minimum of Packed Word Integers
+ OptCategory[STARS_NN_pmovsxbw] = 1; // Packed Move with Sign Extend
+ OptCategory[STARS_NN_pmovsxbd] = 1; // Packed Move with Sign Extend
+ OptCategory[STARS_NN_pmovsxbq] = 1; // Packed Move with Sign Extend
+ OptCategory[STARS_NN_pmovsxwd] = 1; // Packed Move with Sign Extend
+ OptCategory[STARS_NN_pmovsxwq] = 1; // Packed Move with Sign Extend
+ OptCategory[STARS_NN_pmovsxdq] = 1; // Packed Move with Sign Extend
+ OptCategory[STARS_NN_pmovzxbw] = 1; // Packed Move with Zero Extend
+ OptCategory[STARS_NN_pmovzxbd] = 1; // Packed Move with Zero Extend
+ OptCategory[STARS_NN_pmovzxbq] = 1; // Packed Move with Zero Extend
+ OptCategory[STARS_NN_pmovzxwd] = 1; // Packed Move with Zero Extend
+ OptCategory[STARS_NN_pmovzxwq] = 1; // Packed Move with Zero Extend
+ OptCategory[STARS_NN_pmovzxdq] = 1; // Packed Move with Zero Extend
+ OptCategory[STARS_NN_pmuldq] = 1; // Multiply Packed Signed Dword Integers
+ OptCategory[STARS_NN_pmulld] = 1; // Multiply Packed Signed Dword Integers and Store Low Result
+ OptCategory[STARS_NN_ptest] = 1; // Logical Compare
+ OptCategory[STARS_NN_roundpd] = 1; // Round Packed Double Precision Floating-Point Values
+ OptCategory[STARS_NN_roundps] = 1; // Round Packed Single Precision Floating-Point Values
+ OptCategory[STARS_NN_roundsd] = 1; // Round Scalar Double Precision Floating-Point Values
+ OptCategory[STARS_NN_roundss] = 1; // Round Scalar Single Precision Floating-Point Values
+
+ // SSSE4.2 instructions
+ OptCategory[STARS_NN_crc32] = 2; // Accumulate CRC32 Value
+ OptCategory[STARS_NN_pcmpestri] = 2; // Packed Compare Explicit Length Strings, Return Index
+ OptCategory[STARS_NN_pcmpestrm] = 2; // Packed Compare Explicit Length Strings, Return Mask
+ OptCategory[STARS_NN_pcmpistri] = 2; // Packed Compare Implicit Length Strings, Return Index
+ OptCategory[STARS_NN_pcmpistrm] = 2; // Packed Compare Implicit Length Strings, Return Mask
+ OptCategory[STARS_NN_pcmpgtq] = 1; // Compare Packed Data for Greater Than
+ OptCategory[STARS_NN_popcnt] = 2; // Return the Count of Number of Bits Set to 1
+
+ // AMD SSE4a instructions
+
+ OptCategory[STARS_NN_extrq] = 1; // Extract Field From Register
+ OptCategory[STARS_NN_insertq] = 1; // Insert Field
+ OptCategory[STARS_NN_movntsd] = 0; // Move Non-Temporal Scalar Double-Precision Floating-Point
+ OptCategory[STARS_NN_movntss] = 0; // Move Non-Temporal Scalar Single-Precision Floating-Point
+ OptCategory[STARS_NN_lzcnt] = 2; // Leading Zero Count
+
+ // xsave/xrstor instructions
+
+ OptCategory[STARS_NN_xgetbv] = 8; // Get Value of Extended Control Register
+ OptCategory[STARS_NN_xrstor] = 0; // Restore Processor Extended States
+ OptCategory[STARS_NN_xsave] = 1; // Save Processor Extended States
+ OptCategory[STARS_NN_xsetbv] = 1; // Set Value of Extended Control Register
+
+ // Intel Safer Mode Extensions (SMX)
+
+ OptCategory[STARS_NN_getsec] = 1; // Safer Mode Extensions (SMX) Instruction
+
+ // AMD-V Virtualization ISA Extension
+
+ OptCategory[STARS_NN_clgi] = 0; // Clear Global Interrupt Flag
+ OptCategory[STARS_NN_invlpga] = 1; // Invalidate TLB Entry in a Specified ASID
+ OptCategory[STARS_NN_skinit] = 1; // Secure Init and Jump with Attestation
+ OptCategory[STARS_NN_stgi] = 0; // Set Global Interrupt Flag
+ OptCategory[STARS_NN_vmexit] = 1; // Stop Executing Guest, Begin Executing Host
+ OptCategory[STARS_NN_vmload] = 0; // Load State from VMCB
+ OptCategory[STARS_NN_vmmcall] = 1; // Call VMM
+ OptCategory[STARS_NN_vmrun] = 1; // Run Virtual Machine
+ OptCategory[STARS_NN_vmsave] = 0; // Save State to VMCB
+
+ // VMX+ instructions
+
+ OptCategory[STARS_NN_invept] = 1; // Invalidate Translations Derived from EPT
+ OptCategory[STARS_NN_invvpid] = 1; // Invalidate Translations Based on VPID
+
+ // Intel Atom instructions
+
+ OptCategory[STARS_NN_movbe] = 3; // Move Data After Swapping Bytes
+
+ // Intel AES instructions
+
+ OptCategory[STARS_NN_aesenc] = 1; // Perform One Round of an AES Encryption Flow
+ OptCategory[STARS_NN_aesenclast] = 1; // Perform the Last Round of an AES Encryption Flow
+ OptCategory[STARS_NN_aesdec] = 1; // Perform One Round of an AES Decryption Flow
+ OptCategory[STARS_NN_aesdeclast] = 1; // Perform the Last Round of an AES Decryption Flow
+ OptCategory[STARS_NN_aesimc] = 1; // Perform the AES InvMixColumn Transformation
+ OptCategory[STARS_NN_aeskeygenassist] = 1; // AES Round Key Generation Assist
+
+ // Carryless multiplication
+
+ OptCategory[STARS_NN_pclmulqdq] = 1; // Carry-Less Multiplication Quadword
+
+ // Returns modified by operand size prefixes
+
+ OptCategory[STARS_NN_retnw] = 0; // Return Near from Procedure (use16)
+ OptCategory[STARS_NN_retnd] = 0; // Return Near from Procedure (use32)
+ OptCategory[STARS_NN_retnq] = 0; // Return Near from Procedure (use64)
+ OptCategory[STARS_NN_retfw] = 0; // Return Far from Procedure (use16)
+ OptCategory[STARS_NN_retfd] = 0; // Return Far from Procedure (use32)
+ OptCategory[STARS_NN_retfq] = 0; // Return Far from Procedure (use64)
+
+ // RDRAND support
+
+ OptCategory[STARS_NN_rdrand] = 2; // Read Random Number
+
+ // new GPR instructions
+
+ OptCategory[STARS_NN_adcx] = 5; // Unsigned Integer Addition of Two Operands with Carry Flag
+ OptCategory[STARS_NN_adox] = 5; // Unsigned Integer Addition of Two Operands with Overflow Flag
+ OptCategory[STARS_NN_andn] = 0; // Logical AND NOT
+ OptCategory[STARS_NN_bextr] = 2; // Bit Field Extract
+ OptCategory[STARS_NN_blsi] = 2; // Extract Lowest Set Isolated Bit
+ OptCategory[STARS_NN_blsmsk] = 2; // Get Mask Up to Lowest Set Bit
+ OptCategory[STARS_NN_blsr] = 2; // Reset Lowest Set Bit
+ OptCategory[STARS_NN_bzhi] = 2; // Zero High Bits Starting with Specified Bit Position
+ OptCategory[STARS_NN_clac] = 1; // Clear AC Flag in EFLAGS Register
+ OptCategory[STARS_NN_mulx] = 2; // Unsigned Multiply Without Affecting Flags
+ OptCategory[STARS_NN_pdep] = 2; // Parallel Bits Deposit
+ OptCategory[STARS_NN_pext] = 2; // Parallel Bits Extract
+ OptCategory[STARS_NN_rorx] = 2; // Rotate Right Logical Without Affecting Flags
+ OptCategory[STARS_NN_sarx] = 2; // Shift Arithmetically Right Without Affecting Flags
+ OptCategory[STARS_NN_shlx] = 2; // Shift Logically Left Without Affecting Flags
+ OptCategory[STARS_NN_shrx] = 2; // Shift Logically Right Without Affecting Flags
+ OptCategory[STARS_NN_stac] = 1; // Set AC Flag in EFLAGS Register
+ OptCategory[STARS_NN_tzcnt] = 2; // Count the Number of Trailing Zero Bits
+ OptCategory[STARS_NN_xsaveopt] = 1; // Save Processor Extended States Optimized
+ OptCategory[STARS_NN_invpcid] = 1; // Invalidate Processor Context ID
+ OptCategory[STARS_NN_rdseed] = 2; // Read Random Seed
+ OptCategory[STARS_NN_rdfsbase] = 6; // Read FS Segment Base
+ OptCategory[STARS_NN_rdgsbase] = 6; // Read GS Segment Base
+ OptCategory[STARS_NN_wrfsbase] = 6; // Write FS Segment Base
+ OptCategory[STARS_NN_wrgsbase] = 6; // Write GS Segment Base
+
+ // new AVX instructions
+
+ OptCategory[STARS_NN_vaddpd] = 1; // Add Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vaddps] = 1; // Packed Single-FP Add
+ OptCategory[STARS_NN_vaddsd] = 1; // Add Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vaddss] = 1; // Scalar Single-FP Add
+ OptCategory[STARS_NN_vaddsubpd] = 1; // Add /Sub packed DP FP numbers
+ OptCategory[STARS_NN_vaddsubps] = 1; // Add /Sub packed SP FP numbers
+ OptCategory[STARS_NN_vaesdec] = 1; // Perform One Round of an AES Decryption Flow
+ OptCategory[STARS_NN_vaesdeclast] = 1; // Perform the Last Round of an AES Decryption Flow
+ OptCategory[STARS_NN_vaesenc] = 1; // Perform One Round of an AES Encryption Flow
+ OptCategory[STARS_NN_vaesenclast] = 1; // Perform the Last Round of an AES Encryption Flow
+ OptCategory[STARS_NN_vaesimc] = 1; // Perform the AES InvMixColumn Transformation
+ OptCategory[STARS_NN_vaeskeygenassist] = 1; // AES Round Key Generation Assist
+ OptCategory[STARS_NN_vandnpd] = 1; // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vandnps] = 1; // Bitwise Logical And Not for Single-FP
+ OptCategory[STARS_NN_vandpd] = 1; // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vandps] = 1; // Bitwise Logical And for Single-FP
+ OptCategory[STARS_NN_vblendpd] = 1; // Blend Packed Double Precision Floating-Point Values
+ OptCategory[STARS_NN_vblendps] = 1; // Blend Packed Single Precision Floating-Point Values
+ OptCategory[STARS_NN_vblendvpd] = 1; // Variable Blend Packed Double Precision Floating-Point Values
+ OptCategory[STARS_NN_vblendvps] = 1; // Variable Blend Packed Single Precision Floating-Point Values
+ OptCategory[STARS_NN_vbroadcastf128] = 1; // Broadcast 128 Bits of Floating-Point Data
+ OptCategory[STARS_NN_vbroadcasti128] = 1; // Broadcast 128 Bits of Integer Data
+ OptCategory[STARS_NN_vbroadcastsd] = 1; // Broadcast Double-Precision Floating-Point Element
+ OptCategory[STARS_NN_vbroadcastss] = 1; // Broadcast Single-Precision Floating-Point Element
+ OptCategory[STARS_NN_vcmppd] = 1; // Compare Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vcmpps] = 1; // Packed Single-FP Compare
+ OptCategory[STARS_NN_vcmpsd] = 1; // Compare Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vcmpss] = 1; // Scalar Single-FP Compare
+ OptCategory[STARS_NN_vcomisd] = 1; // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ OptCategory[STARS_NN_vcomiss] = 1; // Scalar Ordered Single-FP Compare and Set EFLAGS
+ OptCategory[STARS_NN_vcvtdq2pd] = 1; // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vcvtdq2ps] = 1; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vcvtpd2dq] = 1; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ OptCategory[STARS_NN_vcvtpd2ps] = 1; // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vcvtph2ps] = 1; // Convert 16-bit FP Values to Single-Precision FP Values
+ OptCategory[STARS_NN_vcvtps2dq] = 1; // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ OptCategory[STARS_NN_vcvtps2pd] = 1; // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vcvtps2ph] = 1; // Convert Single-Precision FP value to 16-bit FP value
+ OptCategory[STARS_NN_vcvtsd2si] = 1; // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ OptCategory[STARS_NN_vcvtsd2ss] = 1; // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
+ OptCategory[STARS_NN_vcvtsi2sd] = 1; // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
+ OptCategory[STARS_NN_vcvtsi2ss] = 1; // Scalar signed INT32 to Single-FP conversion
+ OptCategory[STARS_NN_vcvtss2sd] = 1; // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
+ OptCategory[STARS_NN_vcvtss2si] = 1; // Scalar Single-FP to signed INT32 conversion
+ OptCategory[STARS_NN_vcvttpd2dq] = 1; // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ OptCategory[STARS_NN_vcvttps2dq] = 1; // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ OptCategory[STARS_NN_vcvttsd2si] = 1; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ OptCategory[STARS_NN_vcvttss2si] = 1; // Scalar Single-FP to signed INT32 conversion (truncate)
+ OptCategory[STARS_NN_vdivpd] = 1; // Divide Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vdivps] = 1; // Packed Single-FP Divide
+ OptCategory[STARS_NN_vdivsd] = 1; // Divide Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vdivss] = 1; // Scalar Single-FP Divide
+ OptCategory[STARS_NN_vdppd] = 1; // Dot Product of Packed Double Precision Floating-Point Values
+ OptCategory[STARS_NN_vdpps] = 1; // Dot Product of Packed Single Precision Floating-Point Values
+ OptCategory[STARS_NN_vextractf128] = 1; // Extract Packed Floating-Point Values
+ OptCategory[STARS_NN_vextracti128] = 1; // Extract Packed Integer Values
+ OptCategory[STARS_NN_vextractps] = 1; // Extract Packed Floating-Point Values
+ OptCategory[STARS_NN_vfmadd132pd] = 1; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmadd132ps] = 1; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmadd132sd] = 1; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmadd132ss] = 1; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmadd213pd] = 1; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmadd213ps] = 1; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmadd213sd] = 1; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmadd213ss] = 1; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmadd231pd] = 1; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmadd231ps] = 1; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmadd231sd] = 1; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmadd231ss] = 1; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmaddsub132pd] = 1; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmaddsub132ps] = 1; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmaddsub213pd] = 1; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmaddsub213ps] = 1; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmaddsub231pd] = 1; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmaddsub231ps] = 1; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmsub132pd] = 1; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmsub132ps] = 1; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmsub132sd] = 1; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmsub132ss] = 1; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmsub213pd] = 1; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmsub213ps] = 1; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmsub213sd] = 1; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmsub213ss] = 1; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmsub231pd] = 1; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmsub231ps] = 1; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmsub231sd] = 1; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmsub231ss] = 1; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmsubadd132pd] = 1; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmsubadd132ps] = 1; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmsubadd213pd] = 1; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmsubadd213ps] = 1; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmsubadd231pd] = 1; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfmsubadd231ps] = 1; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmadd132pd] = 1; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmadd132ps] = 1; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmadd132sd] = 1; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmadd132ss] = 1; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmadd213pd] = 1; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmadd213ps] = 1; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmadd213sd] = 1; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmadd213ss] = 1; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmadd231pd] = 1; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmadd231ps] = 1; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmadd231sd] = 1; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmadd231ss] = 1; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmsub132pd] = 1; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmsub132ps] = 1; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmsub132sd] = 1; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmsub132ss] = 1; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmsub213pd] = 1; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmsub213ps] = 1; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmsub213sd] = 1; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmsub213ss] = 1; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmsub231pd] = 1; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmsub231ps] = 1; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmsub231sd] = 1; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vfnmsub231ss] = 1; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vgatherdps] = 1; // Gather Packed SP FP Values Using Signed Dword Indices
+ OptCategory[STARS_NN_vgatherdpd] = 1; // Gather Packed DP FP Values Using Signed Dword Indices
+ OptCategory[STARS_NN_vgatherqps] = 1; // Gather Packed SP FP Values Using Signed Qword Indices
+ OptCategory[STARS_NN_vgatherqpd] = 1; // Gather Packed DP FP Values Using Signed Qword Indices
+ OptCategory[STARS_NN_vhaddpd] = 1; // Add horizontally packed DP FP numbers
+ OptCategory[STARS_NN_vhaddps] = 1; // Add horizontally packed SP FP numbers
+ OptCategory[STARS_NN_vhsubpd] = 1; // Sub horizontally packed DP FP numbers
+ OptCategory[STARS_NN_vhsubps] = 1; // Sub horizontally packed SP FP numbers
+ OptCategory[STARS_NN_vinsertf128] = 1; // Insert Packed Floating-Point Values
+ OptCategory[STARS_NN_vinserti128] = 1; // Insert Packed Integer Values
+ OptCategory[STARS_NN_vinsertps] = 1; // Insert Packed Single Precision Floating-Point Value
+ OptCategory[STARS_NN_vlddqu] = 1; // Load Unaligned Packed Integer Values
+ OptCategory[STARS_NN_vldmxcsr] = 1; // Load Streaming SIMD Extensions Technology Control/Status Register
+ OptCategory[STARS_NN_vmaskmovdqu] = 9; // Store Selected Bytes of Double Quadword with NT Hint
+ OptCategory[STARS_NN_vmaskmovpd] = 9; // Conditionally Load Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vmaskmovps] = 9; // Conditionally Load Packed Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vmaxpd] = 1; // Return Maximum Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vmaxps] = 1; // Packed Single-FP Maximum
+ OptCategory[STARS_NN_vmaxsd] = 1; // Return Maximum Scalar Double-Precision Floating-Point Value
+ OptCategory[STARS_NN_vmaxss] = 1; // Scalar Single-FP Maximum
+ OptCategory[STARS_NN_vminpd] = 1; // Return Minimum Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vminps] = 1; // Packed Single-FP Minimum
+ OptCategory[STARS_NN_vminsd] = 1; // Return Minimum Scalar Double-Precision Floating-Point Value
+ OptCategory[STARS_NN_vminss] = 1; // Scalar Single-FP Minimum
+ OptCategory[STARS_NN_vmovapd] = 9; // Move Aligned Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vmovaps] = 9; // Move Aligned Four Packed Single-FP
+ OptCategory[STARS_NN_vmovd] = 9; // Move 32 bits
+ OptCategory[STARS_NN_vmovddup] = 1; // Move One Double-FP and Duplicate
+ OptCategory[STARS_NN_vmovdqa] = 1; // Move Aligned Double Quadword
+ OptCategory[STARS_NN_vmovdqu] = 1; // Move Unaligned Double Quadword
+ OptCategory[STARS_NN_vmovhlps] = 1; // Move High to Low Packed Single-FP
+ OptCategory[STARS_NN_vmovhpd] = 1; // Move High Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vmovhps] = 1; // Move High Packed Single-FP
+ OptCategory[STARS_NN_vmovlhps] = 1; // Move Low to High Packed Single-FP
+ OptCategory[STARS_NN_vmovlpd] = 1; // Move Low Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vmovlps] = 1; // Move Low Packed Single-FP
+ OptCategory[STARS_NN_vmovmskpd] = 1; // Extract Packed Double-Precision Floating-Point Sign Mask
+ OptCategory[STARS_NN_vmovmskps] = 1; // Move Mask to Register
+ OptCategory[STARS_NN_vmovntdq] = 1; // Store Double Quadword Using Non-Temporal Hint
+ OptCategory[STARS_NN_vmovntdqa] = 1; // Load Double Quadword Non-Temporal Aligned Hint
+ OptCategory[STARS_NN_vmovntpd] = 1; // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
+ OptCategory[STARS_NN_vmovntps] = 1; // Move Aligned Four Packed Single-FP Non Temporal
+ OptCategory[STARS_NN_vmovntsd] = 1; // Move Non-Temporal Scalar Double-Precision Floating-Point
+ OptCategory[STARS_NN_vmovntss] = 1; // Move Non-Temporal Scalar Single-Precision Floating-Point
+ OptCategory[STARS_NN_vmovq] = 1; // Move 64 bits
+ OptCategory[STARS_NN_vmovsd] = 1; // Move Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vmovshdup] = 1; // Move Packed Single-FP High and Duplicate
+ OptCategory[STARS_NN_vmovsldup] = 1; // Move Packed Single-FP Low and Duplicate
+ OptCategory[STARS_NN_vmovss] = 1; // Move Scalar Single-FP
+ OptCategory[STARS_NN_vmovupd] = 1; // Move Unaligned Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vmovups] = 1; // Move Unaligned Four Packed Single-FP
+ OptCategory[STARS_NN_vmpsadbw] = 1; // Compute Multiple Packed Sums of Absolute Difference
+ OptCategory[STARS_NN_vmulpd] = 1; // Multiply Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vmulps] = 1; // Packed Single-FP Multiply
+ OptCategory[STARS_NN_vmulsd] = 1; // Multiply Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vmulss] = 1; // Scalar Single-FP Multiply
+ OptCategory[STARS_NN_vorpd] = 1; // Bitwise Logical OR of Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vorps] = 1; // Bitwise Logical OR for Single-FP Data
+ OptCategory[STARS_NN_vpabsb] = 1; // Packed Absolute Value Byte
+ OptCategory[STARS_NN_vpabsd] = 1; // Packed Absolute Value Doubleword
+ OptCategory[STARS_NN_vpabsw] = 1; // Packed Absolute Value Word
+ OptCategory[STARS_NN_vpackssdw] = 1; // Pack with Signed Saturation (Dword->Word)
+ OptCategory[STARS_NN_vpacksswb] = 1; // Pack with Signed Saturation (Word->Byte)
+ OptCategory[STARS_NN_vpackusdw] = 1; // Pack with Unsigned Saturation
+ OptCategory[STARS_NN_vpackuswb] = 1; // Pack with Unsigned Saturation (Word->Byte)
+ OptCategory[STARS_NN_vpaddb] = 1; // Packed Add Byte
+ OptCategory[STARS_NN_vpaddd] = 1; // Packed Add Dword
+ OptCategory[STARS_NN_vpaddq] = 1; // Add Packed Quadword Integers
+ OptCategory[STARS_NN_vpaddsb] = 1; // Packed Add with Saturation (Byte)
+ OptCategory[STARS_NN_vpaddsw] = 1; // Packed Add with Saturation (Word)
+ OptCategory[STARS_NN_vpaddusb] = 1; // Packed Add Unsigned with Saturation (Byte)
+ OptCategory[STARS_NN_vpaddusw] = 1; // Packed Add Unsigned with Saturation (Word)
+ OptCategory[STARS_NN_vpaddw] = 1; // Packed Add Word
+ OptCategory[STARS_NN_vpalignr] = 1; // Packed Align Right
+ OptCategory[STARS_NN_vpand] = 1; // Bitwise Logical And
+ OptCategory[STARS_NN_vpandn] = 1; // Bitwise Logical And Not
+ OptCategory[STARS_NN_vpavgb] = 1; // Packed Average (Byte)
+ OptCategory[STARS_NN_vpavgw] = 1; // Packed Average (Word)
+ OptCategory[STARS_NN_vpblendd] = 1; // Blend Packed Dwords
+ OptCategory[STARS_NN_vpblendvb] = 1; // Variable Blend Packed Bytes
+ OptCategory[STARS_NN_vpblendw] = 1; // Blend Packed Words
+ OptCategory[STARS_NN_vpbroadcastb] = 1; // Broadcast a Byte Integer
+ OptCategory[STARS_NN_vpbroadcastd] = 1; // Broadcast a Dword Integer
+ OptCategory[STARS_NN_vpbroadcastq] = 1; // Broadcast a Qword Integer
+ OptCategory[STARS_NN_vpbroadcastw] = 1; // Broadcast a Word Integer
+ OptCategory[STARS_NN_vpclmulqdq] = 1; // Carry-Less Multiplication Quadword
+ OptCategory[STARS_NN_vpcmpeqb] = 1; // Packed Compare for Equal (Byte)
+ OptCategory[STARS_NN_vpcmpeqd] = 1; // Packed Compare for Equal (Dword)
+ OptCategory[STARS_NN_vpcmpeqq] = 1; // Compare Packed Qword Data for Equal
+ OptCategory[STARS_NN_vpcmpeqw] = 1; // Packed Compare for Equal (Word)
+ OptCategory[STARS_NN_vpcmpestri] = 1; // Packed Compare Explicit Length Strings, Return Index
+ OptCategory[STARS_NN_vpcmpestrm] = 1; // Packed Compare Explicit Length Strings, Return Mask
+ OptCategory[STARS_NN_vpcmpgtb] = 1; // Packed Compare for Greater Than (Byte)
+ OptCategory[STARS_NN_vpcmpgtd] = 1; // Packed Compare for Greater Than (Dword)
+ OptCategory[STARS_NN_vpcmpgtq] = 1; // Compare Packed Data for Greater Than
+ OptCategory[STARS_NN_vpcmpgtw] = 1; // Packed Compare for Greater Than (Word)
+ OptCategory[STARS_NN_vpcmpistri] = 1; // Packed Compare Implicit Length Strings, Return Index
+ OptCategory[STARS_NN_vpcmpistrm] = 1; // Packed Compare Implicit Length Strings, Return Mask
+ OptCategory[STARS_NN_vperm2f128] = 1; // Permute Floating-Point Values
+ OptCategory[STARS_NN_vperm2i128] = 1; // Permute Integer Values
+ OptCategory[STARS_NN_vpermd] = 1; // Full Doublewords Element Permutation
+ OptCategory[STARS_NN_vpermilpd] = 1; // Permute Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vpermilps] = 1; // Permute Single-Precision Floating-Point Values
+ OptCategory[STARS_NN_vpermpd] = 1; // Permute Double-Precision Floating-Point Elements
+ OptCategory[STARS_NN_vpermps] = 1; // Permute Single-Precision Floating-Point Elements
+ OptCategory[STARS_NN_vpermq] = 1; // Qwords Element Permutation
+ OptCategory[STARS_NN_vpextrb] = 1; // Extract Byte
+ OptCategory[STARS_NN_vpextrd] = 1; // Extract Dword
+ OptCategory[STARS_NN_vpextrq] = 1; // Extract Qword
+ OptCategory[STARS_NN_vpextrw] = 1; // Extract Word
+ OptCategory[STARS_NN_vpgatherdd] = 1; // Gather Packed Dword Values Using Signed Dword Indices
+ OptCategory[STARS_NN_vpgatherdq] = 1; // Gather Packed Qword Values Using Signed Dword Indices
+ OptCategory[STARS_NN_vpgatherqd] = 1; // Gather Packed Dword Values Using Signed Qword Indices
+ OptCategory[STARS_NN_vpgatherqq] = 1; // Gather Packed Qword Values Using Signed Qword Indices
+ OptCategory[STARS_NN_vphaddd] = 1; // Packed Horizontal Add Doubleword
+ OptCategory[STARS_NN_vphaddsw] = 1; // Packed Horizontal Add and Saturate
+ OptCategory[STARS_NN_vphaddw] = 1; // Packed Horizontal Add Word
+ OptCategory[STARS_NN_vphminposuw] = 1; // Packed Horizontal Word Minimum
+ OptCategory[STARS_NN_vphsubd] = 1; // Packed Horizontal Subtract Doubleword
+ OptCategory[STARS_NN_vphsubsw] = 1; // Packed Horizontal Subtract and Saturate
+ OptCategory[STARS_NN_vphsubw] = 1; // Packed Horizontal Subtract Word
+ OptCategory[STARS_NN_vpinsrb] = 1; // Insert Byte
+ OptCategory[STARS_NN_vpinsrd] = 1; // Insert Dword
+ OptCategory[STARS_NN_vpinsrq] = 1; // Insert Qword
+ OptCategory[STARS_NN_vpinsrw] = 1; // Insert Word
+ OptCategory[STARS_NN_vpmaddubsw] = 1; // Multiply and Add Packed Signed and Unsigned Bytes
+ OptCategory[STARS_NN_vpmaddwd] = 1; // Packed Multiply and Add
+ OptCategory[STARS_NN_vpmaskmovd] = 1; // Conditionally Store Dword Values Using Mask
+ OptCategory[STARS_NN_vpmaskmovq] = 1; // Conditionally Store Qword Values Using Mask
+ OptCategory[STARS_NN_vpmaxsb] = 1; // Maximum of Packed Signed Byte Integers
+ OptCategory[STARS_NN_vpmaxsd] = 1; // Maximum of Packed Signed Dword Integers
+ OptCategory[STARS_NN_vpmaxsw] = 1; // Packed Signed Integer Word Maximum
+ OptCategory[STARS_NN_vpmaxub] = 1; // Packed Unsigned Integer Byte Maximum
+ OptCategory[STARS_NN_vpmaxud] = 1; // Maximum of Packed Unsigned Dword Integers
+ OptCategory[STARS_NN_vpmaxuw] = 1; // Maximum of Packed Word Integers
+ OptCategory[STARS_NN_vpminsb] = 1; // Minimum of Packed Signed Byte Integers
+ OptCategory[STARS_NN_vpminsd] = 1; // Minimum of Packed Signed Dword Integers
+ OptCategory[STARS_NN_vpminsw] = 1; // Packed Signed Integer Word Minimum
+ OptCategory[STARS_NN_vpminub] = 1; // Packed Unsigned Integer Byte Minimum
+ OptCategory[STARS_NN_vpminud] = 1; // Minimum of Packed Unsigned Dword Integers
+ OptCategory[STARS_NN_vpminuw] = 1; // Minimum of Packed Word Integers
+ OptCategory[STARS_NN_vpmovmskb] = 1; // Move Byte Mask to Integer
+ OptCategory[STARS_NN_vpmovsxbd] = 1; // Packed Move with Sign Extend
+ OptCategory[STARS_NN_vpmovsxbq] = 1; // Packed Move with Sign Extend
+ OptCategory[STARS_NN_vpmovsxbw] = 1; // Packed Move with Sign Extend
+ OptCategory[STARS_NN_vpmovsxdq] = 1; // Packed Move with Sign Extend
+ OptCategory[STARS_NN_vpmovsxwd] = 1; // Packed Move with Sign Extend
+ OptCategory[STARS_NN_vpmovsxwq] = 1; // Packed Move with Sign Extend
+ OptCategory[STARS_NN_vpmovzxbd] = 1; // Packed Move with Zero Extend
+ OptCategory[STARS_NN_vpmovzxbq] = 1; // Packed Move with Zero Extend
+ OptCategory[STARS_NN_vpmovzxbw] = 1; // Packed Move with Zero Extend
+ OptCategory[STARS_NN_vpmovzxdq] = 1; // Packed Move with Zero Extend
+ OptCategory[STARS_NN_vpmovzxwd] = 1; // Packed Move with Zero Extend
+ OptCategory[STARS_NN_vpmovzxwq] = 1; // Packed Move with Zero Extend
+ OptCategory[STARS_NN_vpmuldq] = 1; // Multiply Packed Signed Dword Integers
+ OptCategory[STARS_NN_vpmulhrsw] = 1; // Packed Multiply High with Round and Scale
+ OptCategory[STARS_NN_vpmulhuw] = 1; // Packed Multiply High Unsigned
+ OptCategory[STARS_NN_vpmulhw] = 1; // Packed Multiply High
+ OptCategory[STARS_NN_vpmulld] = 1; // Multiply Packed Signed Dword Integers and Store Low Result
+ OptCategory[STARS_NN_vpmullw] = 1; // Packed Multiply Low
+ OptCategory[STARS_NN_vpmuludq] = 1; // Multiply Packed Unsigned Doubleword Integers
+ OptCategory[STARS_NN_vpor] = 1; // Bitwise Logical Or
+ OptCategory[STARS_NN_vpsadbw] = 1; // Packed Sum of Absolute Differences
+ OptCategory[STARS_NN_vpshufb] = 1; // Packed Shuffle Bytes
+ OptCategory[STARS_NN_vpshufd] = 1; // Shuffle Packed Doublewords
+ OptCategory[STARS_NN_vpshufhw] = 1; // Shuffle Packed High Words
+ OptCategory[STARS_NN_vpshuflw] = 1; // Shuffle Packed Low Words
+ OptCategory[STARS_NN_vpsignb] = 1; // Packed SIGN Byte
+ OptCategory[STARS_NN_vpsignd] = 1; // Packed SIGN Doubleword
+ OptCategory[STARS_NN_vpsignw] = 1; // Packed SIGN Word
+ OptCategory[STARS_NN_vpslld] = 1; // Packed Shift Left Logical (Dword)
+ OptCategory[STARS_NN_vpslldq] = 1; // Shift Double Quadword Left Logical
+ OptCategory[STARS_NN_vpsllq] = 1; // Packed Shift Left Logical (Qword)
+ OptCategory[STARS_NN_vpsllvd] = 1; // Variable Bit Shift Left Logical (Dword)
+ OptCategory[STARS_NN_vpsllvq] = 1; // Variable Bit Shift Left Logical (Qword)
+ OptCategory[STARS_NN_vpsllw] = 1; // Packed Shift Left Logical (Word)
+ OptCategory[STARS_NN_vpsrad] = 1; // Packed Shift Right Arithmetic (Dword)
+ OptCategory[STARS_NN_vpsravd] = 1; // Variable Bit Shift Right Arithmetic
+ OptCategory[STARS_NN_vpsraw] = 1; // Packed Shift Right Arithmetic (Word)
+ OptCategory[STARS_NN_vpsrld] = 1; // Packed Shift Right Logical (Dword)
+ OptCategory[STARS_NN_vpsrldq] = 1; // Shift Double Quadword Right Logical (Qword)
+ OptCategory[STARS_NN_vpsrlq] = 1; // Packed Shift Right Logical (Qword)
+ OptCategory[STARS_NN_vpsrlvd] = 1; // Variable Bit Shift Right Logical (Dword)
+ OptCategory[STARS_NN_vpsrlvq] = 1; // Variable Bit Shift Right Logical (Qword)
+ OptCategory[STARS_NN_vpsrlw] = 1; // Packed Shift Right Logical (Word)
+ OptCategory[STARS_NN_vpsubb] = 1; // Packed Subtract Byte
+ OptCategory[STARS_NN_vpsubd] = 1; // Packed Subtract Dword
+ OptCategory[STARS_NN_vpsubq] = 1; // Subtract Packed Quadword Integers
+ OptCategory[STARS_NN_vpsubsb] = 1; // Packed Subtract with Saturation (Byte)
+ OptCategory[STARS_NN_vpsubsw] = 1; // Packed Subtract with Saturation (Word)
+ OptCategory[STARS_NN_vpsubusb] = 1; // Packed Subtract Unsigned with Saturation (Byte)
+ OptCategory[STARS_NN_vpsubusw] = 1; // Packed Subtract Unsigned with Saturation (Word)
+ OptCategory[STARS_NN_vpsubw] = 1; // Packed Subtract Word
+ OptCategory[STARS_NN_vptest] = 1; // Logical Compare
+ OptCategory[STARS_NN_vpunpckhbw] = 1; // Unpack High Packed Data (Byte->Word)
+ OptCategory[STARS_NN_vpunpckhdq] = 1; // Unpack High Packed Data (Dword->Qword)
+ OptCategory[STARS_NN_vpunpckhqdq] = 1; // Unpack High Packed Data (Qword->Xmmword)
+ OptCategory[STARS_NN_vpunpckhwd] = 1; // Unpack High Packed Data (Word->Dword)
+ OptCategory[STARS_NN_vpunpcklbw] = 1; // Unpack Low Packed Data (Byte->Word)
+ OptCategory[STARS_NN_vpunpckldq] = 1; // Unpack Low Packed Data (Dword->Qword)
+ OptCategory[STARS_NN_vpunpcklqdq] = 1; // Unpack Low Packed Data (Qword->Xmmword)
+ OptCategory[STARS_NN_vpunpcklwd] = 1; // Unpack Low Packed Data (Word->Dword)
+ OptCategory[STARS_NN_vpxor] = 1; // Bitwise Logical Exclusive Or
+ OptCategory[STARS_NN_vrcpps] = 1; // Packed Single-FP Reciprocal
+ OptCategory[STARS_NN_vrcpss] = 1; // Scalar Single-FP Reciprocal
+ OptCategory[STARS_NN_vroundpd] = 1; // Round Packed Double Precision Floating-Point Values
+ OptCategory[STARS_NN_vroundps] = 1; // Round Packed Single Precision Floating-Point Values
+ OptCategory[STARS_NN_vroundsd] = 1; // Round Scalar Double Precision Floating-Point Values
+ OptCategory[STARS_NN_vroundss] = 1; // Round Scalar Single Precision Floating-Point Values
+ OptCategory[STARS_NN_vrsqrtps] = 1; // Packed Single-FP Square Root Reciprocal
+ OptCategory[STARS_NN_vrsqrtss] = 1; // Scalar Single-FP Square Root Reciprocal
+ OptCategory[STARS_NN_vshufpd] = 1; // Shuffle Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vshufps] = 1; // Shuffle Single-FP
+ OptCategory[STARS_NN_vsqrtpd] = 1; // Compute Square Roots of Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vsqrtps] = 1; // Packed Single-FP Square Root
+ OptCategory[STARS_NN_vsqrtsd] = 1; // Compute Square Rootof Scalar Double-Precision Floating-Point Value
+ OptCategory[STARS_NN_vsqrtss] = 1; // Scalar Single-FP Square Root
+ OptCategory[STARS_NN_vstmxcsr] = 1; // Store Streaming SIMD Extensions Technology Control/Status Register
+ OptCategory[STARS_NN_vsubpd] = 1; // Subtract Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vsubps] = 1; // Packed Single-FP Subtract
+ OptCategory[STARS_NN_vsubsd] = 1; // Subtract Scalar Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vsubss] = 1; // Scalar Single-FP Subtract
+ OptCategory[STARS_NN_vtestpd] = 1; // Packed Double-Precision Floating-Point Bit Test
+ OptCategory[STARS_NN_vtestps] = 1; // Packed Single-Precision Floating-Point Bit Test
+ OptCategory[STARS_NN_vucomisd] = 1; // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ OptCategory[STARS_NN_vucomiss] = 1; // Scalar Unordered Single-FP Compare and Set EFLAGS
+ OptCategory[STARS_NN_vunpckhpd] = 1; // Unpack and Interleave High Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vunpckhps] = 1; // Unpack High Packed Single-FP Data
+ OptCategory[STARS_NN_vunpcklpd] = 1; // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vunpcklps] = 1; // Unpack Low Packed Single-FP Data
+ OptCategory[STARS_NN_vxorpd] = 1; // Bitwise Logical OR of Double-Precision Floating-Point Values
+ OptCategory[STARS_NN_vxorps] = 1; // Bitwise Logical XOR for Single-FP Data
+ OptCategory[STARS_NN_vzeroall] = 1; // Zero All YMM Registers
+ OptCategory[STARS_NN_vzeroupper] = 1; // Zero Upper Bits of YMM Registers
+
+ // Transactional Synchronization Extensions
+
+ OptCategory[STARS_NN_xabort] = 1; // Transaction Abort
+ OptCategory[STARS_NN_xbegin] = 1; // Transaction Begin
+ OptCategory[STARS_NN_xend] = 1; // Transaction End
+ OptCategory[STARS_NN_xtest] = 1; // Test If In Transactional Execution
+
+ // Virtual PC synthetic instructions
+
+ OptCategory[STARS_NN_vmgetinfo] = 1; // Virtual PC - Get VM Information
+ OptCategory[STARS_NN_vmsetinfo] = 1; // Virtual PC - Set VM Information
+ OptCategory[STARS_NN_vmdxdsbl] = 1; // Virtual PC - Disable Direct Execution
+ OptCategory[STARS_NN_vmdxenbl] = 1; // Virtual PC - Enable Direct Execution
+ OptCategory[STARS_NN_vmcpuid] = 1; // Virtual PC - Virtualized CPU Information
+ OptCategory[STARS_NN_vmhlt] = 1; // Virtual PC - Halt
+ OptCategory[STARS_NN_vmsplaf] = 1; // Virtual PC - Spin Lock Acquisition Failed
+ OptCategory[STARS_NN_vmpushfd] = 1; // Virtual PC - Push virtualized flags register
+ OptCategory[STARS_NN_vmpopfd] = 1; // Virtual PC - Pop virtualized flags register
+ OptCategory[STARS_NN_vmcli] = 1; // Virtual PC - Clear Interrupt Flag
+ OptCategory[STARS_NN_vmsti] = 1; // Virtual PC - Set Interrupt Flag
+ OptCategory[STARS_NN_vmiretd] = 1; // Virtual PC - Return From Interrupt
+ OptCategory[STARS_NN_vmsgdt] = 1; // Virtual PC - Store Global Descriptor Table
+ OptCategory[STARS_NN_vmsidt] = 1; // Virtual PC - Store Interrupt Descriptor Table
+ OptCategory[STARS_NN_vmsldt] = 1; // Virtual PC - Store Local Descriptor Table
+ OptCategory[STARS_NN_vmstr] = 1; // Virtual PC - Store Task Register
+ OptCategory[STARS_NN_vmsdte] = 1; // Virtual PC - Store to Descriptor Table Entry
+ OptCategory[STARS_NN_vpcext] = 1; // Virtual PC - ISA extension
+
+#endif // 599 < IDA_SDK_VERSION
+
+ OptCategory[STARS_NN_last] = 1;
+
+ return;
+
+} // end of STARS_Program_t::InitOptCategory()
+
+// Initialize the StackAlteration[] array to define how opcodes adjust the stack pointer.
+void STARS_Program_t::InitStackAlteration(void) {
+ // Default category is 0; most instructions do not alter the stack pointer.
+ (void)memset(StackAlteration, 0, sizeof(StackAlteration));
+
+ // Many arithmetic instructions could alter the stack pointer. We will have to
+ // examine each instruction that performs addition, subtraction, logical AND, etc.,
+ // to determine if the stack pointer was the DEF operand. We cannot use a purely
+ // table driven approach to compute stack pointer alteration. The table is used for
+ // the deterministic cases, e.g. push, pop, call, return. Because of variability on
+ // a few of these instructions, a value of 1 in the table below is a trigger to investigate RTLs
+ // that might or might not alter the stack pointer, e.g. add, subtract, etc., or that might
+ // have operand-dependent effects on the stack pointer.
+
+ StackAlteration[STARS_NN_add] = 1; // Addition; check operands for stack pointer
+ StackAlteration[STARS_NN_adc] = 1; // Addition; check operands for stack pointer ; RARE for stack pointer
+ StackAlteration[STARS_NN_and] = 1; // Logical AND; check operands for stack pointer
+ StackAlteration[STARS_NN_call] = -((STARS_sval_t) this->GetSTARS_ISA_Bytewidth()); // Call Procedure; -4, but return cancels it to zero
+ StackAlteration[STARS_NN_callfi] = -2 * ((STARS_sval_t) this->GetSTARS_ISA_Bytewidth()); // Indirect Call Far Procedure; -8, but far return cancels it to zero
+ StackAlteration[STARS_NN_callni] = -((STARS_sval_t) this->GetSTARS_ISA_Bytewidth()); // Indirect Call Near Procedure; -4, but return cancels it to zero
+ StackAlteration[STARS_NN_enterw] = 1; // Make Stack Frame for Procedure Parameters **
+ StackAlteration[STARS_NN_enter] = 1; // Make Stack Frame for Procedure Parameters **
+ StackAlteration[STARS_NN_enterd] = 1; // Make Stack Frame for Procedure Parameters **
+ StackAlteration[STARS_NN_enterq] = 1; // Make Stack Frame for Procedure Parameters **
+ StackAlteration[STARS_NN_int] = 0; // Call to Interrupt Procedure
+ StackAlteration[STARS_NN_into] = 0; // Call to Interrupt Procedure if Overflow Flag = 1
+ StackAlteration[STARS_NN_int3] = 0; // Trap to Debugger
+ StackAlteration[STARS_NN_iretw] = 6; // Interrupt Return
+ StackAlteration[STARS_NN_iret] = 12; // Interrupt Return
+ StackAlteration[STARS_NN_iretd] = 12; // Interrupt Return (use32)
+ StackAlteration[STARS_NN_iretq] = 40; // Interrupt Return (use64)
+ StackAlteration[STARS_NN_lea] = 1; // Load Effective Address (can be used for basic arithmetic assignments)
+ StackAlteration[STARS_NN_leavew] = 1; // High Level Procedure Exit **
+ StackAlteration[STARS_NN_leave] = 1; // High Level Procedure Exit **
+ StackAlteration[STARS_NN_leaved] = 1; // High Level Procedure Exit **
+ StackAlteration[STARS_NN_leaveq] = 1; // High Level Procedure Exit **
+ StackAlteration[STARS_NN_mov] = 1; // Move Data ; could be esp := ebp (deallocate stack frame) or esp := ebx (unknown)
+ StackAlteration[STARS_NN_pop] = 1; // Pop a word from the Stack ; could be 16-bit or 32-bit operand, etc.
+ StackAlteration[STARS_NN_popaw] = 14; // Pop all General Registers
+ StackAlteration[STARS_NN_popa] = 28; // Pop all General Registers
+ StackAlteration[STARS_NN_popad] = 28; // Pop all General Registers (use32)
+ StackAlteration[STARS_NN_popaq] = 56; // Pop all General Registers (use64)
+ StackAlteration[STARS_NN_popfw] = 2; // Pop Stack into Flags Register **
+ StackAlteration[STARS_NN_popf] = 4; // Pop Stack into Flags Register **
+ StackAlteration[STARS_NN_popfd] = 4; // Pop Stack into Eflags Register **
+ StackAlteration[STARS_NN_popfq] = 8; // Pop Stack into Rflags Register **
+ StackAlteration[STARS_NN_push] = 1; // Push Operand onto the Stack ; could be 16-bit or 32-bit operand, etc.
+ StackAlteration[STARS_NN_pushaw] = -14; // Push all General Registers
+ StackAlteration[STARS_NN_pusha] = -28; // Push all General Registers
+ StackAlteration[STARS_NN_pushad] = -28; // Push all General Registers (use32)
+ StackAlteration[STARS_NN_pushaq] = -56; // Push all General Registers (use64)
+ StackAlteration[STARS_NN_pushfw] = -2; // Push Flags Register onto the Stack
+ StackAlteration[STARS_NN_pushf] = -4; // Push Flags Register onto the Stack
+ StackAlteration[STARS_NN_pushfd] = -4; // Push Flags Register onto the Stack (use32)
+ StackAlteration[STARS_NN_pushfq] = -8; // Push Flags Register onto the Stack (use64)
+ StackAlteration[STARS_NN_retn] = 1; // Return Near from Procedure (usually 4 bytes)
+ StackAlteration[STARS_NN_retf] = 1; // Return Far from Procedure (usually 8 bytes)
+ StackAlteration[STARS_NN_sub] = 1; // Subtraction; check operands for stack pointer
+ StackAlteration[STARS_NN_sbb] = 1; // Subtraction; check operands for stack pointer ; RARE for stack pointer
+
+ //
+ // 486 instructions
+ //
+
+
+ //
+ // Pentium instructions
+ //
+
+
+ //
+ // Pentium Pro instructions
+ //
+
+
+ //
+ // FPP instructions
+ //
+
+
+ //
+ // 80387 instructions
+ //
+
+ //
+ // Instructions added 28.02.96
+ //
+
+ StackAlteration[STARS_NN_loadall] = 0; // Load the entire CPU state from ES:EDI ?? Cannot find in Intel manuals
+
+ //
+ // MMX instructions
+ //
+
+
+ //
+ // Undocumented Deschutes processor instructions
+ //
+
+ // Pentium II instructions
+
+ StackAlteration[STARS_NN_sysenter] = 0; // Fast Transition to System Call Entry Point
+ StackAlteration[STARS_NN_sysexit] = 0; // Fast Transition from System Call Entry Point
+
+ // 3DNow! instructions
+
+
+ // Pentium III instructions
+
+
+ // Pentium III Pseudo instructions
+
+ // AMD K7 instructions
+
+ // Revisit AMD if we port to it.
+
+ // Undocumented FP instructions (thanks to norbert.juffa@adm.com)
+
+ // Pentium 4 instructions
+
+
+ // AMD syscall/sysret instructions NOTE: not AMD, found in Intel manual
+
+ StackAlteration[STARS_NN_syscall] = 0; // Low latency system call
+ StackAlteration[STARS_NN_sysret] = 0; // Return from system call
+
+ // AMD64 instructions NOTE: not AMD, found in Intel manual
+
+ // New Pentium instructions (SSE3)
+
+
+ // Missing AMD64 instructions NOTE: also found in Intel manual
+
+ // SSE3 instructions
+
+ // SSSE3 instructions
+
+
+ // VMX instructions
+
+#if 599 < IDA_SDK_VERSION
+
+ // Added with x86-64
+
+ // Geode LX 3DNow! extensions
+
+ // SSE2 pseudoinstructions
+
+
+ // SSSE4.1 instructions
+
+
+ // SSSE4.2 instructions
+
+ // AMD SSE4a instructions
+
+ // xsave/xrstor instructions
+
+ // Intel Safer Mode Extensions (SMX)
+
+ // AMD-V Virtualization ISA Extension
+
+ // VMX+ instructions
+
+ // Intel Atom instructions
+
+ // Intel AES instructions
+
+ // Carryless multiplication
+
+ // Returns modified by operand size prefixes
+
+ StackAlteration[STARS_NN_retnw] = 1; // Return Near from Procedure (use16)
+ StackAlteration[STARS_NN_retnd] = 1; // Return Near from Procedure (use32)
+ StackAlteration[STARS_NN_retnq] = 1; // Return Near from Procedure (use64)
+ StackAlteration[STARS_NN_retfw] = 1; // Return Far from Procedure (use16)
+ StackAlteration[STARS_NN_retfd] = 1; // Return Far from Procedure (use32)
+ StackAlteration[STARS_NN_retfq] = 1; // Return Far from Procedure (use64)
+
+ // RDRAND support
+
+ // new GPR instructions
+
+ // new AVX instructions
+
+ // Transactional Synchronization Extensions
+
+ // Virtual PC synthetic instructions
+
+#endif // 599 < IDA_SDK_VERSION
+
+ StackAlteration[STARS_NN_last] = 0;
+
+ return;
+
+} // end STARS_Program_t::InitStackAlteration()
+
+// Initialize the lookup maps that are used to define the FG info that can
+// be inferred from a library function name.
+void STARS_Program_t::InitLibFuncFGInfoMaps(void) {
+ struct FineGrainedInfo FGEntry;
+ pair<string, struct FineGrainedInfo> MapEntry;
+ pair<map<string, struct FineGrainedInfo>::iterator, bool> InsertResult;
+
+ // Add functions that return signed integers.
+ FGEntry.SignMiscInfo = FG_MASK_SIGNED;
+ FGEntry.SizeInfo = (FG_MASK_INTEGER | ComputeOperandBitWidthMask(nullptr, sizeof(int)));
+ MapEntry.second = FGEntry;
+
+ MapEntry.first = "atoi";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "strcmp";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "strcoll";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "strncmp";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "memcmp";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "isalnum";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "isalpha";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "islower";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "isupper";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "isdigit";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "isxdigit";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "iscntrl";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "isgraph";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "isblank";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "isspace";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "isprint";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "ispunct";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ // Functions that return signed longs.
+ if (sizeof(long int) != sizeof(int)) {
+ FGEntry.SizeInfo = (FG_MASK_INTEGER | ComputeOperandBitWidthMask(nullptr, sizeof(long int)));
+ MapEntry.second = FGEntry;
+ }
+
+ MapEntry.first = "atol";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "strtol";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ // Functions that return signed long longs.
+ if (sizeof(long long int) != sizeof(long int)) {
+ FGEntry.SizeInfo = (FG_MASK_INTEGER | ComputeOperandBitWidthMask(nullptr, sizeof(long long int)));
+ MapEntry.second = FGEntry;
+ }
+
+ MapEntry.first = "atoll";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "strtoll";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ // Functions that return unsigned long longs.
+ FGEntry.SignMiscInfo = FG_MASK_UNSIGNED;
+ MapEntry.second = FGEntry;
+
+ MapEntry.first = "strtoull";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ // Functions that return unsigned longs.
+ if (sizeof(long long int) != sizeof(long int)) {
+ FGEntry.SizeInfo = (FG_MASK_INTEGER | ComputeOperandBitWidthMask(nullptr, sizeof(long int)));
+ MapEntry.second = FGEntry;
+ }
+
+ MapEntry.first = "strtoul";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ // Functions that return size_t.
+ FGEntry.SizeInfo = (FG_MASK_INTEGER | ComputeOperandBitWidthMask(nullptr, sizeof(size_t)));
+ FGEntry.SignMiscInfo = FG_MASK_UNSIGNED;
+ MapEntry.second = FGEntry;
+
+ MapEntry.first = "strlen";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "strxfrm";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "strspn";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "strcspn";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "strftime";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ // Functions that return (char *).
+ FGEntry.SizeInfo = (FG_MASK_DATAPOINTER | ComputeOperandBitWidthMask(nullptr, sizeof(char *)));
+ FGEntry.SignMiscInfo = FG_MASK_UNSIGNED;
+ MapEntry.second = FGEntry;
+
+ MapEntry.first = "strcpy";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "strncpy";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "strcat";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "strncat";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "strchr";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "strrchr";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "strpbrk";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "strstr";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "strtok";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "strerror";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "asctime";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "ctime";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ // Functions that return (void *) or a similar data pointer.
+ FGEntry.SizeInfo = (FG_MASK_DATAPOINTER | ComputeOperandBitWidthMask(nullptr, sizeof(void *)));
+ FGEntry.SignMiscInfo = FG_MASK_UNSIGNED;
+ MapEntry.second = FGEntry;
+
+ MapEntry.first = "setlocale";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "localeconv";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "malloc";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "calloc";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "realloc";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "memchr";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "memcpy";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "mempcpy"; // non-standard, found in glibc
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "memmove";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "memset";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "gmtime";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ MapEntry.first = "localtime";
+ InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
+ assert(InsertResult.second);
+
+ // Functions that return bool.
+ FGEntry.SizeInfo = (FG_MASK_INTEGER | ComputeOperandBitWidthMask(nullptr, sizeof(bool)));
+ FGEntry.SignMiscInfo = FG_MASK_UNSIGNED;
+ MapEntry.second = FGEntry;
+
+
+ // NOTE: Add <math.h> functions later.
+
+ return;
+} // end of STARS_Program_t::InitLibFuncFGInfoMaps()
+
+// Initialize the DFACategory[] array to define instruction classes
+// for the purposes of data flow analysis.
+void STARS_Program_t::InitDFACategory(void) {
+ // Default category is 0, not the start or end of a basic block.
+ (void) memset(DFACategory, 0, sizeof(DFACategory));
+
+ DFACategory[STARS_NN_call] = CALL; // Call Procedure
+ DFACategory[STARS_NN_callfi] = INDIR_CALL; // Indirect Call Far Procedure
+ DFACategory[STARS_NN_callni] = INDIR_CALL; // Indirect Call Near Procedure
+
+ DFACategory[STARS_NN_hlt] = HALT; // Halt
+
+ DFACategory[STARS_NN_int] = INDIR_CALL; // Call to Interrupt Procedure
+ DFACategory[STARS_NN_into] = INDIR_CALL; // Call to Interrupt Procedure if Overflow Flag = 1
+ DFACategory[STARS_NN_int3] = INDIR_CALL; // Trap to Debugger
+ DFACategory[STARS_NN_iretw] = RETURN; // Interrupt Return
+ DFACategory[STARS_NN_iret] = RETURN; // Interrupt Return
+ DFACategory[STARS_NN_iretd] = RETURN; // Interrupt Return (use32)
+ DFACategory[STARS_NN_iretq] = RETURN; // Interrupt Return (use64)
+ DFACategory[STARS_NN_ja] = COND_BRANCH; // Jump if Above (CF=0 & ZF=0)
+ DFACategory[STARS_NN_jae] = COND_BRANCH; // Jump if Above or Equal (CF=0)
+ DFACategory[STARS_NN_jb] = COND_BRANCH; // Jump if Below (CF=1)
+ DFACategory[STARS_NN_jbe] = COND_BRANCH; // Jump if Below or Equal (CF=1 | ZF=1)
+ DFACategory[STARS_NN_jc] = COND_BRANCH; // Jump if Carry (CF=1)
+ DFACategory[STARS_NN_jcxz] = COND_BRANCH; // Jump if CX is 0
+ DFACategory[STARS_NN_jecxz] = COND_BRANCH; // Jump if ECX is 0
+ DFACategory[STARS_NN_jrcxz] = COND_BRANCH; // Jump if RCX is 0
+ DFACategory[STARS_NN_je] = COND_BRANCH; // Jump if Equal (ZF=1)
+ DFACategory[STARS_NN_jg] = COND_BRANCH; // Jump if Greater (ZF=0 & SF=OF)
+ DFACategory[STARS_NN_jge] = COND_BRANCH; // Jump if Greater or Equal (SF=OF)
+ DFACategory[STARS_NN_jl] = COND_BRANCH; // Jump if Less (SF!=OF)
+ DFACategory[STARS_NN_jle] = COND_BRANCH; // Jump if Less or Equal (ZF=1 | SF!=OF)
+ DFACategory[STARS_NN_jna] = COND_BRANCH; // Jump if Not Above (CF=1 | ZF=1)
+ DFACategory[STARS_NN_jnae] = COND_BRANCH; // Jump if Not Above or Equal (CF=1)
+ DFACategory[STARS_NN_jnb] = COND_BRANCH; // Jump if Not Below (CF=0)
+ DFACategory[STARS_NN_jnbe] = COND_BRANCH; // Jump if Not Below or Equal (CF=0 & ZF=0)
+ DFACategory[STARS_NN_jnc] = COND_BRANCH; // Jump if Not Carry (CF=0)
+ DFACategory[STARS_NN_jne] = COND_BRANCH; // Jump if Not Equal (ZF=0)
+ DFACategory[STARS_NN_jng] = COND_BRANCH; // Jump if Not Greater (ZF=1 | SF!=OF)
+ DFACategory[STARS_NN_jnge] = COND_BRANCH; // Jump if Not Greater or Equal (SF!=OF)
+ DFACategory[STARS_NN_jnl] = COND_BRANCH; // Jump if Not Less (SF=OF)
+ DFACategory[STARS_NN_jnle] = COND_BRANCH; // Jump if Not Less or Equal (ZF=0 & SF=OF)
+ DFACategory[STARS_NN_jno] = COND_BRANCH; // Jump if Not Overflow (OF=0)
+ DFACategory[STARS_NN_jnp] = COND_BRANCH; // Jump if Not Parity (PF=0)
+ DFACategory[STARS_NN_jns] = COND_BRANCH; // Jump if Not Sign (SF=0)
+ DFACategory[STARS_NN_jnz] = COND_BRANCH; // Jump if Not Zero (ZF=0)
+ DFACategory[STARS_NN_jo] = COND_BRANCH; // Jump if Overflow (OF=1)
+ DFACategory[STARS_NN_jp] = COND_BRANCH; // Jump if Parity (PF=1)
+ DFACategory[STARS_NN_jpe] = COND_BRANCH; // Jump if Parity Even (PF=1)
+ DFACategory[STARS_NN_jpo] = COND_BRANCH; // Jump if Parity Odd (PF=0)
+ DFACategory[STARS_NN_js] = COND_BRANCH; // Jump if Sign (SF=1)
+ DFACategory[STARS_NN_jz] = COND_BRANCH; // Jump if Zero (ZF=1)
+ DFACategory[STARS_NN_jmp] = JUMP; // Jump
+ DFACategory[STARS_NN_jmpfi] = INDIR_JUMP; // Indirect Far Jump
+ DFACategory[STARS_NN_jmpni] = INDIR_JUMP; // Indirect Near Jump
+ DFACategory[STARS_NN_jmpshort] = JUMP; // Jump Short (only in 64-bit mode)
+
+ DFACategory[STARS_NN_loopw] = COND_BRANCH; // Loop while ECX != 0
+ DFACategory[STARS_NN_loop] = COND_BRANCH; // Loop while CX != 0
+ DFACategory[STARS_NN_loopd] = COND_BRANCH; // Loop while ECX != 0
+ DFACategory[STARS_NN_loopq] = COND_BRANCH; // Loop while RCX != 0
+ DFACategory[STARS_NN_loopwe] = COND_BRANCH; // Loop while CX != 0 and ZF=1
+ DFACategory[STARS_NN_loope] = COND_BRANCH; // Loop while rCX != 0 and ZF=1
+ DFACategory[STARS_NN_loopde] = COND_BRANCH; // Loop while ECX != 0 and ZF=1
+ DFACategory[STARS_NN_loopqe] = COND_BRANCH; // Loop while RCX != 0 and ZF=1
+ DFACategory[STARS_NN_loopwne] = COND_BRANCH; // Loop while CX != 0 and ZF=0
+ DFACategory[STARS_NN_loopne] = COND_BRANCH; // Loop while rCX != 0 and ZF=0
+ DFACategory[STARS_NN_loopdne] = COND_BRANCH; // Loop while ECX != 0 and ZF=0
+ DFACategory[STARS_NN_loopqne] = COND_BRANCH; // Loop while RCX != 0 and ZF=0
+
+ DFACategory[STARS_NN_retn] = RETURN; // Return Near from Procedure
+ DFACategory[STARS_NN_retf] = RETURN; // Return Far from Procedure
+
+ //
+ // Pentium instructions
+ //
+
+ DFACategory[STARS_NN_rsm] = HALT; // Resume from System Management Mode
+
+ // Pentium II instructions
+
+ DFACategory[STARS_NN_sysenter] = CALL; // Fast Transition to System Call Entry Point
+ DFACategory[STARS_NN_sysexit] = CALL; // Fast Transition from System Call Entry Point
+
+ // AMD syscall/sysret instructions NOTE: not AMD, found in Intel manual
+
+ DFACategory[STARS_NN_syscall] = CALL; // Low latency system call
+ DFACategory[STARS_NN_sysret] = CALL; // Return from system call
+
+ // VMX instructions
+
+ DFACategory[STARS_NN_vmcall] = INDIR_CALL; // Call to VM Monitor
+
+ // Added with x86-64
+
+ // Geode LX 3DNow! extensions
+
+ // SSE2 pseudoinstructions
+
+ // SSSE4.1 instructions
+
+ // SSSE4.2 instructions
+
+ // AMD SSE4a instructions
+
+ // xsave/xrstor instructions
+
+ // Intel Safer Mode Extensions (SMX)
+
+ // AMD-V Virtualization ISA Extension
+
+ // VMX+ instructions
+
+ // Intel Atom instructions
+
+ // Intel AES instructions
+
+ // Carryless multiplication
+
+ // Returns modified by operand size prefixes
+
+ DFACategory[STARS_NN_retnw] = RETURN; // Return Near from Procedure (use16)
+ DFACategory[STARS_NN_retnd] = RETURN; // Return Near from Procedure (use32)
+ DFACategory[STARS_NN_retnq] = RETURN; // Return Near from Procedure (use64)
+ DFACategory[STARS_NN_retfw] = RETURN; // Return Far from Procedure (use16)
+ DFACategory[STARS_NN_retfd] = RETURN; // Return Far from Procedure (use32)
+ DFACategory[STARS_NN_retfq] = RETURN; // Return Far from Procedure (use64)
+
+ // RDRAND support
+
+ // new GPR instructions
+
+ // new AVX instructions
+
+ // Transactional Synchronization Extensions
+
+ // Virtual PC synthetic instructions
+
+ return;
+
+} // end of STARS_Program_t::InitDFACategory()
+
+// Initialize the SMPDefsFlags[] array to define how we emit
+// optimizing annotations.
+void STARS_Program_t::InitSMPDefsFlags(void) {
+ // Default value is true. Many instructions set the flags.
+ (void) memset(SMPDefsFlags, true, sizeof(SMPDefsFlags));
+
+ SMPDefsFlags[STARS_NN_null] = false; // Unknown Operation
+ SMPDefsFlags[STARS_NN_bound] = false; // Check Array Index Against Bounds
+ SMPDefsFlags[STARS_NN_call] = false; // Call Procedure
+ SMPDefsFlags[STARS_NN_callfi] = false; // Indirect Call Far Procedure
+ SMPDefsFlags[STARS_NN_callni] = false; // Indirect Call Near Procedure
+ SMPDefsFlags[STARS_NN_cbw] = false; // AL -> AX (with sign)
+ SMPDefsFlags[STARS_NN_cwde] = false; // AX -> EAX (with sign)
+ SMPDefsFlags[STARS_NN_cdqe] = false; // EAX -> RAX (with sign)
+ SMPDefsFlags[STARS_NN_clts] = false; // Clear Task-Switched Flag in CR0
+ SMPDefsFlags[STARS_NN_cwd] = false; // AX -> DX:AX (with sign)
+ SMPDefsFlags[STARS_NN_cdq] = false; // EAX -> EDX:EAX (with sign)
+ SMPDefsFlags[STARS_NN_cqo] = false; // RAX -> RDX:RAX (with sign)
+ SMPDefsFlags[STARS_NN_enterw] = false; // Make Stack Frame for Procedure Parameters
+ SMPDefsFlags[STARS_NN_enter] = false; // Make Stack Frame for Procedure Parameters
+ SMPDefsFlags[STARS_NN_enterd] = false; // Make Stack Frame for Procedure Parameters
+ SMPDefsFlags[STARS_NN_enterq] = false; // Make Stack Frame for Procedure Parameters
+ SMPDefsFlags[STARS_NN_hlt] = false; // Halt
+ SMPDefsFlags[STARS_NN_in] = false; // Input from Port
+ SMPDefsFlags[STARS_NN_ins] = false; // Input Byte(s) from Port to String
+ SMPDefsFlags[STARS_NN_iretw] = false; // Interrupt Return
+ SMPDefsFlags[STARS_NN_iret] = false; // Interrupt Return
+ SMPDefsFlags[STARS_NN_iretd] = false; // Interrupt Return (use32)
+ SMPDefsFlags[STARS_NN_iretq] = false; // Interrupt Return (use64)
+ SMPDefsFlags[STARS_NN_ja] = false; // Jump if Above (CF=0 & ZF=0)
+ SMPDefsFlags[STARS_NN_jae] = false; // Jump if Above or Equal (CF=0)
+ SMPDefsFlags[STARS_NN_jb] = false; // Jump if Below (CF=1)
+ SMPDefsFlags[STARS_NN_jbe] = false; // Jump if Below or Equal (CF=1 | ZF=1)
+ SMPDefsFlags[STARS_NN_jc] = false; // Jump if Carry (CF=1)
+ SMPDefsFlags[STARS_NN_jcxz] = false; // Jump if CX is 0
+ SMPDefsFlags[STARS_NN_jecxz] = false; // Jump if ECX is 0
+ SMPDefsFlags[STARS_NN_jrcxz] = false; // Jump if RCX is 0
+ SMPDefsFlags[STARS_NN_je] = false; // Jump if Equal (ZF=1)
+ SMPDefsFlags[STARS_NN_jg] = false; // Jump if Greater (ZF=0 & SF=OF)
+ SMPDefsFlags[STARS_NN_jge] = false; // Jump if Greater or Equal (SF=OF)
+ SMPDefsFlags[STARS_NN_jl] = false; // Jump if Less (SF!=OF)
+ SMPDefsFlags[STARS_NN_jle] = false; // Jump if Less or Equal (ZF=1 | SF!=OF)
+ SMPDefsFlags[STARS_NN_jna] = false; // Jump if Not Above (CF=1 | ZF=1)
+ SMPDefsFlags[STARS_NN_jnae] = false; // Jump if Not Above or Equal (CF=1)
+ SMPDefsFlags[STARS_NN_jnb] = false; // Jump if Not Below (CF=0)
+ SMPDefsFlags[STARS_NN_jnbe] = false; // Jump if Not Below or Equal (CF=0 & ZF=0)
+ SMPDefsFlags[STARS_NN_jnc] = false; // Jump if Not Carry (CF=0)
+ SMPDefsFlags[STARS_NN_jne] = false; // Jump if Not Equal (ZF=0)
+ SMPDefsFlags[STARS_NN_jng] = false; // Jump if Not Greater (ZF=1 | SF!=OF)
+ SMPDefsFlags[STARS_NN_jnge] = false; // Jump if Not Greater or Equal (SF!=OF)
+ SMPDefsFlags[STARS_NN_jnl] = false; // Jump if Not Less (SF=OF)
+ SMPDefsFlags[STARS_NN_jnle] = false; // Jump if Not Less or Equal (ZF=0 & SF=OF)
+ SMPDefsFlags[STARS_NN_jno] = false; // Jump if Not Overflow (OF=0)
+ SMPDefsFlags[STARS_NN_jnp] = false; // Jump if Not Parity (PF=0)
+ SMPDefsFlags[STARS_NN_jns] = false; // Jump if Not Sign (SF=0)
+ SMPDefsFlags[STARS_NN_jnz] = false; // Jump if Not Zero (ZF=0)
+ SMPDefsFlags[STARS_NN_jo] = false; // Jump if Overflow (OF=1)
+ SMPDefsFlags[STARS_NN_jp] = false; // Jump if Parity (PF=1)
+ SMPDefsFlags[STARS_NN_jpe] = false; // Jump if Parity Even (PF=1)
+ SMPDefsFlags[STARS_NN_jpo] = false; // Jump if Parity Odd (PF=0)
+ SMPDefsFlags[STARS_NN_js] = false; // Jump if Sign (SF=1)
+ SMPDefsFlags[STARS_NN_jz] = false; // Jump if Zero (ZF=1)
+ SMPDefsFlags[STARS_NN_jmp] = false; // Jump
+ SMPDefsFlags[STARS_NN_jmpfi] = false; // Indirect Far Jump
+ SMPDefsFlags[STARS_NN_jmpni] = false; // Indirect Near Jump
+ SMPDefsFlags[STARS_NN_jmpshort] = false; // Jump Short (not used)
+ SMPDefsFlags[STARS_NN_lahf] = false; // Load Flags into AH Register
+ SMPDefsFlags[STARS_NN_lea] = false; // Load Effective Address
+ SMPDefsFlags[STARS_NN_leavew] = false; // High Level Procedure Exit
+ SMPDefsFlags[STARS_NN_leave] = false; // High Level Procedure Exit
+ SMPDefsFlags[STARS_NN_leaved] = false; // High Level Procedure Exit
+ SMPDefsFlags[STARS_NN_leaveq] = false; // High Level Procedure Exit
+ SMPDefsFlags[STARS_NN_lgdt] = false; // Load Global Descriptor Table Register
+ SMPDefsFlags[STARS_NN_lidt] = false; // Load Interrupt Descriptor Table Register
+ SMPDefsFlags[STARS_NN_lgs] = false; // Load Full Pointer to GS:xx
+ SMPDefsFlags[STARS_NN_lss] = false; // Load Full Pointer to SS:xx
+ SMPDefsFlags[STARS_NN_lds] = false; // Load Full Pointer to DS:xx
+ SMPDefsFlags[STARS_NN_les] = false; // Load Full Pointer to ES:xx
+ SMPDefsFlags[STARS_NN_lfs] = false; // Load Full Pointer to FS:xx
+ SMPDefsFlags[STARS_NN_loopw] = false; // Loop while ECX != 0
+ SMPDefsFlags[STARS_NN_loop] = false; // Loop while ECX != 0
+ SMPDefsFlags[STARS_NN_loopwe] = false; // Loop while CX != 0 and ZF=1
+ SMPDefsFlags[STARS_NN_loope] = false; // Loop while rCX != 0 and ZF=1
+ SMPDefsFlags[STARS_NN_loopde] = false; // Loop while ECX != 0 and ZF=1
+ SMPDefsFlags[STARS_NN_loopqe] = false; // Loop while RCX != 0 and ZF=1
+ SMPDefsFlags[STARS_NN_loopwne] = false; // Loop while CX != 0 and ZF=0
+ SMPDefsFlags[STARS_NN_loopne] = false; // Loop while rCX != 0 and ZF=0
+ SMPDefsFlags[STARS_NN_loopdne] = false; // Loop while ECX != 0 and ZF=0
+ SMPDefsFlags[STARS_NN_loopqne] = false; // Loop while RCX != 0 and ZF=0
+ SMPDefsFlags[STARS_NN_ltr] = false; // Load Task Register
+ SMPDefsFlags[STARS_NN_mov] = false; // Move Data
+ SMPDefsFlags[STARS_NN_movsp] = true; // Move to/from Special Registers
+ SMPDefsFlags[STARS_NN_movs] = false; // Move Byte(s) from String to String
+ SMPDefsFlags[STARS_NN_movsx] = false; // Move with Sign-Extend
+ SMPDefsFlags[STARS_NN_movzx] = false; // Move with Zero-Extend
+ SMPDefsFlags[STARS_NN_nop] = false; // No Operation
+ SMPDefsFlags[STARS_NN_not] = false; // One's Complement Negation
+ SMPDefsFlags[STARS_NN_out] = false; // Output to Port
+ SMPDefsFlags[STARS_NN_outs] = false; // Output Byte(s) to Port
+ SMPDefsFlags[STARS_NN_pop] = false; // Pop a word from the Stack
+ SMPDefsFlags[STARS_NN_popaw] = false; // Pop all General Registers
+ SMPDefsFlags[STARS_NN_popa] = false; // Pop all General Registers
+ SMPDefsFlags[STARS_NN_popad] = false; // Pop all General Registers (use32)
+ SMPDefsFlags[STARS_NN_popaq] = false; // Pop all General Registers (use64)
+ SMPDefsFlags[STARS_NN_push] = false; // Push Operand onto the Stack
+ SMPDefsFlags[STARS_NN_pushaw] = false; // Push all General Registers
+ SMPDefsFlags[STARS_NN_pusha] = false; // Push all General Registers
+ SMPDefsFlags[STARS_NN_pushad] = false; // Push all General Registers (use32)
+ SMPDefsFlags[STARS_NN_pushaq] = false; // Push all General Registers (use64)
+ SMPDefsFlags[STARS_NN_pushfw] = false; // Push Flags Register onto the Stack
+ SMPDefsFlags[STARS_NN_pushf] = false; // Push Flags Register onto the Stack
+ SMPDefsFlags[STARS_NN_pushfd] = false; // Push Flags Register onto the Stack (use32)
+ SMPDefsFlags[STARS_NN_pushfq] = false; // Push Flags Register onto the Stack (use64)
+ SMPDefsFlags[STARS_NN_rep] = false; // Repeat String Operation
+ SMPDefsFlags[STARS_NN_repe] = false; // Repeat String Operation while ZF=1
+ SMPDefsFlags[STARS_NN_repne] = false; // Repeat String Operation while ZF=0
+ SMPDefsFlags[STARS_NN_retn] = false; // Return Near from Procedure
+ SMPDefsFlags[STARS_NN_retf] = false; // Return Far from Procedure
+ SMPDefsFlags[STARS_NN_sahf] = true; // Store AH into flags
+ SMPDefsFlags[STARS_NN_shl] = true; // Shift Logical Left
+ SMPDefsFlags[STARS_NN_shr] = true; // Shift Logical Right
+ SMPDefsFlags[STARS_NN_seta] = false; // Set Byte if Above (CF=0 & ZF=0)
+ SMPDefsFlags[STARS_NN_setae] = false; // Set Byte if Above or Equal (CF=0)
+ SMPDefsFlags[STARS_NN_setb] = false; // Set Byte if Below (CF=1)
+ SMPDefsFlags[STARS_NN_setbe] = false; // Set Byte if Below or Equal (CF=1 | ZF=1)
+ SMPDefsFlags[STARS_NN_setc] = false; // Set Byte if Carry (CF=1)
+ SMPDefsFlags[STARS_NN_sete] = false; // Set Byte if Equal (ZF=1)
+ SMPDefsFlags[STARS_NN_setg] = false; // Set Byte if Greater (ZF=0 & SF=OF)
+ SMPDefsFlags[STARS_NN_setge] = false; // Set Byte if Greater or Equal (SF=OF)
+ SMPDefsFlags[STARS_NN_setl] = false; // Set Byte if Less (SF!=OF)
+ SMPDefsFlags[STARS_NN_setle] = false; // Set Byte if Less or Equal (ZF=1 | SF!=OF)
+ SMPDefsFlags[STARS_NN_setna] = false; // Set Byte if Not Above (CF=1 | ZF=1)
+ SMPDefsFlags[STARS_NN_setnae] = false; // Set Byte if Not Above or Equal (CF=1)
+ SMPDefsFlags[STARS_NN_setnb] = false; // Set Byte if Not Below (CF=0)
+ SMPDefsFlags[STARS_NN_setnbe] = false; // Set Byte if Not Below or Equal (CF=0 & ZF=0)
+ SMPDefsFlags[STARS_NN_setnc] = false; // Set Byte if Not Carry (CF=0)
+ SMPDefsFlags[STARS_NN_setne] = false; // Set Byte if Not Equal (ZF=0)
+ SMPDefsFlags[STARS_NN_setng] = false; // Set Byte if Not Greater (ZF=1 | SF!=OF)
+ SMPDefsFlags[STARS_NN_setnge] = false; // Set Byte if Not Greater or Equal (SF!=OF)
+ SMPDefsFlags[STARS_NN_setnl] = false; // Set Byte if Not Less (SF=OF)
+ SMPDefsFlags[STARS_NN_setnle] = false; // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
+ SMPDefsFlags[STARS_NN_setno] = false; // Set Byte if Not Overflow (OF=0)
+ SMPDefsFlags[STARS_NN_setnp] = false; // Set Byte if Not Parity (PF=0)
+ SMPDefsFlags[STARS_NN_setns] = false; // Set Byte if Not Sign (SF=0)
+ SMPDefsFlags[STARS_NN_setnz] = false; // Set Byte if Not Zero (ZF=0)
+ SMPDefsFlags[STARS_NN_seto] = false; // Set Byte if Overflow (OF=1)
+ SMPDefsFlags[STARS_NN_setp] = false; // Set Byte if Parity (PF=1)
+ SMPDefsFlags[STARS_NN_setpe] = false; // Set Byte if Parity Even (PF=1)
+ SMPDefsFlags[STARS_NN_setpo] = false; // Set Byte if Parity Odd (PF=0)
+ SMPDefsFlags[STARS_NN_sets] = false; // Set Byte if Sign (SF=1)
+ SMPDefsFlags[STARS_NN_setz] = false; // Set Byte if Zero (ZF=1)
+ SMPDefsFlags[STARS_NN_sgdt] = false; // Store Global Descriptor Table Register
+ SMPDefsFlags[STARS_NN_sidt] = false; // Store Interrupt Descriptor Table Register
+ SMPDefsFlags[STARS_NN_sldt] = false; // Store Local Descriptor Table Register
+ SMPDefsFlags[STARS_NN_str] = false; // Store Task Register
+ SMPDefsFlags[STARS_NN_wait] = false; // Wait until BUSY# Pin is Inactive (HIGH)
+ SMPDefsFlags[STARS_NN_xchg] = false; // Exchange Register/Memory with Register
+ SMPDefsFlags[STARS_NN_xlat] = false; // Table Lookup Translation
+
+ //
+ // 486 instructions
+ //
+
+ SMPDefsFlags[STARS_NN_bswap] = false; // Swap bytes in register
+ SMPDefsFlags[STARS_NN_invd] = false; // Invalidate Data Cache
+ SMPDefsFlags[STARS_NN_wbinvd] = false; // Invalidate Data Cache (write changes)
+ SMPDefsFlags[STARS_NN_invlpg] = false; // Invalidate TLB entry
+
+ //
+ // Pentium instructions
+ //
+
+ SMPDefsFlags[STARS_NN_rdmsr] = false; // Read Machine Status Register
+ SMPDefsFlags[STARS_NN_wrmsr] = false; // Write Machine Status Register
+ SMPDefsFlags[STARS_NN_cpuid] = false; // Get CPU ID
+ SMPDefsFlags[STARS_NN_rdtsc] = false; // Read Time Stamp Counter
+
+ //
+ // Pentium Pro instructions
+ //
+
+ SMPDefsFlags[STARS_NN_cmova] = false; // Move if Above (CF=0 & ZF=0)
+ SMPDefsFlags[STARS_NN_cmovb] = false; // Move if Below (CF=1)
+ SMPDefsFlags[STARS_NN_cmovbe] = false; // Move if Below or Equal (CF=1 | ZF=1)
+ SMPDefsFlags[STARS_NN_cmovg] = false; // Move if Greater (ZF=0 & SF=OF)
+ SMPDefsFlags[STARS_NN_cmovge] = false; // Move if Greater or Equal (SF=OF)
+ SMPDefsFlags[STARS_NN_cmovl] = false; // Move if Less (SF!=OF)
+ SMPDefsFlags[STARS_NN_cmovle] = false; // Move if Less or Equal (ZF=1 | SF!=OF)
+ SMPDefsFlags[STARS_NN_cmovnb] = false; // Move if Not Below (CF=0)
+ SMPDefsFlags[STARS_NN_cmovno] = false; // Move if Not Overflow (OF=0)
+ SMPDefsFlags[STARS_NN_cmovnp] = false; // Move if Not Parity (PF=0)
+ SMPDefsFlags[STARS_NN_cmovns] = false; // Move if Not Sign (SF=0)
+ SMPDefsFlags[STARS_NN_cmovnz] = false; // Move if Not Zero (ZF=0)
+ SMPDefsFlags[STARS_NN_cmovo] = false; // Move if Overflow (OF=1)
+ SMPDefsFlags[STARS_NN_cmovp] = false; // Move if Parity (PF=1)
+ SMPDefsFlags[STARS_NN_cmovs] = false; // Move if Sign (SF=1)
+ SMPDefsFlags[STARS_NN_cmovz] = false; // Move if Zero (ZF=1)
+ SMPDefsFlags[STARS_NN_fcmovb] = false; // Floating Move if Below
+ SMPDefsFlags[STARS_NN_fcmove] = false; // Floating Move if Equal
+ SMPDefsFlags[STARS_NN_fcmovbe] = false; // Floating Move if Below or Equal
+ SMPDefsFlags[STARS_NN_fcmovu] = false; // Floating Move if Unordered
+ SMPDefsFlags[STARS_NN_fcmovnb] = false; // Floating Move if Not Below
+ SMPDefsFlags[STARS_NN_fcmovne] = false; // Floating Move if Not Equal
+ SMPDefsFlags[STARS_NN_fcmovnbe] = false; // Floating Move if Not Below or Equal
+ SMPDefsFlags[STARS_NN_fcmovnu] = false; // Floating Move if Not Unordered
+ SMPDefsFlags[STARS_NN_rdpmc] = false; // Read Performance Monitor Counter
+
+ //
+ // FPP instructions
+ //
+
+ SMPDefsFlags[STARS_NN_fld] = false; // Load Real
+ SMPDefsFlags[STARS_NN_fst] = false; // Store Real
+ SMPDefsFlags[STARS_NN_fstp] = false; // Store Real and Pop
+ SMPDefsFlags[STARS_NN_fxch] = false; // Exchange Registers
+ SMPDefsFlags[STARS_NN_fild] = false; // Load Integer
+ SMPDefsFlags[STARS_NN_fist] = false; // Store Integer
+ SMPDefsFlags[STARS_NN_fistp] = false; // Store Integer and Pop
+ SMPDefsFlags[STARS_NN_fbld] = false; // Load BCD
+ SMPDefsFlags[STARS_NN_fbstp] = false; // Store BCD and Pop
+ SMPDefsFlags[STARS_NN_fadd] = false; // Add Real
+ SMPDefsFlags[STARS_NN_faddp] = false; // Add Real and Pop
+ SMPDefsFlags[STARS_NN_fiadd] = false; // Add Integer
+ SMPDefsFlags[STARS_NN_fsub] = false; // Subtract Real
+ SMPDefsFlags[STARS_NN_fsubp] = false; // Subtract Real and Pop
+ SMPDefsFlags[STARS_NN_fisub] = false; // Subtract Integer
+ SMPDefsFlags[STARS_NN_fsubr] = false; // Subtract Real Reversed
+ SMPDefsFlags[STARS_NN_fsubrp] = false; // Subtract Real Reversed and Pop
+ SMPDefsFlags[STARS_NN_fisubr] = false; // Subtract Integer Reversed
+ SMPDefsFlags[STARS_NN_fmul] = false; // Multiply Real
+ SMPDefsFlags[STARS_NN_fmulp] = false; // Multiply Real and Pop
+ SMPDefsFlags[STARS_NN_fimul] = false; // Multiply Integer
+ SMPDefsFlags[STARS_NN_fdiv] = false; // Divide Real
+ SMPDefsFlags[STARS_NN_fdivp] = false; // Divide Real and Pop
+ SMPDefsFlags[STARS_NN_fidiv] = false; // Divide Integer
+ SMPDefsFlags[STARS_NN_fdivr] = false; // Divide Real Reversed
+ SMPDefsFlags[STARS_NN_fdivrp] = false; // Divide Real Reversed and Pop
+ SMPDefsFlags[STARS_NN_fidivr] = false; // Divide Integer Reversed
+ SMPDefsFlags[STARS_NN_fsqrt] = false; // Square Root
+ SMPDefsFlags[STARS_NN_fscale] = false; // Scale: st(0) <- st(0) * 2^st(1)
+ SMPDefsFlags[STARS_NN_fprem] = false; // Partial Remainder
+ SMPDefsFlags[STARS_NN_frndint] = false; // Round to Integer
+ SMPDefsFlags[STARS_NN_fxtract] = false; // Extract exponent and significand
+ SMPDefsFlags[STARS_NN_fabs] = false; // Absolute value
+ SMPDefsFlags[STARS_NN_fchs] = false; // Change Sign
+ SMPDefsFlags[STARS_NN_ficom] = false; // Compare Integer
+ SMPDefsFlags[STARS_NN_ficomp] = false; // Compare Integer and Pop
+ SMPDefsFlags[STARS_NN_ftst] = false; // Test
+ SMPDefsFlags[STARS_NN_fxam] = false; // Examine
+ SMPDefsFlags[STARS_NN_fptan] = false; // Partial tangent
+ SMPDefsFlags[STARS_NN_fpatan] = false; // Partial arctangent
+ SMPDefsFlags[STARS_NN_f2xm1] = false; // 2^x - 1
+ SMPDefsFlags[STARS_NN_fyl2x] = false; // Y * lg2(X)
+ SMPDefsFlags[STARS_NN_fyl2xp1] = false; // Y * lg2(X+1)
+ SMPDefsFlags[STARS_NN_fldz] = false; // Load +0.0
+ SMPDefsFlags[STARS_NN_fld1] = false; // Load +1.0
+ SMPDefsFlags[STARS_NN_fldpi] = false; // Load PI=3.14...
+ SMPDefsFlags[STARS_NN_fldl2t] = false; // Load lg2(10)
+ SMPDefsFlags[STARS_NN_fldl2e] = false; // Load lg2(e)
+ SMPDefsFlags[STARS_NN_fldlg2] = false; // Load lg10(2)
+ SMPDefsFlags[STARS_NN_fldln2] = false; // Load ln(2)
+ SMPDefsFlags[STARS_NN_finit] = false; // Initialize Processor
+ SMPDefsFlags[STARS_NN_fninit] = false; // Initialize Processor (no wait)
+ SMPDefsFlags[STARS_NN_fsetpm] = false; // Set Protected Mode
+ SMPDefsFlags[STARS_NN_fldcw] = false; // Load Control Word
+ SMPDefsFlags[STARS_NN_fstcw] = false; // Store Control Word
+ SMPDefsFlags[STARS_NN_fnstcw] = false; // Store Control Word (no wait)
+ SMPDefsFlags[STARS_NN_fstsw] = false; // Store Status Word to memory or AX
+ SMPDefsFlags[STARS_NN_fnstsw] = false; // Store Status Word (no wait) to memory or AX
+ SMPDefsFlags[STARS_NN_fclex] = false; // Clear Exceptions
+ SMPDefsFlags[STARS_NN_fnclex] = false; // Clear Exceptions (no wait)
+ SMPDefsFlags[STARS_NN_fstenv] = false; // Store Environment
+ SMPDefsFlags[STARS_NN_fnstenv] = false; // Store Environment (no wait)
+ SMPDefsFlags[STARS_NN_fldenv] = false; // Load Environment
+ SMPDefsFlags[STARS_NN_fsave] = false; // Save State
+ SMPDefsFlags[STARS_NN_fnsave] = false; // Save State (no wait)
+ SMPDefsFlags[STARS_NN_frstor] = false; // Restore State
+ SMPDefsFlags[STARS_NN_fincstp] = false; // Increment Stack Pointer
+ SMPDefsFlags[STARS_NN_fdecstp] = false; // Decrement Stack Pointer
+ SMPDefsFlags[STARS_NN_ffree] = false; // Free Register
+ SMPDefsFlags[STARS_NN_fnop] = false; // No Operation
+ SMPDefsFlags[STARS_NN_feni] = false; // (8087 only)
+ SMPDefsFlags[STARS_NN_fneni] = false; // (no wait) (8087 only)
+ SMPDefsFlags[STARS_NN_fdisi] = false; // (8087 only)
+ SMPDefsFlags[STARS_NN_fndisi] = false; // (no wait) (8087 only)
+
+ //
+ // 80387 instructions
+ //
+
+ SMPDefsFlags[STARS_NN_fprem1] = false; // Partial Remainder ( < half )
+ SMPDefsFlags[STARS_NN_fsincos] = false; // t<-cos(st); st<-sin(st); push t
+ SMPDefsFlags[STARS_NN_fsin] = false; // Sine
+ SMPDefsFlags[STARS_NN_fcos] = false; // Cosine
+ SMPDefsFlags[STARS_NN_fucom] = false; // Compare Unordered Real
+ SMPDefsFlags[STARS_NN_fucomp] = false; // Compare Unordered Real and Pop
+ SMPDefsFlags[STARS_NN_fucompp] = false; // Compare Unordered Real and Pop Twice
+
+ //
+ // Instructions added 28.02.96
+ //
+
+ SMPDefsFlags[STARS_NN_svdc] = false; // Save Register and Descriptor
+ SMPDefsFlags[STARS_NN_rsdc] = false; // Restore Register and Descriptor
+ SMPDefsFlags[STARS_NN_svldt] = false; // Save LDTR and Descriptor
+ SMPDefsFlags[STARS_NN_rsldt] = false; // Restore LDTR and Descriptor
+ SMPDefsFlags[STARS_NN_svts] = false; // Save TR and Descriptor
+ SMPDefsFlags[STARS_NN_rsts] = false; // Restore TR and Descriptor
+ SMPDefsFlags[STARS_NN_icebp] = false; // ICE Break Point
+
+ //
+ // MMX instructions
+ //
+
+ SMPDefsFlags[STARS_NN_emms] = false; // Empty MMX state
+ SMPDefsFlags[STARS_NN_movd] = false; // Move 32 bits
+ SMPDefsFlags[STARS_NN_movq] = false; // Move 64 bits
+ SMPDefsFlags[STARS_NN_packsswb] = false; // Pack with Signed Saturation (Word->Byte)
+ SMPDefsFlags[STARS_NN_packssdw] = false; // Pack with Signed Saturation (Dword->Word)
+ SMPDefsFlags[STARS_NN_packuswb] = false; // Pack with Unsigned Saturation (Word->Byte)
+ SMPDefsFlags[STARS_NN_paddb] = false; // Packed Add Byte
+ SMPDefsFlags[STARS_NN_paddw] = false; // Packed Add Word
+ SMPDefsFlags[STARS_NN_paddd] = false; // Packed Add Dword
+ SMPDefsFlags[STARS_NN_paddsb] = false; // Packed Add with Saturation (Byte)
+ SMPDefsFlags[STARS_NN_paddsw] = false; // Packed Add with Saturation (Word)
+ SMPDefsFlags[STARS_NN_paddusb] = false; // Packed Add Unsigned with Saturation (Byte)
+ SMPDefsFlags[STARS_NN_paddusw] = false; // Packed Add Unsigned with Saturation (Word)
+ SMPDefsFlags[STARS_NN_pand] = false; // Bitwise Logical And
+ SMPDefsFlags[STARS_NN_pandn] = false; // Bitwise Logical And Not
+ SMPDefsFlags[STARS_NN_pcmpeqb] = false; // Packed Compare for Equal (Byte)
+ SMPDefsFlags[STARS_NN_pcmpeqw] = false; // Packed Compare for Equal (Word)
+ SMPDefsFlags[STARS_NN_pcmpeqd] = false; // Packed Compare for Equal (Dword)
+ SMPDefsFlags[STARS_NN_pcmpgtb] = false; // Packed Compare for Greater Than (Byte)
+ SMPDefsFlags[STARS_NN_pcmpgtw] = false; // Packed Compare for Greater Than (Word)
+ SMPDefsFlags[STARS_NN_pcmpgtd] = false; // Packed Compare for Greater Than (Dword)
+ SMPDefsFlags[STARS_NN_pmaddwd] = false; // Packed Multiply and Add
+ SMPDefsFlags[STARS_NN_pmulhw] = false; // Packed Multiply High
+ SMPDefsFlags[STARS_NN_pmullw] = false; // Packed Multiply Low
+ SMPDefsFlags[STARS_NN_por] = false; // Bitwise Logical Or
+ SMPDefsFlags[STARS_NN_psllw] = false; // Packed Shift Left Logical (Word)
+ SMPDefsFlags[STARS_NN_pslld] = false; // Packed Shift Left Logical (Dword)
+ SMPDefsFlags[STARS_NN_psllq] = false; // Packed Shift Left Logical (Qword)
+ SMPDefsFlags[STARS_NN_psraw] = false; // Packed Shift Right Arithmetic (Word)
+ SMPDefsFlags[STARS_NN_psrad] = false; // Packed Shift Right Arithmetic (Dword)
+ SMPDefsFlags[STARS_NN_psrlw] = false; // Packed Shift Right Logical (Word)
+ SMPDefsFlags[STARS_NN_psrld] = false; // Packed Shift Right Logical (Dword)
+ SMPDefsFlags[STARS_NN_psrlq] = false; // Packed Shift Right Logical (Qword)
+ SMPDefsFlags[STARS_NN_psubb] = false; // Packed Subtract Byte
+ SMPDefsFlags[STARS_NN_psubw] = false; // Packed Subtract Word
+ SMPDefsFlags[STARS_NN_psubd] = false; // Packed Subtract Dword
+ SMPDefsFlags[STARS_NN_psubsb] = false; // Packed Subtract with Saturation (Byte)
+ SMPDefsFlags[STARS_NN_psubsw] = false; // Packed Subtract with Saturation (Word)
+ SMPDefsFlags[STARS_NN_psubusb] = false; // Packed Subtract Unsigned with Saturation (Byte)
+ SMPDefsFlags[STARS_NN_psubusw] = false; // Packed Subtract Unsigned with Saturation (Word)
+ SMPDefsFlags[STARS_NN_punpckhbw] = false; // Unpack High Packed Data (Byte->Word)
+ SMPDefsFlags[STARS_NN_punpckhwd] = false; // Unpack High Packed Data (Word->Dword)
+ SMPDefsFlags[STARS_NN_punpckhdq] = false; // Unpack High Packed Data (Dword->Qword)
+ SMPDefsFlags[STARS_NN_punpcklbw] = false; // Unpack Low Packed Data (Byte->Word)
+ SMPDefsFlags[STARS_NN_punpcklwd] = false; // Unpack Low Packed Data (Word->Dword)
+ SMPDefsFlags[STARS_NN_punpckldq] = false; // Unpack Low Packed Data (Dword->Qword)
+ SMPDefsFlags[STARS_NN_pxor] = false; // Bitwise Logical Exclusive Or
+
+ //
+ // Undocumented Deschutes processor instructions
+ //
+
+ SMPDefsFlags[STARS_NN_fxsave] = false; // Fast save FP context
+ SMPDefsFlags[STARS_NN_fxrstor] = false; // Fast restore FP context
+
+ // Pentium II instructions
+
+ SMPDefsFlags[STARS_NN_sysexit] = false; // Fast Transition from System Call Entry Point
+
+ // 3DNow! instructions
+
+ SMPDefsFlags[STARS_NN_pavgusb] = false; // Packed 8-bit Unsigned Integer Averaging
+ SMPDefsFlags[STARS_NN_pfadd] = false; // Packed Floating-Point Addition
+ SMPDefsFlags[STARS_NN_pfsub] = false; // Packed Floating-Point Subtraction
+ SMPDefsFlags[STARS_NN_pfsubr] = false; // Packed Floating-Point Reverse Subtraction
+ SMPDefsFlags[STARS_NN_pfacc] = false; // Packed Floating-Point Accumulate
+ SMPDefsFlags[STARS_NN_pfcmpge] = false; // Packed Floating-Point Comparison, Greater or Equal
+ SMPDefsFlags[STARS_NN_pfcmpgt] = false; // Packed Floating-Point Comparison, Greater
+ SMPDefsFlags[STARS_NN_pfcmpeq] = false; // Packed Floating-Point Comparison, Equal
+ SMPDefsFlags[STARS_NN_pfmin] = false; // Packed Floating-Point Minimum
+ SMPDefsFlags[STARS_NN_pfmax] = false; // Packed Floating-Point Maximum
+ SMPDefsFlags[STARS_NN_pi2fd] = false; // Packed 32-bit Integer to Floating-Point
+ SMPDefsFlags[STARS_NN_pf2id] = false; // Packed Floating-Point to 32-bit Integer
+ SMPDefsFlags[STARS_NN_pfrcp] = false; // Packed Floating-Point Reciprocal Approximation
+ SMPDefsFlags[STARS_NN_pfrsqrt] = false; // Packed Floating-Point Reciprocal Square Root Approximation
+ SMPDefsFlags[STARS_NN_pfmul] = false; // Packed Floating-Point Multiplication
+ SMPDefsFlags[STARS_NN_pfrcpit1] = false; // Packed Floating-Point Reciprocal First Iteration Step
+ SMPDefsFlags[STARS_NN_pfrsqit1] = false; // Packed Floating-Point Reciprocal Square Root First Iteration Step
+ SMPDefsFlags[STARS_NN_pfrcpit2] = false; // Packed Floating-Point Reciprocal Second Iteration Step
+ SMPDefsFlags[STARS_NN_pmulhrw] = false; // Packed Floating-Point 16-bit Integer Multiply with rounding
+ SMPDefsFlags[STARS_NN_femms] = false; // Faster entry/exit of the MMX or floating-point state
+ SMPDefsFlags[STARS_NN_prefetch] = false; // Prefetch at least a 32-byte line into L1 data cache
+ SMPDefsFlags[STARS_NN_prefetchw] = false; // Prefetch processor cache line into L1 data cache (mark as modified)
+
+
+ // Pentium III instructions
+
+ SMPDefsFlags[STARS_NN_addps] = false; // Packed Single-FP Add
+ SMPDefsFlags[STARS_NN_addss] = false; // Scalar Single-FP Add
+ SMPDefsFlags[STARS_NN_andnps] = false; // Bitwise Logical And Not for Single-FP
+ SMPDefsFlags[STARS_NN_andps] = false; // Bitwise Logical And for Single-FP
+ SMPDefsFlags[STARS_NN_cmpps] = false; // Packed Single-FP Compare
+ SMPDefsFlags[STARS_NN_cmpss] = false; // Scalar Single-FP Compare
+ SMPDefsFlags[STARS_NN_cvtpi2ps] = false; // Packed signed INT32 to Packed Single-FP conversion
+ SMPDefsFlags[STARS_NN_cvtps2pi] = false; // Packed Single-FP to Packed INT32 conversion
+ SMPDefsFlags[STARS_NN_cvtsi2ss] = false; // Scalar signed INT32 to Single-FP conversion
+ SMPDefsFlags[STARS_NN_cvtss2si] = false; // Scalar Single-FP to signed INT32 conversion
+ SMPDefsFlags[STARS_NN_cvttps2pi] = false; // Packed Single-FP to Packed INT32 conversion (truncate)
+ SMPDefsFlags[STARS_NN_cvttss2si] = false; // Scalar Single-FP to signed INT32 conversion (truncate)
+ SMPDefsFlags[STARS_NN_divps] = false; // Packed Single-FP Divide
+ SMPDefsFlags[STARS_NN_divss] = false; // Scalar Single-FP Divide
+ SMPDefsFlags[STARS_NN_ldmxcsr] = false; // Load Streaming SIMD Extensions Technology Control/Status Register
+ SMPDefsFlags[STARS_NN_maxps] = false; // Packed Single-FP Maximum
+ SMPDefsFlags[STARS_NN_maxss] = false; // Scalar Single-FP Maximum
+ SMPDefsFlags[STARS_NN_minps] = false; // Packed Single-FP Minimum
+ SMPDefsFlags[STARS_NN_minss] = false; // Scalar Single-FP Minimum
+ SMPDefsFlags[STARS_NN_movaps] = false; // Move Aligned Four Packed Single-FP
+ SMPDefsFlags[STARS_NN_movhlps] = false; // Move High to Low Packed Single-FP
+ SMPDefsFlags[STARS_NN_movhps] = false; // Move High Packed Single-FP
+ SMPDefsFlags[STARS_NN_movlhps] = false; // Move Low to High Packed Single-FP
+ SMPDefsFlags[STARS_NN_movlps] = false; // Move Low Packed Single-FP
+ SMPDefsFlags[STARS_NN_movmskps] = false; // Move Mask to Register
+ SMPDefsFlags[STARS_NN_movss] = false; // Move Scalar Single-FP
+ SMPDefsFlags[STARS_NN_movups] = false; // Move Unaligned Four Packed Single-FP
+ SMPDefsFlags[STARS_NN_mulps] = false; // Packed Single-FP Multiply
+ SMPDefsFlags[STARS_NN_mulss] = false; // Scalar Single-FP Multiply
+ SMPDefsFlags[STARS_NN_orps] = false; // Bitwise Logical OR for Single-FP Data
+ SMPDefsFlags[STARS_NN_rcpps] = false; // Packed Single-FP Reciprocal
+ SMPDefsFlags[STARS_NN_rcpss] = false; // Scalar Single-FP Reciprocal
+ SMPDefsFlags[STARS_NN_rsqrtps] = false; // Packed Single-FP Square Root Reciprocal
+ SMPDefsFlags[STARS_NN_rsqrtss] = false; // Scalar Single-FP Square Root Reciprocal
+ SMPDefsFlags[STARS_NN_shufps] = false; // Shuffle Single-FP
+ SMPDefsFlags[STARS_NN_sqrtps] = false; // Packed Single-FP Square Root
+ SMPDefsFlags[STARS_NN_sqrtss] = false; // Scalar Single-FP Square Root
+ SMPDefsFlags[STARS_NN_stmxcsr] = false; // Store Streaming SIMD Extensions Technology Control/Status Register
+ SMPDefsFlags[STARS_NN_subps] = false; // Packed Single-FP Subtract
+ SMPDefsFlags[STARS_NN_subss] = false; // Scalar Single-FP Subtract
+ SMPDefsFlags[STARS_NN_unpckhps] = false; // Unpack High Packed Single-FP Data
+ SMPDefsFlags[STARS_NN_unpcklps] = false; // Unpack Low Packed Single-FP Data
+ SMPDefsFlags[STARS_NN_xorps] = false; // Bitwise Logical XOR for Single-FP Data
+ SMPDefsFlags[STARS_NN_pavgb] = false; // Packed Average (Byte)
+ SMPDefsFlags[STARS_NN_pavgw] = false; // Packed Average (Word)
+ SMPDefsFlags[STARS_NN_pextrw] = false; // Extract Word
+ SMPDefsFlags[STARS_NN_pinsrw] = false; // Insert Word
+ SMPDefsFlags[STARS_NN_pmaxsw] = false; // Packed Signed Integer Word Maximum
+ SMPDefsFlags[STARS_NN_pmaxub] = false; // Packed Unsigned Integer Byte Maximum
+ SMPDefsFlags[STARS_NN_pminsw] = false; // Packed Signed Integer Word Minimum
+ SMPDefsFlags[STARS_NN_pminub] = false; // Packed Unsigned Integer Byte Minimum
+ SMPDefsFlags[STARS_NN_pmovmskb] = false; // Move Byte Mask to Integer
+ SMPDefsFlags[STARS_NN_pmulhuw] = false; // Packed Multiply High Unsigned
+ SMPDefsFlags[STARS_NN_psadbw] = false; // Packed Sum of Absolute Differences
+ SMPDefsFlags[STARS_NN_pshufw] = false; // Packed Shuffle Word
+ SMPDefsFlags[STARS_NN_maskmovq] = false; // Byte Mask write
+ SMPDefsFlags[STARS_NN_movntps] = false; // Move Aligned Four Packed Single-FP Non Temporal
+ SMPDefsFlags[STARS_NN_movntq] = false; // Move 64 Bits Non Temporal
+ SMPDefsFlags[STARS_NN_prefetcht0] = false; // Prefetch to all cache levels
+ SMPDefsFlags[STARS_NN_prefetcht1] = false; // Prefetch to all cache levels
+ SMPDefsFlags[STARS_NN_prefetcht2] = false; // Prefetch to L2 cache
+ SMPDefsFlags[STARS_NN_prefetchnta] = false; // Prefetch to L1 cache
+ SMPDefsFlags[STARS_NN_sfence] = false; // Store Fence
+
+ // Pentium III Pseudo instructions
+
+ SMPDefsFlags[STARS_NN_cmpeqps] = false; // Packed Single-FP Compare EQ
+ SMPDefsFlags[STARS_NN_cmpltps] = false; // Packed Single-FP Compare LT
+ SMPDefsFlags[STARS_NN_cmpleps] = false; // Packed Single-FP Compare LE
+ SMPDefsFlags[STARS_NN_cmpunordps] = false; // Packed Single-FP Compare UNORD
+ SMPDefsFlags[STARS_NN_cmpneqps] = false; // Packed Single-FP Compare NOT EQ
+ SMPDefsFlags[STARS_NN_cmpnltps] = false; // Packed Single-FP Compare NOT LT
+ SMPDefsFlags[STARS_NN_cmpnleps] = false; // Packed Single-FP Compare NOT LE
+ SMPDefsFlags[STARS_NN_cmpordps] = false; // Packed Single-FP Compare ORDERED
+ SMPDefsFlags[STARS_NN_cmpeqss] = false; // Scalar Single-FP Compare EQ
+ SMPDefsFlags[STARS_NN_cmpltss] = false; // Scalar Single-FP Compare LT
+ SMPDefsFlags[STARS_NN_cmpless] = false; // Scalar Single-FP Compare LE
+ SMPDefsFlags[STARS_NN_cmpunordss] = false; // Scalar Single-FP Compare UNORD
+ SMPDefsFlags[STARS_NN_cmpneqss] = false; // Scalar Single-FP Compare NOT EQ
+ SMPDefsFlags[STARS_NN_cmpnltss] = false; // Scalar Single-FP Compare NOT LT
+ SMPDefsFlags[STARS_NN_cmpnless] = false; // Scalar Single-FP Compare NOT LE
+ SMPDefsFlags[STARS_NN_cmpordss] = false; // Scalar Single-FP Compare ORDERED
+
+ // AMD K7 instructions
+
+ // Revisit AMD if we port to it.
+ SMPDefsFlags[STARS_NN_pf2iw] = false; // Packed Floating-Point to Integer with Sign Extend
+ SMPDefsFlags[STARS_NN_pfnacc] = false; // Packed Floating-Point Negative Accumulate
+ SMPDefsFlags[STARS_NN_pfpnacc] = false; // Packed Floating-Point Mixed Positive-Negative Accumulate
+ SMPDefsFlags[STARS_NN_pi2fw] = false; // Packed 16-bit Integer to Floating-Point
+ SMPDefsFlags[STARS_NN_pswapd] = false; // Packed Swap Double Word
+
+ // Undocumented FP instructions (thanks to norbert.juffa@adm.com)
+
+ SMPDefsFlags[STARS_NN_fstp1] = false; // Alias of Store Real and Pop
+ SMPDefsFlags[STARS_NN_fxch4] = false; // Alias of Exchange Registers
+ SMPDefsFlags[STARS_NN_ffreep] = false; // Free Register and Pop
+ SMPDefsFlags[STARS_NN_fxch7] = false; // Alias of Exchange Registers
+ SMPDefsFlags[STARS_NN_fstp8] = false; // Alias of Store Real and Pop
+ SMPDefsFlags[STARS_NN_fstp9] = false; // Alias of Store Real and Pop
+
+ // Pentium 4 instructions
+
+ SMPDefsFlags[STARS_NN_addpd] = false; // Add Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_addsd] = false; // Add Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_andnpd] = false; // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_andpd] = false; // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_clflush] = false; // Flush Cache Line
+ SMPDefsFlags[STARS_NN_cmppd] = false; // Compare Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_cmpsd] = false; // Compare Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_cvtdq2pd] = false; // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_cvtdq2ps] = false; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_cvtpd2dq] = false; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPDefsFlags[STARS_NN_cvtpd2pi] = false; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPDefsFlags[STARS_NN_cvtpd2ps] = false; // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_cvtpi2pd] = false; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_cvtps2dq] = false; // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPDefsFlags[STARS_NN_cvtps2pd] = false; // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_cvtsd2si] = false; // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ SMPDefsFlags[STARS_NN_cvtsd2ss] = false; // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
+ SMPDefsFlags[STARS_NN_cvtsi2sd] = false; // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
+ SMPDefsFlags[STARS_NN_cvtss2sd] = false; // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
+ SMPDefsFlags[STARS_NN_cvttpd2dq] = false; // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPDefsFlags[STARS_NN_cvttpd2pi] = false; // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPDefsFlags[STARS_NN_cvttps2dq] = false; // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPDefsFlags[STARS_NN_cvttsd2si] = false; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ SMPDefsFlags[STARS_NN_divpd] = false; // Divide Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_divsd] = false; // Divide Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_lfence] = false; // Load Fence
+ SMPDefsFlags[STARS_NN_maskmovdqu] = false; // Store Selected Bytes of Double Quadword
+ SMPDefsFlags[STARS_NN_maxpd] = false; // Return Maximum Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_maxsd] = false; // Return Maximum Scalar Double-Precision Floating-Point Value
+ SMPDefsFlags[STARS_NN_mfence] = false; // Memory Fence
+ SMPDefsFlags[STARS_NN_minpd] = false; // Return Minimum Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_minsd] = false; // Return Minimum Scalar Double-Precision Floating-Point Value
+ SMPDefsFlags[STARS_NN_movapd] = false; // Move Aligned Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_movdq2q] = false; // Move Quadword from XMM to MMX Register
+ SMPDefsFlags[STARS_NN_movdqa] = false; // Move Aligned Double Quadword
+ SMPDefsFlags[STARS_NN_movdqu] = false; // Move Unaligned Double Quadword
+ SMPDefsFlags[STARS_NN_movhpd] = false; // Move High Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_movlpd] = false; // Move Low Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_movmskpd] = false; // Extract Packed Double-Precision Floating-Point Sign Mask
+ SMPDefsFlags[STARS_NN_movntdq] = false; // Store Double Quadword Using Non-Temporal Hint
+ SMPDefsFlags[STARS_NN_movnti] = false; // Store Doubleword Using Non-Temporal Hint
+ SMPDefsFlags[STARS_NN_movntpd] = false; // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
+ SMPDefsFlags[STARS_NN_movq2dq] = false; // Move Quadword from MMX to XMM Register
+ SMPDefsFlags[STARS_NN_movsd] = false; // Move Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_movupd] = false; // Move Unaligned Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_mulpd] = false; // Multiply Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_mulsd] = false; // Multiply Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_orpd] = false; // Bitwise Logical OR of Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_paddq] = false; // Add Packed Quadword Integers
+ SMPDefsFlags[STARS_NN_pause] = false; // Spin Loop Hint
+ SMPDefsFlags[STARS_NN_pmuludq] = false; // Multiply Packed Unsigned Doubleword Integers
+ SMPDefsFlags[STARS_NN_pshufd] = false; // Shuffle Packed Doublewords
+ SMPDefsFlags[STARS_NN_pshufhw] = false; // Shuffle Packed High Words
+ SMPDefsFlags[STARS_NN_pshuflw] = false; // Shuffle Packed Low Words
+ SMPDefsFlags[STARS_NN_pslldq] = false; // Shift Double Quadword Left Logical
+ SMPDefsFlags[STARS_NN_psrldq] = false; // Shift Double Quadword Right Logical
+ SMPDefsFlags[STARS_NN_psubq] = false; // Subtract Packed Quadword Integers
+ SMPDefsFlags[STARS_NN_punpckhqdq] = false; // Unpack High Data
+ SMPDefsFlags[STARS_NN_punpcklqdq] = false; // Unpack Low Data
+ SMPDefsFlags[STARS_NN_shufpd] = false; // Shuffle Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_sqrtpd] = false; // Compute Square Roots of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_sqrtsd] = false; // Compute Square Rootof Scalar Double-Precision Floating-Point Value
+ SMPDefsFlags[STARS_NN_subpd] = false; // Subtract Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_subsd] = false; // Subtract Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_unpckhpd] = false; // Unpack and Interleave High Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_unpcklpd] = false; // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_xorpd] = false; // Bitwise Logical OR of Double-Precision Floating-Point Values
+
+
+ // AMD syscall/sysret instructions NOTE: not AMD, found in Intel manual
+
+
+ // AMD64 instructions NOTE: not AMD, found in Intel manual
+
+ SMPDefsFlags[STARS_NN_swapgs] = false; // Exchange GS base with KernelGSBase MSR
+
+ // New Pentium instructions (SSE3)
+
+ SMPDefsFlags[STARS_NN_movddup] = false; // Move One Double-FP and Duplicate
+ SMPDefsFlags[STARS_NN_movshdup] = false; // Move Packed Single-FP High and Duplicate
+ SMPDefsFlags[STARS_NN_movsldup] = false; // Move Packed Single-FP Low and Duplicate
+
+ // Missing AMD64 instructions NOTE: also found in Intel manual
+
+ SMPDefsFlags[STARS_NN_movsxd] = false; // Move with Sign-Extend Doubleword
+
+ // SSE3 instructions
+
+ SMPDefsFlags[STARS_NN_addsubpd] = false; // Add /Sub packed DP FP numbers
+ SMPDefsFlags[STARS_NN_addsubps] = false; // Add /Sub packed SP FP numbers
+ SMPDefsFlags[STARS_NN_haddpd] = false; // Add horizontally packed DP FP numbers
+ SMPDefsFlags[STARS_NN_haddps] = false; // Add horizontally packed SP FP numbers
+ SMPDefsFlags[STARS_NN_hsubpd] = false; // Sub horizontally packed DP FP numbers
+ SMPDefsFlags[STARS_NN_hsubps] = false; // Sub horizontally packed SP FP numbers
+ SMPDefsFlags[STARS_NN_monitor] = false; // Set up a linear address range to be monitored by hardware
+ SMPDefsFlags[STARS_NN_mwait] = false; // Wait until write-back store performed within the range specified by the MONITOR instruction
+ SMPDefsFlags[STARS_NN_fisttp] = false; // Store ST in intXX (chop) and pop
+ SMPDefsFlags[STARS_NN_lddqu] = false; // Load unaligned integer 128-bit
+
+ // SSSE3 instructions
+
+ SMPDefsFlags[STARS_NN_psignb] = false; // Packed SIGN Byte
+ SMPDefsFlags[STARS_NN_psignw] = false; // Packed SIGN Word
+ SMPDefsFlags[STARS_NN_psignd] = false; // Packed SIGN Doubleword
+ SMPDefsFlags[STARS_NN_pshufb] = false; // Packed Shuffle Bytes
+ SMPDefsFlags[STARS_NN_pmulhrsw] = false; // Packed Multiply High with Round and Scale
+ SMPDefsFlags[STARS_NN_pmaddubsw] = false; // Multiply and Add Packed Signed and Unsigned Bytes
+ SMPDefsFlags[STARS_NN_phsubsw] = false; // Packed Horizontal Subtract and Saturate
+ SMPDefsFlags[STARS_NN_phaddsw] = false; // Packed Horizontal Add and Saturate
+ SMPDefsFlags[STARS_NN_phaddw] = false; // Packed Horizontal Add Word
+ SMPDefsFlags[STARS_NN_phaddd] = false; // Packed Horizontal Add Doubleword
+ SMPDefsFlags[STARS_NN_phsubw] = false; // Packed Horizontal Subtract Word
+ SMPDefsFlags[STARS_NN_phsubd] = false; // Packed Horizontal Subtract Doubleword
+ SMPDefsFlags[STARS_NN_palignr] = false; // Packed Align Right
+ SMPDefsFlags[STARS_NN_pabsb] = false; // Packed Absolute Value Byte
+ SMPDefsFlags[STARS_NN_pabsw] = false; // Packed Absolute Value Word
+ SMPDefsFlags[STARS_NN_pabsd] = false; // Packed Absolute Value Doubleword
+
+ // VMX instructions
+
+#if 599 < IDA_SDK_VERSION
+
+ SMPDefsFlags[STARS_NN_ud2] = false; // Undefined Instruction
+
+ // Added with x86-64
+
+ SMPDefsFlags[STARS_NN_rdtscp] = false; // Read Time-Stamp Counter and Processor ID
+
+ // Geode LX 3DNow! extensions
+
+ SMPDefsFlags[STARS_NN_pfrcpv] = false; // Reciprocal Approximation for a Pair of 32-bit Floats
+ SMPDefsFlags[STARS_NN_pfrsqrtv] = false; // Reciprocal Square Root Approximation for a Pair of 32-bit Floats
+
+ // SSE2 pseudoinstructions
+
+ SMPDefsFlags[STARS_NN_cmpeqpd] = false; // Packed Double-FP Compare EQ
+ SMPDefsFlags[STARS_NN_cmpltpd] = false; // Packed Double-FP Compare LT
+ SMPDefsFlags[STARS_NN_cmplepd] = false; // Packed Double-FP Compare LE
+ SMPDefsFlags[STARS_NN_cmpunordpd] = false; // Packed Double-FP Compare UNORD
+ SMPDefsFlags[STARS_NN_cmpneqpd] = false; // Packed Double-FP Compare NOT EQ
+ SMPDefsFlags[STARS_NN_cmpnltpd] = false; // Packed Double-FP Compare NOT LT
+ SMPDefsFlags[STARS_NN_cmpnlepd] = false; // Packed Double-FP Compare NOT LE
+ SMPDefsFlags[STARS_NN_cmpordpd] = false; // Packed Double-FP Compare ORDERED
+ SMPDefsFlags[STARS_NN_cmpeqsd] = false; // Scalar Double-FP Compare EQ
+ SMPDefsFlags[STARS_NN_cmpltsd] = false; // Scalar Double-FP Compare LT
+ SMPDefsFlags[STARS_NN_cmplesd] = false; // Scalar Double-FP Compare LE
+ SMPDefsFlags[STARS_NN_cmpunordsd] = false; // Scalar Double-FP Compare UNORD
+ SMPDefsFlags[STARS_NN_cmpneqsd] = false; // Scalar Double-FP Compare NOT EQ
+ SMPDefsFlags[STARS_NN_cmpnltsd] = false; // Scalar Double-FP Compare NOT LT
+ SMPDefsFlags[STARS_NN_cmpnlesd] = false; // Scalar Double-FP Compare NOT LE
+ SMPDefsFlags[STARS_NN_cmpordsd] = false; // Scalar Double-FP Compare ORDERED
+
+ // SSSE4.1 instructions
+
+ SMPDefsFlags[STARS_NN_blendpd] = false; // Blend Packed Double Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_blendps] = false; // Blend Packed Single Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_blendvpd] = false; // Variable Blend Packed Double Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_blendvps] = false; // Variable Blend Packed Single Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_dppd] = false; // Dot Product of Packed Double Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_dpps] = false; // Dot Product of Packed Single Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_extractps] = 2; // Extract Packed Single Precision Floating-Point Value
+ SMPDefsFlags[STARS_NN_insertps] = false; // Insert Packed Single Precision Floating-Point Value
+ SMPDefsFlags[STARS_NN_movntdqa] = false; // Load Double Quadword Non-Temporal Aligned Hint
+ SMPDefsFlags[STARS_NN_mpsadbw] = false; // Compute Multiple Packed Sums of Absolute Difference
+ SMPDefsFlags[STARS_NN_packusdw] = false; // Pack with Unsigned Saturation
+ SMPDefsFlags[STARS_NN_pblendvb] = false; // Variable Blend Packed Bytes
+ SMPDefsFlags[STARS_NN_pblendw] = false; // Blend Packed Words
+ SMPDefsFlags[STARS_NN_pcmpeqq] = false; // Compare Packed Qword Data for Equal
+ SMPDefsFlags[STARS_NN_pextrb] = false; // Extract Byte
+ SMPDefsFlags[STARS_NN_pextrd] = false; // Extract Dword
+ SMPDefsFlags[STARS_NN_pextrq] = false; // Extract Qword
+ SMPDefsFlags[STARS_NN_phminposuw] = false; // Packed Horizontal Word Minimum
+ SMPDefsFlags[STARS_NN_pinsrb] = false; // Insert Byte
+ SMPDefsFlags[STARS_NN_pinsrd] = false; // Insert Dword
+ SMPDefsFlags[STARS_NN_pinsrq] = false; // Insert Qword
+ SMPDefsFlags[STARS_NN_pmaxsb] = false; // Maximum of Packed Signed Byte Integers
+ SMPDefsFlags[STARS_NN_pmaxsd] = false; // Maximum of Packed Signed Dword Integers
+ SMPDefsFlags[STARS_NN_pmaxud] = false; // Maximum of Packed Unsigned Dword Integers
+ SMPDefsFlags[STARS_NN_pmaxuw] = false; // Maximum of Packed Word Integers
+ SMPDefsFlags[STARS_NN_pminsb] = false; // Minimum of Packed Signed Byte Integers
+ SMPDefsFlags[STARS_NN_pminsd] = false; // Minimum of Packed Signed Dword Integers
+ SMPDefsFlags[STARS_NN_pminud] = false; // Minimum of Packed Unsigned Dword Integers
+ SMPDefsFlags[STARS_NN_pminuw] = false; // Minimum of Packed Word Integers
+ SMPDefsFlags[STARS_NN_pmovsxbw] = false; // Packed Move with Sign Extend
+ SMPDefsFlags[STARS_NN_pmovsxbd] = false; // Packed Move with Sign Extend
+ SMPDefsFlags[STARS_NN_pmovsxbq] = false; // Packed Move with Sign Extend
+ SMPDefsFlags[STARS_NN_pmovsxwd] = false; // Packed Move with Sign Extend
+ SMPDefsFlags[STARS_NN_pmovsxwq] = false; // Packed Move with Sign Extend
+ SMPDefsFlags[STARS_NN_pmovsxdq] = false; // Packed Move with Sign Extend
+ SMPDefsFlags[STARS_NN_pmovzxbw] = false; // Packed Move with Zero Extend
+ SMPDefsFlags[STARS_NN_pmovzxbd] = false; // Packed Move with Zero Extend
+ SMPDefsFlags[STARS_NN_pmovzxbq] = false; // Packed Move with Zero Extend
+ SMPDefsFlags[STARS_NN_pmovzxwd] = false; // Packed Move with Zero Extend
+ SMPDefsFlags[STARS_NN_pmovzxwq] = false; // Packed Move with Zero Extend
+ SMPDefsFlags[STARS_NN_pmovzxdq] = false; // Packed Move with Zero Extend
+ SMPDefsFlags[STARS_NN_pmuldq] = false; // Multiply Packed Signed Dword Integers
+ SMPDefsFlags[STARS_NN_pmulld] = false; // Multiply Packed Signed Dword Integers and Store Low Result
+ SMPDefsFlags[STARS_NN_roundpd] = false; // Round Packed Double Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_roundps] = false; // Round Packed Single Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_roundsd] = false; // Round Scalar Double Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_roundss] = false; // Round Scalar Single Precision Floating-Point Values
+
+ // SSSE4.2 instructions
+ SMPDefsFlags[STARS_NN_crc32] = false; // Accumulate CRC32 Value
+ SMPDefsFlags[STARS_NN_pcmpgtq] = false; // Compare Packed Data for Greater Than
+
+ // AMD SSE4a instructions
+
+ SMPDefsFlags[STARS_NN_extrq] = false; // Extract Field From Register
+ SMPDefsFlags[STARS_NN_insertq] = false; // Insert Field
+ SMPDefsFlags[STARS_NN_movntsd] = false; // Move Non-Temporal Scalar Double-Precision Floating-Point
+ SMPDefsFlags[STARS_NN_movntss] = false; // Move Non-Temporal Scalar Single-Precision Floating-Point
+
+ // xsave/xrstor instructions
+
+ SMPDefsFlags[STARS_NN_xgetbv] = false; // Get Value of Extended Control Register
+ SMPDefsFlags[STARS_NN_xrstor] = false; // Restore Processor Extended States
+ SMPDefsFlags[STARS_NN_xsave] = false; // Save Processor Extended States
+ SMPDefsFlags[STARS_NN_xsetbv] = false; // Set Value of Extended Control Register
+
+ // Intel Safer Mode Extensions (SMX)
+
+ // AMD-V Virtualization ISA Extension
+
+ SMPDefsFlags[STARS_NN_invlpga] = false; // Invalidate TLB Entry in a Specified ASID
+ SMPDefsFlags[STARS_NN_skinit] = false; // Secure Init and Jump with Attestation
+ SMPDefsFlags[STARS_NN_vmexit] = false; // Stop Executing Guest, Begin Executing Host
+ SMPDefsFlags[STARS_NN_vmload] = false; // Load State from VMCB
+ SMPDefsFlags[STARS_NN_vmmcall] = false; // Call VMM
+ SMPDefsFlags[STARS_NN_vmrun] = false; // Run Virtual Machine
+ SMPDefsFlags[STARS_NN_vmsave] = false; // Save State to VMCB
+
+ // VMX+ instructions
+
+ SMPDefsFlags[STARS_NN_invept] = false; // Invalidate Translations Derived from EPT
+ SMPDefsFlags[STARS_NN_invvpid] = false; // Invalidate Translations Based on VPID
+
+ // Intel Atom instructions
+
+ SMPDefsFlags[STARS_NN_movbe] = false; // Move Data After Swapping Bytes
+
+ // Intel AES instructions
+
+ SMPDefsFlags[STARS_NN_aesenc] = false; // Perform One Round of an AES Encryption Flow
+ SMPDefsFlags[STARS_NN_aesenclast] = false; // Perform the Last Round of an AES Encryption Flow
+ SMPDefsFlags[STARS_NN_aesdec] = false; // Perform One Round of an AES Decryption Flow
+ SMPDefsFlags[STARS_NN_aesdeclast] = false; // Perform the Last Round of an AES Decryption Flow
+ SMPDefsFlags[STARS_NN_aesimc] = false; // Perform the AES InvMixColumn Transformation
+ SMPDefsFlags[STARS_NN_aeskeygenassist] = false; // AES Round Key Generation Assist
+
+ // Carryless multiplication
+
+ SMPDefsFlags[STARS_NN_pclmulqdq] = false; // Carry-Less Multiplication Quadword
+
+ // Returns modified by operand size prefixes
+
+ SMPDefsFlags[STARS_NN_retnw] = false; // Return Near from Procedure (use16)
+ SMPDefsFlags[STARS_NN_retnd] = false; // Return Near from Procedure (use32)
+ SMPDefsFlags[STARS_NN_retnq] = false; // Return Near from Procedure (use64)
+ SMPDefsFlags[STARS_NN_retfw] = false; // Return Far from Procedure (use16)
+ SMPDefsFlags[STARS_NN_retfd] = false; // Return Far from Procedure (use32)
+ SMPDefsFlags[STARS_NN_retfq] = false; // Return Far from Procedure (use64)
+
+ // RDRAND support
+
+ // new GPR instructions
+
+ SMPDefsFlags[STARS_NN_mulx] = false; // Unsigned Multiply Without Affecting Flags
+ SMPDefsFlags[STARS_NN_pdep] = false; // Parallel Bits Deposit
+ SMPDefsFlags[STARS_NN_pext] = false; // Parallel Bits Extract
+ SMPDefsFlags[STARS_NN_rorx] = false; // Rotate Right Logical Without Affecting Flags
+ SMPDefsFlags[STARS_NN_sarx] = false; // Shift Arithmetically Right Without Affecting Flags
+ SMPDefsFlags[STARS_NN_shlx] = false; // Shift Logically Left Without Affecting Flags
+ SMPDefsFlags[STARS_NN_shrx] = false; // Shift Logically Right Without Affecting Flags
+
+ SMPDefsFlags[STARS_NN_xsaveopt] = false; // Save Processor Extended States Optimized
+ SMPDefsFlags[STARS_NN_invpcid] = false; // Invalidate Processor Context ID
+ SMPDefsFlags[STARS_NN_rdseed] = false; // Read Random Seed
+ SMPDefsFlags[STARS_NN_rdfsbase] = false; // Read FS Segment Base
+ SMPDefsFlags[STARS_NN_rdgsbase] = false; // Read GS Segment Base
+ SMPDefsFlags[STARS_NN_wrfsbase] = false; // Write FS Segment Base
+ SMPDefsFlags[STARS_NN_wrgsbase] = false; // Write GS Segment Base
+
+ // new AVX instructions
+
+ SMPDefsFlags[STARS_NN_vaddpd] = false; // Add Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vaddps] = false; // Packed Single-FP Add
+ SMPDefsFlags[STARS_NN_vaddsd] = false; // Add Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vaddss] = false; // Scalar Single-FP Add
+ SMPDefsFlags[STARS_NN_vaddsubpd] = false; // Add /Sub packed DP FP numbers
+ SMPDefsFlags[STARS_NN_vaddsubps] = false; // Add /Sub packed SP FP numbers
+ SMPDefsFlags[STARS_NN_vaesdec] = false; // Perform One Round of an AES Decryption Flow
+ SMPDefsFlags[STARS_NN_vaesdeclast] = false; // Perform the Last Round of an AES Decryption Flow
+ SMPDefsFlags[STARS_NN_vaesenc] = false; // Perform One Round of an AES Encryption Flow
+ SMPDefsFlags[STARS_NN_vaesenclast] = false; // Perform the Last Round of an AES Encryption Flow
+ SMPDefsFlags[STARS_NN_vaesimc] = false; // Perform the AES InvMixColumn Transformation
+ SMPDefsFlags[STARS_NN_vaeskeygenassist] = false; // AES Round Key Generation Assist
+ SMPDefsFlags[STARS_NN_vandnpd] = false; // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vandnps] = false; // Bitwise Logical And Not for Single-FP
+ SMPDefsFlags[STARS_NN_vandpd] = false; // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vandps] = false; // Bitwise Logical And for Single-FP
+ SMPDefsFlags[STARS_NN_vblendpd] = false; // Blend Packed Double Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vblendps] = false; // Blend Packed Single Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vblendvpd] = false; // Variable Blend Packed Double Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vblendvps] = false; // Variable Blend Packed Single Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vbroadcastf128] = false; // Broadcast 128 Bits of Floating-Point Data
+ SMPDefsFlags[STARS_NN_vbroadcasti128] = false; // Broadcast 128 Bits of Integer Data
+ SMPDefsFlags[STARS_NN_vbroadcastsd] = false; // Broadcast Double-Precision Floating-Point Element
+ SMPDefsFlags[STARS_NN_vbroadcastss] = false; // Broadcast Single-Precision Floating-Point Element
+ SMPDefsFlags[STARS_NN_vcmppd] = false; // Compare Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vcmpps] = false; // Packed Single-FP Compare
+ SMPDefsFlags[STARS_NN_vcmpsd] = false; // Compare Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vcmpss] = false; // Scalar Single-FP Compare
+ SMPDefsFlags[STARS_NN_vcomisd] = false; // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ SMPDefsFlags[STARS_NN_vcomiss] = false; // Scalar Ordered Single-FP Compare and Set EFLAGS
+ SMPDefsFlags[STARS_NN_vcvtdq2pd] = false; // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vcvtdq2ps] = false; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vcvtpd2dq] = false; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPDefsFlags[STARS_NN_vcvtpd2ps] = false; // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vcvtph2ps] = false; // Convert 16-bit FP Values to Single-Precision FP Values
+ SMPDefsFlags[STARS_NN_vcvtps2dq] = false; // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPDefsFlags[STARS_NN_vcvtps2pd] = false; // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vcvtps2ph] = false; // Convert Single-Precision FP value to 16-bit FP value
+ SMPDefsFlags[STARS_NN_vcvtsd2si] = false; // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ SMPDefsFlags[STARS_NN_vcvtsd2ss] = false; // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
+ SMPDefsFlags[STARS_NN_vcvtsi2sd] = false; // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
+ SMPDefsFlags[STARS_NN_vcvtsi2ss] = false; // Scalar signed INT32 to Single-FP conversion
+ SMPDefsFlags[STARS_NN_vcvtss2sd] = false; // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
+ SMPDefsFlags[STARS_NN_vcvtss2si] = false; // Scalar Single-FP to signed INT32 conversion
+ SMPDefsFlags[STARS_NN_vcvttpd2dq] = false; // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPDefsFlags[STARS_NN_vcvttps2dq] = false; // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPDefsFlags[STARS_NN_vcvttsd2si] = false; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ SMPDefsFlags[STARS_NN_vcvttss2si] = false; // Scalar Single-FP to signed INT32 conversion (truncate)
+ SMPDefsFlags[STARS_NN_vdivpd] = false; // Divide Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vdivps] = false; // Packed Single-FP Divide
+ SMPDefsFlags[STARS_NN_vdivsd] = false; // Divide Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vdivss] = false; // Scalar Single-FP Divide
+ SMPDefsFlags[STARS_NN_vdppd] = false; // Dot Product of Packed Double Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vdpps] = false; // Dot Product of Packed Single Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vextractf128] = false; // Extract Packed Floating-Point Values
+ SMPDefsFlags[STARS_NN_vextracti128] = false; // Extract Packed Integer Values
+ SMPDefsFlags[STARS_NN_vextractps] = false; // Extract Packed Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmadd132pd] = false; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmadd132ps] = false; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmadd132sd] = false; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmadd132ss] = false; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmadd213pd] = false; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmadd213ps] = false; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmadd213sd] = false; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmadd213ss] = false; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmadd231pd] = false; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmadd231ps] = false; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmadd231sd] = false; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmadd231ss] = false; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmaddsub132pd] = false; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmaddsub132ps] = false; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmaddsub213pd] = false; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmaddsub213ps] = false; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmaddsub231pd] = false; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmaddsub231ps] = false; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmsub132pd] = false; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmsub132ps] = false; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmsub132sd] = false; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmsub132ss] = false; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmsub213pd] = false; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmsub213ps] = false; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmsub213sd] = false; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmsub213ss] = false; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmsub231pd] = false; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmsub231ps] = false; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmsub231sd] = false; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmsub231ss] = false; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmsubadd132pd] = false; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmsubadd132ps] = false; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmsubadd213pd] = false; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmsubadd213ps] = false; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmsubadd231pd] = false; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfmsubadd231ps] = false; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmadd132pd] = false; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmadd132ps] = false; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmadd132sd] = false; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmadd132ss] = false; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmadd213pd] = false; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmadd213ps] = false; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmadd213sd] = false; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmadd213ss] = false; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmadd231pd] = false; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmadd231ps] = false; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmadd231sd] = false; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmadd231ss] = false; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmsub132pd] = false; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmsub132ps] = false; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmsub132sd] = false; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmsub132ss] = false; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmsub213pd] = false; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmsub213ps] = false; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmsub213sd] = false; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmsub213ss] = false; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmsub231pd] = false; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmsub231ps] = false; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmsub231sd] = false; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vfnmsub231ss] = false; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vgatherdps] = false; // Gather Packed SP FP Values Using Signed Dword Indices
+ SMPDefsFlags[STARS_NN_vgatherdpd] = false; // Gather Packed DP FP Values Using Signed Dword Indices
+ SMPDefsFlags[STARS_NN_vgatherqps] = false; // Gather Packed SP FP Values Using Signed Qword Indices
+ SMPDefsFlags[STARS_NN_vgatherqpd] = false; // Gather Packed DP FP Values Using Signed Qword Indices
+ SMPDefsFlags[STARS_NN_vhaddpd] = false; // Add horizontally packed DP FP numbers
+ SMPDefsFlags[STARS_NN_vhaddps] = false; // Add horizontally packed SP FP numbers
+ SMPDefsFlags[STARS_NN_vhsubpd] = false; // Sub horizontally packed DP FP numbers
+ SMPDefsFlags[STARS_NN_vhsubps] = false; // Sub horizontally packed SP FP numbers
+ SMPDefsFlags[STARS_NN_vinsertf128] = false; // Insert Packed Floating-Point Values
+ SMPDefsFlags[STARS_NN_vinserti128] = false; // Insert Packed Integer Values
+ SMPDefsFlags[STARS_NN_vinsertps] = false; // Insert Packed Single Precision Floating-Point Value
+ SMPDefsFlags[STARS_NN_vlddqu] = false; // Load Unaligned Packed Integer Values
+ SMPDefsFlags[STARS_NN_vldmxcsr] = false; // Load Streaming SIMD Extensions Technology Control/Status Register
+ SMPDefsFlags[STARS_NN_vmaskmovdqu] = false; // Store Selected Bytes of Double Quadword with NT Hint
+ SMPDefsFlags[STARS_NN_vmaskmovpd] = false; // Conditionally Load Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vmaskmovps] = false; // Conditionally Load Packed Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vmaxpd] = false; // Return Maximum Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vmaxps] = false; // Packed Single-FP Maximum
+ SMPDefsFlags[STARS_NN_vmaxsd] = false; // Return Maximum Scalar Double-Precision Floating-Point Value
+ SMPDefsFlags[STARS_NN_vmaxss] = false; // Scalar Single-FP Maximum
+ SMPDefsFlags[STARS_NN_vminpd] = false; // Return Minimum Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vminps] = false; // Packed Single-FP Minimum
+ SMPDefsFlags[STARS_NN_vminsd] = false; // Return Minimum Scalar Double-Precision Floating-Point Value
+ SMPDefsFlags[STARS_NN_vminss] = false; // Scalar Single-FP Minimum
+ SMPDefsFlags[STARS_NN_vmovapd] = false; // Move Aligned Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vmovaps] = false; // Move Aligned Four Packed Single-FP
+ SMPDefsFlags[STARS_NN_vmovd] = false; // Move 32 bits
+ SMPDefsFlags[STARS_NN_vmovddup] = false; // Move One Double-FP and Duplicate
+ SMPDefsFlags[STARS_NN_vmovdqa] = false; // Move Aligned Double Quadword
+ SMPDefsFlags[STARS_NN_vmovdqu] = false; // Move Unaligned Double Quadword
+ SMPDefsFlags[STARS_NN_vmovhlps] = false; // Move High to Low Packed Single-FP
+ SMPDefsFlags[STARS_NN_vmovhpd] = false; // Move High Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vmovhps] = false; // Move High Packed Single-FP
+ SMPDefsFlags[STARS_NN_vmovlhps] = false; // Move Low to High Packed Single-FP
+ SMPDefsFlags[STARS_NN_vmovlpd] = false; // Move Low Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vmovlps] = false; // Move Low Packed Single-FP
+ SMPDefsFlags[STARS_NN_vmovmskpd] = false; // Extract Packed Double-Precision Floating-Point Sign Mask
+ SMPDefsFlags[STARS_NN_vmovmskps] = false; // Move Mask to Register
+ SMPDefsFlags[STARS_NN_vmovntdq] = false; // Store Double Quadword Using Non-Temporal Hint
+ SMPDefsFlags[STARS_NN_vmovntdqa] = false; // Load Double Quadword Non-Temporal Aligned Hint
+ SMPDefsFlags[STARS_NN_vmovntpd] = false; // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
+ SMPDefsFlags[STARS_NN_vmovntps] = false; // Move Aligned Four Packed Single-FP Non Temporal
+ SMPDefsFlags[STARS_NN_vmovntsd] = false; // Move Non-Temporal Scalar Double-Precision Floating-Point
+ SMPDefsFlags[STARS_NN_vmovntss] = false; // Move Non-Temporal Scalar Single-Precision Floating-Point
+ SMPDefsFlags[STARS_NN_vmovq] = false; // Move 64 bits
+ SMPDefsFlags[STARS_NN_vmovsd] = false; // Move Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vmovshdup] = false; // Move Packed Single-FP High and Duplicate
+ SMPDefsFlags[STARS_NN_vmovsldup] = false; // Move Packed Single-FP Low and Duplicate
+ SMPDefsFlags[STARS_NN_vmovss] = false; // Move Scalar Single-FP
+ SMPDefsFlags[STARS_NN_vmovupd] = false; // Move Unaligned Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vmovups] = false; // Move Unaligned Four Packed Single-FP
+ SMPDefsFlags[STARS_NN_vmpsadbw] = false; // Compute Multiple Packed Sums of Absolute Difference
+ SMPDefsFlags[STARS_NN_vmulpd] = false; // Multiply Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vmulps] = false; // Packed Single-FP Multiply
+ SMPDefsFlags[STARS_NN_vmulsd] = false; // Multiply Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vmulss] = false; // Scalar Single-FP Multiply
+ SMPDefsFlags[STARS_NN_vorpd] = false; // Bitwise Logical OR of Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vorps] = false; // Bitwise Logical OR for Single-FP Data
+ SMPDefsFlags[STARS_NN_vpabsb] = false; // Packed Absolute Value Byte
+ SMPDefsFlags[STARS_NN_vpabsd] = false; // Packed Absolute Value Doubleword
+ SMPDefsFlags[STARS_NN_vpabsw] = false; // Packed Absolute Value Word
+ SMPDefsFlags[STARS_NN_vpackssdw] = false; // Pack with Signed Saturation (Dword->Word)
+ SMPDefsFlags[STARS_NN_vpacksswb] = false; // Pack with Signed Saturation (Word->Byte)
+ SMPDefsFlags[STARS_NN_vpackusdw] = false; // Pack with Unsigned Saturation
+ SMPDefsFlags[STARS_NN_vpackuswb] = false; // Pack with Unsigned Saturation (Word->Byte)
+ SMPDefsFlags[STARS_NN_vpaddb] = false; // Packed Add Byte
+ SMPDefsFlags[STARS_NN_vpaddd] = false; // Packed Add Dword
+ SMPDefsFlags[STARS_NN_vpaddq] = false; // Add Packed Quadword Integers
+ SMPDefsFlags[STARS_NN_vpaddsb] = false; // Packed Add with Saturation (Byte)
+ SMPDefsFlags[STARS_NN_vpaddsw] = false; // Packed Add with Saturation (Word)
+ SMPDefsFlags[STARS_NN_vpaddusb] = false; // Packed Add Unsigned with Saturation (Byte)
+ SMPDefsFlags[STARS_NN_vpaddusw] = false; // Packed Add Unsigned with Saturation (Word)
+ SMPDefsFlags[STARS_NN_vpaddw] = false; // Packed Add Word
+ SMPDefsFlags[STARS_NN_vpalignr] = false; // Packed Align Right
+ SMPDefsFlags[STARS_NN_vpand] = false; // Bitwise Logical And
+ SMPDefsFlags[STARS_NN_vpandn] = false; // Bitwise Logical And Not
+ SMPDefsFlags[STARS_NN_vpavgb] = false; // Packed Average (Byte)
+ SMPDefsFlags[STARS_NN_vpavgw] = false; // Packed Average (Word)
+ SMPDefsFlags[STARS_NN_vpblendd] = false; // Blend Packed Dwords
+ SMPDefsFlags[STARS_NN_vpblendvb] = false; // Variable Blend Packed Bytes
+ SMPDefsFlags[STARS_NN_vpblendw] = false; // Blend Packed Words
+ SMPDefsFlags[STARS_NN_vpbroadcastb] = false; // Broadcast a Byte Integer
+ SMPDefsFlags[STARS_NN_vpbroadcastd] = false; // Broadcast a Dword Integer
+ SMPDefsFlags[STARS_NN_vpbroadcastq] = false; // Broadcast a Qword Integer
+ SMPDefsFlags[STARS_NN_vpbroadcastw] = false; // Broadcast a Word Integer
+ SMPDefsFlags[STARS_NN_vpclmulqdq] = false; // Carry-Less Multiplication Quadword
+ SMPDefsFlags[STARS_NN_vpcmpeqb] = false; // Packed Compare for Equal (Byte)
+ SMPDefsFlags[STARS_NN_vpcmpeqd] = false; // Packed Compare for Equal (Dword)
+ SMPDefsFlags[STARS_NN_vpcmpeqq] = false; // Compare Packed Qword Data for Equal
+ SMPDefsFlags[STARS_NN_vpcmpeqw] = false; // Packed Compare for Equal (Word)
+ SMPDefsFlags[STARS_NN_vpcmpestri] = false; // Packed Compare Explicit Length Strings, Return Index
+ SMPDefsFlags[STARS_NN_vpcmpestrm] = false; // Packed Compare Explicit Length Strings, Return Mask
+ SMPDefsFlags[STARS_NN_vpcmpgtb] = false; // Packed Compare for Greater Than (Byte)
+ SMPDefsFlags[STARS_NN_vpcmpgtd] = false; // Packed Compare for Greater Than (Dword)
+ SMPDefsFlags[STARS_NN_vpcmpgtq] = false; // Compare Packed Data for Greater Than
+ SMPDefsFlags[STARS_NN_vpcmpgtw] = false; // Packed Compare for Greater Than (Word)
+ SMPDefsFlags[STARS_NN_vpcmpistri] = false; // Packed Compare Implicit Length Strings, Return Index
+ SMPDefsFlags[STARS_NN_vpcmpistrm] = false; // Packed Compare Implicit Length Strings, Return Mask
+ SMPDefsFlags[STARS_NN_vperm2f128] = false; // Permute Floating-Point Values
+ SMPDefsFlags[STARS_NN_vperm2i128] = false; // Permute Integer Values
+ SMPDefsFlags[STARS_NN_vpermd] = false; // Full Doublewords Element Permutation
+ SMPDefsFlags[STARS_NN_vpermilpd] = false; // Permute Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vpermilps] = false; // Permute Single-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vpermpd] = false; // Permute Double-Precision Floating-Point Elements
+ SMPDefsFlags[STARS_NN_vpermps] = false; // Permute Single-Precision Floating-Point Elements
+ SMPDefsFlags[STARS_NN_vpermq] = false; // Qwords Element Permutation
+ SMPDefsFlags[STARS_NN_vpextrb] = false; // Extract Byte
+ SMPDefsFlags[STARS_NN_vpextrd] = false; // Extract Dword
+ SMPDefsFlags[STARS_NN_vpextrq] = false; // Extract Qword
+ SMPDefsFlags[STARS_NN_vpextrw] = false; // Extract Word
+ SMPDefsFlags[STARS_NN_vpgatherdd] = false; // Gather Packed Dword Values Using Signed Dword Indices
+ SMPDefsFlags[STARS_NN_vpgatherdq] = false; // Gather Packed Qword Values Using Signed Dword Indices
+ SMPDefsFlags[STARS_NN_vpgatherqd] = false; // Gather Packed Dword Values Using Signed Qword Indices
+ SMPDefsFlags[STARS_NN_vpgatherqq] = false; // Gather Packed Qword Values Using Signed Qword Indices
+ SMPDefsFlags[STARS_NN_vphaddd] = false; // Packed Horizontal Add Doubleword
+ SMPDefsFlags[STARS_NN_vphaddsw] = false; // Packed Horizontal Add and Saturate
+ SMPDefsFlags[STARS_NN_vphaddw] = false; // Packed Horizontal Add Word
+ SMPDefsFlags[STARS_NN_vphminposuw] = false; // Packed Horizontal Word Minimum
+ SMPDefsFlags[STARS_NN_vphsubd] = false; // Packed Horizontal Subtract Doubleword
+ SMPDefsFlags[STARS_NN_vphsubsw] = false; // Packed Horizontal Subtract and Saturate
+ SMPDefsFlags[STARS_NN_vphsubw] = false; // Packed Horizontal Subtract Word
+ SMPDefsFlags[STARS_NN_vpinsrb] = false; // Insert Byte
+ SMPDefsFlags[STARS_NN_vpinsrd] = false; // Insert Dword
+ SMPDefsFlags[STARS_NN_vpinsrq] = false; // Insert Qword
+ SMPDefsFlags[STARS_NN_vpinsrw] = false; // Insert Word
+ SMPDefsFlags[STARS_NN_vpmaddubsw] = false; // Multiply and Add Packed Signed and Unsigned Bytes
+ SMPDefsFlags[STARS_NN_vpmaddwd] = false; // Packed Multiply and Add
+ SMPDefsFlags[STARS_NN_vpmaskmovd] = false; // Conditionally Store Dword Values Using Mask
+ SMPDefsFlags[STARS_NN_vpmaskmovq] = false; // Conditionally Store Qword Values Using Mask
+ SMPDefsFlags[STARS_NN_vpmaxsb] = false; // Maximum of Packed Signed Byte Integers
+ SMPDefsFlags[STARS_NN_vpmaxsd] = false; // Maximum of Packed Signed Dword Integers
+ SMPDefsFlags[STARS_NN_vpmaxsw] = false; // Packed Signed Integer Word Maximum
+ SMPDefsFlags[STARS_NN_vpmaxub] = false; // Packed Unsigned Integer Byte Maximum
+ SMPDefsFlags[STARS_NN_vpmaxud] = false; // Maximum of Packed Unsigned Dword Integers
+ SMPDefsFlags[STARS_NN_vpmaxuw] = false; // Maximum of Packed Word Integers
+ SMPDefsFlags[STARS_NN_vpminsb] = false; // Minimum of Packed Signed Byte Integers
+ SMPDefsFlags[STARS_NN_vpminsd] = false; // Minimum of Packed Signed Dword Integers
+ SMPDefsFlags[STARS_NN_vpminsw] = false; // Packed Signed Integer Word Minimum
+ SMPDefsFlags[STARS_NN_vpminub] = false; // Packed Unsigned Integer Byte Minimum
+ SMPDefsFlags[STARS_NN_vpminud] = false; // Minimum of Packed Unsigned Dword Integers
+ SMPDefsFlags[STARS_NN_vpminuw] = false; // Minimum of Packed Word Integers
+ SMPDefsFlags[STARS_NN_vpmovmskb] = false; // Move Byte Mask to Integer
+ SMPDefsFlags[STARS_NN_vpmovsxbd] = false; // Packed Move with Sign Extend
+ SMPDefsFlags[STARS_NN_vpmovsxbq] = false; // Packed Move with Sign Extend
+ SMPDefsFlags[STARS_NN_vpmovsxbw] = false; // Packed Move with Sign Extend
+ SMPDefsFlags[STARS_NN_vpmovsxdq] = false; // Packed Move with Sign Extend
+ SMPDefsFlags[STARS_NN_vpmovsxwd] = false; // Packed Move with Sign Extend
+ SMPDefsFlags[STARS_NN_vpmovsxwq] = false; // Packed Move with Sign Extend
+ SMPDefsFlags[STARS_NN_vpmovzxbd] = false; // Packed Move with Zero Extend
+ SMPDefsFlags[STARS_NN_vpmovzxbq] = false; // Packed Move with Zero Extend
+ SMPDefsFlags[STARS_NN_vpmovzxbw] = false; // Packed Move with Zero Extend
+ SMPDefsFlags[STARS_NN_vpmovzxdq] = false; // Packed Move with Zero Extend
+ SMPDefsFlags[STARS_NN_vpmovzxwd] = false; // Packed Move with Zero Extend
+ SMPDefsFlags[STARS_NN_vpmovzxwq] = false; // Packed Move with Zero Extend
+ SMPDefsFlags[STARS_NN_vpmuldq] = false; // Multiply Packed Signed Dword Integers
+ SMPDefsFlags[STARS_NN_vpmulhrsw] = false; // Packed Multiply High with Round and Scale
+ SMPDefsFlags[STARS_NN_vpmulhuw] = false; // Packed Multiply High Unsigned
+ SMPDefsFlags[STARS_NN_vpmulhw] = false; // Packed Multiply High
+ SMPDefsFlags[STARS_NN_vpmulld] = false; // Multiply Packed Signed Dword Integers and Store Low Result
+ SMPDefsFlags[STARS_NN_vpmullw] = false; // Packed Multiply Low
+ SMPDefsFlags[STARS_NN_vpmuludq] = false; // Multiply Packed Unsigned Doubleword Integers
+ SMPDefsFlags[STARS_NN_vpor] = false; // Bitwise Logical Or
+ SMPDefsFlags[STARS_NN_vpsadbw] = false; // Packed Sum of Absolute Differences
+ SMPDefsFlags[STARS_NN_vpshufb] = false; // Packed Shuffle Bytes
+ SMPDefsFlags[STARS_NN_vpshufd] = false; // Shuffle Packed Doublewords
+ SMPDefsFlags[STARS_NN_vpshufhw] = false; // Shuffle Packed High Words
+ SMPDefsFlags[STARS_NN_vpshuflw] = false; // Shuffle Packed Low Words
+ SMPDefsFlags[STARS_NN_vpsignb] = false; // Packed SIGN Byte
+ SMPDefsFlags[STARS_NN_vpsignd] = false; // Packed SIGN Doubleword
+ SMPDefsFlags[STARS_NN_vpsignw] = false; // Packed SIGN Word
+ SMPDefsFlags[STARS_NN_vpslld] = false; // Packed Shift Left Logical (Dword)
+ SMPDefsFlags[STARS_NN_vpslldq] = false; // Shift Double Quadword Left Logical
+ SMPDefsFlags[STARS_NN_vpsllq] = false; // Packed Shift Left Logical (Qword)
+ SMPDefsFlags[STARS_NN_vpsllvd] = false; // Variable Bit Shift Left Logical (Dword)
+ SMPDefsFlags[STARS_NN_vpsllvq] = false; // Variable Bit Shift Left Logical (Qword)
+ SMPDefsFlags[STARS_NN_vpsllw] = false; // Packed Shift Left Logical (Word)
+ SMPDefsFlags[STARS_NN_vpsrad] = false; // Packed Shift Right Arithmetic (Dword)
+ SMPDefsFlags[STARS_NN_vpsravd] = false; // Variable Bit Shift Right Arithmetic
+ SMPDefsFlags[STARS_NN_vpsraw] = false; // Packed Shift Right Arithmetic (Word)
+ SMPDefsFlags[STARS_NN_vpsrld] = false; // Packed Shift Right Logical (Dword)
+ SMPDefsFlags[STARS_NN_vpsrldq] = false; // Shift Double Quadword Right Logical (Qword)
+ SMPDefsFlags[STARS_NN_vpsrlq] = false; // Packed Shift Right Logical (Qword)
+ SMPDefsFlags[STARS_NN_vpsrlvd] = false; // Variable Bit Shift Right Logical (Dword)
+ SMPDefsFlags[STARS_NN_vpsrlvq] = false; // Variable Bit Shift Right Logical (Qword)
+ SMPDefsFlags[STARS_NN_vpsrlw] = false; // Packed Shift Right Logical (Word)
+ SMPDefsFlags[STARS_NN_vpsubb] = false; // Packed Subtract Byte
+ SMPDefsFlags[STARS_NN_vpsubd] = false; // Packed Subtract Dword
+ SMPDefsFlags[STARS_NN_vpsubq] = false; // Subtract Packed Quadword Integers
+ SMPDefsFlags[STARS_NN_vpsubsb] = false; // Packed Subtract with Saturation (Byte)
+ SMPDefsFlags[STARS_NN_vpsubsw] = false; // Packed Subtract with Saturation (Word)
+ SMPDefsFlags[STARS_NN_vpsubusb] = false; // Packed Subtract Unsigned with Saturation (Byte)
+ SMPDefsFlags[STARS_NN_vpsubusw] = false; // Packed Subtract Unsigned with Saturation (Word)
+ SMPDefsFlags[STARS_NN_vpsubw] = false; // Packed Subtract Word
+ SMPDefsFlags[STARS_NN_vptest] = false; // Logical Compare
+ SMPDefsFlags[STARS_NN_vpunpckhbw] = false; // Unpack High Packed Data (Byte->Word)
+ SMPDefsFlags[STARS_NN_vpunpckhdq] = false; // Unpack High Packed Data (Dword->Qword)
+ SMPDefsFlags[STARS_NN_vpunpckhqdq] = false; // Unpack High Packed Data (Qword->Xmmword)
+ SMPDefsFlags[STARS_NN_vpunpckhwd] = false; // Unpack High Packed Data (Word->Dword)
+ SMPDefsFlags[STARS_NN_vpunpcklbw] = false; // Unpack Low Packed Data (Byte->Word)
+ SMPDefsFlags[STARS_NN_vpunpckldq] = false; // Unpack Low Packed Data (Dword->Qword)
+ SMPDefsFlags[STARS_NN_vpunpcklqdq] = false; // Unpack Low Packed Data (Qword->Xmmword)
+ SMPDefsFlags[STARS_NN_vpunpcklwd] = false; // Unpack Low Packed Data (Word->Dword)
+ SMPDefsFlags[STARS_NN_vpxor] = false; // Bitwise Logical Exclusive Or
+ SMPDefsFlags[STARS_NN_vrcpps] = false; // Packed Single-FP Reciprocal
+ SMPDefsFlags[STARS_NN_vrcpss] = false; // Scalar Single-FP Reciprocal
+ SMPDefsFlags[STARS_NN_vroundpd] = false; // Round Packed Double Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vroundps] = false; // Round Packed Single Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vroundsd] = false; // Round Scalar Double Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vroundss] = false; // Round Scalar Single Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vrsqrtps] = false; // Packed Single-FP Square Root Reciprocal
+ SMPDefsFlags[STARS_NN_vrsqrtss] = false; // Scalar Single-FP Square Root Reciprocal
+ SMPDefsFlags[STARS_NN_vshufpd] = false; // Shuffle Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vshufps] = false; // Shuffle Single-FP
+ SMPDefsFlags[STARS_NN_vsqrtpd] = false; // Compute Square Roots of Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vsqrtps] = false; // Packed Single-FP Square Root
+ SMPDefsFlags[STARS_NN_vsqrtsd] = false; // Compute Square Rootof Scalar Double-Precision Floating-Point Value
+ SMPDefsFlags[STARS_NN_vsqrtss] = false; // Scalar Single-FP Square Root
+ SMPDefsFlags[STARS_NN_vstmxcsr] = false; // Store Streaming SIMD Extensions Technology Control/Status Register
+ SMPDefsFlags[STARS_NN_vsubpd] = false; // Subtract Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vsubps] = false; // Packed Single-FP Subtract
+ SMPDefsFlags[STARS_NN_vsubsd] = false; // Subtract Scalar Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vsubss] = false; // Scalar Single-FP Subtract
+ SMPDefsFlags[STARS_NN_vtestpd] = false; // Packed Double-Precision Floating-Point Bit Test
+ SMPDefsFlags[STARS_NN_vtestps] = false; // Packed Single-Precision Floating-Point Bit Test
+ SMPDefsFlags[STARS_NN_vucomisd] = false; // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ SMPDefsFlags[STARS_NN_vucomiss] = false; // Scalar Unordered Single-FP Compare and Set EFLAGS
+ SMPDefsFlags[STARS_NN_vunpckhpd] = false; // Unpack and Interleave High Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vunpckhps] = false; // Unpack High Packed Single-FP Data
+ SMPDefsFlags[STARS_NN_vunpcklpd] = false; // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vunpcklps] = false; // Unpack Low Packed Single-FP Data
+ SMPDefsFlags[STARS_NN_vxorpd] = false; // Bitwise Logical OR of Double-Precision Floating-Point Values
+ SMPDefsFlags[STARS_NN_vxorps] = false; // Bitwise Logical XOR for Single-FP Data
+ SMPDefsFlags[STARS_NN_vzeroall] = false; // Zero All YMM Registers
+ SMPDefsFlags[STARS_NN_vzeroupper] = false; // Zero Upper Bits of YMM Registers
+
+ // Transactional Synchronization Extensions
+
+ SMPDefsFlags[STARS_NN_xabort] = false; // Transaction Abort
+ SMPDefsFlags[STARS_NN_xbegin] = false; // Transaction Begin
+ SMPDefsFlags[STARS_NN_xend] = false; // Transaction End
+ SMPDefsFlags[STARS_NN_xtest] = false; // Test If In Transactional Execution
+
+ // Virtual PC synthetic instructions
+
+ SMPDefsFlags[STARS_NN_vmgetinfo] = false; // Virtual PC - Get VM Information
+ SMPDefsFlags[STARS_NN_vmsetinfo] = false; // Virtual PC - Set VM Information
+ SMPDefsFlags[STARS_NN_vmdxdsbl] = false; // Virtual PC - Disable Direct Execution
+ SMPDefsFlags[STARS_NN_vmdxenbl] = false; // Virtual PC - Enable Direct Execution
+ SMPDefsFlags[STARS_NN_vmcpuid] = false; // Virtual PC - Virtualized CPU Information
+ SMPDefsFlags[STARS_NN_vmhlt] = false; // Virtual PC - Halt
+ SMPDefsFlags[STARS_NN_vmsplaf] = false; // Virtual PC - Spin Lock Acquisition Failed
+ SMPDefsFlags[STARS_NN_vmpushfd] = false; // Virtual PC - Push virtualized flags register
+ SMPDefsFlags[STARS_NN_vmpopfd] = false; // Virtual PC - Pop virtualized flags register
+ SMPDefsFlags[STARS_NN_vmcli] = false; // Virtual PC - Clear Interrupt Flag
+ SMPDefsFlags[STARS_NN_vmsti] = false; // Virtual PC - Set Interrupt Flag
+ SMPDefsFlags[STARS_NN_vmiretd] = false; // Virtual PC - Return From Interrupt
+ SMPDefsFlags[STARS_NN_vmsgdt] = false; // Virtual PC - Store Global Descriptor Table
+ SMPDefsFlags[STARS_NN_vmsidt] = false; // Virtual PC - Store Interrupt Descriptor Table
+ SMPDefsFlags[STARS_NN_vmsldt] = false; // Virtual PC - Store Local Descriptor Table
+ SMPDefsFlags[STARS_NN_vmstr] = false; // Virtual PC - Store Task Register
+ SMPDefsFlags[STARS_NN_vmsdte] = false; // Virtual PC - Store to Descriptor Table Entry
+ SMPDefsFlags[STARS_NN_vpcext] = false; // Virtual PC - ISA extension
+
+#endif // 599 < IDA_SDK_VERSION
+
+ SMPDefsFlags[STARS_NN_last] = false;
+
+ return;
+
+} // end of STARS_Program_t::InitSMPDefsFlags()
+
+// Initialize the SMPUsesFlags[] array to define how we emit
+// optimizing annotations.
+void STARS_Program_t::InitSMPUsesFlags(void) {
+ // Default value is false. Few instructions use the flags.
+ (void) memset(SMPUsesFlags, false, sizeof(SMPUsesFlags));
+
+ SMPUsesFlags[STARS_NN_null] = true; // Unknown Operation
+ SMPUsesFlags[STARS_NN_aaa] = true; // ASCII adjust after addition
+ SMPUsesFlags[STARS_NN_aas] = true; // ASCII adjust after subtraction
+ SMPUsesFlags[STARS_NN_adc] = true; // Add with Carry
+ SMPUsesFlags[STARS_NN_cmps] = true; // Compare Strings (uses DF direction flag)
+ SMPUsesFlags[STARS_NN_daa] = true; // Decimal Adjust AL after Addition
+ SMPUsesFlags[STARS_NN_das] = true; // Decimal Adjust AL after Subtraction
+ SMPUsesFlags[STARS_NN_ins] = true; // Input Byte(s) from Port to String
+ SMPUsesFlags[STARS_NN_into] = true; // Call to Interrupt Procedure if Overflow Flag = 1
+ SMPUsesFlags[STARS_NN_ja] = true; // Jump if Above (CF=0 & ZF=0)
+ SMPUsesFlags[STARS_NN_jae] = true; // Jump if Above or Equal (CF=0)
+ SMPUsesFlags[STARS_NN_jb] = true; // Jump if Below (CF=1)
+ SMPUsesFlags[STARS_NN_jbe] = true; // Jump if Below or Equal (CF=1 | ZF=1)
+ SMPUsesFlags[STARS_NN_jc] = true; // Jump if Carry (CF=1)
+ SMPUsesFlags[STARS_NN_jcxz] = true; // Jump if CX is 0
+ SMPUsesFlags[STARS_NN_jecxz] = true; // Jump if ECX is 0
+ SMPUsesFlags[STARS_NN_jrcxz] = true; // Jump if RCX is 0
+ SMPUsesFlags[STARS_NN_je] = true; // Jump if Equal (ZF=1)
+ SMPUsesFlags[STARS_NN_jg] = true; // Jump if Greater (ZF=0 & SF=OF)
+ SMPUsesFlags[STARS_NN_jge] = true; // Jump if Greater or Equal (SF=OF)
+ SMPUsesFlags[STARS_NN_jl] = true; // Jump if Less (SF!=OF)
+ SMPUsesFlags[STARS_NN_jle] = true; // Jump if Less or Equal (ZF=1 | SF!=OF)
+ SMPUsesFlags[STARS_NN_jna] = true; // Jump if Not Above (CF=1 | ZF=1)
+ SMPUsesFlags[STARS_NN_jnae] = true; // Jump if Not Above or Equal (CF=1)
+ SMPUsesFlags[STARS_NN_jnb] = true; // Jump if Not Below (CF=0)
+ SMPUsesFlags[STARS_NN_jnbe] = true; // Jump if Not Below or Equal (CF=0 & ZF=0)
+ SMPUsesFlags[STARS_NN_jnc] = true; // Jump if Not Carry (CF=0)
+ SMPUsesFlags[STARS_NN_jne] = true; // Jump if Not Equal (ZF=0)
+ SMPUsesFlags[STARS_NN_jng] = true; // Jump if Not Greater (ZF=1 | SF!=OF)
+ SMPUsesFlags[STARS_NN_jnge] = true; // Jump if Not Greater or Equal (SF!=OF)
+ SMPUsesFlags[STARS_NN_jnl] = true; // Jump if Not Less (SF=OF)
+ SMPUsesFlags[STARS_NN_jnle] = true; // Jump if Not Less or Equal (ZF=0 & SF=OF)
+ SMPUsesFlags[STARS_NN_jno] = true; // Jump if Not Overflow (OF=0)
+ SMPUsesFlags[STARS_NN_jnp] = true; // Jump if Not Parity (PF=0)
+ SMPUsesFlags[STARS_NN_jns] = true; // Jump if Not Sign (SF=0)
+ SMPUsesFlags[STARS_NN_jnz] = true; // Jump if Not Zero (ZF=0)
+ SMPUsesFlags[STARS_NN_jo] = true; // Jump if Overflow (OF=1)
+ SMPUsesFlags[STARS_NN_jp] = true; // Jump if Parity (PF=1)
+ SMPUsesFlags[STARS_NN_jpe] = true; // Jump if Parity Even (PF=1)
+ SMPUsesFlags[STARS_NN_jpo] = true; // Jump if Parity Odd (PF=0)
+ SMPUsesFlags[STARS_NN_js] = true; // Jump if Sign (SF=1)
+ SMPUsesFlags[STARS_NN_jz] = true; // Jump if Zero (ZF=1)
+ SMPUsesFlags[STARS_NN_lahf] = true; // Load Flags into AH Register
+ SMPUsesFlags[STARS_NN_lods] = true; // Load String
+ SMPUsesFlags[STARS_NN_loopwe] = true; // Loop while CX != 0 and ZF=1
+ SMPUsesFlags[STARS_NN_loope] = true; // Loop while rCX != 0 and ZF=1
+ SMPUsesFlags[STARS_NN_loopde] = true; // Loop while ECX != 0 and ZF=1
+ SMPUsesFlags[STARS_NN_loopqe] = true; // Loop while RCX != 0 and ZF=1
+ SMPUsesFlags[STARS_NN_loopwne] = true; // Loop while CX != 0 and ZF=0
+ SMPUsesFlags[STARS_NN_loopne] = true; // Loop while rCX != 0 and ZF=0
+ SMPUsesFlags[STARS_NN_loopdne] = true; // Loop while ECX != 0 and ZF=0
+ SMPUsesFlags[STARS_NN_loopqne] = true; // Loop while RCX != 0 and ZF=0
+ SMPUsesFlags[STARS_NN_movs] = true; // Move String (uses flags if REP prefix)
+ SMPUsesFlags[STARS_NN_outs] = true; // Output Byte(s) to Port
+ SMPUsesFlags[STARS_NN_pushfw] = true; // Push Flags Register onto the Stack
+ SMPUsesFlags[STARS_NN_pushf] = true; // Push Flags Register onto the Stack
+ SMPUsesFlags[STARS_NN_pushfd] = true; // Push Flags Register onto the Stack (use32)
+ SMPUsesFlags[STARS_NN_pushfq] = true; // Push Flags Register onto the Stack (use64)
+ SMPUsesFlags[STARS_NN_rcl] = true; // Rotate Through Carry Left
+ SMPUsesFlags[STARS_NN_rcr] = true; // Rotate Through Carry Right
+ SMPUsesFlags[STARS_NN_repe] = true; // Repeat String Operation while ZF=1
+ SMPUsesFlags[STARS_NN_repne] = true; // Repeat String Operation while ZF=0
+ SMPUsesFlags[STARS_NN_sbb] = true; // Integer Subtraction with Borrow
+ SMPUsesFlags[STARS_NN_scas] = true; // Compare String (uses DF direction flag)
+ SMPUsesFlags[STARS_NN_seta] = true; // Set Byte if Above (CF=0 & ZF=0)
+ SMPUsesFlags[STARS_NN_setae] = true; // Set Byte if Above or Equal (CF=0)
+ SMPUsesFlags[STARS_NN_setb] = true; // Set Byte if Below (CF=1)
+ SMPUsesFlags[STARS_NN_setbe] = true; // Set Byte if Below or Equal (CF=1 | ZF=1)
+ SMPUsesFlags[STARS_NN_setc] = true; // Set Byte if Carry (CF=1)
+ SMPUsesFlags[STARS_NN_sete] = true; // Set Byte if Equal (ZF=1)
+ SMPUsesFlags[STARS_NN_setg] = true; // Set Byte if Greater (ZF=0 & SF=OF)
+ SMPUsesFlags[STARS_NN_setge] = true; // Set Byte if Greater or Equal (SF=OF)
+ SMPUsesFlags[STARS_NN_setl] = true; // Set Byte if Less (SF!=OF)
+ SMPUsesFlags[STARS_NN_setle] = true; // Set Byte if Less or Equal (ZF=1 | SF!=OF)
+ SMPUsesFlags[STARS_NN_setna] = true; // Set Byte if Not Above (CF=1 | ZF=1)
+ SMPUsesFlags[STARS_NN_setnae] = true; // Set Byte if Not Above or Equal (CF=1)
+ SMPUsesFlags[STARS_NN_setnb] = true; // Set Byte if Not Below (CF=0)
+ SMPUsesFlags[STARS_NN_setnbe] = true; // Set Byte if Not Below or Equal (CF=0 & ZF=0)
+ SMPUsesFlags[STARS_NN_setnc] = true; // Set Byte if Not Carry (CF=0)
+ SMPUsesFlags[STARS_NN_setne] = true; // Set Byte if Not Equal (ZF=0)
+ SMPUsesFlags[STARS_NN_setng] = true; // Set Byte if Not Greater (ZF=1 | SF!=OF)
+ SMPUsesFlags[STARS_NN_setnge] = true; // Set Byte if Not Greater or Equal (SF!=OF)
+ SMPUsesFlags[STARS_NN_setnl] = true; // Set Byte if Not Less (SF=OF)
+ SMPUsesFlags[STARS_NN_setnle] = true; // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
+ SMPUsesFlags[STARS_NN_setno] = true; // Set Byte if Not Overflow (OF=0)
+ SMPUsesFlags[STARS_NN_setnp] = true; // Set Byte if Not Parity (PF=0)
+ SMPUsesFlags[STARS_NN_setns] = true; // Set Byte if Not Sign (SF=0)
+ SMPUsesFlags[STARS_NN_setnz] = true; // Set Byte if Not Zero (ZF=0)
+ SMPUsesFlags[STARS_NN_seto] = true; // Set Byte if Overflow (OF=1)
+ SMPUsesFlags[STARS_NN_setp] = true; // Set Byte if Parity (PF=1)
+ SMPUsesFlags[STARS_NN_setpe] = true; // Set Byte if Parity Even (PF=1)
+ SMPUsesFlags[STARS_NN_setpo] = true; // Set Byte if Parity Odd (PF=0)
+ SMPUsesFlags[STARS_NN_sets] = true; // Set Byte if Sign (SF=1)
+ SMPUsesFlags[STARS_NN_setz] = true; // Set Byte if Zero (ZF=1)
+ SMPUsesFlags[STARS_NN_stos] = true; // Store String
+
+ //
+ // 486 instructions
+ //
+
+ //
+ // Pentium instructions
+ //
+
+#if 0
+ SMPUsesFlags[STARS_NN_cpuid] = true; // Get CPU ID
+ SMPUsesFlags[STARS_NN_cmpxchg8b] = true; // Compare and Exchange Eight Bytes
+#endif
+
+ //
+ // Pentium Pro instructions
+ //
+
+ SMPUsesFlags[STARS_NN_cmova] = true; // Move if Above (CF=0 & ZF=0)
+ SMPUsesFlags[STARS_NN_cmovb] = true; // Move if Below (CF=1)
+ SMPUsesFlags[STARS_NN_cmovbe] = true; // Move if Below or Equal (CF=1 | ZF=1)
+ SMPUsesFlags[STARS_NN_cmovg] = true; // Move if Greater (ZF=0 & SF=OF)
+ SMPUsesFlags[STARS_NN_cmovge] = true; // Move if Greater or Equal (SF=OF)
+ SMPUsesFlags[STARS_NN_cmovl] = true; // Move if Less (SF!=OF)
+ SMPUsesFlags[STARS_NN_cmovle] = true; // Move if Less or Equal (ZF=1 | SF!=OF)
+ SMPUsesFlags[STARS_NN_cmovnb] = true; // Move if Not Below (CF=0)
+ SMPUsesFlags[STARS_NN_cmovno] = true; // Move if Not Overflow (OF=0)
+ SMPUsesFlags[STARS_NN_cmovnp] = true; // Move if Not Parity (PF=0)
+ SMPUsesFlags[STARS_NN_cmovns] = true; // Move if Not Sign (SF=0)
+ SMPUsesFlags[STARS_NN_cmovnz] = true; // Move if Not Zero (ZF=0)
+ SMPUsesFlags[STARS_NN_cmovo] = true; // Move if Overflow (OF=1)
+ SMPUsesFlags[STARS_NN_cmovp] = true; // Move if Parity (PF=1)
+ SMPUsesFlags[STARS_NN_cmovs] = true; // Move if Sign (SF=1)
+ SMPUsesFlags[STARS_NN_cmovz] = true; // Move if Zero (ZF=1)
+ SMPUsesFlags[STARS_NN_fcmovb] = true; // Floating Move if Below
+ SMPUsesFlags[STARS_NN_fcmove] = true; // Floating Move if Equal
+ SMPUsesFlags[STARS_NN_fcmovbe] = true; // Floating Move if Below or Equal
+ SMPUsesFlags[STARS_NN_fcmovu] = true; // Floating Move if Unordered
+ SMPUsesFlags[STARS_NN_fcmovnb] = true; // Floating Move if Not Below
+ SMPUsesFlags[STARS_NN_fcmovne] = true; // Floating Move if Not Equal
+ SMPUsesFlags[STARS_NN_fcmovnbe] = true; // Floating Move if Not Below or Equal
+ SMPUsesFlags[STARS_NN_fcmovnu] = true; // Floating Move if Not Unordered
+
+ //
+ // FPP instructions
+ //
+
+
+ //
+ // 80387 instructions
+ //
+
+
+ //
+ // Instructions added 28.02.96
+ //
+
+ SMPUsesFlags[STARS_NN_setalc] = true; // Set AL to Carry Flag
+
+ //
+ // MMX instructions
+ //
+
+
+ //
+ // Undocumented Deschutes processor instructions
+ //
+
+
+ // Pentium II instructions
+
+
+ // 3DNow! instructions
+
+
+ // Pentium III instructions
+
+
+ // Pentium III Pseudo instructions
+
+
+ // AMD K7 instructions
+
+ // Revisit AMD if we port to it.
+
+ // Undocumented FP instructions (thanks to norbert.juffa@adm.com)
+
+ // Pentium 4 instructions
+
+
+
+ // AMD syscall/sysret instructions NOTE: not AMD, found in Intel manual
+
+ // AMD64 instructions NOTE: not AMD, found in Intel manual
+
+
+ // New Pentium instructions (SSE3)
+
+
+ // Missing AMD64 instructions NOTE: also found in Intel manual
+
+
+ // SSE3 instructions
+
+
+ // SSSE3 instructions
+
+
+ // VMX instructions
+
+ // Added with x86-64
+
+ // Geode LX 3DNow! extensions
+
+ // SSE2 pseudoinstructions
+
+ // SSSE4.1 instructions
+
+ // SSSE4.2 instructions
+
+ // AMD SSE4a instructions
+
+ // xsave/xrstor instructions
+
+ // Intel Safer Mode Extensions (SMX)
+
+ // AMD-V Virtualization ISA Extension
+
+ // VMX+ instructions
+
+ // Intel Atom instructions
+
+ // Intel AES instructions
+
+ // Carryless multiplication
+
+ // Returns modified by operand size prefixes
+
+ // RDRAND support
+
+ // new GPR instructions
+
+ SMPUsesFlags[STARS_NN_adcx] = true; // Unsigned Integer Addition of Two Operands with Carry Flag
+ SMPUsesFlags[STARS_NN_adox] = true; // Unsigned Integer Addition of Two Operands with Overflow Flag
+
+ // new AVX instructions
+
+ // Transactional Synchronization Extensions
+
+ // Virtual PC synthetic instructions
+
+ SMPUsesFlags[STARS_NN_last] = false;
+
+ return;
+
+} // end of STARS_Program_t::InitSMPUsesFlags()
+
+// Initialize the SMPTypeCategory[] array to define how we infer
+// numeric or pointer operand types for optimizing annotations.
+void STARS_Program_t::InitTypeCategory(void) {
+ // Default category is 0, no type inference without knowing context.
+ (void)memset(SMPTypeCategory, 0, sizeof(SMPTypeCategory));
+ // Category 1 instructions will need no mmStrata instrumentation
+ // and are irrelevant to our type system, so we do not attempt
+ // to make type inferences. Many of these operate on numeric
+ // operands such as floating point or MMX/SSE registers. mmStrata
+ // assumes that such registers are always numeric, so we do not
+ // need annotations informing mmStrata that FP/MMX/SSE regs are numeric.
+ // Category 2 instructions always have a result type of 'n' (number).
+ // Category 3 instructions have a result type of 'n' (number)
+ // whenever the second source operand is an operand of type 'n'.
+ // NOTE: MOV is the only current example, and this will take some thought if
+ // other examples arise.
+ // Category 4 instructions have a result type identical to the 1st source operand type.
+ // NOTE: This is currently set for single-operand instructions such as
+ // INC, DEC. As a result, these are treated pretty much as if
+ // they were category 1 instructions, as there is no metadata update,
+ // even if the operand is a memory operand.
+ // If new instructions are added to this category that are not single
+ // operand and do require some updating, the category should be split.
+ // Category 5 instructions have a result type identical to the 1st source operand
+ // type whenever the 2nd source operand is an operand of type 'n' & vice versa.
+ // Examples are add, sub, adc, and sbb. There are subtle exceptions
+ // handled in the SMPInstr::EmitTypeAnnotations() method.
+ // Category 6 instructions always have a result type of 'p' (pointer).
+ // Category 7 instructions are category 2 instructions with two destinations,
+ // such as multiply and divide instructions that affect EDX:EAX. There are
+ // forms of these instructions that only have one destination, so they have
+ // to be distinguished via the operand info.
+ // Category 8 instructions implicitly write a numeric value to EDX:EAX, but
+ // EDX and EAX are not listed as operands. RDTSC, RDPMC, RDMSR, and other
+ // instructions that copy machine registers into EDX:EAX are category 8.
+ // Some instructions in category 8 also write to ECX.
+ // Category 9 instructions are floating point instructions that either
+ // have a memory destination (treat as category 13) or a FP reg destination
+ // (treat as category 1, as FP regs are always 'n' and ignored in our system).
+ // Category 10 instructions have 'n' results if the sources are all 'n';
+ // we cannot infer the type of the result if the sources are of mixed types.
+ // Bitwise OR and AND and LEA (load effective address) are examples.
+ // Category 11 instructions need to have their types and locations on the stack
+ // frame tracked, e.g. push and pop instructions. No direct type inference.
+ // Category 12 instructions are similar to category 10, except that we do not
+ // output 'n' annotations when all sources are 'n'; rather, the instruction can
+ // be simply ignored (not instrumented by mmStrata) in that case. Conditional
+ // exchange instructions are examples; we do or do not
+ // move a numeric value into a register that already has numeric metadata.
+ // Category 13 instructions imply that their memory destination is 'n'.
+ // Category 14 instructions imply that their reg or memory source operand is 'n';
+ // if source is not memory, they are category 1 (inferences, but no instrumentation).
+ // There should never be a memory destination (usual destination is fpreg or flags).
+ // Category 15 instructions always have 'n' source AND destination operands;
+ // if addressed using indirect or indexed addressing, they are a subset of category 0
+ // (must be instrumented by mmStrata to keep index in bounds). Memory destinations
+ // are common in this category.
+
+ // NOTE: The Memory Monitor SDT needs just three categories, corresponding
+ // to categories 0, 1, and all others. For all categories > 1, the
+ // annotation should tell the SDT exactly how to update its metadata.
+ // For example, a division instruction will write type 'n' (NUM) as
+ // the metadata for result registers EDX:EAX. So, the annotation should
+ // list 'n', EDX, EAX, and a terminator of ZZ. CWD (convert word to
+ // doubleword) should have a list of n EAX ZZ.
+
+ SMPTypeCategory[STARS_NN_null] = 0; // Unknown Operation
+ SMPTypeCategory[STARS_NN_aaa] = 2; // ASCII Adjust after Addition
+ SMPTypeCategory[STARS_NN_aad] = 2; // ASCII Adjust AX before Division
+ SMPTypeCategory[STARS_NN_aam] = 2; // ASCII Adjust AX after Multiply
+ SMPTypeCategory[STARS_NN_aas] = 2; // ASCII Adjust AL after Subtraction
+ SMPTypeCategory[STARS_NN_adc] = 5; // Add with Carry
+ SMPTypeCategory[STARS_NN_add] = 5; // Add
+ SMPTypeCategory[STARS_NN_and] = 10; // Logical AND
+ SMPTypeCategory[STARS_NN_arpl] = 1; // Adjust RPL Field of Selector
+ SMPTypeCategory[STARS_NN_bound] = 1; // Check Array Index Against Bounds
+ SMPTypeCategory[STARS_NN_bsf] = 2; // Bit Scan Forward
+ SMPTypeCategory[STARS_NN_bsr] = 2; // Bit Scan Reverse
+ SMPTypeCategory[STARS_NN_bt] = 10; // Bit Test
+ SMPTypeCategory[STARS_NN_btc] = 10; // Bit Test and Complement
+ SMPTypeCategory[STARS_NN_btr] = 10; // Bit Test and Reset
+ SMPTypeCategory[STARS_NN_bts] = 10; // Bit Test and Set
+ SMPTypeCategory[STARS_NN_call] = 1; // Call Procedure
+ SMPTypeCategory[STARS_NN_callfi] = 1; // Indirect Call Far Procedure
+ SMPTypeCategory[STARS_NN_callni] = 1; // Indirect Call Near Procedure
+ SMPTypeCategory[STARS_NN_cbw] = 2; // AL -> AX (with sign) ** No ops?
+ SMPTypeCategory[STARS_NN_cwde] = 2; // AX -> EAX (with sign) **
+ SMPTypeCategory[STARS_NN_cdqe] = 2; // EAX -> RAX (with sign) **
+ SMPTypeCategory[STARS_NN_clc] = 1; // Clear Carry Flag
+ SMPTypeCategory[STARS_NN_cld] = 1; // Clear Direction Flag
+ SMPTypeCategory[STARS_NN_cli] = 1; // Clear Interrupt Flag
+ SMPTypeCategory[STARS_NN_clts] = 1; // Clear Task-Switched Flag in CR0
+ SMPTypeCategory[STARS_NN_cmc] = 1; // Complement Carry Flag
+ SMPTypeCategory[STARS_NN_cmp] = 1; // Compare Two Operands
+ SMPTypeCategory[STARS_NN_cmps] = 14; // Compare Strings
+ SMPTypeCategory[STARS_NN_cwd] = 2; // AX -> DX:AX (with sign)
+ SMPTypeCategory[STARS_NN_cdq] = 2; // EAX -> EDX:EAX (with sign)
+ SMPTypeCategory[STARS_NN_cqo] = 2; // RAX -> RDX:RAX (with sign)
+ SMPTypeCategory[STARS_NN_daa] = 2; // Decimal Adjust AL after Addition
+ SMPTypeCategory[STARS_NN_das] = 2; // Decimal Adjust AL after Subtraction
+ SMPTypeCategory[STARS_NN_dec] = 4; // Decrement by 1
+ SMPTypeCategory[STARS_NN_div] = 7; // Unsigned Divide
+ SMPTypeCategory[STARS_NN_enterw] = 0; // Make Stack Frame for Procedure Parameters **
+ SMPTypeCategory[STARS_NN_enter] = 0; // Make Stack Frame for Procedure Parameters **
+ SMPTypeCategory[STARS_NN_enterd] = 0; // Make Stack Frame for Procedure Parameters **
+ SMPTypeCategory[STARS_NN_enterq] = 0; // Make Stack Frame for Procedure Parameters **
+ SMPTypeCategory[STARS_NN_hlt] = 0; // Halt
+ SMPTypeCategory[STARS_NN_idiv] = 7; // Signed Divide
+ SMPTypeCategory[STARS_NN_imul] = 7; // Signed Multiply
+ SMPTypeCategory[STARS_NN_in] = 0; // Input from Port **
+ SMPTypeCategory[STARS_NN_inc] = 4; // Increment by 1
+ SMPTypeCategory[STARS_NN_ins] = 2; // Input Byte(s) from Port to String **
+ SMPTypeCategory[STARS_NN_int] = 0; // Call to Interrupt Procedure
+ SMPTypeCategory[STARS_NN_into] = 0; // Call to Interrupt Procedure if Overflow Flag = 1
+ SMPTypeCategory[STARS_NN_int3] = 0; // Trap to Debugger
+ SMPTypeCategory[STARS_NN_iretw] = 0; // Interrupt Return
+ SMPTypeCategory[STARS_NN_iret] = 0; // Interrupt Return
+ SMPTypeCategory[STARS_NN_iretd] = 0; // Interrupt Return (use32)
+ SMPTypeCategory[STARS_NN_iretq] = 0; // Interrupt Return (use64)
+ SMPTypeCategory[STARS_NN_ja] = 1; // Jump if Above (CF=0 & ZF=0)
+ SMPTypeCategory[STARS_NN_jae] = 1; // Jump if Above or Equal (CF=0)
+ SMPTypeCategory[STARS_NN_jb] = 1; // Jump if Below (CF=1)
+ SMPTypeCategory[STARS_NN_jbe] = 1; // Jump if Below or Equal (CF=1 | ZF=1)
+ SMPTypeCategory[STARS_NN_jc] = 1; // Jump if Carry (CF=1)
+ SMPTypeCategory[STARS_NN_jcxz] = 1; // Jump if CX is 0
+ SMPTypeCategory[STARS_NN_jecxz] = 1; // Jump if ECX is 0
+ SMPTypeCategory[STARS_NN_jrcxz] = 1; // Jump if RCX is 0
+ SMPTypeCategory[STARS_NN_je] = 1; // Jump if Equal (ZF=1)
+ SMPTypeCategory[STARS_NN_jg] = 1; // Jump if Greater (ZF=0 & SF=OF)
+ SMPTypeCategory[STARS_NN_jge] = 1; // Jump if Greater or Equal (SF=OF)
+ SMPTypeCategory[STARS_NN_jl] = 1; // Jump if Less (SF!=OF)
+ SMPTypeCategory[STARS_NN_jle] = 1; // Jump if Less or Equal (ZF=1 | SF!=OF)
+ SMPTypeCategory[STARS_NN_jna] = 1; // Jump if Not Above (CF=1 | ZF=1)
+ SMPTypeCategory[STARS_NN_jnae] = 1; // Jump if Not Above or Equal (CF=1)
+ SMPTypeCategory[STARS_NN_jnb] = 1; // Jump if Not Below (CF=0)
+ SMPTypeCategory[STARS_NN_jnbe] = 1; // Jump if Not Below or Equal (CF=0 & ZF=0)
+ SMPTypeCategory[STARS_NN_jnc] = 1; // Jump if Not Carry (CF=0)
+ SMPTypeCategory[STARS_NN_jne] = 1; // Jump if Not Equal (ZF=0)
+ SMPTypeCategory[STARS_NN_jng] = 1; // Jump if Not Greater (ZF=1 | SF!=OF)
+ SMPTypeCategory[STARS_NN_jnge] = 1; // Jump if Not Greater or Equal (SF!=OF)
+ SMPTypeCategory[STARS_NN_jnl] = 1; // Jump if Not Less (SF=OF)
+ SMPTypeCategory[STARS_NN_jnle] = 1; // Jump if Not Less or Equal (ZF=0 & SF=OF)
+ SMPTypeCategory[STARS_NN_jno] = 1; // Jump if Not Overflow (OF=0)
+ SMPTypeCategory[STARS_NN_jnp] = 1; // Jump if Not Parity (PF=0)
+ SMPTypeCategory[STARS_NN_jns] = 1; // Jump if Not Sign (SF=0)
+ SMPTypeCategory[STARS_NN_jnz] = 1; // Jump if Not Zero (ZF=0)
+ SMPTypeCategory[STARS_NN_jo] = 1; // Jump if Overflow (OF=1)
+ SMPTypeCategory[STARS_NN_jp] = 1; // Jump if Parity (PF=1)
+ SMPTypeCategory[STARS_NN_jpe] = 1; // Jump if Parity Even (PF=1)
+ SMPTypeCategory[STARS_NN_jpo] = 1; // Jump if Parity Odd (PF=0)
+ SMPTypeCategory[STARS_NN_js] = 1; // Jump if Sign (SF=1)
+ SMPTypeCategory[STARS_NN_jz] = 1; // Jump if Zero (ZF=1)
+ SMPTypeCategory[STARS_NN_jmp] = 1; // Jump
+ SMPTypeCategory[STARS_NN_jmpfi] = 1; // Indirect Far Jump
+ SMPTypeCategory[STARS_NN_jmpni] = 1; // Indirect Near Jump
+ SMPTypeCategory[STARS_NN_jmpshort] = 1; // Jump Short (not used)
+ SMPTypeCategory[STARS_NN_lahf] = 2; // Load Flags into AH Register
+ SMPTypeCategory[STARS_NN_lar] = 2; // Load Access Rights Byte
+ SMPTypeCategory[STARS_NN_lea] = 10; // Load Effective Address **
+ SMPTypeCategory[STARS_NN_leavew] = 0; // High Level Procedure Exit **
+ SMPTypeCategory[STARS_NN_leave] = 0; // High Level Procedure Exit **
+ SMPTypeCategory[STARS_NN_leaved] = 0; // High Level Procedure Exit **
+ SMPTypeCategory[STARS_NN_leaveq] = 0; // High Level Procedure Exit **
+ SMPTypeCategory[STARS_NN_lgdt] = 0; // Load Global Descriptor Table Register
+ SMPTypeCategory[STARS_NN_lidt] = 0; // Load Interrupt Descriptor Table Register
+ SMPTypeCategory[STARS_NN_lgs] = 6; // Load Full Pointer to GS:xx
+ SMPTypeCategory[STARS_NN_lss] = 6; // Load Full Pointer to SS:xx
+ SMPTypeCategory[STARS_NN_lds] = 6; // Load Full Pointer to DS:xx
+ SMPTypeCategory[STARS_NN_les] = 6; // Load Full Pointer to ES:xx
+ SMPTypeCategory[STARS_NN_lfs] = 6; // Load Full Pointer to FS:xx
+ SMPTypeCategory[STARS_NN_lldt] = 0; // Load Local Descriptor Table Register
+ SMPTypeCategory[STARS_NN_lmsw] = 1; // Load Machine Status Word
+ SMPTypeCategory[STARS_NN_lock] = 1; // Assert LOCK# Signal Prefix
+ SMPTypeCategory[STARS_NN_lods] = 0; // Load String
+ SMPTypeCategory[STARS_NN_loopw] = 1; // Loop while ECX != 0
+ SMPTypeCategory[STARS_NN_loop] = 1; // Loop while CX != 0
+ SMPTypeCategory[STARS_NN_loopd] = 1; // Loop while ECX != 0
+ SMPTypeCategory[STARS_NN_loopq] = 1; // Loop while RCX != 0
+ SMPTypeCategory[STARS_NN_loopwe] = 1; // Loop while CX != 0 and ZF=1
+ SMPTypeCategory[STARS_NN_loope] = 1; // Loop while rCX != 0 and ZF=1
+ SMPTypeCategory[STARS_NN_loopde] = 1; // Loop while ECX != 0 and ZF=1
+ SMPTypeCategory[STARS_NN_loopqe] = 1; // Loop while RCX != 0 and ZF=1
+ SMPTypeCategory[STARS_NN_loopwne] = 1; // Loop while CX != 0 and ZF=0
+ SMPTypeCategory[STARS_NN_loopne] = 1; // Loop while rCX != 0 and ZF=0
+ SMPTypeCategory[STARS_NN_loopdne] = 1; // Loop while ECX != 0 and ZF=0
+ SMPTypeCategory[STARS_NN_loopqne] = 1; // Loop while RCX != 0 and ZF=0
+ SMPTypeCategory[STARS_NN_lsl] = 6; // Load Segment Limit
+ SMPTypeCategory[STARS_NN_ltr] = 1; // Load Task Register
+ SMPTypeCategory[STARS_NN_mov] = 3; // Move Data
+ SMPTypeCategory[STARS_NN_movsp] = 3; // Move to/from Special Registers
+ SMPTypeCategory[STARS_NN_movs] = 0; // Move Byte(s) from String to String
+ SMPTypeCategory[STARS_NN_movsx] = 3; // Move with Sign-Extend
+ SMPTypeCategory[STARS_NN_movzx] = 3; // Move with Zero-Extend
+ SMPTypeCategory[STARS_NN_mul] = 7; // Unsigned Multiplication of AL or AX
+ SMPTypeCategory[STARS_NN_neg] = 2; // Two's Complement Negation !!!!****!!!! Change this when mmStrata handles NEGATEDPTR type.
+ SMPTypeCategory[STARS_NN_nop] = 1; // No Operation
+ SMPTypeCategory[STARS_NN_not] = 2; // One's Complement Negation
+ SMPTypeCategory[STARS_NN_or] = 10; // Logical Inclusive OR
+ SMPTypeCategory[STARS_NN_out] = 0; // Output to Port
+ SMPTypeCategory[STARS_NN_outs] = 0; // Output Byte(s) to Port
+ SMPTypeCategory[STARS_NN_pop] = 11; // Pop a word from the Stack
+ SMPTypeCategory[STARS_NN_popaw] = 11; // Pop all General Registers
+ SMPTypeCategory[STARS_NN_popa] = 11; // Pop all General Registers
+ SMPTypeCategory[STARS_NN_popad] = 11; // Pop all General Registers (use32)
+ SMPTypeCategory[STARS_NN_popaq] = 11; // Pop all General Registers (use64)
+ SMPTypeCategory[STARS_NN_popfw] = 11; // Pop Stack into Flags Register **
+ SMPTypeCategory[STARS_NN_popf] = 11; // Pop Stack into Flags Register **
+ SMPTypeCategory[STARS_NN_popfd] = 11; // Pop Stack into Eflags Register **
+ SMPTypeCategory[STARS_NN_popfq] = 11; // Pop Stack into Rflags Register **
+ SMPTypeCategory[STARS_NN_push] = 11; // Push Operand onto the Stack
+ SMPTypeCategory[STARS_NN_pushaw] = 11; // Push all General Registers
+ SMPTypeCategory[STARS_NN_pusha] = 11; // Push all General Registers
+ SMPTypeCategory[STARS_NN_pushad] = 11; // Push all General Registers (use32)
+ SMPTypeCategory[STARS_NN_pushaq] = 11; // Push all General Registers (use64)
+ SMPTypeCategory[STARS_NN_pushfw] = 11; // Push Flags Register onto the Stack
+ SMPTypeCategory[STARS_NN_pushf] = 11; // Push Flags Register onto the Stack
+ SMPTypeCategory[STARS_NN_pushfd] = 11; // Push Flags Register onto the Stack (use32)
+ SMPTypeCategory[STARS_NN_pushfq] = 11; // Push Flags Register onto the Stack (use64)
+ SMPTypeCategory[STARS_NN_rcl] = 2; // Rotate Through Carry Left
+ SMPTypeCategory[STARS_NN_rcr] = 2; // Rotate Through Carry Right
+ SMPTypeCategory[STARS_NN_rol] = 2; // Rotate Left
+ SMPTypeCategory[STARS_NN_ror] = 2; // Rotate Right
+ SMPTypeCategory[STARS_NN_rep] = 0; // Repeat String Operation
+ SMPTypeCategory[STARS_NN_repe] = 0; // Repeat String Operation while ZF=1
+ SMPTypeCategory[STARS_NN_repne] = 0; // Repeat String Operation while ZF=0
+ SMPTypeCategory[STARS_NN_retn] = 0; // Return Near from Procedure
+ SMPTypeCategory[STARS_NN_retf] = 0; // Return Far from Procedure
+ SMPTypeCategory[STARS_NN_sahf] = 14; // Store AH into Flags Register
+ SMPTypeCategory[STARS_NN_sal] = 2; // Shift Arithmetic Left
+ SMPTypeCategory[STARS_NN_sar] = 2; // Shift Arithmetic Right
+ SMPTypeCategory[STARS_NN_shl] = 2; // Shift Logical Left
+ SMPTypeCategory[STARS_NN_shr] = 2; // Shift Logical Right
+ SMPTypeCategory[STARS_NN_sbb] = 5; // Integer Subtraction with Borrow
+ SMPTypeCategory[STARS_NN_scas] = 14; // Compare String
+ SMPTypeCategory[STARS_NN_seta] = 2; // Set Byte if Above (CF=0 & ZF=0)
+ SMPTypeCategory[STARS_NN_setae] = 2; // Set Byte if Above or Equal (CF=0)
+ SMPTypeCategory[STARS_NN_setb] = 2; // Set Byte if Below (CF=1)
+ SMPTypeCategory[STARS_NN_setbe] = 2; // Set Byte if Below or Equal (CF=1 | ZF=1)
+ SMPTypeCategory[STARS_NN_setc] = 2; // Set Byte if Carry (CF=1)
+ SMPTypeCategory[STARS_NN_sete] = 2; // Set Byte if Equal (ZF=1)
+ SMPTypeCategory[STARS_NN_setg] = 2; // Set Byte if Greater (ZF=0 & SF=OF)
+ SMPTypeCategory[STARS_NN_setge] = 2; // Set Byte if Greater or Equal (SF=OF)
+ SMPTypeCategory[STARS_NN_setl] = 2; // Set Byte if Less (SF!=OF)
+ SMPTypeCategory[STARS_NN_setle] = 2; // Set Byte if Less or Equal (ZF=1 | SF!=OF)
+ SMPTypeCategory[STARS_NN_setna] = 2; // Set Byte if Not Above (CF=1 | ZF=1)
+ SMPTypeCategory[STARS_NN_setnae] = 2; // Set Byte if Not Above or Equal (CF=1)
+ SMPTypeCategory[STARS_NN_setnb] = 2; // Set Byte if Not Below (CF=0)
+ SMPTypeCategory[STARS_NN_setnbe] = 2; // Set Byte if Not Below or Equal (CF=0 & ZF=0)
+ SMPTypeCategory[STARS_NN_setnc] = 2; // Set Byte if Not Carry (CF=0)
+ SMPTypeCategory[STARS_NN_setne] = 2; // Set Byte if Not Equal (ZF=0)
+ SMPTypeCategory[STARS_NN_setng] = 2; // Set Byte if Not Greater (ZF=1 | SF!=OF)
+ SMPTypeCategory[STARS_NN_setnge] = 2; // Set Byte if Not Greater or Equal (SF!=OF)
+ SMPTypeCategory[STARS_NN_setnl] = 2; // Set Byte if Not Less (SF=OF)
+ SMPTypeCategory[STARS_NN_setnle] = 2; // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
+ SMPTypeCategory[STARS_NN_setno] = 2; // Set Byte if Not Overflow (OF=0)
+ SMPTypeCategory[STARS_NN_setnp] = 2; // Set Byte if Not Parity (PF=0)
+ SMPTypeCategory[STARS_NN_setns] = 2; // Set Byte if Not Sign (SF=0)
+ SMPTypeCategory[STARS_NN_setnz] = 2; // Set Byte if Not Zero (ZF=0)
+ SMPTypeCategory[STARS_NN_seto] = 2; // Set Byte if Overflow (OF=1)
+ SMPTypeCategory[STARS_NN_setp] = 2; // Set Byte if Parity (PF=1)
+ SMPTypeCategory[STARS_NN_setpe] = 2; // Set Byte if Parity Even (PF=1)
+ SMPTypeCategory[STARS_NN_setpo] = 2; // Set Byte if Parity Odd (PF=0)
+ SMPTypeCategory[STARS_NN_sets] = 2; // Set Byte if Sign (SF=1)
+ SMPTypeCategory[STARS_NN_setz] = 2; // Set Byte if Zero (ZF=1)
+ SMPTypeCategory[STARS_NN_sgdt] = 0; // Store Global Descriptor Table Register
+ SMPTypeCategory[STARS_NN_sidt] = 0; // Store Interrupt Descriptor Table Register
+ SMPTypeCategory[STARS_NN_shld] = 2; // Double Precision Shift Left
+ SMPTypeCategory[STARS_NN_shrd] = 2; // Double Precision Shift Right
+ SMPTypeCategory[STARS_NN_sldt] = 6; // Store Local Descriptor Table Register
+ SMPTypeCategory[STARS_NN_smsw] = 2; // Store Machine Status Word
+ SMPTypeCategory[STARS_NN_stc] = 1; // Set Carry Flag
+ SMPTypeCategory[STARS_NN_std] = 1; // Set Direction Flag
+ SMPTypeCategory[STARS_NN_sti] = 1; // Set Interrupt Flag
+ SMPTypeCategory[STARS_NN_stos] = 0; // Store String
+ SMPTypeCategory[STARS_NN_str] = 6; // Store Task Register
+ SMPTypeCategory[STARS_NN_sub] = 5; // Integer Subtraction
+ SMPTypeCategory[STARS_NN_test] = 1; // Logical Compare
+ SMPTypeCategory[STARS_NN_verr] = 1; // Verify a Segment for Reading
+ SMPTypeCategory[STARS_NN_verw] = 1; // Verify a Segment for Writing
+ SMPTypeCategory[STARS_NN_wait] = 1; // Wait until BUSY# Pin is Inactive (HIGH)
+ SMPTypeCategory[STARS_NN_xchg] = 12; // Exchange Register/Memory with Register
+ SMPTypeCategory[STARS_NN_xlat] = 0; // Table Lookup Translation
+ SMPTypeCategory[STARS_NN_xor] = 2; // Logical Exclusive OR
+
+ //
+ // 486 instructions
+ //
+
+ SMPTypeCategory[STARS_NN_cmpxchg] = 12; // Compare and Exchange
+ SMPTypeCategory[STARS_NN_bswap] = 1; // Swap bytes in register
+ SMPTypeCategory[STARS_NN_xadd] = 12; // t<-dest; dest<-src+dest; src<-t
+ SMPTypeCategory[STARS_NN_invd] = 1; // Invalidate Data Cache
+ SMPTypeCategory[STARS_NN_wbinvd] = 1; // Invalidate Data Cache (write changes)
+ SMPTypeCategory[STARS_NN_invlpg] = 1; // Invalidate TLB entry
+
+ //
+ // Pentium instructions
+ //
+
+ SMPTypeCategory[STARS_NN_rdmsr] = 8; // Read Machine Status Register
+ SMPTypeCategory[STARS_NN_wrmsr] = 1; // Write Machine Status Register
+ SMPTypeCategory[STARS_NN_cpuid] = 8; // Get CPU ID
+ SMPTypeCategory[STARS_NN_cmpxchg8b] = 12; // Compare and Exchange Eight Bytes
+ SMPTypeCategory[STARS_NN_rdtsc] = 8; // Read Time Stamp Counter
+ SMPTypeCategory[STARS_NN_rsm] = 1; // Resume from System Management Mode
+
+ //
+ // Pentium Pro instructions
+ //
+
+ SMPTypeCategory[STARS_NN_cmova] = 0; // Move if Above (CF=0 & ZF=0)
+ SMPTypeCategory[STARS_NN_cmovb] = 0; // Move if Below (CF=1)
+ SMPTypeCategory[STARS_NN_cmovbe] = 0; // Move if Below or Equal (CF=1 | ZF=1)
+ SMPTypeCategory[STARS_NN_cmovg] = 0; // Move if Greater (ZF=0 & SF=OF)
+ SMPTypeCategory[STARS_NN_cmovge] = 0; // Move if Greater or Equal (SF=OF)
+ SMPTypeCategory[STARS_NN_cmovl] = 0; // Move if Less (SF!=OF)
+ SMPTypeCategory[STARS_NN_cmovle] = 0; // Move if Less or Equal (ZF=1 | SF!=OF)
+ SMPTypeCategory[STARS_NN_cmovnb] = 0; // Move if Not Below (CF=0)
+ SMPTypeCategory[STARS_NN_cmovno] = 0; // Move if Not Overflow (OF=0)
+ SMPTypeCategory[STARS_NN_cmovnp] = 0; // Move if Not Parity (PF=0)
+ SMPTypeCategory[STARS_NN_cmovns] = 0; // Move if Not Sign (SF=0)
+ SMPTypeCategory[STARS_NN_cmovnz] = 0; // Move if Not Zero (ZF=0)
+ SMPTypeCategory[STARS_NN_cmovo] = 0; // Move if Overflow (OF=1)
+ SMPTypeCategory[STARS_NN_cmovp] = 0; // Move if Parity (PF=1)
+ SMPTypeCategory[STARS_NN_cmovs] = 0; // Move if Sign (SF=1)
+ SMPTypeCategory[STARS_NN_cmovz] = 0; // Move if Zero (ZF=1)
+ SMPTypeCategory[STARS_NN_fcmovb] = 1; // Floating Move if Below
+ SMPTypeCategory[STARS_NN_fcmove] = 1; // Floating Move if Equal
+ SMPTypeCategory[STARS_NN_fcmovbe] = 1; // Floating Move if Below or Equal
+ SMPTypeCategory[STARS_NN_fcmovu] = 1; // Floating Move if Unordered
+ SMPTypeCategory[STARS_NN_fcmovnb] = 1; // Floating Move if Not Below
+ SMPTypeCategory[STARS_NN_fcmovne] = 1; // Floating Move if Not Equal
+ SMPTypeCategory[STARS_NN_fcmovnbe] = 1; // Floating Move if Not Below or Equal
+ SMPTypeCategory[STARS_NN_fcmovnu] = 1; // Floating Move if Not Unordered
+ SMPTypeCategory[STARS_NN_fcomi] = 1; // FP Compare, result in EFLAGS
+ SMPTypeCategory[STARS_NN_fucomi] = 1; // FP Unordered Compare, result in EFLAGS
+ SMPTypeCategory[STARS_NN_fcomip] = 1; // FP Compare, result in EFLAGS, pop stack
+ SMPTypeCategory[STARS_NN_fucomip] = 1; // FP Unordered Compare, result in EFLAGS, pop stack
+ SMPTypeCategory[STARS_NN_rdpmc] = 8; // Read Performance Monitor Counter
+
+ //
+ // FPP instructions
+ //
+
+ SMPTypeCategory[STARS_NN_fld] = 14; // Load Real ** Infer src is 'n'
+ SMPTypeCategory[STARS_NN_fst] = 9; // Store Real
+ SMPTypeCategory[STARS_NN_fstp] = 9; // Store Real and Pop
+ SMPTypeCategory[STARS_NN_fxch] = 1; // Exchange Registers
+ SMPTypeCategory[STARS_NN_fild] = 14; // Load Integer ** Infer src is 'n'
+ SMPTypeCategory[STARS_NN_fist] = 13; // Store Integer
+ SMPTypeCategory[STARS_NN_fistp] = 13; // Store Integer and Pop
+ SMPTypeCategory[STARS_NN_fbld] = 1; // Load BCD
+ SMPTypeCategory[STARS_NN_fbstp] = 13; // Store BCD and Pop
+ SMPTypeCategory[STARS_NN_fadd] = 14; // Add Real
+ SMPTypeCategory[STARS_NN_faddp] = 14; // Add Real and Pop
+ SMPTypeCategory[STARS_NN_fiadd] = 14; // Add Integer
+ SMPTypeCategory[STARS_NN_fsub] = 14; // Subtract Real
+ SMPTypeCategory[STARS_NN_fsubp] = 14; // Subtract Real and Pop
+ SMPTypeCategory[STARS_NN_fisub] = 14; // Subtract Integer
+ SMPTypeCategory[STARS_NN_fsubr] = 14; // Subtract Real Reversed
+ SMPTypeCategory[STARS_NN_fsubrp] = 14; // Subtract Real Reversed and Pop
+ SMPTypeCategory[STARS_NN_fisubr] = 14; // Subtract Integer Reversed
+ SMPTypeCategory[STARS_NN_fmul] = 14; // Multiply Real
+ SMPTypeCategory[STARS_NN_fmulp] = 14; // Multiply Real and Pop
+ SMPTypeCategory[STARS_NN_fimul] = 14; // Multiply Integer
+ SMPTypeCategory[STARS_NN_fdiv] = 14; // Divide Real
+ SMPTypeCategory[STARS_NN_fdivp] = 14; // Divide Real and Pop
+ SMPTypeCategory[STARS_NN_fidiv] = 14; // Divide Integer
+ SMPTypeCategory[STARS_NN_fdivr] = 14; // Divide Real Reversed
+ SMPTypeCategory[STARS_NN_fdivrp] = 14; // Divide Real Reversed and Pop
+ SMPTypeCategory[STARS_NN_fidivr] = 14; // Divide Integer Reversed
+ SMPTypeCategory[STARS_NN_fsqrt] = 1; // Square Root
+ SMPTypeCategory[STARS_NN_fscale] = 1; // Scale: st(0) <- st(0) * 2^st(1)
+ SMPTypeCategory[STARS_NN_fprem] = 1; // Partial Remainder
+ SMPTypeCategory[STARS_NN_frndint] = 1; // Round to Integer
+ SMPTypeCategory[STARS_NN_fxtract] = 1; // Extract exponent and significand
+ SMPTypeCategory[STARS_NN_fabs] = 1; // Absolute value
+ SMPTypeCategory[STARS_NN_fchs] = 1; // Change Sign
+ SMPTypeCategory[STARS_NN_fcom] = 1; // Compare Real
+ SMPTypeCategory[STARS_NN_fcomp] = 1; // Compare Real and Pop
+ SMPTypeCategory[STARS_NN_fcompp] = 1; // Compare Real and Pop Twice
+ SMPTypeCategory[STARS_NN_ficom] = 1; // Compare Integer
+ SMPTypeCategory[STARS_NN_ficomp] = 1; // Compare Integer and Pop
+ SMPTypeCategory[STARS_NN_ftst] = 1; // Test
+ SMPTypeCategory[STARS_NN_fxam] = 1; // Examine
+ SMPTypeCategory[STARS_NN_fptan] = 1; // Partial tangent
+ SMPTypeCategory[STARS_NN_fpatan] = 1; // Partial arctangent
+ SMPTypeCategory[STARS_NN_f2xm1] = 1; // 2^x - 1
+ SMPTypeCategory[STARS_NN_fyl2x] = 1; // Y * lg2(X)
+ SMPTypeCategory[STARS_NN_fyl2xp1] = 1; // Y * lg2(X+1)
+ SMPTypeCategory[STARS_NN_fldz] = 1; // Load +0.0
+ SMPTypeCategory[STARS_NN_fld1] = 1; // Load +1.0
+ SMPTypeCategory[STARS_NN_fldpi] = 1; // Load PI=3.14...
+ SMPTypeCategory[STARS_NN_fldl2t] = 1; // Load lg2(10)
+ SMPTypeCategory[STARS_NN_fldl2e] = 1; // Load lg2(e)
+ SMPTypeCategory[STARS_NN_fldlg2] = 1; // Load lg10(2)
+ SMPTypeCategory[STARS_NN_fldln2] = 1; // Load ln(2)
+ SMPTypeCategory[STARS_NN_finit] = 1; // Initialize Processor
+ SMPTypeCategory[STARS_NN_fninit] = 1; // Initialize Processor (no wait)
+ SMPTypeCategory[STARS_NN_fsetpm] = 1; // Set Protected Mode
+ SMPTypeCategory[STARS_NN_fldcw] = 14; // Load Control Word
+ SMPTypeCategory[STARS_NN_fstcw] = 13; // Store Control Word
+ SMPTypeCategory[STARS_NN_fnstcw] = 13; // Store Control Word (no wait)
+ SMPTypeCategory[STARS_NN_fstsw] = 2; // Store Status Word to memory or AX
+ SMPTypeCategory[STARS_NN_fnstsw] = 2; // Store Status Word (no wait) to memory or AX
+ SMPTypeCategory[STARS_NN_fclex] = 1; // Clear Exceptions
+ SMPTypeCategory[STARS_NN_fnclex] = 1; // Clear Exceptions (no wait)
+ SMPTypeCategory[STARS_NN_fstenv] = 13; // Store Environment
+ SMPTypeCategory[STARS_NN_fnstenv] = 13; // Store Environment (no wait)
+ SMPTypeCategory[STARS_NN_fldenv] = 14; // Load Environment
+ SMPTypeCategory[STARS_NN_fsave] = 13; // Save State
+ SMPTypeCategory[STARS_NN_fnsave] = 13; // Save State (no wait)
+ SMPTypeCategory[STARS_NN_frstor] = 14; // Restore State ** infer src is 'n'
+ SMPTypeCategory[STARS_NN_fincstp] = 1; // Increment Stack Pointer
+ SMPTypeCategory[STARS_NN_fdecstp] = 1; // Decrement Stack Pointer
+ SMPTypeCategory[STARS_NN_ffree] = 1; // Free Register
+ SMPTypeCategory[STARS_NN_fnop] = 1; // No Operation
+ SMPTypeCategory[STARS_NN_feni] = 1; // (8087 only)
+ SMPTypeCategory[STARS_NN_fneni] = 1; // (no wait) (8087 only)
+ SMPTypeCategory[STARS_NN_fdisi] = 1; // (8087 only)
+ SMPTypeCategory[STARS_NN_fndisi] = 1; // (no wait) (8087 only)
+
+ //
+ // 80387 instructions
+ //
+
+ SMPTypeCategory[STARS_NN_fprem1] = 1; // Partial Remainder ( < half )
+ SMPTypeCategory[STARS_NN_fsincos] = 1; // t<-cos(st); st<-sin(st); push t
+ SMPTypeCategory[STARS_NN_fsin] = 1; // Sine
+ SMPTypeCategory[STARS_NN_fcos] = 1; // Cosine
+ SMPTypeCategory[STARS_NN_fucom] = 1; // Compare Unordered Real
+ SMPTypeCategory[STARS_NN_fucomp] = 1; // Compare Unordered Real and Pop
+ SMPTypeCategory[STARS_NN_fucompp] = 1; // Compare Unordered Real and Pop Twice
+
+ //
+ // Instructions added 28.02.96
+ //
+
+ SMPTypeCategory[STARS_NN_setalc] = 2; // Set AL to Carry Flag **
+ SMPTypeCategory[STARS_NN_svdc] = 0; // Save Register and Descriptor
+ SMPTypeCategory[STARS_NN_rsdc] = 0; // Restore Register and Descriptor
+ SMPTypeCategory[STARS_NN_svldt] = 0; // Save LDTR and Descriptor
+ SMPTypeCategory[STARS_NN_rsldt] = 0; // Restore LDTR and Descriptor
+ SMPTypeCategory[STARS_NN_svts] = 1; // Save TR and Descriptor
+ SMPTypeCategory[STARS_NN_rsts] = 1; // Restore TR and Descriptor
+ SMPTypeCategory[STARS_NN_icebp] = 1; // ICE Break Point
+ SMPTypeCategory[STARS_NN_loadall] = 0; // Load the entire CPU state from ES:EDI ???
+
+ //
+ // MMX instructions
+ //
+
+ SMPTypeCategory[STARS_NN_emms] = 1; // Empty MMX state
+ SMPTypeCategory[STARS_NN_movd] = 15; // Move 32 bits
+ SMPTypeCategory[STARS_NN_movq] = 15; // Move 64 bits
+ SMPTypeCategory[STARS_NN_packsswb] = 14; // Pack with Signed Saturation (Word->Byte)
+ SMPTypeCategory[STARS_NN_packssdw] = 14; // Pack with Signed Saturation (Dword->Word)
+ SMPTypeCategory[STARS_NN_packuswb] = 14; // Pack with Unsigned Saturation (Word->Byte)
+ SMPTypeCategory[STARS_NN_paddb] = 14; // Packed Add Byte
+ SMPTypeCategory[STARS_NN_paddw] = 14; // Packed Add Word
+ SMPTypeCategory[STARS_NN_paddd] = 14; // Packed Add Dword
+ SMPTypeCategory[STARS_NN_paddsb] = 14; // Packed Add with Saturation (Byte)
+ SMPTypeCategory[STARS_NN_paddsw] = 14; // Packed Add with Saturation (Word)
+ SMPTypeCategory[STARS_NN_paddusb] = 14; // Packed Add Unsigned with Saturation (Byte)
+ SMPTypeCategory[STARS_NN_paddusw] = 14; // Packed Add Unsigned with Saturation (Word)
+ SMPTypeCategory[STARS_NN_pand] = 14; // Bitwise Logical And
+ SMPTypeCategory[STARS_NN_pandn] = 14; // Bitwise Logical And Not
+ SMPTypeCategory[STARS_NN_pcmpeqb] = 14; // Packed Compare for Equal (Byte)
+ SMPTypeCategory[STARS_NN_pcmpeqw] = 14; // Packed Compare for Equal (Word)
+ SMPTypeCategory[STARS_NN_pcmpeqd] = 14; // Packed Compare for Equal (Dword)
+ SMPTypeCategory[STARS_NN_pcmpgtb] = 14; // Packed Compare for Greater Than (Byte)
+ SMPTypeCategory[STARS_NN_pcmpgtw] = 14; // Packed Compare for Greater Than (Word)
+ SMPTypeCategory[STARS_NN_pcmpgtd] = 14; // Packed Compare for Greater Than (Dword)
+ SMPTypeCategory[STARS_NN_pmaddwd] = 14; // Packed Multiply and Add
+ SMPTypeCategory[STARS_NN_pmulhw] = 14; // Packed Multiply High
+ SMPTypeCategory[STARS_NN_pmullw] = 14; // Packed Multiply Low
+ SMPTypeCategory[STARS_NN_por] = 14; // Bitwise Logical Or
+ SMPTypeCategory[STARS_NN_psllw] = 14; // Packed Shift Left Logical (Word)
+ SMPTypeCategory[STARS_NN_pslld] = 14; // Packed Shift Left Logical (Dword)
+ SMPTypeCategory[STARS_NN_psllq] = 14; // Packed Shift Left Logical (Qword)
+ SMPTypeCategory[STARS_NN_psraw] = 14; // Packed Shift Right Arithmetic (Word)
+ SMPTypeCategory[STARS_NN_psrad] = 14; // Packed Shift Right Arithmetic (Dword)
+ SMPTypeCategory[STARS_NN_psrlw] = 14; // Packed Shift Right Logical (Word)
+ SMPTypeCategory[STARS_NN_psrld] = 14; // Packed Shift Right Logical (Dword)
+ SMPTypeCategory[STARS_NN_psrlq] = 14; // Packed Shift Right Logical (Qword)
+ SMPTypeCategory[STARS_NN_psubb] = 14; // Packed Subtract Byte
+ SMPTypeCategory[STARS_NN_psubw] = 14; // Packed Subtract Word
+ SMPTypeCategory[STARS_NN_psubd] = 14; // Packed Subtract Dword
+ SMPTypeCategory[STARS_NN_psubsb] = 14; // Packed Subtract with Saturation (Byte)
+ SMPTypeCategory[STARS_NN_psubsw] = 14; // Packed Subtract with Saturation (Word)
+ SMPTypeCategory[STARS_NN_psubusb] = 14; // Packed Subtract Unsigned with Saturation (Byte)
+ SMPTypeCategory[STARS_NN_psubusw] = 14; // Packed Subtract Unsigned with Saturation (Word)
+ SMPTypeCategory[STARS_NN_punpckhbw] = 14; // Unpack High Packed Data (Byte->Word)
+ SMPTypeCategory[STARS_NN_punpckhwd] = 14; // Unpack High Packed Data (Word->Dword)
+ SMPTypeCategory[STARS_NN_punpckhdq] = 14; // Unpack High Packed Data (Dword->Qword)
+ SMPTypeCategory[STARS_NN_punpcklbw] = 14; // Unpack Low Packed Data (Byte->Word)
+ SMPTypeCategory[STARS_NN_punpcklwd] = 14; // Unpack Low Packed Data (Word->Dword)
+ SMPTypeCategory[STARS_NN_punpckldq] = 14; // Unpack Low Packed Data (Dword->Qword)
+ SMPTypeCategory[STARS_NN_pxor] = 14; // Bitwise Logical Exclusive Or
+
+ //
+ // Undocumented Deschutes processor instructions
+ //
+
+ SMPTypeCategory[STARS_NN_fxsave] = 1; // Fast save FP context ** to where?
+ SMPTypeCategory[STARS_NN_fxrstor] = 1; // Fast restore FP context ** from where?
+
+ // Pentium II instructions
+
+ SMPTypeCategory[STARS_NN_sysenter] = 1; // Fast Transition to System Call Entry Point
+ SMPTypeCategory[STARS_NN_sysexit] = 1; // Fast Transition from System Call Entry Point
+
+ // 3DNow! instructions
+
+ SMPTypeCategory[STARS_NN_pavgusb] = 14; // Packed 8-bit Unsigned Integer Averaging
+ SMPTypeCategory[STARS_NN_pfadd] = 14; // Packed Floating-Point Addition
+ SMPTypeCategory[STARS_NN_pfsub] = 14; // Packed Floating-Point Subtraction
+ SMPTypeCategory[STARS_NN_pfsubr] = 14; // Packed Floating-Point Reverse Subtraction
+ SMPTypeCategory[STARS_NN_pfacc] = 14; // Packed Floating-Point Accumulate
+ SMPTypeCategory[STARS_NN_pfcmpge] = 14; // Packed Floating-Point Comparison, Greater or Equal
+ SMPTypeCategory[STARS_NN_pfcmpgt] = 14; // Packed Floating-Point Comparison, Greater
+ SMPTypeCategory[STARS_NN_pfcmpeq] = 14; // Packed Floating-Point Comparison, Equal
+ SMPTypeCategory[STARS_NN_pfmin] = 14; // Packed Floating-Point Minimum
+ SMPTypeCategory[STARS_NN_pfmax] = 14; // Packed Floating-Point Maximum
+ SMPTypeCategory[STARS_NN_pi2fd] = 14; // Packed 32-bit Integer to Floating-Point
+ SMPTypeCategory[STARS_NN_pf2id] = 14; // Packed Floating-Point to 32-bit Integer
+ SMPTypeCategory[STARS_NN_pfrcp] = 14; // Packed Floating-Point Reciprocal Approximation
+ SMPTypeCategory[STARS_NN_pfrsqrt] = 14; // Packed Floating-Point Reciprocal Square Root Approximation
+ SMPTypeCategory[STARS_NN_pfmul] = 14; // Packed Floating-Point Multiplication
+ SMPTypeCategory[STARS_NN_pfrcpit1] = 14; // Packed Floating-Point Reciprocal First Iteration Step
+ SMPTypeCategory[STARS_NN_pfrsqit1] = 14; // Packed Floating-Point Reciprocal Square Root First Iteration Step
+ SMPTypeCategory[STARS_NN_pfrcpit2] = 14; // Packed Floating-Point Reciprocal Second Iteration Step
+ SMPTypeCategory[STARS_NN_pmulhrw] = 14; // Packed Floating-Point 16-bit Integer Multiply with rounding
+ SMPTypeCategory[STARS_NN_femms] = 1; // Faster entry/exit of the MMX or floating-point state
+ SMPTypeCategory[STARS_NN_prefetch] = 1; // Prefetch at least a 32-byte line into L1 data cache
+ SMPTypeCategory[STARS_NN_prefetchw] = 1; // Prefetch processor cache line into L1 data cache (mark as modified)
+
+
+ // Pentium III instructions
+
+ SMPTypeCategory[STARS_NN_addps] = 14; // Packed Single-FP Add
+ SMPTypeCategory[STARS_NN_addss] = 14; // Scalar Single-FP Add
+ SMPTypeCategory[STARS_NN_andnps] = 14; // Bitwise Logical And Not for Single-FP
+ SMPTypeCategory[STARS_NN_andps] = 14; // Bitwise Logical And for Single-FP
+ SMPTypeCategory[STARS_NN_cmpps] = 14; // Packed Single-FP Compare
+ SMPTypeCategory[STARS_NN_cmpss] = 14; // Scalar Single-FP Compare
+ SMPTypeCategory[STARS_NN_comiss] = 14; // Scalar Ordered Single-FP Compare and Set EFLAGS
+ SMPTypeCategory[STARS_NN_cvtpi2ps] = 14; // Packed signed INT32 to Packed Single-FP conversion
+ SMPTypeCategory[STARS_NN_cvtps2pi] = 14; // Packed Single-FP to Packed INT32 conversion
+ SMPTypeCategory[STARS_NN_cvtsi2ss] = 14; // Scalar signed INT32 to Single-FP conversion
+ SMPTypeCategory[STARS_NN_cvtss2si] = 14; // Scalar Single-FP to signed INT32 conversion
+ SMPTypeCategory[STARS_NN_cvttps2pi] = 14; // Packed Single-FP to Packed INT32 conversion (truncate)
+ SMPTypeCategory[STARS_NN_cvttss2si] = 14; // Scalar Single-FP to signed INT32 conversion (truncate)
+ SMPTypeCategory[STARS_NN_divps] = 14; // Packed Single-FP Divide
+ SMPTypeCategory[STARS_NN_divss] = 14; // Scalar Single-FP Divide
+ SMPTypeCategory[STARS_NN_ldmxcsr] = 14; // Load Streaming SIMD Extensions Technology Control/Status Register
+ SMPTypeCategory[STARS_NN_maxps] = 14; // Packed Single-FP Maximum
+ SMPTypeCategory[STARS_NN_maxss] = 14; // Scalar Single-FP Maximum
+ SMPTypeCategory[STARS_NN_minps] = 14; // Packed Single-FP Minimum
+ SMPTypeCategory[STARS_NN_minss] = 14; // Scalar Single-FP Minimum
+ SMPTypeCategory[STARS_NN_movaps] = 15; // Move Aligned Four Packed Single-FP ** infer memsrc 'n'?
+ SMPTypeCategory[STARS_NN_movhlps] = 15; // Move High to Low Packed Single-FP
+ SMPTypeCategory[STARS_NN_movhps] = 15; // Move High Packed Single-FP
+ SMPTypeCategory[STARS_NN_movlhps] = 15; // Move Low to High Packed Single-FP
+ SMPTypeCategory[STARS_NN_movlps] = 15; // Move Low Packed Single-FP
+ SMPTypeCategory[STARS_NN_movmskps] = 15; // Move Mask to Register
+ SMPTypeCategory[STARS_NN_movss] = 15; // Move Scalar Single-FP
+ SMPTypeCategory[STARS_NN_movups] = 15; // Move Unaligned Four Packed Single-FP
+ SMPTypeCategory[STARS_NN_mulps] = 14; // Packed Single-FP Multiply
+ SMPTypeCategory[STARS_NN_mulss] = 14; // Scalar Single-FP Multiply
+ SMPTypeCategory[STARS_NN_orps] = 14; // Bitwise Logical OR for Single-FP Data
+ SMPTypeCategory[STARS_NN_rcpps] = 14; // Packed Single-FP Reciprocal
+ SMPTypeCategory[STARS_NN_rcpss] = 14; // Scalar Single-FP Reciprocal
+ SMPTypeCategory[STARS_NN_rsqrtps] = 14; // Packed Single-FP Square Root Reciprocal
+ SMPTypeCategory[STARS_NN_rsqrtss] = 14; // Scalar Single-FP Square Root Reciprocal
+ SMPTypeCategory[STARS_NN_shufps] = 14; // Shuffle Single-FP
+ SMPTypeCategory[STARS_NN_sqrtps] = 14; // Packed Single-FP Square Root
+ SMPTypeCategory[STARS_NN_sqrtss] = 14; // Scalar Single-FP Square Root
+ SMPTypeCategory[STARS_NN_stmxcsr] = 15; // Store Streaming SIMD Extensions Technology Control/Status Register ** Infer dest is 'n'
+ SMPTypeCategory[STARS_NN_subps] = 14; // Packed Single-FP Subtract
+ SMPTypeCategory[STARS_NN_subss] = 14; // Scalar Single-FP Subtract
+ SMPTypeCategory[STARS_NN_ucomiss] = 14; // Scalar Unordered Single-FP Compare and Set EFLAGS
+ SMPTypeCategory[STARS_NN_unpckhps] = 14; // Unpack High Packed Single-FP Data
+ SMPTypeCategory[STARS_NN_unpcklps] = 14; // Unpack Low Packed Single-FP Data
+ SMPTypeCategory[STARS_NN_xorps] = 14; // Bitwise Logical XOR for Single-FP Data
+ SMPTypeCategory[STARS_NN_pavgb] = 14; // Packed Average (Byte)
+ SMPTypeCategory[STARS_NN_pavgw] = 14; // Packed Average (Word)
+ SMPTypeCategory[STARS_NN_pextrw] = 15; // Extract Word
+ SMPTypeCategory[STARS_NN_pinsrw] = 14; // Insert Word
+ SMPTypeCategory[STARS_NN_pmaxsw] = 14; // Packed Signed Integer Word Maximum
+ SMPTypeCategory[STARS_NN_pmaxub] = 14; // Packed Unsigned Integer Byte Maximum
+ SMPTypeCategory[STARS_NN_pminsw] = 14; // Packed Signed Integer Word Minimum
+ SMPTypeCategory[STARS_NN_pminub] = 14; // Packed Unsigned Integer Byte Minimum
+ SMPTypeCategory[STARS_NN_pmovmskb] = 2; // Move Byte Mask to Integer
+ SMPTypeCategory[STARS_NN_pmulhuw] = 14; // Packed Multiply High Unsigned
+ SMPTypeCategory[STARS_NN_psadbw] = 14; // Packed Sum of Absolute Differences
+ SMPTypeCategory[STARS_NN_pshufw] = 14; // Packed Shuffle Word
+ SMPTypeCategory[STARS_NN_maskmovq] = 15; // Byte Mask write ** Infer dest is 'n'
+ SMPTypeCategory[STARS_NN_movntps] = 13; // Move Aligned Four Packed Single-FP Non Temporal * infer dest is 'n'
+ SMPTypeCategory[STARS_NN_movntq] = 13; // Move 64 Bits Non Temporal ** Infer dest is 'n'
+ SMPTypeCategory[STARS_NN_prefetcht0] = 1; // Prefetch to all cache levels
+ SMPTypeCategory[STARS_NN_prefetcht1] = 1; // Prefetch to all cache levels
+ SMPTypeCategory[STARS_NN_prefetcht2] = 1; // Prefetch to L2 cache
+ SMPTypeCategory[STARS_NN_prefetchnta] = 1; // Prefetch to L1 cache
+ SMPTypeCategory[STARS_NN_sfence] = 1; // Store Fence
+
+ // Pentium III Pseudo instructions
+
+ SMPTypeCategory[STARS_NN_cmpeqps] = 14; // Packed Single-FP Compare EQ
+ SMPTypeCategory[STARS_NN_cmpltps] = 14; // Packed Single-FP Compare LT
+ SMPTypeCategory[STARS_NN_cmpleps] = 14; // Packed Single-FP Compare LE
+ SMPTypeCategory[STARS_NN_cmpunordps] = 14; // Packed Single-FP Compare UNORD
+ SMPTypeCategory[STARS_NN_cmpneqps] = 14; // Packed Single-FP Compare NOT EQ
+ SMPTypeCategory[STARS_NN_cmpnltps] = 14; // Packed Single-FP Compare NOT LT
+ SMPTypeCategory[STARS_NN_cmpnleps] = 14; // Packed Single-FP Compare NOT LE
+ SMPTypeCategory[STARS_NN_cmpordps] = 14; // Packed Single-FP Compare ORDERED
+ SMPTypeCategory[STARS_NN_cmpeqss] = 14; // Scalar Single-FP Compare EQ
+ SMPTypeCategory[STARS_NN_cmpltss] = 14; // Scalar Single-FP Compare LT
+ SMPTypeCategory[STARS_NN_cmpless] = 14; // Scalar Single-FP Compare LE
+ SMPTypeCategory[STARS_NN_cmpunordss] = 14; // Scalar Single-FP Compare UNORD
+ SMPTypeCategory[STARS_NN_cmpneqss] = 14; // Scalar Single-FP Compare NOT EQ
+ SMPTypeCategory[STARS_NN_cmpnltss] = 14; // Scalar Single-FP Compare NOT LT
+ SMPTypeCategory[STARS_NN_cmpnless] = 14; // Scalar Single-FP Compare NOT LE
+ SMPTypeCategory[STARS_NN_cmpordss] = 14; // Scalar Single-FP Compare ORDERED
+
+ // AMD K7 instructions
+
+ // Revisit AMD if we port to it.
+ SMPTypeCategory[STARS_NN_pf2iw] = 15; // Packed Floating-Point to Integer with Sign Extend
+ SMPTypeCategory[STARS_NN_pfnacc] = 15; // Packed Floating-Point Negative Accumulate
+ SMPTypeCategory[STARS_NN_pfpnacc] = 15; // Packed Floating-Point Mixed Positive-Negative Accumulate
+ SMPTypeCategory[STARS_NN_pi2fw] = 15; // Packed 16-bit Integer to Floating-Point
+ SMPTypeCategory[STARS_NN_pswapd] = 15; // Packed Swap Double Word
+
+ // Undocumented FP instructions (thanks to norbert.juffa@adm.com)
+
+ SMPTypeCategory[STARS_NN_fstp1] = 9; // Alias of Store Real and Pop
+ SMPTypeCategory[STARS_NN_fcom2] = 1; // Alias of Compare Real
+ SMPTypeCategory[STARS_NN_fcomp3] = 1; // Alias of Compare Real and Pop
+ SMPTypeCategory[STARS_NN_fxch4] = 1; // Alias of Exchange Registers
+ SMPTypeCategory[STARS_NN_fcomp5] = 1; // Alias of Compare Real and Pop
+ SMPTypeCategory[STARS_NN_ffreep] = 1; // Free Register and Pop
+ SMPTypeCategory[STARS_NN_fxch7] = 1; // Alias of Exchange Registers
+ SMPTypeCategory[STARS_NN_fstp8] = 9; // Alias of Store Real and Pop
+ SMPTypeCategory[STARS_NN_fstp9] = 9; // Alias of Store Real and Pop
+
+ // Pentium 4 instructions
+
+ SMPTypeCategory[STARS_NN_addpd] = 14; // Add Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_addsd] = 14; // Add Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_andnpd] = 14; // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_andpd] = 14; // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_clflush] = 1; // Flush Cache Line
+ SMPTypeCategory[STARS_NN_cmppd] = 14; // Compare Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_cmpsd] = 14; // Compare Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_comisd] = 14; // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ SMPTypeCategory[STARS_NN_cvtdq2pd] = 14; // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_cvtdq2ps] = 14; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_cvtpd2dq] = 14; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPTypeCategory[STARS_NN_cvtpd2pi] = 14; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPTypeCategory[STARS_NN_cvtpd2ps] = 14; // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_cvtpi2pd] = 14; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_cvtps2dq] = 14; // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPTypeCategory[STARS_NN_cvtps2pd] = 14; // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_cvtsd2si] = 14; // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ SMPTypeCategory[STARS_NN_cvtsd2ss] = 14; // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
+ SMPTypeCategory[STARS_NN_cvtsi2sd] = 14; // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
+ SMPTypeCategory[STARS_NN_cvtss2sd] = 14; // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
+ SMPTypeCategory[STARS_NN_cvttpd2dq] = 14; // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPTypeCategory[STARS_NN_cvttpd2pi] = 14; // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPTypeCategory[STARS_NN_cvttps2dq] = 14; // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPTypeCategory[STARS_NN_cvttsd2si] = 14; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ SMPTypeCategory[STARS_NN_divpd] = 14; // Divide Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_divsd] = 14; // Divide Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_lfence] = 1; // Load Fence
+ SMPTypeCategory[STARS_NN_maskmovdqu] = 13; // Store Selected Bytes of Double Quadword ** Infer dest is 'n'
+ SMPTypeCategory[STARS_NN_maxpd] = 14; // Return Maximum Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_maxsd] = 14; // Return Maximum Scalar Double-Precision Floating-Point Value
+ SMPTypeCategory[STARS_NN_mfence] = 1; // Memory Fence
+ SMPTypeCategory[STARS_NN_minpd] = 14; // Return Minimum Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_minsd] = 14; // Return Minimum Scalar Double-Precision Floating-Point Value
+ SMPTypeCategory[STARS_NN_movapd] = 15; // Move Aligned Packed Double-Precision Floating-Point Values ** Infer dest is 'n'
+ SMPTypeCategory[STARS_NN_movdq2q] = 15; // Move Quadword from XMM to MMX Register
+ SMPTypeCategory[STARS_NN_movdqa] = 15; // Move Aligned Double Quadword ** Infer dest is 'n'
+ SMPTypeCategory[STARS_NN_movdqu] = 15; // Move Unaligned Double Quadword ** Infer dest is 'n'
+ SMPTypeCategory[STARS_NN_movhpd] = 15; // Move High Packed Double-Precision Floating-Point Values ** Infer dest is 'n'
+ SMPTypeCategory[STARS_NN_movlpd] = 15; // Move Low Packed Double-Precision Floating-Point Values ** Infer dest is 'n'
+ SMPTypeCategory[STARS_NN_movmskpd] = 15; // Extract Packed Double-Precision Floating-Point Sign Mask
+ SMPTypeCategory[STARS_NN_movntdq] = 13; // Store Double Quadword Using Non-Temporal Hint
+ SMPTypeCategory[STARS_NN_movnti] = 13; // Store Doubleword Using Non-Temporal Hint
+ SMPTypeCategory[STARS_NN_movntpd] = 13; // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
+ SMPTypeCategory[STARS_NN_movq2dq] = 1; // Move Quadword from MMX to XMM Register
+ SMPTypeCategory[STARS_NN_movsd] = 15; // Move Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_movupd] = 15; // Move Unaligned Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_mulpd] = 14; // Multiply Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_mulsd] = 14; // Multiply Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_orpd] = 14; // Bitwise Logical OR of Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_paddq] = 14; // Add Packed Quadword Integers
+ SMPTypeCategory[STARS_NN_pause] = 1; // Spin Loop Hint
+ SMPTypeCategory[STARS_NN_pmuludq] = 14; // Multiply Packed Unsigned Doubleword Integers
+ SMPTypeCategory[STARS_NN_pshufd] = 14; // Shuffle Packed Doublewords
+ SMPTypeCategory[STARS_NN_pshufhw] = 14; // Shuffle Packed High Words
+ SMPTypeCategory[STARS_NN_pshuflw] = 14; // Shuffle Packed Low Words
+ SMPTypeCategory[STARS_NN_pslldq] = 14; // Shift Double Quadword Left Logical
+ SMPTypeCategory[STARS_NN_psrldq] = 14; // Shift Double Quadword Right Logical
+ SMPTypeCategory[STARS_NN_psubq] = 14; // Subtract Packed Quadword Integers
+ SMPTypeCategory[STARS_NN_punpckhqdq] = 14; // Unpack High Data
+ SMPTypeCategory[STARS_NN_punpcklqdq] = 14; // Unpack Low Data
+ SMPTypeCategory[STARS_NN_shufpd] = 14; // Shuffle Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_sqrtpd] = 1; // Compute Square Roots of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_sqrtsd] = 14; // Compute Square Rootof Scalar Double-Precision Floating-Point Value
+ SMPTypeCategory[STARS_NN_subpd] = 14; // Subtract Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_subsd] = 14; // Subtract Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_ucomisd] = 14; // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ SMPTypeCategory[STARS_NN_unpckhpd] = 14; // Unpack and Interleave High Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_unpcklpd] = 14; // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_xorpd] = 14; // Bitwise Logical OR of Double-Precision Floating-Point Values
+
+
+ // AMD syscall/sysret instructions NOTE: not AMD, found in Intel manual
+
+ SMPTypeCategory[STARS_NN_syscall] = 1; // Low latency system call
+ SMPTypeCategory[STARS_NN_sysret] = 1; // Return from system call
+
+ // AMD64 instructions NOTE: not AMD, found in Intel manual
+
+ SMPTypeCategory[STARS_NN_swapgs] = 1; // Exchange GS base with KernelGSBase MSR
+
+ // New Pentium instructions (SSE3)
+
+ SMPTypeCategory[STARS_NN_movddup] = 14; // Move One Double-FP and Duplicate
+ SMPTypeCategory[STARS_NN_movshdup] = 14; // Move Packed Single-FP High and Duplicate
+ SMPTypeCategory[STARS_NN_movsldup] = 14; // Move Packed Single-FP Low and Duplicate
+
+ // Missing AMD64 instructions NOTE: also found in Intel manual
+
+ SMPTypeCategory[STARS_NN_movsxd] = 2; // Move with Sign-Extend Doubleword
+ SMPTypeCategory[STARS_NN_cmpxchg16b] = 0; // Compare and Exchange 16 Bytes
+
+ // SSE3 instructions
+
+ SMPTypeCategory[STARS_NN_addsubpd] = 14; // Add /Sub packed DP FP numbers
+ SMPTypeCategory[STARS_NN_addsubps] = 14; // Add /Sub packed SP FP numbers
+ SMPTypeCategory[STARS_NN_haddpd] = 14; // Add horizontally packed DP FP numbers
+ SMPTypeCategory[STARS_NN_haddps] = 14; // Add horizontally packed SP FP numbers
+ SMPTypeCategory[STARS_NN_hsubpd] = 14; // Sub horizontally packed DP FP numbers
+ SMPTypeCategory[STARS_NN_hsubps] = 14; // Sub horizontally packed SP FP numbers
+ SMPTypeCategory[STARS_NN_monitor] = 1; // Set up a linear address range to be monitored by hardware
+ SMPTypeCategory[STARS_NN_mwait] = 1; // Wait until write-back store performed within the range specified by the MONITOR instruction
+ SMPTypeCategory[STARS_NN_fisttp] = 13; // Store ST in intXX (chop) and pop
+ SMPTypeCategory[STARS_NN_lddqu] = 14; // Load unaligned integer 128-bit
+
+ // SSSE3 instructions
+
+ SMPTypeCategory[STARS_NN_psignb] = 14; // Packed SIGN Byte
+ SMPTypeCategory[STARS_NN_psignw] = 14; // Packed SIGN Word
+ SMPTypeCategory[STARS_NN_psignd] = 14; // Packed SIGN Doubleword
+ SMPTypeCategory[STARS_NN_pshufb] = 14; // Packed Shuffle Bytes
+ SMPTypeCategory[STARS_NN_pmulhrsw] = 14; // Packed Multiply High with Round and Scale
+ SMPTypeCategory[STARS_NN_pmaddubsw] = 14; // Multiply and Add Packed Signed and Unsigned Bytes
+ SMPTypeCategory[STARS_NN_phsubsw] = 14; // Packed Horizontal Subtract and Saturate
+ SMPTypeCategory[STARS_NN_phaddsw] = 14; // Packed Horizontal Add and Saturate
+ SMPTypeCategory[STARS_NN_phaddw] = 14; // Packed Horizontal Add Word
+ SMPTypeCategory[STARS_NN_phaddd] = 14; // Packed Horizontal Add Doubleword
+ SMPTypeCategory[STARS_NN_phsubw] = 14; // Packed Horizontal Subtract Word
+ SMPTypeCategory[STARS_NN_phsubd] = 14; // Packed Horizontal Subtract Doubleword
+ SMPTypeCategory[STARS_NN_palignr] = 15; // Packed Align Right
+ SMPTypeCategory[STARS_NN_pabsb] = 14; // Packed Absolute Value Byte
+ SMPTypeCategory[STARS_NN_pabsw] = 14; // Packed Absolute Value Word
+ SMPTypeCategory[STARS_NN_pabsd] = 14; // Packed Absolute Value Doubleword
+
+ // VMX instructions
+
+ SMPTypeCategory[STARS_NN_vmcall] = 1; // Call to VM Monitor
+ SMPTypeCategory[STARS_NN_vmclear] = 0; // Clear Virtual Machine Control Structure
+ SMPTypeCategory[STARS_NN_vmlaunch] = 1; // Launch Virtual Machine
+ SMPTypeCategory[STARS_NN_vmresume] = 1; // Resume Virtual Machine
+ SMPTypeCategory[STARS_NN_vmptrld] = 6; // Load Pointer to Virtual Machine Control Structure
+ SMPTypeCategory[STARS_NN_vmptrst] = 0; // Store Pointer to Virtual Machine Control Structure
+ SMPTypeCategory[STARS_NN_vmread] = 0; // Read Field from Virtual Machine Control Structure
+ SMPTypeCategory[STARS_NN_vmwrite] = 0; // Write Field from Virtual Machine Control Structure
+ SMPTypeCategory[STARS_NN_vmxoff] = 1; // Leave VMX Operation
+ SMPTypeCategory[STARS_NN_vmxon] = 1; // Enter VMX Operation
+
+#if 599 < IDA_SDK_VERSION
+
+ SMPTypeCategory[STARS_NN_ud2] = 1; // Undefined Instruction
+
+ // Added with x86-64
+
+ SMPTypeCategory[STARS_NN_rdtscp] = 8; // Read Time-Stamp Counter and Processor ID
+
+ // Geode LX 3DNow! extensions
+
+ SMPTypeCategory[STARS_NN_pfrcpv] = 1; // Reciprocal Approximation for a Pair of 32-bit Floats
+ SMPTypeCategory[STARS_NN_pfrsqrtv] = 1; // Reciprocal Square Root Approximation for a Pair of 32-bit Floats
+
+ // SSE2 pseudoinstructions
+
+ SMPTypeCategory[STARS_NN_cmpeqpd] = 1; // Packed Double-FP Compare EQ
+ SMPTypeCategory[STARS_NN_cmpltpd] = 1; // Packed Double-FP Compare LT
+ SMPTypeCategory[STARS_NN_cmplepd] = 1; // Packed Double-FP Compare LE
+ SMPTypeCategory[STARS_NN_cmpunordpd] = 1; // Packed Double-FP Compare UNORD
+ SMPTypeCategory[STARS_NN_cmpneqpd] = 1; // Packed Double-FP Compare NOT EQ
+ SMPTypeCategory[STARS_NN_cmpnltpd] = 1; // Packed Double-FP Compare NOT LT
+ SMPTypeCategory[STARS_NN_cmpnlepd] = 1; // Packed Double-FP Compare NOT LE
+ SMPTypeCategory[STARS_NN_cmpordpd] = 1; // Packed Double-FP Compare ORDERED
+ SMPTypeCategory[STARS_NN_cmpeqsd] = 1; // Scalar Double-FP Compare EQ
+ SMPTypeCategory[STARS_NN_cmpltsd] = 1; // Scalar Double-FP Compare LT
+ SMPTypeCategory[STARS_NN_cmplesd] = 1; // Scalar Double-FP Compare LE
+ SMPTypeCategory[STARS_NN_cmpunordsd] = 1; // Scalar Double-FP Compare UNORD
+ SMPTypeCategory[STARS_NN_cmpneqsd] = 1; // Scalar Double-FP Compare NOT EQ
+ SMPTypeCategory[STARS_NN_cmpnltsd] = 1; // Scalar Double-FP Compare NOT LT
+ SMPTypeCategory[STARS_NN_cmpnlesd] = 1; // Scalar Double-FP Compare NOT LE
+ SMPTypeCategory[STARS_NN_cmpordsd] = 1; // Scalar Double-FP Compare ORDERED
+
+ // SSSE4.1 instructions
+
+ SMPTypeCategory[STARS_NN_blendpd] = 14; // Blend Packed Double Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_blendps] = 14; // Blend Packed Single Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_blendvpd] = 14; // Variable Blend Packed Double Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_blendvps] = 14; // Variable Blend Packed Single Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_dppd] = 14; // Dot Product of Packed Double Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_dpps] = 14; // Dot Product of Packed Single Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_extractps] = 15; // Extract Packed Single Precision Floating-Point Value
+ SMPTypeCategory[STARS_NN_insertps] = 14; // Insert Packed Single Precision Floating-Point Value
+ SMPTypeCategory[STARS_NN_movntdqa] = 0; // Load Double Quadword Non-Temporal Aligned Hint
+ SMPTypeCategory[STARS_NN_mpsadbw] = 1; // Compute Multiple Packed Sums of Absolute Difference
+ SMPTypeCategory[STARS_NN_packusdw] = 14; // Pack with Unsigned Saturation
+ SMPTypeCategory[STARS_NN_pblendvb] = 14; // Variable Blend Packed Bytes
+ SMPTypeCategory[STARS_NN_pblendw] = 14; // Blend Packed Words
+ SMPTypeCategory[STARS_NN_pcmpeqq] = 14; // Compare Packed Qword Data for Equal
+ SMPTypeCategory[STARS_NN_pextrb] = 15; // Extract Byte
+ SMPTypeCategory[STARS_NN_pextrd] = 15; // Extract Dword
+ SMPTypeCategory[STARS_NN_pextrq] = 15; // Extract Qword
+ SMPTypeCategory[STARS_NN_phminposuw] = 14; // Packed Horizontal Word Minimum
+ SMPTypeCategory[STARS_NN_pinsrb] = 14; // Insert Byte !!! Could this be used as a generic move???
+ SMPTypeCategory[STARS_NN_pinsrd] = 14; // Insert Dword !!! Could this be used as a generic move???
+ SMPTypeCategory[STARS_NN_pinsrq] = 14; // Insert Qword !!! Could this be used as a generic move???
+ SMPTypeCategory[STARS_NN_pmaxsb] = 14; // Maximum of Packed Signed Byte Integers
+ SMPTypeCategory[STARS_NN_pmaxsd] = 14; // Maximum of Packed Signed Dword Integers
+ SMPTypeCategory[STARS_NN_pmaxud] = 14; // Maximum of Packed Unsigned Dword Integers
+ SMPTypeCategory[STARS_NN_pmaxuw] = 14; // Maximum of Packed Word Integers
+ SMPTypeCategory[STARS_NN_pminsb] = 14; // Minimum of Packed Signed Byte Integers
+ SMPTypeCategory[STARS_NN_pminsd] = 14; // Minimum of Packed Signed Dword Integers
+ SMPTypeCategory[STARS_NN_pminud] = 14; // Minimum of Packed Unsigned Dword Integers
+ SMPTypeCategory[STARS_NN_pminuw] = 14; // Minimum of Packed Word Integers
+ SMPTypeCategory[STARS_NN_pmovsxbw] = 14; // Packed Move with Sign Extend
+ SMPTypeCategory[STARS_NN_pmovsxbd] = 14; // Packed Move with Sign Extend
+ SMPTypeCategory[STARS_NN_pmovsxbq] = 14; // Packed Move with Sign Extend
+ SMPTypeCategory[STARS_NN_pmovsxwd] = 14; // Packed Move with Sign Extend
+ SMPTypeCategory[STARS_NN_pmovsxwq] = 14; // Packed Move with Sign Extend
+ SMPTypeCategory[STARS_NN_pmovsxdq] = 14; // Packed Move with Sign Extend
+ SMPTypeCategory[STARS_NN_pmovzxbw] = 14; // Packed Move with Zero Extend
+ SMPTypeCategory[STARS_NN_pmovzxbd] = 14; // Packed Move with Zero Extend
+ SMPTypeCategory[STARS_NN_pmovzxbq] = 14; // Packed Move with Zero Extend
+ SMPTypeCategory[STARS_NN_pmovzxwd] = 14; // Packed Move with Zero Extend
+ SMPTypeCategory[STARS_NN_pmovzxwq] = 14; // Packed Move with Zero Extend
+ SMPTypeCategory[STARS_NN_pmovzxdq] = 14; // Packed Move with Zero Extend
+ SMPTypeCategory[STARS_NN_pmuldq] = 14; // Multiply Packed Signed Dword Integers
+ SMPTypeCategory[STARS_NN_pmulld] = 14; // Multiply Packed Signed Dword Integers and Store Low Result
+ SMPTypeCategory[STARS_NN_ptest] = 1; // Logical Compare
+ SMPTypeCategory[STARS_NN_roundpd] = 14; // Round Packed Double Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_roundps] = 14; // Round Packed Single Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_roundsd] = 14; // Round Scalar Double Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_roundss] = 14; // Round Scalar Single Precision Floating-Point Values
+
+ // SSSE4.2 instructions
+ SMPTypeCategory[STARS_NN_crc32] = 14; // Accumulate CRC32 Value
+ SMPTypeCategory[STARS_NN_pcmpestri] = 2; // Packed Compare Explicit Length Strings, Return Index
+ SMPTypeCategory[STARS_NN_pcmpestrm] = 2; // Packed Compare Explicit Length Strings, Return Mask
+ SMPTypeCategory[STARS_NN_pcmpistri] = 2; // Packed Compare Implicit Length Strings, Return Index
+ SMPTypeCategory[STARS_NN_pcmpistrm] = 2; // Packed Compare Implicit Length Strings, Return Mask
+ SMPTypeCategory[STARS_NN_pcmpgtq] = 14; // Compare Packed Data for Greater Than
+ SMPTypeCategory[STARS_NN_popcnt] = 2; // Return the Count of Number of Bits Set to 1
+
+ // AMD SSE4a instructions
+
+ SMPTypeCategory[STARS_NN_extrq] = 1; // Extract Field From Register
+ SMPTypeCategory[STARS_NN_insertq] = 1; // Insert Field
+ SMPTypeCategory[STARS_NN_movntsd] = 13; // Move Non-Temporal Scalar Double-Precision Floating-Point !!! Could this be used as a generic move???
+ SMPTypeCategory[STARS_NN_movntss] = 13; // Move Non-Temporal Scalar Single-Precision Floating-Point !!! Could this be used as a generic move???
+ SMPTypeCategory[STARS_NN_lzcnt] = 2; // Leading Zero Count
+
+ // xsave/xrstor instructions
+
+ SMPTypeCategory[STARS_NN_xgetbv] = 8; // Get Value of Extended Control Register
+ SMPTypeCategory[STARS_NN_xrstor] = 0; // Restore Processor Extended States
+ SMPTypeCategory[STARS_NN_xsave] = 1; // Save Processor Extended States
+ SMPTypeCategory[STARS_NN_xsetbv] = 1; // Set Value of Extended Control Register
+
+ // Intel Safer Mode Extensions (SMX)
+
+ SMPTypeCategory[STARS_NN_getsec] = 1; // Safer Mode Extensions (SMX) Instruction
+
+ // AMD-V Virtualization ISA Extension
+
+ SMPTypeCategory[STARS_NN_clgi] = 0; // Clear Global Interrupt Flag
+ SMPTypeCategory[STARS_NN_invlpga] = 1; // Invalidate TLB Entry in a Specified ASID
+ SMPTypeCategory[STARS_NN_skinit] = 1; // Secure Init and Jump with Attestation
+ SMPTypeCategory[STARS_NN_stgi] = 0; // Set Global Interrupt Flag
+ SMPTypeCategory[STARS_NN_vmexit] = 1; // Stop Executing Guest, Begin Executing Host
+ SMPTypeCategory[STARS_NN_vmload] = 0; // Load State from VMCB
+ SMPTypeCategory[STARS_NN_vmmcall] = 1; // Call VMM
+ SMPTypeCategory[STARS_NN_vmrun] = 1; // Run Virtual Machine
+ SMPTypeCategory[STARS_NN_vmsave] = 0; // Save State to VMCB
+
+ // VMX+ instructions
+
+ SMPTypeCategory[STARS_NN_invept] = 1; // Invalidate Translations Derived from EPT
+ SMPTypeCategory[STARS_NN_invvpid] = 1; // Invalidate Translations Based on VPID
+
+ // Intel Atom instructions
+
+ // !!!! continue work here
+ SMPTypeCategory[STARS_NN_movbe] = 3; // Move Data After Swapping Bytes
+
+ // Intel AES instructions
+
+ SMPTypeCategory[STARS_NN_aesenc] = 14; // Perform One Round of an AES Encryption Flow
+ SMPTypeCategory[STARS_NN_aesenclast] = 14; // Perform the Last Round of an AES Encryption Flow
+ SMPTypeCategory[STARS_NN_aesdec] = 14; // Perform One Round of an AES Decryption Flow
+ SMPTypeCategory[STARS_NN_aesdeclast] = 14; // Perform the Last Round of an AES Decryption Flow
+ SMPTypeCategory[STARS_NN_aesimc] = 14; // Perform the AES InvMixColumn Transformation
+ SMPTypeCategory[STARS_NN_aeskeygenassist] = 14; // AES Round Key Generation Assist
+
+ // Carryless multiplication
+
+ SMPTypeCategory[STARS_NN_pclmulqdq] = 14; // Carry-Less Multiplication Quadword
+
+ // Returns modified by operand size prefixes
+
+ SMPTypeCategory[STARS_NN_retnw] = 0; // Return Near from Procedure (use16)
+ SMPTypeCategory[STARS_NN_retnd] = 0; // Return Near from Procedure (use32)
+ SMPTypeCategory[STARS_NN_retnq] = 0; // Return Near from Procedure (use64)
+ SMPTypeCategory[STARS_NN_retfw] = 0; // Return Far from Procedure (use16)
+ SMPTypeCategory[STARS_NN_retfd] = 0; // Return Far from Procedure (use32)
+ SMPTypeCategory[STARS_NN_retfq] = 0; // Return Far from Procedure (use64)
+
+ // RDRAND support
+
+ SMPTypeCategory[STARS_NN_rdrand] = 2; // Read Random Number
+
+ // new GPR instructions
+
+ SMPTypeCategory[STARS_NN_adcx] = 5; // Unsigned Integer Addition of Two Operands with Carry Flag
+ SMPTypeCategory[STARS_NN_adox] = 5; // Unsigned Integer Addition of Two Operands with Overflow Flag
+ SMPTypeCategory[STARS_NN_andn] = 10; // Logical AND NOT
+ SMPTypeCategory[STARS_NN_bextr] = 14; // Bit Field Extract
+ SMPTypeCategory[STARS_NN_blsi] = 14; // Extract Lowest Set Isolated Bit
+ SMPTypeCategory[STARS_NN_blsmsk] = 2; // Get Mask Up to Lowest Set Bit
+ SMPTypeCategory[STARS_NN_blsr] = 2; // Reset Lowest Set Bit
+ SMPTypeCategory[STARS_NN_bzhi] = 2; // Zero High Bits Starting with Specified Bit Position
+ SMPTypeCategory[STARS_NN_clac] = 1; // Clear AC Flag in EFLAGS Register
+ SMPTypeCategory[STARS_NN_mulx] = 2; // Unsigned Multiply Without Affecting Flags
+ SMPTypeCategory[STARS_NN_pdep] = 2; // Parallel Bits Deposit
+ SMPTypeCategory[STARS_NN_pext] = 2; // Parallel Bits Extract
+ SMPTypeCategory[STARS_NN_rorx] = 2; // Rotate Right Logical Without Affecting Flags
+ SMPTypeCategory[STARS_NN_sarx] = 2; // Shift Arithmetically Right Without Affecting Flags
+ SMPTypeCategory[STARS_NN_shlx] = 2; // Shift Logically Left Without Affecting Flags
+ SMPTypeCategory[STARS_NN_shrx] = 2; // Shift Logically Right Without Affecting Flags
+ SMPTypeCategory[STARS_NN_stac] = 1; // Set AC Flag in EFLAGS Register
+ SMPTypeCategory[STARS_NN_tzcnt] = 2; // Count the Number of Trailing Zero Bits
+ SMPTypeCategory[STARS_NN_xsaveopt] = 1; // Save Processor Extended States Optimized
+ SMPTypeCategory[STARS_NN_invpcid] = 1; // Invalidate Processor Context ID
+ SMPTypeCategory[STARS_NN_rdseed] = 2; // Read Random Seed
+ SMPTypeCategory[STARS_NN_rdfsbase] = 6; // Read FS Segment Base
+ SMPTypeCategory[STARS_NN_rdgsbase] = 6; // Read GS Segment Base
+ SMPTypeCategory[STARS_NN_wrfsbase] = 6; // Write FS Segment Base
+ SMPTypeCategory[STARS_NN_wrgsbase] = 6; // Write GS Segment Base
+
+ // new AVX instructions
+
+ SMPTypeCategory[STARS_NN_vaddpd] = 14; // Add Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vaddps] = 14; // Packed Single-FP Add
+ SMPTypeCategory[STARS_NN_vaddsd] = 14; // Add Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vaddss] = 14; // Scalar Single-FP Add
+ SMPTypeCategory[STARS_NN_vaddsubpd] = 14; // Add /Sub packed DP FP numbers
+ SMPTypeCategory[STARS_NN_vaddsubps] = 14; // Add /Sub packed SP FP numbers
+ SMPTypeCategory[STARS_NN_vaesdec] = 14; // Perform One Round of an AES Decryption Flow
+ SMPTypeCategory[STARS_NN_vaesdeclast] = 14; // Perform the Last Round of an AES Decryption Flow
+ SMPTypeCategory[STARS_NN_vaesenc] = 14; // Perform One Round of an AES Encryption Flow
+ SMPTypeCategory[STARS_NN_vaesenclast] = 14; // Perform the Last Round of an AES Encryption Flow
+ SMPTypeCategory[STARS_NN_vaesimc] = 14; // Perform the AES InvMixColumn Transformation
+ SMPTypeCategory[STARS_NN_vaeskeygenassist] = 14; // AES Round Key Generation Assist
+ SMPTypeCategory[STARS_NN_vandnpd] = 14; // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vandnps] = 14; // Bitwise Logical And Not for Single-FP
+ SMPTypeCategory[STARS_NN_vandpd] = 14; // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vandps] = 14; // Bitwise Logical And for Single-FP
+ SMPTypeCategory[STARS_NN_vblendpd] = 14; // Blend Packed Double Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vblendps] = 14; // Blend Packed Single Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vblendvpd] = 14; // Variable Blend Packed Double Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vblendvps] = 14; // Variable Blend Packed Single Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vbroadcastf128] = 14; // Broadcast 128 Bits of Floating-Point Data
+ SMPTypeCategory[STARS_NN_vbroadcasti128] = 14; // Broadcast 128 Bits of Integer Data
+ SMPTypeCategory[STARS_NN_vbroadcastsd] = 14; // Broadcast Double-Precision Floating-Point Element
+ SMPTypeCategory[STARS_NN_vbroadcastss] = 14; // Broadcast Single-Precision Floating-Point Element
+ SMPTypeCategory[STARS_NN_vcmppd] = 14; // Compare Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vcmpps] = 14; // Packed Single-FP Compare
+ SMPTypeCategory[STARS_NN_vcmpsd] = 14; // Compare Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vcmpss] = 14; // Scalar Single-FP Compare
+ SMPTypeCategory[STARS_NN_vcomisd] = 14; // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ SMPTypeCategory[STARS_NN_vcomiss] = 14; // Scalar Ordered Single-FP Compare and Set EFLAGS
+ SMPTypeCategory[STARS_NN_vcvtdq2pd] = 14; // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vcvtdq2ps] = 14; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vcvtpd2dq] = 14; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPTypeCategory[STARS_NN_vcvtpd2ps] = 14; // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vcvtph2ps] = 14; // Convert 16-bit FP Values to Single-Precision FP Values
+ SMPTypeCategory[STARS_NN_vcvtps2dq] = 14; // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPTypeCategory[STARS_NN_vcvtps2pd] = 14; // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vcvtps2ph] = 14; // Convert Single-Precision FP value to 16-bit FP value
+ SMPTypeCategory[STARS_NN_vcvtsd2si] = 14; // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ SMPTypeCategory[STARS_NN_vcvtsd2ss] = 14; // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
+ SMPTypeCategory[STARS_NN_vcvtsi2sd] = 14; // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
+ SMPTypeCategory[STARS_NN_vcvtsi2ss] = 14; // Scalar signed INT32 to Single-FP conversion
+ SMPTypeCategory[STARS_NN_vcvtss2sd] = 14; // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
+ SMPTypeCategory[STARS_NN_vcvtss2si] = 14; // Scalar Single-FP to signed INT32 conversion
+ SMPTypeCategory[STARS_NN_vcvttpd2dq] = 14; // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPTypeCategory[STARS_NN_vcvttps2dq] = 14; // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
+ SMPTypeCategory[STARS_NN_vcvttsd2si] = 14; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
+ SMPTypeCategory[STARS_NN_vcvttss2si] = 14; // Scalar Single-FP to signed INT32 conversion (truncate)
+ SMPTypeCategory[STARS_NN_vdivpd] = 14; // Divide Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vdivps] = 14; // Packed Single-FP Divide
+ SMPTypeCategory[STARS_NN_vdivsd] = 14; // Divide Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vdivss] = 14; // Scalar Single-FP Divide
+ SMPTypeCategory[STARS_NN_vdppd] = 14; // Dot Product of Packed Double Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vdpps] = 14; // Dot Product of Packed Single Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vextractf128] = 14; // Extract Packed Floating-Point Values
+ SMPTypeCategory[STARS_NN_vextracti128] = 14; // Extract Packed Integer Values
+ SMPTypeCategory[STARS_NN_vextractps] = 14; // Extract Packed Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmadd132pd] = 14; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmadd132ps] = 14; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmadd132sd] = 14; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmadd132ss] = 14; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmadd213pd] = 14; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmadd213ps] = 14; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmadd213sd] = 14; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmadd213ss] = 14; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmadd231pd] = 14; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmadd231ps] = 14; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmadd231sd] = 14; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmadd231ss] = 14; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmaddsub132pd] = 14; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmaddsub132ps] = 14; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmaddsub213pd] = 14; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmaddsub213ps] = 14; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmaddsub231pd] = 14; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmaddsub231ps] = 14; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmsub132pd] = 14; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmsub132ps] = 14; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmsub132sd] = 14; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmsub132ss] = 14; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmsub213pd] = 14; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmsub213ps] = 14; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmsub213sd] = 14; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmsub213ss] = 14; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmsub231pd] = 14; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmsub231ps] = 14; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmsub231sd] = 14; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmsub231ss] = 14; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmsubadd132pd] = 14; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmsubadd132ps] = 14; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmsubadd213pd] = 14; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmsubadd213ps] = 14; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmsubadd231pd] = 14; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfmsubadd231ps] = 14; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmadd132pd] = 14; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmadd132ps] = 14; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmadd132sd] = 14; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmadd132ss] = 14; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmadd213pd] = 14; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmadd213ps] = 14; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmadd213sd] = 14; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmadd213ss] = 14; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmadd231pd] = 14; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmadd231ps] = 14; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmadd231sd] = 14; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmadd231ss] = 14; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmsub132pd] = 14; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmsub132ps] = 14; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmsub132sd] = 14; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmsub132ss] = 14; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmsub213pd] = 14; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmsub213ps] = 14; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmsub213sd] = 14; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmsub213ss] = 14; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmsub231pd] = 14; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmsub231ps] = 14; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmsub231sd] = 14; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vfnmsub231ss] = 14; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vgatherdps] = 14; // Gather Packed SP FP Values Using Signed Dword Indices
+ SMPTypeCategory[STARS_NN_vgatherdpd] = 14; // Gather Packed DP FP Values Using Signed Dword Indices
+ SMPTypeCategory[STARS_NN_vgatherqps] = 14; // Gather Packed SP FP Values Using Signed Qword Indices
+ SMPTypeCategory[STARS_NN_vgatherqpd] = 14; // Gather Packed DP FP Values Using Signed Qword Indices
+ SMPTypeCategory[STARS_NN_vhaddpd] = 14; // Add horizontally packed DP FP numbers
+ SMPTypeCategory[STARS_NN_vhaddps] = 14; // Add horizontally packed SP FP numbers
+ SMPTypeCategory[STARS_NN_vhsubpd] = 14; // Sub horizontally packed DP FP numbers
+ SMPTypeCategory[STARS_NN_vhsubps] = 14; // Sub horizontally packed SP FP numbers
+ SMPTypeCategory[STARS_NN_vinsertf128] = 14; // Insert Packed Floating-Point Values
+ SMPTypeCategory[STARS_NN_vinserti128] = 14; // Insert Packed Integer Values
+ SMPTypeCategory[STARS_NN_vinsertps] = 14; // Insert Packed Single Precision Floating-Point Value
+ SMPTypeCategory[STARS_NN_vlddqu] = 14; // Load Unaligned Packed Integer Values
+ SMPTypeCategory[STARS_NN_vldmxcsr] = 14; // Load Streaming SIMD Extensions Technology Control/Status Register
+ SMPTypeCategory[STARS_NN_vmaskmovdqu] = 15; // Store Selected Bytes of Double Quadword with NT Hint
+ SMPTypeCategory[STARS_NN_vmaskmovpd] = 15; // Conditionally Load Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vmaskmovps] = 15; // Conditionally Load Packed Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vmaxpd] = 14; // Return Maximum Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vmaxps] = 14; // Packed Single-FP Maximum
+ SMPTypeCategory[STARS_NN_vmaxsd] = 14; // Return Maximum Scalar Double-Precision Floating-Point Value
+ SMPTypeCategory[STARS_NN_vmaxss] = 14; // Scalar Single-FP Maximum
+ SMPTypeCategory[STARS_NN_vminpd] = 14; // Return Minimum Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vminps] = 14; // Packed Single-FP Minimum
+ SMPTypeCategory[STARS_NN_vminsd] = 14; // Return Minimum Scalar Double-Precision Floating-Point Value
+ SMPTypeCategory[STARS_NN_vminss] = 14; // Scalar Single-FP Minimum
+ SMPTypeCategory[STARS_NN_vmovapd] = 15; // Move Aligned Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vmovaps] = 15; // Move Aligned Four Packed Single-FP
+ SMPTypeCategory[STARS_NN_vmovd] = 15; // Move 32 bits
+ SMPTypeCategory[STARS_NN_vmovddup] = 15; // Move One Double-FP and Duplicate
+ SMPTypeCategory[STARS_NN_vmovdqa] = 15; // Move Aligned Double Quadword
+ SMPTypeCategory[STARS_NN_vmovdqu] = 15; // Move Unaligned Double Quadword
+ SMPTypeCategory[STARS_NN_vmovhlps] = 15; // Move High to Low Packed Single-FP
+ SMPTypeCategory[STARS_NN_vmovhpd] = 15; // Move High Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vmovhps] = 15; // Move High Packed Single-FP
+ SMPTypeCategory[STARS_NN_vmovlhps] = 15; // Move Low to High Packed Single-FP
+ SMPTypeCategory[STARS_NN_vmovlpd] = 15; // Move Low Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vmovlps] = 15; // Move Low Packed Single-FP
+ SMPTypeCategory[STARS_NN_vmovmskpd] = 15; // Extract Packed Double-Precision Floating-Point Sign Mask
+ SMPTypeCategory[STARS_NN_vmovmskps] = 15; // Move Mask to Register
+ SMPTypeCategory[STARS_NN_vmovntdq] = 15; // Store Double Quadword Using Non-Temporal Hint
+ SMPTypeCategory[STARS_NN_vmovntdqa] = 15; // Load Double Quadword Non-Temporal Aligned Hint
+ SMPTypeCategory[STARS_NN_vmovntpd] = 15; // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
+ SMPTypeCategory[STARS_NN_vmovntps] = 15; // Move Aligned Four Packed Single-FP Non Temporal
+ SMPTypeCategory[STARS_NN_vmovntsd] = 15; // Move Non-Temporal Scalar Double-Precision Floating-Point
+ SMPTypeCategory[STARS_NN_vmovntss] = 15; // Move Non-Temporal Scalar Single-Precision Floating-Point
+ SMPTypeCategory[STARS_NN_vmovq] = 15; // Move 64 bits
+ SMPTypeCategory[STARS_NN_vmovsd] = 15; // Move Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vmovshdup] = 15; // Move Packed Single-FP High and Duplicate
+ SMPTypeCategory[STARS_NN_vmovsldup] = 15; // Move Packed Single-FP Low and Duplicate
+ SMPTypeCategory[STARS_NN_vmovss] = 15; // Move Scalar Single-FP
+ SMPTypeCategory[STARS_NN_vmovupd] = 15; // Move Unaligned Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vmovups] = 15; // Move Unaligned Four Packed Single-FP
+ SMPTypeCategory[STARS_NN_vmpsadbw] = 14; // Compute Multiple Packed Sums of Absolute Difference
+ SMPTypeCategory[STARS_NN_vmulpd] = 14; // Multiply Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vmulps] = 14; // Packed Single-FP Multiply
+ SMPTypeCategory[STARS_NN_vmulsd] = 14; // Multiply Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vmulss] = 14; // Scalar Single-FP Multiply
+ SMPTypeCategory[STARS_NN_vorpd] = 14; // Bitwise Logical OR of Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vorps] = 14; // Bitwise Logical OR for Single-FP Data
+ SMPTypeCategory[STARS_NN_vpabsb] = 14; // Packed Absolute Value Byte
+ SMPTypeCategory[STARS_NN_vpabsd] = 14; // Packed Absolute Value Doubleword
+ SMPTypeCategory[STARS_NN_vpabsw] = 14; // Packed Absolute Value Word
+ SMPTypeCategory[STARS_NN_vpackssdw] = 14; // Pack with Signed Saturation (Dword->Word)
+ SMPTypeCategory[STARS_NN_vpacksswb] = 14; // Pack with Signed Saturation (Word->Byte)
+ SMPTypeCategory[STARS_NN_vpackusdw] = 14; // Pack with Unsigned Saturation
+ SMPTypeCategory[STARS_NN_vpackuswb] = 14; // Pack with Unsigned Saturation (Word->Byte)
+ SMPTypeCategory[STARS_NN_vpaddb] = 14; // Packed Add Byte
+ SMPTypeCategory[STARS_NN_vpaddd] = 14; // Packed Add Dword
+ SMPTypeCategory[STARS_NN_vpaddq] = 14; // Add Packed Quadword Integers
+ SMPTypeCategory[STARS_NN_vpaddsb] = 14; // Packed Add with Saturation (Byte)
+ SMPTypeCategory[STARS_NN_vpaddsw] = 14; // Packed Add with Saturation (Word)
+ SMPTypeCategory[STARS_NN_vpaddusb] = 14; // Packed Add Unsigned with Saturation (Byte)
+ SMPTypeCategory[STARS_NN_vpaddusw] = 14; // Packed Add Unsigned with Saturation (Word)
+ SMPTypeCategory[STARS_NN_vpaddw] = 14; // Packed Add Word
+ SMPTypeCategory[STARS_NN_vpalignr] = 14; // Packed Align Right
+ SMPTypeCategory[STARS_NN_vpand] = 14; // Bitwise Logical And
+ SMPTypeCategory[STARS_NN_vpandn] = 14; // Bitwise Logical And Not
+ SMPTypeCategory[STARS_NN_vpavgb] = 14; // Packed Average (Byte)
+ SMPTypeCategory[STARS_NN_vpavgw] = 14; // Packed Average (Word)
+ SMPTypeCategory[STARS_NN_vpblendd] = 14; // Blend Packed Dwords
+ SMPTypeCategory[STARS_NN_vpblendvb] = 14; // Variable Blend Packed Bytes
+ SMPTypeCategory[STARS_NN_vpblendw] = 14; // Blend Packed Words
+ SMPTypeCategory[STARS_NN_vpbroadcastb] = 14; // Broadcast a Byte Integer
+ SMPTypeCategory[STARS_NN_vpbroadcastd] = 14; // Broadcast a Dword Integer
+ SMPTypeCategory[STARS_NN_vpbroadcastq] = 14; // Broadcast a Qword Integer
+ SMPTypeCategory[STARS_NN_vpbroadcastw] = 14; // Broadcast a Word Integer
+ SMPTypeCategory[STARS_NN_vpclmulqdq] = 14; // Carry-Less Multiplication Quadword
+ SMPTypeCategory[STARS_NN_vpcmpeqb] = 14; // Packed Compare for Equal (Byte)
+ SMPTypeCategory[STARS_NN_vpcmpeqd] = 14; // Packed Compare for Equal (Dword)
+ SMPTypeCategory[STARS_NN_vpcmpeqq] = 14; // Compare Packed Qword Data for Equal
+ SMPTypeCategory[STARS_NN_vpcmpeqw] = 14; // Packed Compare for Equal (Word)
+ SMPTypeCategory[STARS_NN_vpcmpestri] = 14; // Packed Compare Explicit Length Strings, Return Index
+ SMPTypeCategory[STARS_NN_vpcmpestrm] = 14; // Packed Compare Explicit Length Strings, Return Mask
+ SMPTypeCategory[STARS_NN_vpcmpgtb] = 14; // Packed Compare for Greater Than (Byte)
+ SMPTypeCategory[STARS_NN_vpcmpgtd] = 14; // Packed Compare for Greater Than (Dword)
+ SMPTypeCategory[STARS_NN_vpcmpgtq] = 14; // Compare Packed Data for Greater Than
+ SMPTypeCategory[STARS_NN_vpcmpgtw] = 14; // Packed Compare for Greater Than (Word)
+ SMPTypeCategory[STARS_NN_vpcmpistri] = 14; // Packed Compare Implicit Length Strings, Return Index
+ SMPTypeCategory[STARS_NN_vpcmpistrm] = 14; // Packed Compare Implicit Length Strings, Return Mask
+ SMPTypeCategory[STARS_NN_vperm2f128] = 14; // Permute Floating-Point Values
+ SMPTypeCategory[STARS_NN_vperm2i128] = 14; // Permute Integer Values
+ SMPTypeCategory[STARS_NN_vpermd] = 14; // Full Doublewords Element Permutation
+ SMPTypeCategory[STARS_NN_vpermilpd] = 14; // Permute Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vpermilps] = 14; // Permute Single-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vpermpd] = 14; // Permute Double-Precision Floating-Point Elements
+ SMPTypeCategory[STARS_NN_vpermps] = 14; // Permute Single-Precision Floating-Point Elements
+ SMPTypeCategory[STARS_NN_vpermq] = 14; // Qwords Element Permutation
+ SMPTypeCategory[STARS_NN_vpextrb] = 14; // Extract Byte
+ SMPTypeCategory[STARS_NN_vpextrd] = 14; // Extract Dword
+ SMPTypeCategory[STARS_NN_vpextrq] = 14; // Extract Qword
+ SMPTypeCategory[STARS_NN_vpextrw] = 14; // Extract Word
+ SMPTypeCategory[STARS_NN_vpgatherdd] = 14; // Gather Packed Dword Values Using Signed Dword Indices
+ SMPTypeCategory[STARS_NN_vpgatherdq] = 14; // Gather Packed Qword Values Using Signed Dword Indices
+ SMPTypeCategory[STARS_NN_vpgatherqd] = 14; // Gather Packed Dword Values Using Signed Qword Indices
+ SMPTypeCategory[STARS_NN_vpgatherqq] = 14; // Gather Packed Qword Values Using Signed Qword Indices
+ SMPTypeCategory[STARS_NN_vphaddd] = 14; // Packed Horizontal Add Doubleword
+ SMPTypeCategory[STARS_NN_vphaddsw] = 14; // Packed Horizontal Add and Saturate
+ SMPTypeCategory[STARS_NN_vphaddw] = 14; // Packed Horizontal Add Word
+ SMPTypeCategory[STARS_NN_vphminposuw] = 14; // Packed Horizontal Word Minimum
+ SMPTypeCategory[STARS_NN_vphsubd] = 14; // Packed Horizontal Subtract Doubleword
+ SMPTypeCategory[STARS_NN_vphsubsw] = 14; // Packed Horizontal Subtract and Saturate
+ SMPTypeCategory[STARS_NN_vphsubw] = 14; // Packed Horizontal Subtract Word
+ SMPTypeCategory[STARS_NN_vpinsrb] = 14; // Insert Byte
+ SMPTypeCategory[STARS_NN_vpinsrd] = 14; // Insert Dword
+ SMPTypeCategory[STARS_NN_vpinsrq] = 14; // Insert Qword
+ SMPTypeCategory[STARS_NN_vpinsrw] = 14; // Insert Word
+ SMPTypeCategory[STARS_NN_vpmaddubsw] = 14; // Multiply and Add Packed Signed and Unsigned Bytes
+ SMPTypeCategory[STARS_NN_vpmaddwd] = 14; // Packed Multiply and Add
+ SMPTypeCategory[STARS_NN_vpmaskmovd] = 15; // Conditionally Store Dword Values Using Mask
+ SMPTypeCategory[STARS_NN_vpmaskmovq] = 15; // Conditionally Store Qword Values Using Mask
+ SMPTypeCategory[STARS_NN_vpmaxsb] = 14; // Maximum of Packed Signed Byte Integers
+ SMPTypeCategory[STARS_NN_vpmaxsd] = 14; // Maximum of Packed Signed Dword Integers
+ SMPTypeCategory[STARS_NN_vpmaxsw] = 14; // Packed Signed Integer Word Maximum
+ SMPTypeCategory[STARS_NN_vpmaxub] = 14; // Packed Unsigned Integer Byte Maximum
+ SMPTypeCategory[STARS_NN_vpmaxud] = 14; // Maximum of Packed Unsigned Dword Integers
+ SMPTypeCategory[STARS_NN_vpmaxuw] = 14; // Maximum of Packed Word Integers
+ SMPTypeCategory[STARS_NN_vpminsb] = 14; // Minimum of Packed Signed Byte Integers
+ SMPTypeCategory[STARS_NN_vpminsd] = 14; // Minimum of Packed Signed Dword Integers
+ SMPTypeCategory[STARS_NN_vpminsw] = 14; // Packed Signed Integer Word Minimum
+ SMPTypeCategory[STARS_NN_vpminub] = 14; // Packed Unsigned Integer Byte Minimum
+ SMPTypeCategory[STARS_NN_vpminud] = 14; // Minimum of Packed Unsigned Dword Integers
+ SMPTypeCategory[STARS_NN_vpminuw] = 14; // Minimum of Packed Word Integers
+ SMPTypeCategory[STARS_NN_vpmovmskb] = 15; // Move Byte Mask to Integer
+ SMPTypeCategory[STARS_NN_vpmovsxbd] = 15; // Packed Move with Sign Extend
+ SMPTypeCategory[STARS_NN_vpmovsxbq] = 15; // Packed Move with Sign Extend
+ SMPTypeCategory[STARS_NN_vpmovsxbw] = 15; // Packed Move with Sign Extend
+ SMPTypeCategory[STARS_NN_vpmovsxdq] = 15; // Packed Move with Sign Extend
+ SMPTypeCategory[STARS_NN_vpmovsxwd] = 15; // Packed Move with Sign Extend
+ SMPTypeCategory[STARS_NN_vpmovsxwq] = 15; // Packed Move with Sign Extend
+ SMPTypeCategory[STARS_NN_vpmovzxbd] = 15; // Packed Move with Zero Extend
+ SMPTypeCategory[STARS_NN_vpmovzxbq] = 15; // Packed Move with Zero Extend
+ SMPTypeCategory[STARS_NN_vpmovzxbw] = 15; // Packed Move with Zero Extend
+ SMPTypeCategory[STARS_NN_vpmovzxdq] = 15; // Packed Move with Zero Extend
+ SMPTypeCategory[STARS_NN_vpmovzxwd] = 15; // Packed Move with Zero Extend
+ SMPTypeCategory[STARS_NN_vpmovzxwq] = 15; // Packed Move with Zero Extend
+ SMPTypeCategory[STARS_NN_vpmuldq] = 14; // Multiply Packed Signed Dword Integers
+ SMPTypeCategory[STARS_NN_vpmulhrsw] = 14; // Packed Multiply High with Round and Scale
+ SMPTypeCategory[STARS_NN_vpmulhuw] = 14; // Packed Multiply High Unsigned
+ SMPTypeCategory[STARS_NN_vpmulhw] = 14; // Packed Multiply High
+ SMPTypeCategory[STARS_NN_vpmulld] = 14; // Multiply Packed Signed Dword Integers and Store Low Result
+ SMPTypeCategory[STARS_NN_vpmullw] = 14; // Packed Multiply Low
+ SMPTypeCategory[STARS_NN_vpmuludq] = 14; // Multiply Packed Unsigned Doubleword Integers
+ SMPTypeCategory[STARS_NN_vpor] = 14; // Bitwise Logical Or
+ SMPTypeCategory[STARS_NN_vpsadbw] = 14; // Packed Sum of Absolute Differences
+ SMPTypeCategory[STARS_NN_vpshufb] = 14; // Packed Shuffle Bytes
+ SMPTypeCategory[STARS_NN_vpshufd] = 14; // Shuffle Packed Doublewords
+ SMPTypeCategory[STARS_NN_vpshufhw] = 14; // Shuffle Packed High Words
+ SMPTypeCategory[STARS_NN_vpshuflw] = 14; // Shuffle Packed Low Words
+ SMPTypeCategory[STARS_NN_vpsignb] = 14; // Packed SIGN Byte
+ SMPTypeCategory[STARS_NN_vpsignd] = 14; // Packed SIGN Doubleword
+ SMPTypeCategory[STARS_NN_vpsignw] = 14; // Packed SIGN Word
+ SMPTypeCategory[STARS_NN_vpslld] = 14; // Packed Shift Left Logical (Dword)
+ SMPTypeCategory[STARS_NN_vpslldq] = 14; // Shift Double Quadword Left Logical
+ SMPTypeCategory[STARS_NN_vpsllq] = 14; // Packed Shift Left Logical (Qword)
+ SMPTypeCategory[STARS_NN_vpsllvd] = 14; // Variable Bit Shift Left Logical (Dword)
+ SMPTypeCategory[STARS_NN_vpsllvq] = 14; // Variable Bit Shift Left Logical (Qword)
+ SMPTypeCategory[STARS_NN_vpsllw] = 14; // Packed Shift Left Logical (Word)
+ SMPTypeCategory[STARS_NN_vpsrad] = 14; // Packed Shift Right Arithmetic (Dword)
+ SMPTypeCategory[STARS_NN_vpsravd] = 14; // Variable Bit Shift Right Arithmetic
+ SMPTypeCategory[STARS_NN_vpsraw] = 14; // Packed Shift Right Arithmetic (Word)
+ SMPTypeCategory[STARS_NN_vpsrld] = 14; // Packed Shift Right Logical (Dword)
+ SMPTypeCategory[STARS_NN_vpsrldq] = 14; // Shift Double Quadword Right Logical (Qword)
+ SMPTypeCategory[STARS_NN_vpsrlq] = 14; // Packed Shift Right Logical (Qword)
+ SMPTypeCategory[STARS_NN_vpsrlvd] = 14; // Variable Bit Shift Right Logical (Dword)
+ SMPTypeCategory[STARS_NN_vpsrlvq] = 14; // Variable Bit Shift Right Logical (Qword)
+ SMPTypeCategory[STARS_NN_vpsrlw] = 14; // Packed Shift Right Logical (Word)
+ SMPTypeCategory[STARS_NN_vpsubb] = 14; // Packed Subtract Byte
+ SMPTypeCategory[STARS_NN_vpsubd] = 14; // Packed Subtract Dword
+ SMPTypeCategory[STARS_NN_vpsubq] = 14; // Subtract Packed Quadword Integers
+ SMPTypeCategory[STARS_NN_vpsubsb] = 14; // Packed Subtract with Saturation (Byte)
+ SMPTypeCategory[STARS_NN_vpsubsw] = 14; // Packed Subtract with Saturation (Word)
+ SMPTypeCategory[STARS_NN_vpsubusb] = 14; // Packed Subtract Unsigned with Saturation (Byte)
+ SMPTypeCategory[STARS_NN_vpsubusw] = 14; // Packed Subtract Unsigned with Saturation (Word)
+ SMPTypeCategory[STARS_NN_vpsubw] = 14; // Packed Subtract Word
+ SMPTypeCategory[STARS_NN_vptest] = 14; // Logical Compare
+ SMPTypeCategory[STARS_NN_vpunpckhbw] = 14; // Unpack High Packed Data (Byte->Word)
+ SMPTypeCategory[STARS_NN_vpunpckhdq] = 14; // Unpack High Packed Data (Dword->Qword)
+ SMPTypeCategory[STARS_NN_vpunpckhqdq] = 14; // Unpack High Packed Data (Qword->Xmmword)
+ SMPTypeCategory[STARS_NN_vpunpckhwd] = 14; // Unpack High Packed Data (Word->Dword)
+ SMPTypeCategory[STARS_NN_vpunpcklbw] = 14; // Unpack Low Packed Data (Byte->Word)
+ SMPTypeCategory[STARS_NN_vpunpckldq] = 14; // Unpack Low Packed Data (Dword->Qword)
+ SMPTypeCategory[STARS_NN_vpunpcklqdq] = 14; // Unpack Low Packed Data (Qword->Xmmword)
+ SMPTypeCategory[STARS_NN_vpunpcklwd] = 14; // Unpack Low Packed Data (Word->Dword)
+ SMPTypeCategory[STARS_NN_vpxor] = 14; // Bitwise Logical Exclusive Or
+ SMPTypeCategory[STARS_NN_vrcpps] = 14; // Packed Single-FP Reciprocal
+ SMPTypeCategory[STARS_NN_vrcpss] = 14; // Scalar Single-FP Reciprocal
+ SMPTypeCategory[STARS_NN_vroundpd] = 14; // Round Packed Double Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vroundps] = 14; // Round Packed Single Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vroundsd] = 14; // Round Scalar Double Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vroundss] = 14; // Round Scalar Single Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vrsqrtps] = 14; // Packed Single-FP Square Root Reciprocal
+ SMPTypeCategory[STARS_NN_vrsqrtss] = 14; // Scalar Single-FP Square Root Reciprocal
+ SMPTypeCategory[STARS_NN_vshufpd] = 14; // Shuffle Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vshufps] = 14; // Shuffle Single-FP
+ SMPTypeCategory[STARS_NN_vsqrtpd] = 14; // Compute Square Roots of Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vsqrtps] = 14; // Packed Single-FP Square Root
+ SMPTypeCategory[STARS_NN_vsqrtsd] = 14; // Compute Square Rootof Scalar Double-Precision Floating-Point Value
+ SMPTypeCategory[STARS_NN_vsqrtss] = 14; // Scalar Single-FP Square Root
+ SMPTypeCategory[STARS_NN_vstmxcsr] = 14; // Store Streaming SIMD Extensions Technology Control/Status Register
+ SMPTypeCategory[STARS_NN_vsubpd] = 14; // Subtract Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vsubps] = 14; // Packed Single-FP Subtract
+ SMPTypeCategory[STARS_NN_vsubsd] = 14; // Subtract Scalar Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vsubss] = 14; // Scalar Single-FP Subtract
+ SMPTypeCategory[STARS_NN_vtestpd] = 14; // Packed Double-Precision Floating-Point Bit Test
+ SMPTypeCategory[STARS_NN_vtestps] = 14; // Packed Single-Precision Floating-Point Bit Test
+ SMPTypeCategory[STARS_NN_vucomisd] = 14; // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
+ SMPTypeCategory[STARS_NN_vucomiss] = 14; // Scalar Unordered Single-FP Compare and Set EFLAGS
+ SMPTypeCategory[STARS_NN_vunpckhpd] = 14; // Unpack and Interleave High Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vunpckhps] = 14; // Unpack High Packed Single-FP Data
+ SMPTypeCategory[STARS_NN_vunpcklpd] = 14; // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vunpcklps] = 14; // Unpack Low Packed Single-FP Data
+ SMPTypeCategory[STARS_NN_vxorpd] = 14; // Bitwise Logical OR of Double-Precision Floating-Point Values
+ SMPTypeCategory[STARS_NN_vxorps] = 14; // Bitwise Logical XOR for Single-FP Data
+ SMPTypeCategory[STARS_NN_vzeroall] = 14; // Zero All YMM Registers
+ SMPTypeCategory[STARS_NN_vzeroupper] = 14; // Zero Upper Bits of YMM Registers
+
+ // Transactional Synchronization Extensions
+
+ SMPTypeCategory[STARS_NN_xabort] = 1; // Transaction Abort
+ SMPTypeCategory[STARS_NN_xbegin] = 1; // Transaction Begin
+ SMPTypeCategory[STARS_NN_xend] = 1; // Transaction End
+ SMPTypeCategory[STARS_NN_xtest] = 1; // Test If In Transactional Execution
+
+ // Virtual PC synthetic instructions
+
+ SMPTypeCategory[STARS_NN_vmgetinfo] = 1; // Virtual PC - Get VM Information
+ SMPTypeCategory[STARS_NN_vmsetinfo] = 1; // Virtual PC - Set VM Information
+ SMPTypeCategory[STARS_NN_vmdxdsbl] = 1; // Virtual PC - Disable Direct Execution
+ SMPTypeCategory[STARS_NN_vmdxenbl] = 1; // Virtual PC - Enable Direct Execution
+ SMPTypeCategory[STARS_NN_vmcpuid] = 1; // Virtual PC - Virtualized CPU Information
+ SMPTypeCategory[STARS_NN_vmhlt] = 1; // Virtual PC - Halt
+ SMPTypeCategory[STARS_NN_vmsplaf] = 1; // Virtual PC - Spin Lock Acquisition Failed
+ SMPTypeCategory[STARS_NN_vmpushfd] = 1; // Virtual PC - Push virtualized flags register
+ SMPTypeCategory[STARS_NN_vmpopfd] = 1; // Virtual PC - Pop virtualized flags register
+ SMPTypeCategory[STARS_NN_vmcli] = 1; // Virtual PC - Clear Interrupt Flag
+ SMPTypeCategory[STARS_NN_vmsti] = 1; // Virtual PC - Set Interrupt Flag
+ SMPTypeCategory[STARS_NN_vmiretd] = 1; // Virtual PC - Return From Interrupt
+ SMPTypeCategory[STARS_NN_vmsgdt] = 1; // Virtual PC - Store Global Descriptor Table
+ SMPTypeCategory[STARS_NN_vmsidt] = 1; // Virtual PC - Store Interrupt Descriptor Table
+ SMPTypeCategory[STARS_NN_vmsldt] = 1; // Virtual PC - Store Local Descriptor Table
+ SMPTypeCategory[STARS_NN_vmstr] = 1; // Virtual PC - Store Task Register
+ SMPTypeCategory[STARS_NN_vmsdte] = 1; // Virtual PC - Store to Descriptor Table Entry
+ SMPTypeCategory[STARS_NN_vpcext] = 1; // Virtual PC - ISA extension
+
+#endif // 599 < IDA_SDK_VERSION
+
+ SMPTypeCategory[STARS_NN_last] = 1;
+
+ return;
+
+} // end of STARS_Program_t::InitTypeCategory()
+
+
diff --git a/src/interfaces/idapro/Makefile.in b/src/interfaces/idapro/Makefile.in
index d57b178d..4c02e581 100644
--- a/src/interfaces/idapro/Makefile.in
+++ b/src/interfaces/idapro/Makefile.in
@@ -1,5 +1,5 @@
-OBJS=STARSFunction.o STARSInterface.o STARSIDAInstruction.o STARSIDAOp.o
+OBJS=STARSIDAProgram.o STARSFunction.o STARSInterface.o STARSIDAInstruction.o STARSIDAOp.o
CXX=@CXX@
LD=@LD@
EXTRA_CXXFLAGS=@EXTRA_CXXFLAGS@
diff --git a/src/interfaces/idapro/STARSFunction.cpp b/src/interfaces/idapro/STARSFunction.cpp
index c08914f4..965b5be9 100644
--- a/src/interfaces/idapro/STARSFunction.cpp
+++ b/src/interfaces/idapro/STARSFunction.cpp
@@ -9,7 +9,6 @@
#include "base/SMPBasicBlock.h"
#include "base/SMPFunction.h"
#include "base/SMPProgram.h"
-#include "base/SMPStaticAnalyzer.h"
using namespace std;
@@ -244,7 +243,7 @@ void STARS_IDA_Function_t::BuildFuncIR(SMPFunction *func)
for (bool ok = xrefs.SMP_first_from(addr, XREF_ALL); ok; ok = xrefs.SMP_next_from()) {
if ((xrefs.GetTo() != 0) && (!xrefs.GetIscode())) {
// Found a code target, with its address in xrefs.to
- PrintDataToCodeXref(addr, xrefs.GetTo(), 0);
+ global_STARS_program->PrintDataToCodeXref(addr, xrefs.GetTo(), 0);
}
}
}
@@ -303,7 +302,7 @@ void STARS_IDA_Function_t::BuildFuncIR(SMPFunction *func)
}
}
else { // Data xref
- PrintDataToCodeXref(FromAddr, addr, 0);
+ global_STARS_program->PrintDataToCodeXref(FromAddr, addr, 0);
func->PossibleIndirectCallTarget = true;
// Code xrefs all precede the first data xref, so
// we do not need to process any more xrefs. One
diff --git a/src/interfaces/idapro/STARSIDAInstruction.cpp b/src/interfaces/idapro/STARSIDAInstruction.cpp
index 74f2fa66..4ff01c6b 100644
--- a/src/interfaces/idapro/STARSIDAInstruction.cpp
+++ b/src/interfaces/idapro/STARSIDAInstruction.cpp
@@ -6,7 +6,6 @@
// #include "interfaces/STARSTypes.h"
#include "base/SMPDataFlowAnalysis.h"
-#include "base/SMPStaticAnalyzer.h"
#include "interfaces/SMPDBInterface.h"
#include "interfaces/abstract/all.h"
#include "interfaces/idapro/all.h"
@@ -35,6 +34,32 @@ STARS_InstructionID_t STARS_IDA_Instruction_t::GetTargetInstructionID(void) {
return STARS_InstructionID_t(TargetAddr);
}
+void STARS_IDA_Instruction_t::InitOperand(op_t &InitOp) const {
+#if 0
+ InitOp.n = 0;
+ InitOp.type = o_void;
+ InitOp.offb = 0;
+ InitOp.offo = 0;
+ InitOp.flags = 0;
+ InitOp.set_showed();
+ // NOTE: InitOp.dtyp field is initialized in IDAP_run() to 32 or 64 bits.
+ InitOp.reg = R_none;
+ InitOp.value = 0;
+ InitOp.addr = 0;
+ InitOp.specval = 0;
+ InitOp.specflag1 = 0;
+ InitOp.specflag2 = 0;
+ InitOp.specflag3 = 0;
+ InitOp.specflag4 = 0;
+#else
+ (void) memset(&InitOp, 0, sizeof(op_t));
+ InitOp.dtyp = global_STARS_program->GetSTARS_ISA_dtyp();
+ InitOp.set_showed();
+#endif
+
+ return;
+} // end of STARS_IDA_Instruction_t::InitOperand()
+
// Get instruction info by address from IDA Pro.
bool STARS_IDA_Instruction_t::STARS_GetCmd(void) {
bool success = true;
@@ -75,7 +100,7 @@ bool STARS_IDA_Instruction_t::STARS_GetCmd(void) {
this->STARScmd.Operands.push_back(std::make_shared<STARS_IDA_op_t>(cmd.Operands[i]));
this->STARScmd.Operands[i]->SetSpecFlag4(0);
#ifdef __EA64__
- if (STARS_ISA_Bitwidth == 64) {
+ if (global_STARS_program->GetSTARS_ISA_Bitwidth() == 64) {
// Copy the cmd.rex prefix into the op_t.specflag4 field for each operand
// that has a SIB byte.
this->STARScmd.Operands[i]->SetSpecFlag4(this->STARScmd.rex);
@@ -237,18 +262,22 @@ void STARS_IDA_Instruction_t::RemoveIDAOp1ForIMUL(void) {
}
STARSOpndTypePtr STARS_IDA_Instruction_t::MakeVoidOpnd(void) const {
- return dynamic_pointer_cast<STARS_op_t>(std::make_shared<STARS_IDA_op_t>(InitOp));
+ op_t TempOp;
+ this->InitOperand(TempOp);
+ return dynamic_pointer_cast<STARS_op_t>(std::make_shared<STARS_IDA_op_t>(TempOp));
} // end of STARS_IDA_Instruction_t::MakeVoidOpnd()
STARSOpndTypePtr STARS_IDA_Instruction_t::MakeImmediateOpnd(STARS_uval_t value) const {
- op_t TempOp = InitOp;
+ op_t TempOp;
+ this->InitOperand(TempOp);
TempOp.type = o_imm;
TempOp.value = value;
return dynamic_pointer_cast<STARS_op_t>(std::make_shared<STARS_IDA_op_t>(TempOp));
} // end of STARS_IDA_Instruction_t::MakeVoidOpnd()
STARSOpndTypePtr STARS_IDA_Instruction_t::MakeRegOpnd(uint16_t RegNum) const {
- op_t TempOp = InitOp;
+ op_t TempOp;
+ this->InitOperand(TempOp);
TempOp.type = o_reg;
TempOp.dtyp = GetRegDtyp(RegNum, this->Has64BitOperands());
TempOp.reg = RegNum;
@@ -256,7 +285,8 @@ STARSOpndTypePtr STARS_IDA_Instruction_t::MakeRegOpnd(uint16_t RegNum) const {
} // end of STARS_IDA_Instruction_t::MakeRegOpnd()
STARSOpndTypePtr STARS_IDA_Instruction_t::MakeFloatingPointRegOpnd(uint16_t RegNum) const {
- op_t TempOp = InitOp;
+ op_t TempOp;
+ this->InitOperand(TempOp);
TempOp.type = o_fpreg;
TempOp.dtyp = GetRegDtyp(RegNum, false);
TempOp.reg = RegNum;
@@ -264,7 +294,8 @@ STARSOpndTypePtr STARS_IDA_Instruction_t::MakeFloatingPointRegOpnd(uint16_t RegN
} // end of STARS_IDA_Instruction_t::MakeFloatingPointRegOpnd()
STARSOpndTypePtr STARS_IDA_Instruction_t::MakeMMXRegOpnd(uint16_t RegNum) const {
- op_t TempOp = InitOp;
+ op_t TempOp;
+ this->InitOperand(TempOp);
TempOp.type = o_mmxreg;
TempOp.reg = RegNum;
TempOp.dtyp = GetRegDtyp(RegNum, false);
@@ -272,7 +303,8 @@ STARSOpndTypePtr STARS_IDA_Instruction_t::MakeMMXRegOpnd(uint16_t RegNum) const
} // end of STARS_IDA_Instruction_t::MakeMMXRegOpnd()
STARSOpndTypePtr STARS_IDA_Instruction_t::MakeXMMRegOpnd(uint16_t RegNum) const {
- op_t TempOp = InitOp;
+ op_t TempOp;
+ this->InitOperand(TempOp);
TempOp.type = o_xmmreg;
TempOp.reg = RegNum;
TempOp.dtyp = GetRegDtyp(RegNum, false);
@@ -280,7 +312,8 @@ STARSOpndTypePtr STARS_IDA_Instruction_t::MakeXMMRegOpnd(uint16_t RegNum) const
} // end of STARS_IDA_Instruction_t::MakeXMMRegOpnd()
STARSOpndTypePtr STARS_IDA_Instruction_t::MakeYMMRegOpnd(uint16_t RegNum) const {
- op_t TempOp = InitOp;
+ op_t TempOp;
+ this->InitOperand(TempOp);
TempOp.type = o_ymmreg;
TempOp.reg = RegNum;
TempOp.dtyp = GetRegDtyp(RegNum, false);
@@ -289,7 +322,8 @@ STARSOpndTypePtr STARS_IDA_Instruction_t::MakeYMMRegOpnd(uint16_t RegNum) const
STARSOpndTypePtr STARS_IDA_Instruction_t::MakeMemPhraseOpnd(uint16_t BaseRegNum, uint16_t IndexRegNum, uint16_t ScaleFactor) const {
// TODO: Construct SIB byte when IndexRegNum is used.
- op_t TempOp = InitOp;
+ op_t TempOp;
+ this->InitOperand(TempOp);
TempOp.type = o_phrase;
TempOp.reg = BaseRegNum;
TempOp.dtyp = GetRegDtyp(BaseRegNum, this->Has64BitOperands());
@@ -298,7 +332,8 @@ STARSOpndTypePtr STARS_IDA_Instruction_t::MakeMemPhraseOpnd(uint16_t BaseRegNum,
STARSOpndTypePtr STARS_IDA_Instruction_t::MakeMemDisplacementOpnd(uint16_t BaseRegNum, uint16_t IndexRegNum, uint16_t ScaleFactor, STARS_ea_t offset) const {
// TODO: Construct SIB byte when IndexRegNum is used.
- op_t TempOp = InitOp;
+ op_t TempOp;
+ this->InitOperand(TempOp);
TempOp.type = o_displ;
TempOp.reg = BaseRegNum;
TempOp.addr = (ea_t) offset;
diff --git a/src/interfaces/idapro/STARSIDAOp.cpp b/src/interfaces/idapro/STARSIDAOp.cpp
index ff9cea20..1a0ba2fa 100644
--- a/src/interfaces/idapro/STARSIDAOp.cpp
+++ b/src/interfaces/idapro/STARSIDAOp.cpp
@@ -6,7 +6,6 @@ using namespace std;
// #include "interfaces/STARSTypes.h"
#include "base/SMPDataFlowAnalysis.h"
-#include "base/SMPStaticAnalyzer.h"
#include "interfaces/SMPDBInterface.h"
#include "interfaces/abstract/all.h"
#include "interfaces/idapro/all.h"
@@ -14,7 +13,7 @@ using namespace std;
// Constructors
STARS_IDA_op_t::STARS_IDA_op_t(op_t IDAOp) : m_Opnd(IDAOp) {
if ((this->m_Opnd.dtyp == ((char)-1)) && (this->m_Opnd.type != o_imm)) {
- this->m_Opnd.dtyp = STARS_ISA_dtyp;
+ this->m_Opnd.dtyp = global_STARS_program->GetSTARS_ISA_dtyp();
}
};
@@ -24,29 +23,6 @@ STARSOpndTypePtr STARS_IDA_op_t::clone(void) const {
return std::dynamic_pointer_cast<STARS_op_t>(TempOpPtr);
} // end of STARS_IDA_op_t::clone()
-#if 0
-// Clone only if subword register.
-STARSOpndTypePtr STARS_IDA_op_t::CloneIfSubwordReg(void) const {
- if (this->IsRegOp() && ((this->m_Opnd.reg >= FIRST_X86_SUBWORD_REG) && (this->m_Opnd.reg <= LAST_X86_SUBWORD_REG))) {
- return this->clone();
- }
- else {
- return STARS_op_t::shared_from_this();
- }
-}
-
-// Clone operands that will be changed (e.g. normalized) later.
-// Otherwise, just return the shared_ptr.
-STARSOpndTypePtr STARS_IDA_op_t::CloneIfNecessary(bool UseFP) const {
- if (MDIsStackAccessOpnd(this, UseFP)) {
- return this->clone();
- }
- else {
- return this->CloneIfSubwordReg();
- }
-} // end of STARS_IDA_op_t::CloneIfNecessary()
-#endif
-
// Less-than operator for use in STL ordered containers, e.g. sets.
bool STARS_IDA_op_t::operator<(const STARS_op_t &rOp) const {
unsigned char Type1 = this->GetOpType();
@@ -151,7 +127,7 @@ uint16_t STARS_IDA_op_t::GetByteWidth(void) const {
break;
default:
SMP_msg("ERROR: unexpected data type %d in STARS_IDA_op_t::GetByteWidth() \n", OpDtyp);
- DataSize = (uint16_t) STARS_ISA_dtyp;
+ DataSize = (uint16_t) global_STARS_program->GetSTARS_ISA_dtyp();
break;
}
return DataSize;
@@ -194,7 +170,7 @@ void STARS_IDA_op_t::DoubleRegWidth(void) {
} // end of STARS_IDA_op_t::DoubleRegWidth()
// Set STARS SSA name index into three unused bytes of the op_t structure.
-void STARS_IDA_op_t::SetOpGlobalIndex(size_t index) {
+void STARS_IDA_op_t::SetOpGlobalIndex(std::size_t index) {
this->m_Opnd.n = (char)(index & 0x000000ff);
this->m_Opnd.offb = (char)((index & 0x0000ff00) >> 8);
this->m_Opnd.offo = (char)((index & 0x00ff0000) >> 16);
diff --git a/src/interfaces/idapro/STARSIDAProgram.cpp b/src/interfaces/idapro/STARSIDAProgram.cpp
new file mode 100644
index 00000000..706f8c08
--- /dev/null
+++ b/src/interfaces/idapro/STARSIDAProgram.cpp
@@ -0,0 +1,136 @@
+
+#include <cstdint>
+#include <cstdio>
+
+#include <fpro.h>
+#include <ua.hpp>
+#include <kernwin.hpp>
+#include <nalt.hpp>
+#include <intel.hpp>
+
+#include "interfaces/STARSTypes.h"
+#include "interfaces/SMPDBInterface.h"
+#include "interfaces/idapro/STARSProgram.h"
+
+using namespace std;
+
+// Limit on bytes of code for full analysis
+#define STARS_CODESIZE_FULL_ANALYSIS_LIMIT 8000000
+
+// Set internal state to handle a 32-bit binary
+void STARS_IDA_Program_t::Set32BitBinary(void) {
+ STARS_Program_t::SetBitwidth32();
+ this->STARS_ISA_dtyp = dt_dword;
+ this->STARS_MD_LAST_SAVED_REG_NUM = R_di;
+ return;
+}
+
+// Set internal state to handle a 64-bit binary
+void STARS_IDA_Program_t::Set64BitBinary(void) {
+ STARS_Program_t::SetBitwidth64();
+ this->STARS_ISA_dtyp = dt_qword;
+ this->STARS_MD_LAST_SAVED_REG_NUM = R_r15;
+ return;
+}
+
+// Set flags, take actions based on code size.
+void STARS_IDA_Program_t::ReportTotalCodeSize(unsigned long long TotalCodeSize) {
+ this->SetTotalCodeSize(TotalCodeSize);
+ this->SetReducedProcessingFlag(TotalCodeSize > STARS_CODESIZE_FULL_ANALYSIS_LIMIT);
+ return;
+}
+
+bool STARS_IDA_Program_t::OpenFiles(void) {
+ // Open all the common files via the base class.
+ return STARS_Program_t::OpenFiles();
+} // end of STARS_IDA_Program_t::OpenFiles()
+
+void STARS_IDA_Program_t::CloseFiles(void) {
+ // Close all the common files via the base class.
+ STARS_Program_t::CloseFiles();
+ return;
+} // end of STARS_IDA_Program_t::CloseFiles()
+
+void STARS_IDA_Program_t::InitData(void) {
+ SMP_msg("INFO: Reach STARS_IDA_Program_t::InitData method.\n");
+
+ this->MDInitializeArgumentRegs();
+ this->MDInitializeCallerSavedRegs();
+
+ // Init everything else through the base class.
+ STARS_Program_t::InitData();
+
+ // Record the start and end addresses for all function entry
+ // chunks in the program.
+ this->FuncBounds.reserve(10 + SMP_get_func_qty());
+ for (std::size_t FuncIndex = 0; FuncIndex < SMP_get_func_qty(); ++FuncIndex) {
+ STARS_Function_t *FuncInfo = SMP_getn_func(FuncIndex);
+ SMP_bounds_t temp;
+ temp.startEA = FuncInfo->get_startEA();
+ temp.endEA = FuncInfo->get_endEA();
+ FuncBounds.push_back(temp);
+ }
+
+ return;
+} // end of STARS_IDA_Program_t::InitData()
+
+void STARS_IDA_Program_t::DetermineRootFileName(void) {
+ SMP_msg("INFO: Reached DetermineRootFileName method.\n");
+ // Get the root file name from IDA Pro, e.g. "foo" when analyzing "foo.exe"
+ char TempRootName[STARS_MAXSTR];
+ STARS_ssize_t FileLen = ::get_root_filename(TempRootName, sizeof(TempRootName)-1);
+ string TempRootString(TempRootName);
+ this->SetRootFileName(TempRootString);
+ return;
+}
+
+void STARS_IDA_Program_t::MDInitializeCallerSavedRegs(void) {
+ this->STARS_MDCallerSavedRegs.clear();
+ bool x86_64_ISA_flag = false;
+#ifdef __EA64__
+ x86_64_ISA_flag = (this->GetSTARS_ISA_Bitwidth() == 64);
+#endif
+ if (!x86_64_ISA_flag) {
+ // 32-bit x86 uses EAX, ECX, EDX as caller-saved.
+ this->STARS_MDCallerSavedRegs.push_back(R_ax);
+ this->STARS_MDCallerSavedRegs.push_back(R_cx);
+ this->STARS_MDCallerSavedRegs.push_back(R_dx);
+ }
+ else {
+ // 64-bit x86 uses EDI, ESI, EDX, ECX, R8 and R9
+ // in that order. After six arguments that fit into
+ // these regs, arguments are passed on the stack.
+ // In addition, registers EAX, R10 and R11 are caller-saved
+ // but are not used to pass arguments.
+ this->STARS_MDCallerSavedRegs.push_back(R_ax);
+ this->STARS_MDCallerSavedRegs.push_back(R_cx);
+ this->STARS_MDCallerSavedRegs.push_back(R_dx);
+ this->STARS_MDCallerSavedRegs.push_back(R_si);
+ this->STARS_MDCallerSavedRegs.push_back(R_di);
+ this->STARS_MDCallerSavedRegs.push_back(R_r8);
+ this->STARS_MDCallerSavedRegs.push_back(R_r9);
+ this->STARS_MDCallerSavedRegs.push_back(R_r10);
+ this->STARS_MDCallerSavedRegs.push_back(R_r11);
+ }
+ return;
+} // end of STARS_IDA_Program_t::MDInitializeCallerSavedRegs()
+
+void STARS_IDA_Program_t::MDInitializeArgumentRegs(void) {
+ bool x86_64_ISA_flag = false;
+#ifdef __EA64__
+ x86_64_ISA_flag = (this->GetSTARS_ISA_Bitwidth() == 64);
+#endif
+ if (x86_64_ISA_flag) {
+ this->STARS_MDArgumentRegs.push_back(R_di);
+ this->STARS_MDArgumentRegs.push_back(R_si);
+ this->STARS_MDArgumentRegs.push_back(R_dx);
+ this->STARS_MDArgumentRegs.push_back(R_cx);
+ this->STARS_MDArgumentRegs.push_back(R_r8);
+ this->STARS_MDArgumentRegs.push_back(R_r9);
+ }
+ else {
+ this->STARS_MDArgumentRegs.clear();
+ }
+ return;
+} // end of STARS_IDA_Program_t::MDInitializeArgumentRegs()
+
diff --git a/src/interfaces/idapro/STARSInterface.cpp b/src/interfaces/idapro/STARSInterface.cpp
index 6f90847d..c6824dd7 100644
--- a/src/interfaces/idapro/STARSInterface.cpp
+++ b/src/interfaces/idapro/STARSInterface.cpp
@@ -7,7 +7,6 @@
#include "base/SMPBasicBlock.h"
#include "base/SMPFunction.h"
#include "base/SMPProgram.h"
-#include "base/SMPStaticAnalyzer.h"
using namespace std;
@@ -76,8 +75,8 @@ void STARS_IDA_Interface_t::AuditTailChunkOwnership(void)
SMP_msg("Finding parent func candidates for %x:", ChunkInfo->startEA);
#endif
SMP_bounds_t CurrFunc;
- for (std::size_t FuncIndex = 0; FuncIndex < FuncBounds.size(); ++FuncIndex) {
- CurrFunc = FuncBounds[FuncIndex];
+ for (std::size_t FuncIndex = 0; FuncIndex < global_STARS_program->GetFuncBoundsSize(); ++FuncIndex) {
+ CurrFunc = global_STARS_program->GetFuncBounds(FuncIndex);
if ((CurrFunc.startEA < ChunkInfo->startEA)
&& (CurrFunc.startEA > BestCandidate)) {
BestCandidate = CurrFunc.startEA;
@@ -135,7 +134,7 @@ static STARS_ea_t FindNewFuncLimit(STARS_ea_t StartAddr)
return LimitAddr;
STARS_ea_t SegLimit = seg->get_endEA();
- for (STARS_ea_t addr = get_item_end(StartAddr); addr < SegLimit; addr = get_item_end(addr)) {
+ for (STARS_ea_t addr = SMP_get_item_end(StartAddr); addr < SegLimit; addr = SMP_get_item_end(addr)) {
flags_t InstrFlags = getFlags(addr);
if (isCode(InstrFlags) && isHead(InstrFlags)) {
LimitAddr = addr;
@@ -218,7 +217,7 @@ void STARS_IDA_Interface_t::AuditCodeTargets(void)
// IDA database. If it is a branch target, not a call target,
// create a new TAIL chunk for the current parent functions.
for (STARS_ea_t addr = ChunkInfo->startEA; addr < ChunkInfo->endEA;
- addr = get_item_end(addr)) {
+ addr = SMP_get_item_end(addr)) {
flags_t InstrFlags = getFlags(addr);
if (isCode(InstrFlags) && isHead(InstrFlags)) {
SMPInstr CurrInst(addr);
--
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