/* STARSProgram.cpp: Base class
* Copyright 2015 by Zephyr Software LLC
*/
#include <cstring>
#include <algorithm>
#include <iostream>
#include <sstream>
#include "interfaces/STARSTypes.h"
#include "interfaces/SMPDBInterface.h"
// #include "interfaces/abstract/all.h"
#include "base/SMPDataFlowAnalysis.h"
#include "base/SMPProgram.h"
using namespace std;
// Data initialization
void STARS_Program_t::MDInitializeCallerSavedRegs(void) {
this->STARS_MDCallerSavedRegs.clear();
bool x86_64_ISA_flag = false;
#ifdef __EA64__
x86_64_ISA_flag = (this->GetSTARS_ISA_Bitwidth() == 64);
#endif
if (!x86_64_ISA_flag) {
// 32-bit x86 uses EAX, ECX, EDX as caller-saved.
this->STARS_MDCallerSavedRegs.push_back(STARS_x86_R_ax);
this->STARS_MDCallerSavedRegs.push_back(STARS_x86_R_cx);
this->STARS_MDCallerSavedRegs.push_back(STARS_x86_R_dx);
}
else {
// 64-bit x86 uses EDI, ESI, EDX, ECX, R8 and R9
// in that order. After six arguments that fit into
// these regs, arguments are passed on the stack.
// In addition, registers EAX, R10 and R11 are caller-saved
// but are not used to pass arguments.
this->STARS_MDCallerSavedRegs.push_back(STARS_x86_R_ax);
this->STARS_MDCallerSavedRegs.push_back(STARS_x86_R_cx);
this->STARS_MDCallerSavedRegs.push_back(STARS_x86_R_dx);
this->STARS_MDCallerSavedRegs.push_back(STARS_x86_R_si);
this->STARS_MDCallerSavedRegs.push_back(STARS_x86_R_di);
this->STARS_MDCallerSavedRegs.push_back(STARS_x86_R_r8);
this->STARS_MDCallerSavedRegs.push_back(STARS_x86_R_r9);
this->STARS_MDCallerSavedRegs.push_back(STARS_x86_R_r10);
this->STARS_MDCallerSavedRegs.push_back(STARS_x86_R_r11);
}
return;
} // end of STARS_IDA_Program_t::MDInitializeCallerSavedRegs()
void STARS_Program_t::MDInitializeArgumentRegs(void) {
bool x86_64_ISA_flag = false;
#ifdef __EA64__
x86_64_ISA_flag = (this->GetSTARS_ISA_Bitwidth() == 64);
#endif
if (x86_64_ISA_flag) {
this->STARS_MDArgumentRegs.push_back(STARS_x86_R_di);
this->STARS_MDArgumentRegs.push_back(STARS_x86_R_si);
this->STARS_MDArgumentRegs.push_back(STARS_x86_R_dx);
this->STARS_MDArgumentRegs.push_back(STARS_x86_R_cx);
this->STARS_MDArgumentRegs.push_back(STARS_x86_R_r8);
this->STARS_MDArgumentRegs.push_back(STARS_x86_R_r9);
}
else {
this->STARS_MDArgumentRegs.clear();
}
return;
} // end of STARS_IDA_Program_t::MDInitializeArgumentRegs()
void STARS_Program_t::MDInitializeCalleeSavedRegs(void) {
this->STARS_MDCalleeSavedRegs.clear();
bool x86_64_ISA_flag = false;
#ifdef __EA64__
x86_64_ISA_flag = (this->GetSTARS_ISA_Bitwidth() == 64);
#endif
if (!x86_64_ISA_flag) {
// 32-bit x86 uses EAX, ECX, EDX as caller-saved, EBX, EBP, ESI, EDI as callee-saved.
this->STARS_MDCalleeSavedRegs.push_back(STARS_x86_R_bx);
this->STARS_MDCalleeSavedRegs.push_back(STARS_x86_R_bp);
this->STARS_MDCalleeSavedRegs.push_back(STARS_x86_R_si);
this->STARS_MDCalleeSavedRegs.push_back(STARS_x86_R_di);
}
else {
// 64-bit x86 uses EDI, ESI, EDX, ECX, R8 and R9
// in that order. After six arguments that fit into
// these regs, arguments are passed on the stack.
// In addition, registers EAX, R10 and R11 are caller-saved
// but are not used to pass arguments. The rest, besides RSP,
// are callee-saved.
this->STARS_MDCalleeSavedRegs.push_back(STARS_x86_R_bx);
this->STARS_MDCalleeSavedRegs.push_back(STARS_x86_R_bp);
this->STARS_MDCalleeSavedRegs.push_back(STARS_x86_R_r12);
this->STARS_MDCalleeSavedRegs.push_back(STARS_x86_R_r13);
this->STARS_MDCalleeSavedRegs.push_back(STARS_x86_R_r14);
this->STARS_MDCalleeSavedRegs.push_back(STARS_x86_R_r15);
}
return;
} // end of STARS_IDA_Program_t::MDInitializeCalleeSavedRegs()
bool STARS_Program_t::OpenFiles(void) {
// Open the output files.
bool success = this->OpenSecondaryFilesOnly();
if (success) {
this->STARS_AnnotFile = SMP_fopen(this->AnnotFileName.c_str(), "w");
if (NULL == this->STARS_AnnotFile) {
SMP_msg("FATAL ERROR: Cannot open annotations file %s\n", this->AnnotFileName.c_str());
(void)SMP_fclose(this->STARS_XrefsFile);
(void)SMP_fclose(this->STARS_CallReturnFile);
(void)SMP_fclose(this->STARS_UninitVarFile);
(void)SMP_fclose(this->ZST_AlarmFile);
(void)SMP_fclose(this->STARS_InfoAnnotFile);
if (global_STARS_program->ShouldSTARSTranslateToSPARKAda()) {
(void)SMP_fclose(this->ZST_SPARKHeaderFile);
(void)SMP_fclose(this->ZST_SPARKSourceFile);
}
success = false;
}
}
return success;
} // end of STARS_Program_t::OpenFiles()
bool STARS_Program_t::OpenMainAnnotationFile(void) {
bool success = true;
this->STARS_AnnotFile = SMP_fopen(this->AnnotFileName.c_str(), "w");
if (NULL == this->STARS_AnnotFile) {
SMP_msg("FATAL ERROR: Cannot open annotations file %s\n", this->AnnotFileName.c_str());
success = false;
}
return success;
} // end of STARS_Program_t::OpenMainAnnotationFile()
bool STARS_Program_t::OpenSecondaryFilesOnly(void) {
// Open the output files except for the main annotation file.
assert(0 < this->RootFileName.size()); // SetRootFileName() must be called previously.
string ZSTAlarmFileName(this->GetRootFileName());
string AlarmFileSuffix(".alarms");
ZSTAlarmFileName += AlarmFileSuffix;
string XrefsFileName(this->GetRootFileName());
string XrefsFileSuffix(".STARSxrefs");
XrefsFileName += XrefsFileSuffix;
string CallRetFileName(this->GetRootFileName());
string CallRetFileSuffix(".STARScallreturn");
CallRetFileName += CallRetFileSuffix;
string UninitVarFileName(this->GetRootFileName());
string UninitVarFileSuffix(".STARSuninit");
UninitVarFileName += UninitVarFileSuffix;
string LoopsFileName(this->GetRootFileName());
string LoopsFileSuffix(".STARSloops");
LoopsFileName += LoopsFileSuffix;
string SPARKSourceFileName("");
string SPARKHeaderFileName("");
if (global_STARS_program->ShouldSTARSTranslateToSPARKAda()) {
// Extract "foo" from "foo.exe" to get the Ada package name
istringstream StreamRootName(this->RootFileName);
(void)std::getline(StreamRootName, this->PackageName, '.');
if (this->PackageName.empty()) {
SMP_msg("ERROR: Could not extract an Ada package name from the root of file name %s\n", this->RootFileName.c_str());
return false;
}
// Convert dashes to underscores in the package name to suit Ada standards.
replace(this->PackageName.begin(), this->PackageName.end(), '-', '_');
SPARKSourceFileName += this->PackageName;
string SPARKSourceFileSuffix(".ZSTSPARK.adb");
SPARKSourceFileName += SPARKSourceFileSuffix;
SPARKHeaderFileName += this->PackageName;
string SPARKHeaderFileSuffix(".ZSTSPARK.ads");
SPARKHeaderFileName += SPARKHeaderFileSuffix;
}
this->STARS_XrefsFile = SMP_fopen(XrefsFileName.c_str(), "w");
if (NULL == this->STARS_XrefsFile) {
SMP_msg("FATAL ERROR: Cannot open STARS code xrefs file %s\n", XrefsFileName.c_str());
return false;
}
this->STARS_CallReturnFile = SMP_fopen(CallRetFileName.c_str(), "w");
if (NULL == this->STARS_CallReturnFile) {
SMP_msg("FATAL ERROR: Cannot open STARS calls and returns info file %s\n", CallRetFileName.c_str());
(void)SMP_fclose(this->STARS_XrefsFile);
return false;
}
this->STARS_UninitVarFile = SMP_fopen(UninitVarFileName.c_str(), "w");
if (NULL == this->STARS_UninitVarFile) {
SMP_msg("FATAL ERROR: Cannot open STARS uninitialized vars info file %s\n", UninitVarFileName.c_str());
(void)SMP_fclose(this->STARS_XrefsFile);
(void)SMP_fclose(this->STARS_CallReturnFile);
return false;
}
this->ZST_AlarmFile = SMP_fopen(ZSTAlarmFileName.c_str(), "w");
if (NULL == this->ZST_AlarmFile) {
SMP_msg("FATAL ERROR: Cannot open security alarms file %s\n", ZSTAlarmFileName.c_str());
(void)SMP_fclose(this->STARS_XrefsFile);
(void)SMP_fclose(this->STARS_CallReturnFile);
(void)SMP_fclose(this->STARS_UninitVarFile);
return false;
}
this->STARS_InfoAnnotFile = SMP_fopen(this->InfoAnnotFileName.c_str(), "w");
if (NULL == this->STARS_InfoAnnotFile) {
SMP_msg("FATAL ERROR: Cannot open annotations file %s\n", this->InfoAnnotFileName.c_str());
(void)SMP_fclose(this->STARS_XrefsFile);
(void)SMP_fclose(this->STARS_CallReturnFile);
(void)SMP_fclose(this->STARS_UninitVarFile);
(void)SMP_fclose(this->ZST_AlarmFile);
return false;
}
this->STARS_LoopsAnnotFile = SMP_fopen(LoopsFileName.c_str(), "w");
if (NULL == this->STARS_LoopsAnnotFile) {
SMP_msg("FATAL ERROR: Cannot open loops annotations file %s\n", LoopsFileName.c_str());
(void)SMP_fclose(this->STARS_XrefsFile);
(void)SMP_fclose(this->STARS_CallReturnFile);
(void)SMP_fclose(this->STARS_UninitVarFile);
(void)SMP_fclose(this->ZST_AlarmFile);
(void)SMP_fclose(this->STARS_InfoAnnotFile);
return false;
}
if (global_STARS_program->ShouldSTARSTranslateToSPARKAda()) {
this->ZST_SPARKSourceFile = SMP_fopen(SPARKSourceFileName.c_str(), "w");
if (NULL == this->ZST_SPARKSourceFile) {
SMP_msg("FATAL ERROR: Cannot open SPARK-Ada source output file %s\n", SPARKSourceFileName.c_str());
(void)SMP_fclose(this->STARS_XrefsFile);
(void)SMP_fclose(this->STARS_CallReturnFile);
(void)SMP_fclose(this->STARS_UninitVarFile);
(void)SMP_fclose(this->ZST_AlarmFile);
(void)SMP_fclose(this->STARS_InfoAnnotFile);
(void)SMP_fclose(this->STARS_LoopsAnnotFile);
return false;
}
this->ZST_SPARKHeaderFile = SMP_fopen(SPARKHeaderFileName.c_str(), "w");
if (NULL == this->ZST_SPARKHeaderFile) {
SMP_msg("FATAL ERROR: Cannot open SPARK-Ada header output file %s\n", SPARKHeaderFileName.c_str());
(void)SMP_fclose(this->STARS_XrefsFile);
(void)SMP_fclose(this->STARS_CallReturnFile);
(void)SMP_fclose(this->STARS_UninitVarFile);
(void)SMP_fclose(this->ZST_AlarmFile);
(void)SMP_fclose(this->STARS_InfoAnnotFile);
(void)SMP_fclose(this->STARS_LoopsAnnotFile);
(void)SMP_fclose(this->ZST_SPARKSourceFile);
return false;
}
}
return true;
} // end of STARS_Program_t::OpenSecondaryFilesOnly()
void STARS_Program_t::CloseFiles(void) {
(void) SMP_fclose(this->STARS_AnnotFile);
(void) SMP_fclose(this->STARS_InfoAnnotFile);
if (global_STARS_program->ShouldSTARSTranslateToSPARKAda()) {
(void)SMP_fclose(this->ZST_SPARKSourceFile);
(void)SMP_fclose(this->ZST_SPARKHeaderFile);
}
(void) SMP_fclose(this->ZST_AlarmFile);
(void) SMP_fclose(this->STARS_CallReturnFile);
(void) SMP_fclose(this->STARS_XrefsFile);
(void) SMP_fclose(this->STARS_UninitVarFile);
(void) SMP_fclose(this->GetLoopsAnnotFile());
return;
} // end of STARS_Program_t::CloseFiles()
// Apply new mode to the AnnotFile.
bool STARS_Program_t::ReopenAnnotFile(const char *mode) {
FILE *TempHandle = freopen(NULL, mode, this->GetAnnotFile());
bool success = (NULL != TempHandle);
if (success) {
this->STARS_AnnotFile = TempHandle;
}
return success;
}
void STARS_Program_t::InitData(void) {
this->IDAProDriver = false; // default; set to true explicitly from IDA Pro code.
this->CurrentFileNumber = 0;
this->ZST_AlarmFile = NULL;
this->STARS_CallReturnFile = NULL;
this->STARS_XrefsFile = NULL;
this->MDInitializeArgumentRegs();
this->MDInitializeCallerSavedRegs();
this->MDInitializeCalleeSavedRegs();
// Initialize global counters for statistics-gathering purposes.
STARS_SPARK_IndentCount = 1;
UnusedStructCount = 0;
UnusedIntCount = 0;
DeadMetadataCount = 0;
LiveMetadataCount = 0;
ResolvedIndirectJumpCount = 0;
UnresolvedIndirectJumpCount = 0;
ConstantDEFCount = 0;
AlwaysTakenBranchCount = 0;
NeverTakenBranchCount = 0;
LoopInvariantDEFCount = 0;
SubwordRegCount = 0;
SubwordMemCount = 0;
SubwordAddressRegCount = 0;
SPARKOperandCount = 0;
#if SMP_COUNT_MEMORY_ALLOCATIONS
SMPInstCount = 0;
SMPBlockCount = 0;
SMPDefUseChainCount = 0;
SMPFuncCount = 0;
SMPGlobalVarCount = 0;
SMPLocalVarCount = 0;
SMPInstBytes = 0;
SMPDefUseChainBytes = 0;
#endif
#if SMP_MEASURE_NUMERIC_ANNOTATIONS
NumericAnnotationsCount12 = 0;
NumericAnnotationsCount3 = 0;
TruncationAnnotationsCount = 0;
SignednessWithoutTruncationCount = 0;
LeaInstOverflowCount = 0;
WidthDoublingTruncationCount = 0;
BenignOverflowInstCount = 0;
BenignOverflowDefCount = 0;
SuppressStackPtrOverflowCount = 0;
SuppressLiveFlagsOverflowCount = 0;
LiveMultiplyBitsCount = 0;
BenignTruncationCount = 0;
SuppressTruncationRegPiecesAllUsed = 0;
SuppressSignednessOnTruncation = 0;
#endif
#if STARS_SCCP_GATHER_STATISTICS
SCCPFuncsWithArgWriteCount = 0;
SCCPFuncsWithConstantArgWriteCount = 0;
SCCPOutgoingArgWriteCount = 0;
SCCPConstantOutgoingArgWriteCount = 0;
#endif
STARS_MaxBlockCount = 0;
STARS_LoopInductionVarIDSuccesses = 0;
STARS_LoopInductionVarIDFailures = 0;
STARS_LoopIterationExprSuccesses = 0;
STARS_LoopIterationExprFailures = 0;
(void) memset(this->OptCount, 0, sizeof(this->OptCount));
(void) memset(this->AnnotationCount, 0, sizeof(this->AnnotationCount));
this->STARS_PerformReducedAnalysis = false;
this->STARS_PerformLevel2ReducedAnalysis = false;
this->STARS_PerformFuncPtrShadowing = false;
this->STARS_PerformArgShadowing = false;
this->STARS_PerformCFGImprovement = false;
this->STARS_PerformDeepLoopAnalyses = false;
this->STARS_PerformConstantPropagation = false;
this->STARS_TranslateToSPARKAda = false;
this->DataReferentID = 1;
this->ShadowID = 1;
this->ExprSerialNumber = 0;
this->STARS_TotalCodeSize = 0;
this->InitOptCategory();
this->InitStackAlteration();
this->InitDFACategory();
this->InitTypeCategory();
this->InitSMPDefsFlags();
this->InitSMPUsesFlags();
this->InitLibFuncFGInfoMaps();
InitIntegerErrorCallSinkMap();
InitUnsignedArgPositionMap();
InitTaintWarningArgPositionMap();
InitPointerArgPositionMap();
InitLibraryFuncNames();
this->InitDebuggingDeadregs();
return;
} // end of STARS_Program_t::InitData()
// Initialize the DeadregsDebugBitset based on environment var STARS_DEADREGS_ONLY.
// Initialize the DeadregsDebugLimit based on environment var STARS_DEADREGS_DEBUG_LIMIT.
void STARS_Program_t::InitDebuggingDeadregs(void) {
char DeadregsLimitString[STARS_MAXSTR];
if (global_stars_interface->STARS_getenv("STARS_DEADREGS_DEBUG_LIMIT", DeadregsLimitString)) {
const char *TempPtr = (const char *)&DeadregsLimitString[0];
this->DeadregsDebugLimit = (uint32_t)strtoul(TempPtr, nullptr, 0);
SMP_msg("DEBUG: DEADREGS: Annotation counter limit is %lu from string %s\n", this->DeadregsDebugLimit, TempPtr);
}
else {
this->DeadregsDebugLimit = UINT32_MAX - 1;
}
this->DeadregsAnnotCounter = 0;
char DeadregsOnlyString[STARS_MAXSTR];
if (global_stars_interface->STARS_getenv("STARS_DEADREGS_ONLY", DeadregsOnlyString)) {
if (strstr(DeadregsOnlyString, "RAX") || strstr(DeadregsOnlyString, "EAX")) {
this->DeadregsDebugBitset.set((size_t) STARS_x86_R_ax);
}
if (strstr(DeadregsOnlyString, "RCX") || strstr(DeadregsOnlyString, "ECX")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_cx);
}
if (strstr(DeadregsOnlyString, "RDX") || strstr(DeadregsOnlyString, "EDX")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_dx);
}
if (strstr(DeadregsOnlyString, "RBX") || strstr(DeadregsOnlyString, "EBX")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_bx);
}
if (strstr(DeadregsOnlyString, "RSP") || strstr(DeadregsOnlyString, "ESP")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_sp);
}
if (strstr(DeadregsOnlyString, "RBP") || strstr(DeadregsOnlyString, "EBP")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_bp);
}
if (strstr(DeadregsOnlyString, "RSI") || strstr(DeadregsOnlyString, "ESI")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_si);
}
if (strstr(DeadregsOnlyString, "RDI") || strstr(DeadregsOnlyString, "EDI")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_di);
}
if (strstr(DeadregsOnlyString, "R8")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_r8);
}
if (strstr(DeadregsOnlyString, "R9")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_r9);
}
if (strstr(DeadregsOnlyString, "R10")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_r10);
}
if (strstr(DeadregsOnlyString, "R11")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_r11);
}
if (strstr(DeadregsOnlyString, "R12")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_r12);
}
if (strstr(DeadregsOnlyString, "R13")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_r13);
}
if (strstr(DeadregsOnlyString, "R14")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_r14);
}
if (strstr(DeadregsOnlyString, "R15")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_r15);
}
if (strstr(DeadregsOnlyString, "EFLAGS")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_efl);
}
if (strstr(DeadregsOnlyString, "XMM0")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_xmm0);
}
if (strstr(DeadregsOnlyString, "XMM1")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_xmm1);
}
if (strstr(DeadregsOnlyString, "XMM2")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_xmm2);
}
if (strstr(DeadregsOnlyString, "XMM3")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_xmm3);
}
if (strstr(DeadregsOnlyString, "XMM4")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_xmm4);
}
if (strstr(DeadregsOnlyString, "XMM5")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_xmm5);
}
if (strstr(DeadregsOnlyString, "XMM6")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_xmm6);
}
if (strstr(DeadregsOnlyString, "XMM7")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_xmm7);
}
if (strstr(DeadregsOnlyString, "XMM8")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_xmm8);
}
if (strstr(DeadregsOnlyString, "XMM9")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_xmm9);
}
if (strstr(DeadregsOnlyString, "XMM10")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_xmm10);
}
if (strstr(DeadregsOnlyString, "XMM11")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_xmm11);
}
if (strstr(DeadregsOnlyString, "XMM12")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_xmm12);
}
if (strstr(DeadregsOnlyString, "XMM13")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_xmm13);
}
if (strstr(DeadregsOnlyString, "XMM14")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_xmm14);
}
if (strstr(DeadregsOnlyString, "XMM15")) {
this->DeadregsDebugBitset.set((size_t)STARS_x86_R_xmm15);
}
}
return;
} // end of STARS_Program_t::InitDebuggingDeadregs()
bool STARS_Program_t::IsRegAllowedInDeadregsAnnots(const std::size_t RegNum) const {
assert(RegNum < this->DeadregsDebugBitset.size());
return this->DeadregsDebugBitset[RegNum];
};
// These two constants should agree with their counterparts in ZST-policy.c.
#define ZST_MAX_FILE_NAME_LEN 1024
#define ZST_MAX_CALL_NAME_LEN 64
// Convert a call type string from the policy file, such as "FILECALLS", to the
// corresponding ZST_SysCallType, such as ZST_FILE_CALL.
ZST_SysCallType STARS_Program_t::ConvertStringToCallType(char *Str2) {
ZST_SysCallType ReturnVal;
if (0 == strcmp("PRIVILEGECALLS", Str2)) {
ReturnVal = ZST_HIGHPRIVILEGE_CALL;
}
else if (0 == strcmp("FILECALLS", Str2)) {
ReturnVal = ZST_FILE_CALL;
}
else if (0 == strcmp("NETWORKCALLS", Str2)) {
ReturnVal = ZST_NETWORK_CALL;
}
else {
ReturnVal = ZST_UNMONITORED_CALL;
}
return ReturnVal;
} // end of STARS_Program_t::ConvertStringToCallType()
// Convert a policy string from the policy file, such as "DISALLOW", to
// the corresponding ZST_Policy value, such as ZST_DISALLOW.
ZST_Policy STARS_Program_t::ConvertStringToPolicy(char *Str3) {
ZST_Policy ReturnVal;
if (0 == strcmp("DISALLOW", Str3)) {
ReturnVal = ZST_DISALLOW;
}
else if (0 == strcmp("WHITELIST", Str3)) {
ReturnVal = ZST_WHITELIST;
}
else if (0 == strcmp("BLACKLIST", Str3)) {
ReturnVal = ZST_BLACKLIST;
}
else { // error handling precedes calls to this function
ReturnVal = ZST_ALLOWALL;
}
return ReturnVal;
} // end of STARS_Program_t::ConvertStringToPolicy()
// Given a function name, return its Zephyr Security Toolkit call type.
ZST_SysCallType STARS_Program_t::GetCallTypeFromFuncName(string SysCallName) const {
ZST_SysCallType ReturnVal;
map<string, ZST_SysCallType>::const_iterator FindIter = this->ZST_FuncTypeMap.find(SysCallName);
if (FindIter == this->ZST_FuncTypeMap.end()) { // not found; might not even be system call
ReturnVal = ZST_UNMONITORED_CALL;
}
else {
ReturnVal = FindIter->second;
}
return ReturnVal;
} // end of GetCallTypeFromFuncName()
// Get the user-specified security policy for the given call type.
ZST_Policy STARS_Program_t::GetPolicyFromCallType(ZST_SysCallType CallType) const {
ZST_Policy ReturnVal;
map<ZST_SysCallType, ZST_Policy>::const_iterator FindIter = ZST_TypePolicyMap.find(CallType);
if (FindIter == ZST_TypePolicyMap.end()) {
// Policy not found; default to ALLOW_ALL
ReturnVal = ZST_ALLOWALL;
}
else {
ReturnVal = FindIter->second;
}
return ReturnVal;
} // end of STARS_Program_t::GetPolicyFromCallType()
// Given a call type and called function name, is it on the location whitelist
// for that call type?
// NOTE: HANDLE CASE IN WHICH WHITELISTED LOCATION IS A PREFIX, TERMINATING in a slash.
bool STARS_Program_t::IsLocationWhitelisted(ZST_SysCallType CallType, string LocationName) const {
set<string>::const_iterator FindIter;
bool ReturnVal;
if (CallType == ZST_FILE_CALL) {
FindIter = ZST_FileLocWhitelist.find(LocationName);
ReturnVal = (FindIter != ZST_FileLocWhitelist.end());
}
else if (CallType == ZST_NETWORK_CALL) {
FindIter = ZST_NetworkLocWhitelist.find(LocationName);
ReturnVal = (FindIter != ZST_NetworkLocWhitelist.end());
}
else { // should not be here
ReturnVal = false;
}
return ReturnVal;
} // end of STARS_Program_t::IsLocationWhitelisted()
// Given a call type and called function name, is it on the location blacklist
// for that call type?
// NOTE: HANDLE CASE IN WHICH BLACKLISTED LOCATION IS A PREFIX, TERMINATING in a slash.
bool STARS_Program_t::IsLocationBlacklisted(ZST_SysCallType CallType, string LocationName) const {
set<string>::const_iterator FindIter;
bool ReturnVal;
if (CallType == ZST_FILE_CALL) {
FindIter = ZST_FileLocBlacklist.find(LocationName);
ReturnVal = (FindIter != ZST_FileLocBlacklist.end());
}
else if (CallType == ZST_NETWORK_CALL) {
FindIter = ZST_NetworkLocBlacklist.find(LocationName);
ReturnVal = (FindIter != ZST_NetworkLocBlacklist.end());
}
else { // should not be here
ReturnVal = false;
}
return ReturnVal;
} // end of STARS_Program_t::IsLocationBlacklisted()
// Given a called function name, does it produce only benign numeric errors when
// its returned values are used in arithmetic? (i.e. it is a trusted input)
bool STARS_Program_t::IsNumericSafeSystemCall(string CallName) const {
set<string>::const_iterator FindIter = ZST_SystemCallNumericWhitelist.find(CallName);
bool ReturnVal = (FindIter != ZST_SystemCallNumericWhitelist.end());
return ReturnVal;
}
bool STARS_Program_t::IsCalleeSavedReg(STARS_regnum_t RegNum) const {
bool found = false;
std::list<STARS_regnum_t>::const_iterator CalleeSavedIter = this->STARS_MDCalleeSavedRegs.cbegin();
while (CalleeSavedIter != this->STARS_MDCalleeSavedRegs.cend()) {
if (*CalleeSavedIter == RegNum) {
found = true;
break;
}
++CalleeSavedIter;
}
return found;
}
bool STARS_Program_t::IsCallerSavedReg(STARS_regnum_t RegNum) const {
bool found = false;
std::list<STARS_regnum_t>::const_iterator CallerSavedIter = this->STARS_MDCallerSavedRegs.cbegin();
while (CallerSavedIter != this->STARS_MDCallerSavedRegs.cend()) {
if (*CallerSavedIter == RegNum) {
found = true;
break;
}
else if (*CallerSavedIter > RegNum) {
break; // passed it in sorted list; return false
}
++CallerSavedIter;
}
return found;
}
// return true and set ArgPos if RegNum is an InArg
bool STARS_Program_t::GetArgRegPosition(STARS_regnum_t RegNum, std::size_t &ArgPos) const {
bool found = false;
std::list<STARS_regnum_t>::const_iterator ArgRegsIter = this->STARS_MDArgumentRegs.cbegin();
ArgPos = 0;
while (ArgRegsIter != this->STARS_MDArgumentRegs.cend()) {
if (*ArgRegsIter == RegNum) {
found = true;
break;
}
++ArgRegsIter;
++ArgPos;
}
return found;
}
bool STARS_Program_t::IsArgumentReg(STARS_regnum_t RegNum) const {
bool found = false;
std::list<STARS_regnum_t>::const_iterator ArgRegsIter = this->STARS_MDArgumentRegs.cbegin();
while (ArgRegsIter != this->STARS_MDArgumentRegs.cend()) {
if (*ArgRegsIter == RegNum) {
found = true;
break;
}
++ArgRegsIter;
}
return found;
}
bool STARS_Program_t::AreInstIDsInSameFunction(const STARS_ea_t InstID1, const STARS_ea_t InstID2) const {
STARS_Function_t *Func1 = SMP_get_func(InstID1);
STARS_Function_t *Func2 = SMP_get_func(InstID2);
return ((NULL != Func1) && (NULL != Func2) && (Func1->get_startEA() == Func2->get_startEA()));
}
void STARS_Program_t::PrintTypeCode(IBType TypeCode){
if (ZST_RETURN == TypeCode) {
SMP_fprintf(this->GetXrefsFile(), "RETURNTARGET\n");
}
else if (ZST_SWITCHTABLE == TypeCode) {
SMP_fprintf(this->GetXrefsFile(), "SWITCHTABLE\n");
}
else if (ZST_INDIRCALL == TypeCode) {
SMP_fprintf(this->GetXrefsFile(), "INDIRCALL\n");
}
else if (ZST_COMPUTEDGOTO == TypeCode) {
SMP_fprintf(this->GetXrefsFile(), "COMPUTEDGOTOHEURISTIC\n");
}
else if (ZST_CODEADDRESSTAKEN == TypeCode) {
SMP_fprintf(this->GetXrefsFile(), "CODEADDRESSTAKEN\n");
}
else if (ZST_UNREACHABLEBLOCK == TypeCode) {
SMP_fprintf(this->GetXrefsFile(), "UNREACHABLEBLOCK\n");
}
else {
SMP_fprintf(this->GetXrefsFile(), "UNKNOWN\n");
}
return;
}
// Utility functions to print code xrefs to STARS_XrefsFile
void STARS_Program_t::PrintAddressInCode(STARS_ea_t FromAddr, STARS_ea_t ToAddr, std::size_t InstrSize, bool is_to_code)
{
if(is_to_code)
SMP_fprintf(this->GetXrefsFile(), "%18llx %6zu INSTR XREF TAKES_ADDRESS_OF CODE %18llx\n",
(unsigned long long) FromAddr, InstrSize, (unsigned long long) ToAddr);
else
SMP_fprintf(this->GetXrefsFile(), "%18llx %6zu INSTR XREF TAKES_ADDRESS_OF DATA %18llx\n",
(unsigned long long) FromAddr, InstrSize, (unsigned long long) ToAddr);
}
// Utility functions to print code xrefs to STARS_XrefsFile
bool STARS_Program_t::PrintCodeToCodeXref(STARS_ea_t FromAddr, STARS_ea_t ToAddr, std::size_t InstrSize, IBType TypeCode) {
bool success = false;
if (IsAddressInCodeRange(ToAddr)) {
success = true;
SMP_fprintf(this->GetXrefsFile(), "%18llx %6zu INSTR XREF IBT FROMIB %18llx ",
(unsigned long long) ToAddr, InstrSize, (unsigned long long) FromAddr);
this->PrintTypeCode(TypeCode);
}
return success;
}
// Utility functions to print code xrefs to STARS_XrefsFile
bool STARS_Program_t::PrintReturnInstXref(STARS_ea_t RetInstAddr, STARS_ea_t TargetAddr, std::size_t InstrSize, bool TailCallTargetAddr) {
bool success = false;
if (IsAddressInCodeRange(TargetAddr)) {
success = true;
FILE *XrefsFile = this->GetXrefsFile();
SMP_fprintf(XrefsFile, "%18llx %6zu INSTR XREF IBT FROMIB %18llx ",
(unsigned long long) TargetAddr, InstrSize, (unsigned long long) RetInstAddr);
if (!TailCallTargetAddr) {
SMP_fprintf(XrefsFile, "RETURNTARGET\n");
}
else {
SMP_fprintf(XrefsFile, "TAILCALLRETURNTARGET\n");
}
}
return success;
}
void STARS_Program_t::PrintDataToCodeXref(STARS_ea_t FromDataAddr, STARS_ea_t ToCodeAddr, std::size_t InstrSize) {
if (IsAddressInCodeRange(ToCodeAddr)) {
SMP_fprintf(this->GetXrefsFile(), "%18llx %6zu INSTR XREF IBT FROMDATA %18llx \n",
(unsigned long long) ToCodeAddr, InstrSize, (unsigned long long) FromDataAddr);
}
return;
}
void STARS_Program_t::PrintUnknownCodeXref(STARS_ea_t ToAddr, std::size_t InstrSize, IBType TypeCode) {
SMP_fprintf(this->GetXrefsFile(), "%18llx %6zu INSTR XREF IBT FROMUNKNOWN ",
(unsigned long long) ToAddr, InstrSize);
this->PrintTypeCode(TypeCode);
return;
}
// Utility functions to signify code xrefs are complete in STARS_XrefsFile for FromAddr
void STARS_Program_t::PrintCodeToCodeXrefComplete(STARS_ea_t FromAddr, std::size_t InstrSize, std::size_t IBTCount, IBType TypeCode) {
if (IsAddressInCodeRange(FromAddr)) {
SMP_fprintf(this->GetXrefsFile(), "%18llx %6zu INSTR XREF FROMIB COMPLETE %6zu ",
(unsigned long long) FromAddr, InstrSize, IBTCount);
this->PrintTypeCode(TypeCode);
}
return;
}
// Read the foo.exe.policy file to initialize our security policies for system calls.
void STARS_Program_t::ZST_InitPolicies(void) {
string ZSTPolicyFileName(this->GetRootFileName());
string PolicyFileSuffix(".policy");
ZSTPolicyFileName += PolicyFileSuffix;
FILE *PolicyFile = SMP_fopen(ZSTPolicyFileName.c_str(), "r");
char Str1[ZST_MAX_CALL_NAME_LEN], Str2[ZST_MAX_CALL_NAME_LEN], Str3[ZST_MAX_FILE_NAME_LEN];
string SafeSystemCall1("gettimeofday");
this->ZST_SystemCallNumericWhitelist.insert(SafeSystemCall1);
if (NULL != PolicyFile) {
while (!SMP_feof(PolicyFile)) {
int ItemsRead = SMP_fscanf(PolicyFile, "%63s %63s %1023s", Str1, Str2, Str3);
if (3 != ItemsRead) {
SMP_msg("ERROR: Line in %s had %d items instead of the required 3; line ignored.\n", ZSTPolicyFileName.c_str(), ItemsRead);
}
else {
string ThirdStr(Str3);
pair<set<string>::iterator, bool> SetInsertResult;
if (0 == strcmp(Str1, "SECURITYPOLICY")) {
ZST_SysCallType TempCallType = ConvertStringToCallType(Str2);
ZST_Policy TempPolicy = ConvertStringToPolicy(Str3);
pair<map<ZST_SysCallType, ZST_Policy>::iterator, bool> InsertResult;
pair<ZST_SysCallType, ZST_Policy> TempPair(TempCallType, TempPolicy);
InsertResult = this->ZST_TypePolicyMap.insert(TempPair);
if (!(InsertResult.second)) {
SMP_msg("ERROR: Could not insert security policy %s for %s. Possible duplicate or conflicting policies.\n",
Str3, Str2);
}
}
else if (0 == strcmp(Str1, "FILELOCATION")) {
if (0 == strcmp(Str2, "WHITELIST")) {
SetInsertResult = this->ZST_FileLocWhitelist.insert(ThirdStr);
if (!(SetInsertResult.second)) {
SMP_msg("WARNING: Duplicate file whitelist location %s ignored.\n", Str3);
}
}
else if (0 == strcmp(Str2, "BLACKLIST")) {
SetInsertResult = this->ZST_FileLocBlacklist.insert(ThirdStr);
if (!(SetInsertResult.second)) {
SMP_msg("WARNING: Duplicate file blacklist location %s ignored.\n", Str3);
}
}
else {
SMP_msg("ERROR: Unknown second field value in policy line: %s %s %s ; ignored\n", Str1, Str2, Str3);
}
}
else if (0 == strcmp(Str1, "NETWORKLOCATION")) {
if (0 == strcmp(Str2, "WHITELIST")) {
SetInsertResult = this->ZST_NetworkLocWhitelist.insert(ThirdStr);
if (!(SetInsertResult.second)) {
SMP_msg("WARNING: Duplicate network whitelist location %s ignored.\n", Str3);
}
}
else if (0 == strcmp(Str2, "BLACKLIST")) {
SetInsertResult = this->ZST_NetworkLocBlacklist.insert(ThirdStr);
if (!(SetInsertResult.second)) {
SMP_msg("WARNING: Duplicate network blacklist location %s ignored.\n", Str3);
}
}
else {
SMP_msg("ERROR: Unknown second field value in policy line: %s %s %s ; ignored\n", Str1, Str2, Str3);
}
}
else {
SMP_msg("ERROR: Unknown first field value in policy line: %s %s %s ; ignored\n", Str1, Str2, Str3);
}
}
}
if (0 == SMP_fclose(PolicyFile)) {
SMP_msg("Policy file %s successfully closed; all policies recorded.\n", ZSTPolicyFileName.c_str());
}
else {
SMP_msg("ERROR: fclose failed on policy file %s. However, policies should be in effect.\n", ZSTPolicyFileName.c_str());
}
// Now, initialize the system call name maps.
pair<map<string, ZST_SysCallType>::iterator, bool> FuncInsertResult;
// Do all the high privilege calls first.
string SysFuncName("putenv");
pair<string, ZST_SysCallType> FuncNamePolicyPair(SysFuncName, ZST_HIGHPRIVILEGE_CALL);
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("setenv");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("setegid");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("seteuid");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("setgid");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("setpgid");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("setregid");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("setreuid");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("setuid");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("execl");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("execv");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("execle");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("execve");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("execlp");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("execvp");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("system");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
// Now do all the file operation calls.
FuncNamePolicyPair.second = ZST_FILE_CALL;
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("chdir");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("chmod");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("chown");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("creat");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("creat64");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("fopen");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("freopen");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("open");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("open64");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("mknod");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("remove");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("rmdir");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("unlink");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
// Finally, handle all the network connection calls.
FuncNamePolicyPair.second = ZST_NETWORK_CALL;
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("socket");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("socketpair");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("pipe");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("bind");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("listen");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("accept");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
FuncNamePolicyPair.first.clear();
FuncNamePolicyPair.first.append("connect");
FuncInsertResult = this->ZST_FuncTypeMap.insert(FuncNamePolicyPair);
assert(FuncInsertResult.second);
}
else {
SMP_msg("WARNING: No policy file %s found. System call policies not in effect.\n", ZSTPolicyFileName.c_str());
}
return;
} // end of STARS_Program_t::ZST_InitPolicies()
// Initialize the OptCategory[] array to define how we emit optimizing annotations.
void STARS_Program_t::InitOptCategory(void) {
// Default category is 0, no optimization without knowing context.
(void)memset(OptCategory, 0, sizeof(OptCategory));
// Category 1 instructions never need updating of their memory
// metadata by the Memory Monitor SDT. Currently, this is because
// these instructions only have effects on registers we do not maintain
// metadata for, such as the EIP and the FLAGS, e.g. jumps, compares,
// or because they are no-ops, including machine-dependent no-op idioms.
// Effects on floating-point regs are always NUMERIC and can be put into
// categury 1 because mmStrata knows these registers are NUMERIC and does
// not keep a metadata map for them.
// Category 2 instructions always have a result type of 'n' (number).
// Category 3 instructions have a result type of 'n' (number)
// whenever the second source operand is an operand of type 'n'.
// NOTE: MOV is only current example, and this will take some thought if
// other examples arise.
// Category 4 instructions have a result type identical to the 1st source operand type.
// NOTE: This is currently set for single-operand instructions such as
// INC, DEC. As a result, these are treated pretty much as if
// they were category 1 instructions, as there is no metadata update,
// unless the operand is a memory operand (i.e. mem or [reg]).
// If new instructions are added to this category that are not single
// operand and do require some updating, the category should be split.
// Category 5 instructions have a result type identical to the 1st source operand
// type whenever the 2nd source operand is an operand of type 'n'.
// If the destination is memory, metadata still needs to be checked; if
// not, no metadata check is needed, so it becomes category 1.
// Category 6 instructions always have a result type of 'p' (pointer).
// Category 7 instructions are category 2 instructions with two destinations,
// such as multiply and divide instructions that affect EDX:EAX. There are
// forms of these instructions that only have one destination, so they have
// to be distinguished via the operand info.
// Category 8 instructions implicitly write a numeric value to EDX:EAX, but
// EDX and EAX are not listed as operands. RDTSC, RDPMC, RDMSR, and other
// instructions that copy machine registers into EDX:EAX are category 8.
// Category 9 instructions are floating point instructions that either
// have a memory destination (treat as category 0) or a FP reg destination
// (treat as category 1).
// Category 10 instructions are the same as category 8, but also write
// to register ECX in addition to EDX:EAX.
// NOTE: The Memory Monitor SDT needs just three categories, corresponding
// to categories 0, 1, and all others. For all categories > 1, the
// annotation should tell the SDT exactly how to update its metadata.
// For example, a division instruction will write type 'n' (NUM) as
// the metadata for result registers EDX:EAX. So, the annotation should
// list 'n', EDX, EAX, and a terminator of ZZ. CWD (convert word to
// doubleword) should have a list of 'n', EAX, ZZ.
OptCategory[STARS_NN_null] = 0; // Unknown Operation
OptCategory[STARS_NN_aaa] = 2; // ASCII Adjust after Addition
OptCategory[STARS_NN_aad] = 2; // ASCII Adjust AX before Division
OptCategory[STARS_NN_aam] = 2; // ASCII Adjust AX after Multiply
OptCategory[STARS_NN_aas] = 2; // ASCII Adjust AL after Subtraction
OptCategory[STARS_NN_adc] = 5; // Add with Carry
OptCategory[STARS_NN_add] = 5; // Add
OptCategory[STARS_NN_and] = 0; // Logical AND
OptCategory[STARS_NN_arpl] = 1; // Adjust RPL Field of Selector
OptCategory[STARS_NN_bound] = 1; // Check Array Index Against Bounds
OptCategory[STARS_NN_bsf] = 2; // Bit Scan Forward
OptCategory[STARS_NN_bsr] = 2; // Bit Scan Reverse
OptCategory[STARS_NN_bt] = 0; // Bit Test
OptCategory[STARS_NN_btc] = 0; // Bit Test and Complement
OptCategory[STARS_NN_btr] = 0; // Bit Test and Reset
OptCategory[STARS_NN_bts] = 0; // Bit Test and Set
OptCategory[STARS_NN_call] = 1; // Call Procedure
OptCategory[STARS_NN_callfi] = 1; // Indirect Call Far Procedure
OptCategory[STARS_NN_callni] = 1; // Indirect Call Near Procedure
OptCategory[STARS_NN_cbw] = 2; // AL -> AX (with sign) ** No ops?
OptCategory[STARS_NN_cwde] = 2; // AX -> EAX (with sign) **
OptCategory[STARS_NN_cdqe] = 2; // EAX -> RAX (with sign) **
OptCategory[STARS_NN_clc] = 1; // Clear Carry Flag
OptCategory[STARS_NN_cld] = 1; // Clear Direction Flag
OptCategory[STARS_NN_cli] = 1; // Clear Interrupt Flag
OptCategory[STARS_NN_clts] = 1; // Clear Task-Switched Flag in CR0
OptCategory[STARS_NN_cmc] = 1; // Complement Carry Flag
OptCategory[STARS_NN_cmp] = 1; // Compare Two Operands
OptCategory[STARS_NN_cmps] = 1; // Compare Strings
OptCategory[STARS_NN_cwd] = 2; // AX -> DX:AX (with sign)
OptCategory[STARS_NN_cdq] = 2; // EAX -> EDX:EAX (with sign)
OptCategory[STARS_NN_cqo] = 2; // RAX -> RDX:RAX (with sign)
OptCategory[STARS_NN_daa] = 2; // Decimal Adjust AL after Addition
OptCategory[STARS_NN_das] = 2; // Decimal Adjust AL after Subtraction
OptCategory[STARS_NN_dec] = 4; // Decrement by 1
OptCategory[STARS_NN_div] = 7; // Unsigned Divide
OptCategory[STARS_NN_enterw] = 0; // Make Stack Frame for Procedure Parameters **
OptCategory[STARS_NN_enter] = 0; // Make Stack Frame for Procedure Parameters **
OptCategory[STARS_NN_enterd] = 0; // Make Stack Frame for Procedure Parameters **
OptCategory[STARS_NN_enterq] = 0; // Make Stack Frame for Procedure Parameters **
OptCategory[STARS_NN_hlt] = 0; // Halt
OptCategory[STARS_NN_idiv] = 7; // Signed Divide
OptCategory[STARS_NN_imul] = 7; // Signed Multiply
OptCategory[STARS_NN_in] = 0; // Input from Port **
OptCategory[STARS_NN_inc] = 4; // Increment by 1
OptCategory[STARS_NN_ins] = 2; // Input Byte(s) from Port to String **
OptCategory[STARS_NN_int] = 0; // Call to Interrupt Procedure
OptCategory[STARS_NN_into] = 0; // Call to Interrupt Procedure if Overflow Flag = 1
OptCategory[STARS_NN_int3] = 0; // Trap to Debugger
OptCategory[STARS_NN_iretw] = 0; // Interrupt Return
OptCategory[STARS_NN_iret] = 0; // Interrupt Return
OptCategory[STARS_NN_iretd] = 0; // Interrupt Return (use32)
OptCategory[STARS_NN_iretq] = 0; // Interrupt Return (use64)
OptCategory[STARS_NN_ja] = 1; // Jump if Above (CF=0 & ZF=0)
OptCategory[STARS_NN_jae] = 1; // Jump if Above or Equal (CF=0)
OptCategory[STARS_NN_jb] = 1; // Jump if Below (CF=1)
OptCategory[STARS_NN_jbe] = 1; // Jump if Below or Equal (CF=1 | ZF=1)
OptCategory[STARS_NN_jc] = 1; // Jump if Carry (CF=1)
OptCategory[STARS_NN_jcxz] = 1; // Jump if CX is 0
OptCategory[STARS_NN_jecxz] = 1; // Jump if ECX is 0
OptCategory[STARS_NN_jrcxz] = 1; // Jump if RCX is 0
OptCategory[STARS_NN_je] = 1; // Jump if Equal (ZF=1)
OptCategory[STARS_NN_jg] = 1; // Jump if Greater (ZF=0 & SF=OF)
OptCategory[STARS_NN_jge] = 1; // Jump if Greater or Equal (SF=OF)
OptCategory[STARS_NN_jl] = 1; // Jump if Less (SF!=OF)
OptCategory[STARS_NN_jle] = 1; // Jump if Less or Equal (ZF=1 | SF!=OF)
OptCategory[STARS_NN_jna] = 1; // Jump if Not Above (CF=1 | ZF=1)
OptCategory[STARS_NN_jnae] = 1; // Jump if Not Above or Equal (CF=1)
OptCategory[STARS_NN_jnb] = 1; // Jump if Not Below (CF=0)
OptCategory[STARS_NN_jnbe] = 1; // Jump if Not Below or Equal (CF=0 & ZF=0)
OptCategory[STARS_NN_jnc] = 1; // Jump if Not Carry (CF=0)
OptCategory[STARS_NN_jne] = 1; // Jump if Not Equal (ZF=0)
OptCategory[STARS_NN_jng] = 1; // Jump if Not Greater (ZF=1 | SF!=OF)
OptCategory[STARS_NN_jnge] = 1; // Jump if Not Greater or Equal (SF!=OF)
OptCategory[STARS_NN_jnl] = 1; // Jump if Not Less (SF=OF)
OptCategory[STARS_NN_jnle] = 1; // Jump if Not Less or Equal (ZF=0 & SF=OF)
OptCategory[STARS_NN_jno] = 1; // Jump if Not Overflow (OF=0)
OptCategory[STARS_NN_jnp] = 1; // Jump if Not Parity (PF=0)
OptCategory[STARS_NN_jns] = 1; // Jump if Not Sign (SF=0)
OptCategory[STARS_NN_jnz] = 1; // Jump if Not Zero (ZF=0)
OptCategory[STARS_NN_jo] = 1; // Jump if Overflow (OF=1)
OptCategory[STARS_NN_jp] = 1; // Jump if Parity (PF=1)
OptCategory[STARS_NN_jpe] = 1; // Jump if Parity Even (PF=1)
OptCategory[STARS_NN_jpo] = 1; // Jump if Parity Odd (PF=0)
OptCategory[STARS_NN_js] = 1; // Jump if Sign (SF=1)
OptCategory[STARS_NN_jz] = 1; // Jump if Zero (ZF=1)
OptCategory[STARS_NN_jmp] = 1; // Jump
OptCategory[STARS_NN_jmpfi] = 1; // Indirect Far Jump
OptCategory[STARS_NN_jmpni] = 1; // Indirect Near Jump
OptCategory[STARS_NN_jmpshort] = 1; // Jump Short (not used)
OptCategory[STARS_NN_lahf] = 2; // Load Flags into AH Register
OptCategory[STARS_NN_lar] = 2; // Load Access Rights Byte
OptCategory[STARS_NN_lea] = 0; // Load Effective Address **
OptCategory[STARS_NN_leavew] = 0; // High Level Procedure Exit **
OptCategory[STARS_NN_leave] = 0; // High Level Procedure Exit **
OptCategory[STARS_NN_leaved] = 0; // High Level Procedure Exit **
OptCategory[STARS_NN_leaveq] = 0; // High Level Procedure Exit **
OptCategory[STARS_NN_lgdt] = 0; // Load Global Descriptor Table Register
OptCategory[STARS_NN_lidt] = 0; // Load Interrupt Descriptor Table Register
OptCategory[STARS_NN_lgs] = 6; // Load Full Pointer to GS:xx
OptCategory[STARS_NN_lss] = 6; // Load Full Pointer to SS:xx
OptCategory[STARS_NN_lds] = 6; // Load Full Pointer to DS:xx
OptCategory[STARS_NN_les] = 6; // Load Full Pointer to ES:xx
OptCategory[STARS_NN_lfs] = 6; // Load Full Pointer to FS:xx
OptCategory[STARS_NN_lldt] = 0; // Load Local Descriptor Table Register
OptCategory[STARS_NN_lmsw] = 1; // Load Machine Status Word
OptCategory[STARS_NN_lock] = 1; // Assert LOCK# Signal Prefix
OptCategory[STARS_NN_lods] = 0; // Load String
OptCategory[STARS_NN_loopw] = 1; // Loop while ECX != 0
OptCategory[STARS_NN_loop] = 1; // Loop while CX != 0
OptCategory[STARS_NN_loopd] = 1; // Loop while ECX != 0
OptCategory[STARS_NN_loopq] = 1; // Loop while RCX != 0
OptCategory[STARS_NN_loopwe] = 1; // Loop while CX != 0 and ZF=1
OptCategory[STARS_NN_loope] = 1; // Loop while rCX != 0 and ZF=1
OptCategory[STARS_NN_loopde] = 1; // Loop while ECX != 0 and ZF=1
OptCategory[STARS_NN_loopqe] = 1; // Loop while RCX != 0 and ZF=1
OptCategory[STARS_NN_loopwne] = 1; // Loop while CX != 0 and ZF=0
OptCategory[STARS_NN_loopne] = 1; // Loop while rCX != 0 and ZF=0
OptCategory[STARS_NN_loopdne] = 1; // Loop while ECX != 0 and ZF=0
OptCategory[STARS_NN_loopqne] = 1; // Loop while RCX != 0 and ZF=0
OptCategory[STARS_NN_lsl] = 6; // Load Segment Limit
OptCategory[STARS_NN_ltr] = 1; // Load Task Register
OptCategory[STARS_NN_mov] = 3; // Move Data
OptCategory[STARS_NN_movsp] = 3; // Move to/from Special Registers
OptCategory[STARS_NN_movs] = 0; // Move Byte(s) from String to String
OptCategory[STARS_NN_movsx] = 3; // Move with Sign-Extend
OptCategory[STARS_NN_movzx] = 3; // Move with Zero-Extend
OptCategory[STARS_NN_mul] = 7; // Unsigned Multiplication of AL or AX
OptCategory[STARS_NN_neg] = 2; // Two's Complement Negation !!!!****!!!! Change this when mmStrata handles NEGATEDPTR type.
OptCategory[STARS_NN_nop] = 1; // No Operation
OptCategory[STARS_NN_not] = 2; // One's Complement Negation
OptCategory[STARS_NN_or] = 0; // Logical Inclusive OR
OptCategory[STARS_NN_out] = 0; // Output to Port
OptCategory[STARS_NN_outs] = 0; // Output Byte(s) to Port
OptCategory[STARS_NN_pop] = 0; // Pop a word from the Stack
OptCategory[STARS_NN_popaw] = 0; // Pop all General Registers
OptCategory[STARS_NN_popa] = 0; // Pop all General Registers
OptCategory[STARS_NN_popad] = 0; // Pop all General Registers (use32)
OptCategory[STARS_NN_popaq] = 0; // Pop all General Registers (use64)
OptCategory[STARS_NN_popfw] = 1; // Pop Stack into Flags Register **
OptCategory[STARS_NN_popf] = 1; // Pop Stack into Flags Register **
OptCategory[STARS_NN_popfd] = 1; // Pop Stack into Eflags Register **
OptCategory[STARS_NN_popfq] = 1; // Pop Stack into Rflags Register **
OptCategory[STARS_NN_push] = 0; // Push Operand onto the Stack
OptCategory[STARS_NN_pushaw] = 0; // Push all General Registers
OptCategory[STARS_NN_pusha] = 0; // Push all General Registers
OptCategory[STARS_NN_pushad] = 0; // Push all General Registers (use32)
OptCategory[STARS_NN_pushaq] = 0; // Push all General Registers (use64)
OptCategory[STARS_NN_pushfw] = 0; // Push Flags Register onto the Stack
OptCategory[STARS_NN_pushf] = 0; // Push Flags Register onto the Stack
OptCategory[STARS_NN_pushfd] = 0; // Push Flags Register onto the Stack (use32)
OptCategory[STARS_NN_pushfq] = 0; // Push Flags Register onto the Stack (use64)
OptCategory[STARS_NN_rcl] = 2; // Rotate Through Carry Left
OptCategory[STARS_NN_rcr] = 2; // Rotate Through Carry Right
OptCategory[STARS_NN_rol] = 2; // Rotate Left
OptCategory[STARS_NN_ror] = 2; // Rotate Right
OptCategory[STARS_NN_rep] = 0; // Repeat String Operation
OptCategory[STARS_NN_repe] = 0; // Repeat String Operation while ZF=1
OptCategory[STARS_NN_repne] = 0; // Repeat String Operation while ZF=0
OptCategory[STARS_NN_retn] = 0; // Return Near from Procedure
OptCategory[STARS_NN_retf] = 0; // Return Far from Procedure
OptCategory[STARS_NN_sahf] = 1; // Store AH into Flags Register
OptCategory[STARS_NN_sal] = 2; // Shift Arithmetic Left
OptCategory[STARS_NN_sar] = 2; // Shift Arithmetic Right
OptCategory[STARS_NN_shl] = 2; // Shift Logical Left
OptCategory[STARS_NN_shr] = 2; // Shift Logical Right
OptCategory[STARS_NN_sbb] = 5; // Integer Subtraction with Borrow
OptCategory[STARS_NN_scas] = 1; // Compare String
OptCategory[STARS_NN_seta] = 2; // Set Byte if Above (CF=0 & ZF=0)
OptCategory[STARS_NN_setae] = 2; // Set Byte if Above or Equal (CF=0)
OptCategory[STARS_NN_setb] = 2; // Set Byte if Below (CF=1)
OptCategory[STARS_NN_setbe] = 2; // Set Byte if Below or Equal (CF=1 | ZF=1)
OptCategory[STARS_NN_setc] = 2; // Set Byte if Carry (CF=1)
OptCategory[STARS_NN_sete] = 2; // Set Byte if Equal (ZF=1)
OptCategory[STARS_NN_setg] = 2; // Set Byte if Greater (ZF=0 & SF=OF)
OptCategory[STARS_NN_setge] = 2; // Set Byte if Greater or Equal (SF=OF)
OptCategory[STARS_NN_setl] = 2; // Set Byte if Less (SF!=OF)
OptCategory[STARS_NN_setle] = 2; // Set Byte if Less or Equal (ZF=1 | SF!=OF)
OptCategory[STARS_NN_setna] = 2; // Set Byte if Not Above (CF=1 | ZF=1)
OptCategory[STARS_NN_setnae] = 2; // Set Byte if Not Above or Equal (CF=1)
OptCategory[STARS_NN_setnb] = 2; // Set Byte if Not Below (CF=0)
OptCategory[STARS_NN_setnbe] = 2; // Set Byte if Not Below or Equal (CF=0 & ZF=0)
OptCategory[STARS_NN_setnc] = 2; // Set Byte if Not Carry (CF=0)
OptCategory[STARS_NN_setne] = 2; // Set Byte if Not Equal (ZF=0)
OptCategory[STARS_NN_setng] = 2; // Set Byte if Not Greater (ZF=1 | SF!=OF)
OptCategory[STARS_NN_setnge] = 2; // Set Byte if Not Greater or Equal (SF!=OF)
OptCategory[STARS_NN_setnl] = 2; // Set Byte if Not Less (SF=OF)
OptCategory[STARS_NN_setnle] = 2; // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
OptCategory[STARS_NN_setno] = 2; // Set Byte if Not Overflow (OF=0)
OptCategory[STARS_NN_setnp] = 2; // Set Byte if Not Parity (PF=0)
OptCategory[STARS_NN_setns] = 2; // Set Byte if Not Sign (SF=0)
OptCategory[STARS_NN_setnz] = 2; // Set Byte if Not Zero (ZF=0)
OptCategory[STARS_NN_seto] = 2; // Set Byte if Overflow (OF=1)
OptCategory[STARS_NN_setp] = 2; // Set Byte if Parity (PF=1)
OptCategory[STARS_NN_setpe] = 2; // Set Byte if Parity Even (PF=1)
OptCategory[STARS_NN_setpo] = 2; // Set Byte if Parity Odd (PF=0)
OptCategory[STARS_NN_sets] = 2; // Set Byte if Sign (SF=1)
OptCategory[STARS_NN_setz] = 2; // Set Byte if Zero (ZF=1)
OptCategory[STARS_NN_sgdt] = 0; // Store Global Descriptor Table Register
OptCategory[STARS_NN_sidt] = 0; // Store Interrupt Descriptor Table Register
OptCategory[STARS_NN_shld] = 2; // Double Precision Shift Left
OptCategory[STARS_NN_shrd] = 2; // Double Precision Shift Right
OptCategory[STARS_NN_sldt] = 6; // Store Local Descriptor Table Register
OptCategory[STARS_NN_smsw] = 2; // Store Machine Status Word
OptCategory[STARS_NN_stc] = 1; // Set Carry Flag
OptCategory[STARS_NN_std] = 1; // Set Direction Flag
OptCategory[STARS_NN_sti] = 1; // Set Interrupt Flag
OptCategory[STARS_NN_stos] = 0; // Store String
OptCategory[STARS_NN_str] = 6; // Store Task Register
OptCategory[STARS_NN_sub] = 5; // Integer Subtraction
OptCategory[STARS_NN_test] = 1; // Logical Compare
OptCategory[STARS_NN_verr] = 1; // Verify a Segment for Reading
OptCategory[STARS_NN_verw] = 1; // Verify a Segment for Writing
OptCategory[STARS_NN_wait] = 1; // Wait until BUSY# Pin is Inactive (HIGH)
OptCategory[STARS_NN_xchg] = 0; // Exchange Register/Memory with Register
OptCategory[STARS_NN_xlat] = 0; // Table Lookup Translation
OptCategory[STARS_NN_xor] = 2; // Logical Exclusive OR
//
// 486 instructions
//
OptCategory[STARS_NN_cmpxchg] = 0; // Compare and Exchange
OptCategory[STARS_NN_bswap] = 2; // Swap bytes in register
OptCategory[STARS_NN_xadd] = 0; // t<-dest; dest<-src+dest; src<-t
OptCategory[STARS_NN_invd] = 1; // Invalidate Data Cache
OptCategory[STARS_NN_wbinvd] = 1; // Invalidate Data Cache (write changes)
OptCategory[STARS_NN_invlpg] = 1; // Invalidate TLB entry
//
// Pentium instructions
//
OptCategory[STARS_NN_rdmsr] = 8; // Read Machine Status Register
OptCategory[STARS_NN_wrmsr] = 1; // Write Machine Status Register
OptCategory[STARS_NN_cpuid] = 8; // Get CPU ID
OptCategory[STARS_NN_cmpxchg8b] = 0; // Compare and Exchange Eight Bytes
OptCategory[STARS_NN_rdtsc] = 8; // Read Time Stamp Counter
OptCategory[STARS_NN_rsm] = 1; // Resume from System Management Mode
//
// Pentium Pro instructions
//
OptCategory[STARS_NN_cmova] = 0; // Move if Above (CF=0 & ZF=0)
OptCategory[STARS_NN_cmovb] = 0; // Move if Below (CF=1)
OptCategory[STARS_NN_cmovbe] = 0; // Move if Below or Equal (CF=1 | ZF=1)
OptCategory[STARS_NN_cmovg] = 0; // Move if Greater (ZF=0 & SF=OF)
OptCategory[STARS_NN_cmovge] = 0; // Move if Greater or Equal (SF=OF)
OptCategory[STARS_NN_cmovl] = 0; // Move if Less (SF!=OF)
OptCategory[STARS_NN_cmovle] = 0; // Move if Less or Equal (ZF=1 | SF!=OF)
OptCategory[STARS_NN_cmovnb] = 0; // Move if Not Below (CF=0)
OptCategory[STARS_NN_cmovno] = 0; // Move if Not Overflow (OF=0)
OptCategory[STARS_NN_cmovnp] = 0; // Move if Not Parity (PF=0)
OptCategory[STARS_NN_cmovns] = 0; // Move if Not Sign (SF=0)
OptCategory[STARS_NN_cmovnz] = 0; // Move if Not Zero (ZF=0)
OptCategory[STARS_NN_cmovo] = 0; // Move if Overflow (OF=1)
OptCategory[STARS_NN_cmovp] = 0; // Move if Parity (PF=1)
OptCategory[STARS_NN_cmovs] = 0; // Move if Sign (SF=1)
OptCategory[STARS_NN_cmovz] = 0; // Move if Zero (ZF=1)
OptCategory[STARS_NN_fcmovb] = 1; // Floating Move if Below
OptCategory[STARS_NN_fcmove] = 1; // Floating Move if Equal
OptCategory[STARS_NN_fcmovbe] = 1; // Floating Move if Below or Equal
OptCategory[STARS_NN_fcmovu] = 1; // Floating Move if Unordered
OptCategory[STARS_NN_fcmovnb] = 1; // Floating Move if Not Below
OptCategory[STARS_NN_fcmovne] = 1; // Floating Move if Not Equal
OptCategory[STARS_NN_fcmovnbe] = 1; // Floating Move if Not Below or Equal
OptCategory[STARS_NN_fcmovnu] = 1; // Floating Move if Not Unordered
OptCategory[STARS_NN_fcomi] = 1; // FP Compare, result in EFLAGS
OptCategory[STARS_NN_fucomi] = 1; // FP Unordered Compare, result in EFLAGS
OptCategory[STARS_NN_fcomip] = 1; // FP Compare, result in EFLAGS, pop stack
OptCategory[STARS_NN_fucomip] = 1; // FP Unordered Compare, result in EFLAGS, pop stack
OptCategory[STARS_NN_rdpmc] = 8; // Read Performance Monitor Counter
//
// FPP instructions
//
OptCategory[STARS_NN_fld] = 1; // Load Real ** Infer src is 'n'
OptCategory[STARS_NN_fst] = 9; // Store Real
OptCategory[STARS_NN_fstp] = 9; // Store Real and Pop
OptCategory[STARS_NN_fxch] = 1; // Exchange Registers
OptCategory[STARS_NN_fild] = 1; // Load Integer ** Infer src is 'n'
OptCategory[STARS_NN_fist] = 0; // Store Integer
OptCategory[STARS_NN_fistp] = 0; // Store Integer and Pop
OptCategory[STARS_NN_fbld] = 1; // Load BCD
OptCategory[STARS_NN_fbstp] = 0; // Store BCD and Pop
OptCategory[STARS_NN_fadd] = 1; // Add Real
OptCategory[STARS_NN_faddp] = 1; // Add Real and Pop
OptCategory[STARS_NN_fiadd] = 1; // Add Integer
OptCategory[STARS_NN_fsub] = 1; // Subtract Real
OptCategory[STARS_NN_fsubp] = 1; // Subtract Real and Pop
OptCategory[STARS_NN_fisub] = 1; // Subtract Integer
OptCategory[STARS_NN_fsubr] = 1; // Subtract Real Reversed
OptCategory[STARS_NN_fsubrp] = 1; // Subtract Real Reversed and Pop
OptCategory[STARS_NN_fisubr] = 1; // Subtract Integer Reversed
OptCategory[STARS_NN_fmul] = 1; // Multiply Real
OptCategory[STARS_NN_fmulp] = 1; // Multiply Real and Pop
OptCategory[STARS_NN_fimul] = 1; // Multiply Integer
OptCategory[STARS_NN_fdiv] = 1; // Divide Real
OptCategory[STARS_NN_fdivp] = 1; // Divide Real and Pop
OptCategory[STARS_NN_fidiv] = 1; // Divide Integer
OptCategory[STARS_NN_fdivr] = 1; // Divide Real Reversed
OptCategory[STARS_NN_fdivrp] = 1; // Divide Real Reversed and Pop
OptCategory[STARS_NN_fidivr] = 1; // Divide Integer Reversed
OptCategory[STARS_NN_fsqrt] = 1; // Square Root
OptCategory[STARS_NN_fscale] = 1; // Scale: st(0) <- st(0) * 2^st(1)
OptCategory[STARS_NN_fprem] = 1; // Partial Remainder
OptCategory[STARS_NN_frndint] = 1; // Round to Integer
OptCategory[STARS_NN_fxtract] = 1; // Extract exponent and significand
OptCategory[STARS_NN_fabs] = 1; // Absolute value
OptCategory[STARS_NN_fchs] = 1; // Change Sign
OptCategory[STARS_NN_fcom] = 1; // Compare Real
OptCategory[STARS_NN_fcomp] = 1; // Compare Real and Pop
OptCategory[STARS_NN_fcompp] = 1; // Compare Real and Pop Twice
OptCategory[STARS_NN_ficom] = 1; // Compare Integer
OptCategory[STARS_NN_ficomp] = 1; // Compare Integer and Pop
OptCategory[STARS_NN_ftst] = 1; // Test
OptCategory[STARS_NN_fxam] = 1; // Examine
OptCategory[STARS_NN_fptan] = 1; // Partial tangent
OptCategory[STARS_NN_fpatan] = 1; // Partial arctangent
OptCategory[STARS_NN_f2xm1] = 1; // 2^x - 1
OptCategory[STARS_NN_fyl2x] = 1; // Y * lg2(X)
OptCategory[STARS_NN_fyl2xp1] = 1; // Y * lg2(X+1)
OptCategory[STARS_NN_fldz] = 1; // Load +0.0
OptCategory[STARS_NN_fld1] = 1; // Load +1.0
OptCategory[STARS_NN_fldpi] = 1; // Load PI=3.14...
OptCategory[STARS_NN_fldl2t] = 1; // Load lg2(10)
OptCategory[STARS_NN_fldl2e] = 1; // Load lg2(e)
OptCategory[STARS_NN_fldlg2] = 1; // Load lg10(2)
OptCategory[STARS_NN_fldln2] = 1; // Load ln(2)
OptCategory[STARS_NN_finit] = 1; // Initialize Processor
OptCategory[STARS_NN_fninit] = 1; // Initialize Processor (no wait)
OptCategory[STARS_NN_fsetpm] = 1; // Set Protected Mode
OptCategory[STARS_NN_fldcw] = 1; // Load Control Word
OptCategory[STARS_NN_fstcw] = 0; // Store Control Word
OptCategory[STARS_NN_fnstcw] = 0; // Store Control Word (no wait)
OptCategory[STARS_NN_fstsw] = 2; // Store Status Word to memory or AX
OptCategory[STARS_NN_fnstsw] = 2; // Store Status Word (no wait) to memory or AX
OptCategory[STARS_NN_fclex] = 1; // Clear Exceptions
OptCategory[STARS_NN_fnclex] = 1; // Clear Exceptions (no wait)
OptCategory[STARS_NN_fstenv] = 0; // Store Environment
OptCategory[STARS_NN_fnstenv] = 0; // Store Environment (no wait)
OptCategory[STARS_NN_fldenv] = 1; // Load Environment
OptCategory[STARS_NN_fsave] = 0; // Save State
OptCategory[STARS_NN_fnsave] = 0; // Save State (no wait)
OptCategory[STARS_NN_frstor] = 1; // Restore State ** infer src is 'n'
OptCategory[STARS_NN_fincstp] = 1; // Increment Stack Pointer
OptCategory[STARS_NN_fdecstp] = 1; // Decrement Stack Pointer
OptCategory[STARS_NN_ffree] = 1; // Free Register
OptCategory[STARS_NN_fnop] = 1; // No Operation
OptCategory[STARS_NN_feni] = 1; // (8087 only)
OptCategory[STARS_NN_fneni] = 1; // (no wait) (8087 only)
OptCategory[STARS_NN_fdisi] = 1; // (8087 only)
OptCategory[STARS_NN_fndisi] = 1; // (no wait) (8087 only)
//
// 80387 instructions
//
OptCategory[STARS_NN_fprem1] = 1; // Partial Remainder ( < half )
OptCategory[STARS_NN_fsincos] = 1; // t<-cos(st); st<-sin(st); push t
OptCategory[STARS_NN_fsin] = 1; // Sine
OptCategory[STARS_NN_fcos] = 1; // Cosine
OptCategory[STARS_NN_fucom] = 1; // Compare Unordered Real
OptCategory[STARS_NN_fucomp] = 1; // Compare Unordered Real and Pop
OptCategory[STARS_NN_fucompp] = 1; // Compare Unordered Real and Pop Twice
//
// Instructions added 28.02.96
//
OptCategory[STARS_NN_setalc] = 2; // Set AL to Carry Flag **
OptCategory[STARS_NN_svdc] = 0; // Save Register and Descriptor
OptCategory[STARS_NN_rsdc] = 0; // Restore Register and Descriptor
OptCategory[STARS_NN_svldt] = 0; // Save LDTR and Descriptor
OptCategory[STARS_NN_rsldt] = 0; // Restore LDTR and Descriptor
OptCategory[STARS_NN_svts] = 1; // Save TR and Descriptor
OptCategory[STARS_NN_rsts] = 1; // Restore TR and Descriptor
OptCategory[STARS_NN_icebp] = 1; // ICE Break Point
OptCategory[STARS_NN_loadall] = 0; // Load the entire CPU state from ES:EDI
//
// MMX instructions
//
OptCategory[STARS_NN_emms] = 1; // Empty MMX state
OptCategory[STARS_NN_movd] = 9; // Move 32 bits
OptCategory[STARS_NN_movq] = 9; // Move 64 bits
OptCategory[STARS_NN_packsswb] = 1; // Pack with Signed Saturation (Word->Byte)
OptCategory[STARS_NN_packssdw] = 1; // Pack with Signed Saturation (Dword->Word)
OptCategory[STARS_NN_packuswb] = 1; // Pack with Unsigned Saturation (Word->Byte)
OptCategory[STARS_NN_paddb] = 1; // Packed Add Byte
OptCategory[STARS_NN_paddw] = 1; // Packed Add Word
OptCategory[STARS_NN_paddd] = 1; // Packed Add Dword
OptCategory[STARS_NN_paddsb] = 1; // Packed Add with Saturation (Byte)
OptCategory[STARS_NN_paddsw] = 1; // Packed Add with Saturation (Word)
OptCategory[STARS_NN_paddusb] = 1; // Packed Add Unsigned with Saturation (Byte)
OptCategory[STARS_NN_paddusw] = 1; // Packed Add Unsigned with Saturation (Word)
OptCategory[STARS_NN_pand] = 1; // Bitwise Logical And
OptCategory[STARS_NN_pandn] = 1; // Bitwise Logical And Not
OptCategory[STARS_NN_pcmpeqb] = 1; // Packed Compare for Equal (Byte)
OptCategory[STARS_NN_pcmpeqw] = 1; // Packed Compare for Equal (Word)
OptCategory[STARS_NN_pcmpeqd] = 1; // Packed Compare for Equal (Dword)
OptCategory[STARS_NN_pcmpgtb] = 1; // Packed Compare for Greater Than (Byte)
OptCategory[STARS_NN_pcmpgtw] = 1; // Packed Compare for Greater Than (Word)
OptCategory[STARS_NN_pcmpgtd] = 1; // Packed Compare for Greater Than (Dword)
OptCategory[STARS_NN_pmaddwd] = 1; // Packed Multiply and Add
OptCategory[STARS_NN_pmulhw] = 1; // Packed Multiply High
OptCategory[STARS_NN_pmullw] = 1; // Packed Multiply Low
OptCategory[STARS_NN_por] = 1; // Bitwise Logical Or
OptCategory[STARS_NN_psllw] = 1; // Packed Shift Left Logical (Word)
OptCategory[STARS_NN_pslld] = 1; // Packed Shift Left Logical (Dword)
OptCategory[STARS_NN_psllq] = 1; // Packed Shift Left Logical (Qword)
OptCategory[STARS_NN_psraw] = 1; // Packed Shift Right Arithmetic (Word)
OptCategory[STARS_NN_psrad] = 1; // Packed Shift Right Arithmetic (Dword)
OptCategory[STARS_NN_psrlw] = 1; // Packed Shift Right Logical (Word)
OptCategory[STARS_NN_psrld] = 1; // Packed Shift Right Logical (Dword)
OptCategory[STARS_NN_psrlq] = 1; // Packed Shift Right Logical (Qword)
OptCategory[STARS_NN_psubb] = 1; // Packed Subtract Byte
OptCategory[STARS_NN_psubw] = 1; // Packed Subtract Word
OptCategory[STARS_NN_psubd] = 1; // Packed Subtract Dword
OptCategory[STARS_NN_psubsb] = 1; // Packed Subtract with Saturation (Byte)
OptCategory[STARS_NN_psubsw] = 1; // Packed Subtract with Saturation (Word)
OptCategory[STARS_NN_psubusb] = 1; // Packed Subtract Unsigned with Saturation (Byte)
OptCategory[STARS_NN_psubusw] = 1; // Packed Subtract Unsigned with Saturation (Word)
OptCategory[STARS_NN_punpckhbw] = 1; // Unpack High Packed Data (Byte->Word)
OptCategory[STARS_NN_punpckhwd] = 1; // Unpack High Packed Data (Word->Dword)
OptCategory[STARS_NN_punpckhdq] = 1; // Unpack High Packed Data (Dword->Qword)
OptCategory[STARS_NN_punpcklbw] = 1; // Unpack Low Packed Data (Byte->Word)
OptCategory[STARS_NN_punpcklwd] = 1; // Unpack Low Packed Data (Word->Dword)
OptCategory[STARS_NN_punpckldq] = 1; // Unpack Low Packed Data (Dword->Qword)
OptCategory[STARS_NN_pxor] = 1; // Bitwise Logical Exclusive Or
//
// Undocumented Deschutes processor instructions
//
OptCategory[STARS_NN_fxsave] = 1; // Fast save FP context ** to where?
OptCategory[STARS_NN_fxrstor] = 1; // Fast restore FP context ** from where?
// Pentium II instructions
OptCategory[STARS_NN_sysenter] = 1; // Fast Transition to System Call Entry Point
OptCategory[STARS_NN_sysexit] = 1; // Fast Transition from System Call Entry Point
// 3DNow! instructions
OptCategory[STARS_NN_pavgusb] = 1; // Packed 8-bit Unsigned Integer Averaging
OptCategory[STARS_NN_pfadd] = 1; // Packed Floating-Point Addition
OptCategory[STARS_NN_pfsub] = 1; // Packed Floating-Point Subtraction
OptCategory[STARS_NN_pfsubr] = 1; // Packed Floating-Point Reverse Subtraction
OptCategory[STARS_NN_pfacc] = 1; // Packed Floating-Point Accumulate
OptCategory[STARS_NN_pfcmpge] = 1; // Packed Floating-Point Comparison, Greater or Equal
OptCategory[STARS_NN_pfcmpgt] = 1; // Packed Floating-Point Comparison, Greater
OptCategory[STARS_NN_pfcmpeq] = 1; // Packed Floating-Point Comparison, Equal
OptCategory[STARS_NN_pfmin] = 1; // Packed Floating-Point Minimum
OptCategory[STARS_NN_pfmax] = 1; // Packed Floating-Point Maximum
OptCategory[STARS_NN_pi2fd] = 1; // Packed 32-bit Integer to Floating-Point
OptCategory[STARS_NN_pf2id] = 1; // Packed Floating-Point to 32-bit Integer
OptCategory[STARS_NN_pfrcp] = 1; // Packed Floating-Point Reciprocal Approximation
OptCategory[STARS_NN_pfrsqrt] = 1; // Packed Floating-Point Reciprocal Square Root Approximation
OptCategory[STARS_NN_pfmul] = 1; // Packed Floating-Point Multiplication
OptCategory[STARS_NN_pfrcpit1] = 1; // Packed Floating-Point Reciprocal First Iteration Step
OptCategory[STARS_NN_pfrsqit1] = 1; // Packed Floating-Point Reciprocal Square Root First Iteration Step
OptCategory[STARS_NN_pfrcpit2] = 1; // Packed Floating-Point Reciprocal Second Iteration Step
OptCategory[STARS_NN_pmulhrw] = 1; // Packed Floating-Point 16-bit Integer Multiply with rounding
OptCategory[STARS_NN_femms] = 1; // Faster entry/exit of the MMX or floating-point state
OptCategory[STARS_NN_prefetch] = 1; // Prefetch at least a 32-byte line into L1 data cache
OptCategory[STARS_NN_prefetchw] = 1; // Prefetch processor cache line into L1 data cache (mark as modified)
// Pentium III instructions
OptCategory[STARS_NN_addps] = 1; // Packed Single-FP Add
OptCategory[STARS_NN_addss] = 1; // Scalar Single-FP Add
OptCategory[STARS_NN_andnps] = 1; // Bitwise Logical And Not for Single-FP
OptCategory[STARS_NN_andps] = 1; // Bitwise Logical And for Single-FP
OptCategory[STARS_NN_cmpps] = 1; // Packed Single-FP Compare
OptCategory[STARS_NN_cmpss] = 1; // Scalar Single-FP Compare
OptCategory[STARS_NN_comiss] = 1; // Scalar Ordered Single-FP Compare and Set EFLAGS
OptCategory[STARS_NN_cvtpi2ps] = 1; // Packed signed INT32 to Packed Single-FP conversion
OptCategory[STARS_NN_cvtps2pi] = 1; // Packed Single-FP to Packed INT32 conversion
OptCategory[STARS_NN_cvtsi2ss] = 1; // Scalar signed INT32 to Single-FP conversion
OptCategory[STARS_NN_cvtss2si] = 2; // Scalar Single-FP to signed INT32 conversion
OptCategory[STARS_NN_cvttps2pi] = 1; // Packed Single-FP to Packed INT32 conversion (truncate)
OptCategory[STARS_NN_cvttss2si] = 2; // Scalar Single-FP to signed INT32 conversion (truncate)
OptCategory[STARS_NN_divps] = 1; // Packed Single-FP Divide
OptCategory[STARS_NN_divss] = 1; // Scalar Single-FP Divide
OptCategory[STARS_NN_ldmxcsr] = 1; // Load Streaming SIMD Extensions Technology Control/Status Register
OptCategory[STARS_NN_maxps] = 1; // Packed Single-FP Maximum
OptCategory[STARS_NN_maxss] = 1; // Scalar Single-FP Maximum
OptCategory[STARS_NN_minps] = 1; // Packed Single-FP Minimum
OptCategory[STARS_NN_minss] = 1; // Scalar Single-FP Minimum
OptCategory[STARS_NN_movaps] = 9; // Move Aligned Four Packed Single-FP ** infer memsrc 'n'?
OptCategory[STARS_NN_movhlps] = 1; // Move High to Low Packed Single-FP
OptCategory[STARS_NN_movhps] = 1; // Move High Packed Single-FP
OptCategory[STARS_NN_movlhps] = 1; // Move Low to High Packed Single-FP
OptCategory[STARS_NN_movlps] = 1; // Move Low Packed Single-FP
OptCategory[STARS_NN_movmskps] = 1; // Move Mask to Register
OptCategory[STARS_NN_movss] = 9; // Move Scalar Single-FP
OptCategory[STARS_NN_movups] = 9; // Move Unaligned Four Packed Single-FP
OptCategory[STARS_NN_mulps] = 1; // Packed Single-FP Multiply
OptCategory[STARS_NN_mulss] = 1; // Scalar Single-FP Multiply
OptCategory[STARS_NN_orps] = 1; // Bitwise Logical OR for Single-FP Data
OptCategory[STARS_NN_rcpps] = 1; // Packed Single-FP Reciprocal
OptCategory[STARS_NN_rcpss] = 1; // Scalar Single-FP Reciprocal
OptCategory[STARS_NN_rsqrtps] = 1; // Packed Single-FP Square Root Reciprocal
OptCategory[STARS_NN_rsqrtss] = 1; // Scalar Single-FP Square Root Reciprocal
OptCategory[STARS_NN_shufps] = 1; // Shuffle Single-FP
OptCategory[STARS_NN_sqrtps] = 1; // Packed Single-FP Square Root
OptCategory[STARS_NN_sqrtss] = 1; // Scalar Single-FP Square Root
OptCategory[STARS_NN_stmxcsr] = 0; // Store Streaming SIMD Extensions Technology Control/Status Register ** Infer dest is 'n'
OptCategory[STARS_NN_subps] = 1; // Packed Single-FP Subtract
OptCategory[STARS_NN_subss] = 1; // Scalar Single-FP Subtract
OptCategory[STARS_NN_ucomiss] = 1; // Scalar Unordered Single-FP Compare and Set EFLAGS
OptCategory[STARS_NN_unpckhps] = 1; // Unpack High Packed Single-FP Data
OptCategory[STARS_NN_unpcklps] = 1; // Unpack Low Packed Single-FP Data
OptCategory[STARS_NN_xorps] = 1; // Bitwise Logical XOR for Single-FP Data
OptCategory[STARS_NN_pavgb] = 1; // Packed Average (Byte)
OptCategory[STARS_NN_pavgw] = 1; // Packed Average (Word)
OptCategory[STARS_NN_pextrw] = 2; // Extract Word
OptCategory[STARS_NN_pinsrw] = 1; // Insert Word
OptCategory[STARS_NN_pmaxsw] = 1; // Packed Signed Integer Word Maximum
OptCategory[STARS_NN_pmaxub] = 1; // Packed Unsigned Integer Byte Maximum
OptCategory[STARS_NN_pminsw] = 1; // Packed Signed Integer Word Minimum
OptCategory[STARS_NN_pminub] = 1; // Packed Unsigned Integer Byte Minimum
OptCategory[STARS_NN_pmovmskb] = 1; // Move Byte Mask to Integer
OptCategory[STARS_NN_pmulhuw] = 1; // Packed Multiply High Unsigned
OptCategory[STARS_NN_psadbw] = 1; // Packed Sum of Absolute Differences
OptCategory[STARS_NN_pshufw] = 1; // Packed Shuffle Word
OptCategory[STARS_NN_maskmovq] = 0; // Byte Mask write ** Infer dest is 'n'
OptCategory[STARS_NN_movntps] = 0; // Move Aligned Four Packed Single-FP Non Temporal * infer dest is 'n'
OptCategory[STARS_NN_movntq] = 0; // Move 64 Bits Non Temporal ** Infer dest is 'n'
OptCategory[STARS_NN_prefetcht0] = 1; // Prefetch to all cache levels
OptCategory[STARS_NN_prefetcht1] = 1; // Prefetch to all cache levels
OptCategory[STARS_NN_prefetcht2] = 1; // Prefetch to L2 cache
OptCategory[STARS_NN_prefetchnta] = 1; // Prefetch to L1 cache
OptCategory[STARS_NN_sfence] = 1; // Store Fence
// Pentium III Pseudo instructions
OptCategory[STARS_NN_cmpeqps] = 1; // Packed Single-FP Compare EQ
OptCategory[STARS_NN_cmpltps] = 1; // Packed Single-FP Compare LT
OptCategory[STARS_NN_cmpleps] = 1; // Packed Single-FP Compare LE
OptCategory[STARS_NN_cmpunordps] = 1; // Packed Single-FP Compare UNORD
OptCategory[STARS_NN_cmpneqps] = 1; // Packed Single-FP Compare NOT EQ
OptCategory[STARS_NN_cmpnltps] = 1; // Packed Single-FP Compare NOT LT
OptCategory[STARS_NN_cmpnleps] = 1; // Packed Single-FP Compare NOT LE
OptCategory[STARS_NN_cmpordps] = 1; // Packed Single-FP Compare ORDERED
OptCategory[STARS_NN_cmpeqss] = 1; // Scalar Single-FP Compare EQ
OptCategory[STARS_NN_cmpltss] = 1; // Scalar Single-FP Compare LT
OptCategory[STARS_NN_cmpless] = 1; // Scalar Single-FP Compare LE
OptCategory[STARS_NN_cmpunordss] = 1; // Scalar Single-FP Compare UNORD
OptCategory[STARS_NN_cmpneqss] = 1; // Scalar Single-FP Compare NOT EQ
OptCategory[STARS_NN_cmpnltss] = 1; // Scalar Single-FP Compare NOT LT
OptCategory[STARS_NN_cmpnless] = 1; // Scalar Single-FP Compare NOT LE
OptCategory[STARS_NN_cmpordss] = 1; // Scalar Single-FP Compare ORDERED
// AMD K7 instructions
// Revisit AMD if we port to it.
OptCategory[STARS_NN_pf2iw] = 0; // Packed Floating-Point to Integer with Sign Extend
OptCategory[STARS_NN_pfnacc] = 0; // Packed Floating-Point Negative Accumulate
OptCategory[STARS_NN_pfpnacc] = 0; // Packed Floating-Point Mixed Positive-Negative Accumulate
OptCategory[STARS_NN_pi2fw] = 0; // Packed 16-bit Integer to Floating-Point
OptCategory[STARS_NN_pswapd] = 0; // Packed Swap Double Word
// Undocumented FP instructions (thanks to norbert.juffa@adm.com)
OptCategory[STARS_NN_fstp1] = 9; // Alias of Store Real and Pop
OptCategory[STARS_NN_fcom2] = 1; // Alias of Compare Real
OptCategory[STARS_NN_fcomp3] = 1; // Alias of Compare Real and Pop
OptCategory[STARS_NN_fxch4] = 1; // Alias of Exchange Registers
OptCategory[STARS_NN_fcomp5] = 1; // Alias of Compare Real and Pop
OptCategory[STARS_NN_ffreep] = 1; // Free Register and Pop
OptCategory[STARS_NN_fxch7] = 1; // Alias of Exchange Registers
OptCategory[STARS_NN_fstp8] = 9; // Alias of Store Real and Pop
OptCategory[STARS_NN_fstp9] = 9; // Alias of Store Real and Pop
// Pentium 4 instructions
OptCategory[STARS_NN_addpd] = 1; // Add Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_addsd] = 1; // Add Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_andnpd] = 1; // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_andpd] = 1; // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_clflush] = 1; // Flush Cache Line
OptCategory[STARS_NN_cmppd] = 1; // Compare Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_cmpsd] = 1; // Compare Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_comisd] = 1; // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
OptCategory[STARS_NN_cvtdq2pd] = 1; // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_cvtdq2ps] = 1; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_cvtpd2dq] = 1; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
OptCategory[STARS_NN_cvtpd2pi] = 1; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
OptCategory[STARS_NN_cvtpd2ps] = 1; // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_cvtpi2pd] = 1; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_cvtps2dq] = 1; // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
OptCategory[STARS_NN_cvtps2pd] = 1; // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_cvtsd2si] = 2; // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
OptCategory[STARS_NN_cvtsd2ss] = 1; // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
OptCategory[STARS_NN_cvtsi2sd] = 1; // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
OptCategory[STARS_NN_cvtss2sd] = 1; // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
OptCategory[STARS_NN_cvttpd2dq] = 1; // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
OptCategory[STARS_NN_cvttpd2pi] = 1; // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
OptCategory[STARS_NN_cvttps2dq] = 1; // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
OptCategory[STARS_NN_cvttsd2si] = 2; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
OptCategory[STARS_NN_divpd] = 1; // Divide Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_divsd] = 1; // Divide Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_lfence] = 1; // Load Fence
OptCategory[STARS_NN_maskmovdqu] = 0; // Store Selected Bytes of Double Quadword ** Infer dest is 'n'
OptCategory[STARS_NN_maxpd] = 1; // Return Maximum Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_maxsd] = 1; // Return Maximum Scalar Double-Precision Floating-Point Value
OptCategory[STARS_NN_mfence] = 1; // Memory Fence
OptCategory[STARS_NN_minpd] = 1; // Return Minimum Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_minsd] = 1; // Return Minimum Scalar Double-Precision Floating-Point Value
OptCategory[STARS_NN_movapd] = 9; // Move Aligned Packed Double-Precision Floating-Point Values ** Infer dest is 'n'
OptCategory[STARS_NN_movdq2q] = 1; // Move Quadword from XMM to MMX Register
OptCategory[STARS_NN_movdqa] = 9; // Move Aligned Double Quadword ** Infer dest is 'n'
OptCategory[STARS_NN_movdqu] = 9; // Move Unaligned Double Quadword ** Infer dest is 'n'
OptCategory[STARS_NN_movhpd] = 9; // Move High Packed Double-Precision Floating-Point Values ** Infer dest is 'n'
OptCategory[STARS_NN_movlpd] = 9; // Move Low Packed Double-Precision Floating-Point Values ** Infer dest is 'n'
OptCategory[STARS_NN_movmskpd] = 2; // Extract Packed Double-Precision Floating-Point Sign Mask
OptCategory[STARS_NN_movntdq] = 0; // Store Double Quadword Using Non-Temporal Hint
OptCategory[STARS_NN_movnti] = 0; // Store Doubleword Using Non-Temporal Hint
OptCategory[STARS_NN_movntpd] = 0; // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
OptCategory[STARS_NN_movq2dq] = 1; // Move Quadword from MMX to XMM Register
OptCategory[STARS_NN_movsd] = 9; // Move Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_movupd] = 9; // Move Unaligned Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_mulpd] = 1; // Multiply Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_mulsd] = 1; // Multiply Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_orpd] = 1; // Bitwise Logical OR of Double-Precision Floating-Point Values
OptCategory[STARS_NN_paddq] = 1; // Add Packed Quadword Integers
OptCategory[STARS_NN_pause] = 1; // Spin Loop Hint
OptCategory[STARS_NN_pmuludq] = 1; // Multiply Packed Unsigned Doubleword Integers
OptCategory[STARS_NN_pshufd] = 1; // Shuffle Packed Doublewords
OptCategory[STARS_NN_pshufhw] = 1; // Shuffle Packed High Words
OptCategory[STARS_NN_pshuflw] = 1; // Shuffle Packed Low Words
OptCategory[STARS_NN_pslldq] = 1; // Shift Double Quadword Left Logical
OptCategory[STARS_NN_psrldq] = 1; // Shift Double Quadword Right Logical
OptCategory[STARS_NN_psubq] = 1; // Subtract Packed Quadword Integers
OptCategory[STARS_NN_punpckhqdq] = 1; // Unpack High Data
OptCategory[STARS_NN_punpcklqdq] = 1; // Unpack Low Data
OptCategory[STARS_NN_shufpd] = 1; // Shuffle Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_sqrtpd] = 1; // Compute Square Roots of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_sqrtsd] = 1; // Compute Square Rootof Scalar Double-Precision Floating-Point Value
OptCategory[STARS_NN_subpd] = 1; // Subtract Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_subsd] = 1; // Subtract Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_ucomisd] = 1; // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
OptCategory[STARS_NN_unpckhpd] = 1; // Unpack and Interleave High Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_unpcklpd] = 1; // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_xorpd] = 1; // Bitwise Logical OR of Double-Precision Floating-Point Values
// AMD syscall/sysret instructions NOTE: not AMD, found in Intel manual
OptCategory[STARS_NN_syscall] = 1; // Low latency system call
OptCategory[STARS_NN_sysret] = 1; // Return from system call
// AMD64 instructions NOTE: not AMD, found in Intel manual
OptCategory[STARS_NN_swapgs] = 1; // Exchange GS base with KernelGSBase MSR
// New Pentium instructions (SSE3)
OptCategory[STARS_NN_movddup] = 9; // Move One Double-FP and Duplicate
OptCategory[STARS_NN_movshdup] = 9; // Move Packed Single-FP High and Duplicate
OptCategory[STARS_NN_movsldup] = 9; // Move Packed Single-FP Low and Duplicate
// Missing AMD64 instructions NOTE: also found in Intel manual
OptCategory[STARS_NN_movsxd] = 2; // Move with Sign-Extend Doubleword
OptCategory[STARS_NN_cmpxchg16b] = 0; // Compare and Exchange 16 Bytes
// SSE3 instructions
OptCategory[STARS_NN_addsubpd] = 1; // Add /Sub packed DP FP numbers
OptCategory[STARS_NN_addsubps] = 1; // Add /Sub packed SP FP numbers
OptCategory[STARS_NN_haddpd] = 1; // Add horizontally packed DP FP numbers
OptCategory[STARS_NN_haddps] = 1; // Add horizontally packed SP FP numbers
OptCategory[STARS_NN_hsubpd] = 1; // Sub horizontally packed DP FP numbers
OptCategory[STARS_NN_hsubps] = 1; // Sub horizontally packed SP FP numbers
OptCategory[STARS_NN_monitor] = 1; // Set up a linear address range to be monitored by hardware
OptCategory[STARS_NN_mwait] = 1; // Wait until write-back store performed within the range specified by the MONITOR instruction
OptCategory[STARS_NN_fisttp] = 0; // Store ST in intXX (chop) and pop
OptCategory[STARS_NN_lddqu] = 1; // Load unaligned integer 128-bit
// SSSE3 instructions
OptCategory[STARS_NN_psignb] = 1; // Packed SIGN Byte
OptCategory[STARS_NN_psignw] = 1; // Packed SIGN Word
OptCategory[STARS_NN_psignd] = 1; // Packed SIGN Doubleword
OptCategory[STARS_NN_pshufb] = 1; // Packed Shuffle Bytes
OptCategory[STARS_NN_pmulhrsw] = 1; // Packed Multiply High with Round and Scale
OptCategory[STARS_NN_pmaddubsw] = 1; // Multiply and Add Packed Signed and Unsigned Bytes
OptCategory[STARS_NN_phsubsw] = 1; // Packed Horizontal Subtract and Saturate
OptCategory[STARS_NN_phaddsw] = 1; // Packed Horizontal Add and Saturate
OptCategory[STARS_NN_phaddw] = 1; // Packed Horizontal Add Word
OptCategory[STARS_NN_phaddd] = 1; // Packed Horizontal Add Doubleword
OptCategory[STARS_NN_phsubw] = 1; // Packed Horizontal Subtract Word
OptCategory[STARS_NN_phsubd] = 1; // Packed Horizontal Subtract Doubleword
OptCategory[STARS_NN_palignr] = 1; // Packed Align Right
OptCategory[STARS_NN_pabsb] = 1; // Packed Absolute Value Byte
OptCategory[STARS_NN_pabsw] = 1; // Packed Absolute Value Word
OptCategory[STARS_NN_pabsd] = 1; // Packed Absolute Value Doubleword
// VMX instructions
OptCategory[STARS_NN_vmcall] = 1; // Call to VM Monitor
OptCategory[STARS_NN_vmclear] = 0; // Clear Virtual Machine Control Structure
OptCategory[STARS_NN_vmlaunch] = 1; // Launch Virtual Machine
OptCategory[STARS_NN_vmresume] = 1; // Resume Virtual Machine
OptCategory[STARS_NN_vmptrld] = 6; // Load Pointer to Virtual Machine Control Structure
OptCategory[STARS_NN_vmptrst] = 0; // Store Pointer to Virtual Machine Control Structure
OptCategory[STARS_NN_vmread] = 0; // Read Field from Virtual Machine Control Structure
OptCategory[STARS_NN_vmwrite] = 0; // Write Field from Virtual Machine Control Structure
OptCategory[STARS_NN_vmxoff] = 1; // Leave VMX Operation
OptCategory[STARS_NN_vmxon] = 1; // Enter VMX Operation
OptCategory[STARS_NN_ud2] = 1; // Undefined Instruction
// Added with x86-64
OptCategory[STARS_NN_rdtscp] = 10; // Read Time-Stamp Counter and Processor ID
// Geode LX 3DNow! extensions
OptCategory[STARS_NN_pfrcpv] = 1; // Reciprocal Approximation for a Pair of 32-bit Floats
OptCategory[STARS_NN_pfrsqrtv] = 1; // Reciprocal Square Root Approximation for a Pair of 32-bit Floats
// SSE2 pseudoinstructions
OptCategory[STARS_NN_cmpeqpd] = 1; // Packed Double-FP Compare EQ
OptCategory[STARS_NN_cmpltpd] = 1; // Packed Double-FP Compare LT
OptCategory[STARS_NN_cmplepd] = 1; // Packed Double-FP Compare LE
OptCategory[STARS_NN_cmpunordpd] = 1; // Packed Double-FP Compare UNORD
OptCategory[STARS_NN_cmpneqpd] = 1; // Packed Double-FP Compare NOT EQ
OptCategory[STARS_NN_cmpnltpd] = 1; // Packed Double-FP Compare NOT LT
OptCategory[STARS_NN_cmpnlepd] = 1; // Packed Double-FP Compare NOT LE
OptCategory[STARS_NN_cmpordpd] = 1; // Packed Double-FP Compare ORDERED
OptCategory[STARS_NN_cmpeqsd] = 1; // Scalar Double-FP Compare EQ
OptCategory[STARS_NN_cmpltsd] = 1; // Scalar Double-FP Compare LT
OptCategory[STARS_NN_cmplesd] = 1; // Scalar Double-FP Compare LE
OptCategory[STARS_NN_cmpunordsd] = 1; // Scalar Double-FP Compare UNORD
OptCategory[STARS_NN_cmpneqsd] = 1; // Scalar Double-FP Compare NOT EQ
OptCategory[STARS_NN_cmpnltsd] = 1; // Scalar Double-FP Compare NOT LT
OptCategory[STARS_NN_cmpnlesd] = 1; // Scalar Double-FP Compare NOT LE
OptCategory[STARS_NN_cmpordsd] = 1; // Scalar Double-FP Compare ORDERED
// SSSE4.1 instructions
OptCategory[STARS_NN_blendpd] = 1; // Blend Packed Double Precision Floating-Point Values
OptCategory[STARS_NN_blendps] = 1; // Blend Packed Single Precision Floating-Point Values
OptCategory[STARS_NN_blendvpd] = 1; // Variable Blend Packed Double Precision Floating-Point Values
OptCategory[STARS_NN_blendvps] = 1; // Variable Blend Packed Single Precision Floating-Point Values
OptCategory[STARS_NN_dppd] = 1; // Dot Product of Packed Double Precision Floating-Point Values
OptCategory[STARS_NN_dpps] = 1; // Dot Product of Packed Single Precision Floating-Point Values
OptCategory[STARS_NN_extractps] = 2; // Extract Packed Single Precision Floating-Point Value
OptCategory[STARS_NN_insertps] = 1; // Insert Packed Single Precision Floating-Point Value
OptCategory[STARS_NN_movntdqa] = 0; // Load Double Quadword Non-Temporal Aligned Hint
OptCategory[STARS_NN_mpsadbw] = 1; // Compute Multiple Packed Sums of Absolute Difference
OptCategory[STARS_NN_packusdw] = 1; // Pack with Unsigned Saturation
OptCategory[STARS_NN_pblendvb] = 1; // Variable Blend Packed Bytes
OptCategory[STARS_NN_pblendw] = 1; // Blend Packed Words
OptCategory[STARS_NN_pcmpeqq] = 1; // Compare Packed Qword Data for Equal
OptCategory[STARS_NN_pextrb] = 1; // Extract Byte
OptCategory[STARS_NN_pextrd] = 1; // Extract Dword
OptCategory[STARS_NN_pextrq] = 1; // Extract Qword
OptCategory[STARS_NN_phminposuw] = 1; // Packed Horizontal Word Minimum
OptCategory[STARS_NN_pinsrb] = 1; // Insert Byte
OptCategory[STARS_NN_pinsrd] = 1; // Insert Dword
OptCategory[STARS_NN_pinsrq] = 1; // Insert Qword
OptCategory[STARS_NN_pmaxsb] = 1; // Maximum of Packed Signed Byte Integers
OptCategory[STARS_NN_pmaxsd] = 1; // Maximum of Packed Signed Dword Integers
OptCategory[STARS_NN_pmaxud] = 1; // Maximum of Packed Unsigned Dword Integers
OptCategory[STARS_NN_pmaxuw] = 1; // Maximum of Packed Word Integers
OptCategory[STARS_NN_pminsb] = 1; // Minimum of Packed Signed Byte Integers
OptCategory[STARS_NN_pminsd] = 1; // Minimum of Packed Signed Dword Integers
OptCategory[STARS_NN_pminud] = 1; // Minimum of Packed Unsigned Dword Integers
OptCategory[STARS_NN_pminuw] = 1; // Minimum of Packed Word Integers
OptCategory[STARS_NN_pmovsxbw] = 1; // Packed Move with Sign Extend
OptCategory[STARS_NN_pmovsxbd] = 1; // Packed Move with Sign Extend
OptCategory[STARS_NN_pmovsxbq] = 1; // Packed Move with Sign Extend
OptCategory[STARS_NN_pmovsxwd] = 1; // Packed Move with Sign Extend
OptCategory[STARS_NN_pmovsxwq] = 1; // Packed Move with Sign Extend
OptCategory[STARS_NN_pmovsxdq] = 1; // Packed Move with Sign Extend
OptCategory[STARS_NN_pmovzxbw] = 1; // Packed Move with Zero Extend
OptCategory[STARS_NN_pmovzxbd] = 1; // Packed Move with Zero Extend
OptCategory[STARS_NN_pmovzxbq] = 1; // Packed Move with Zero Extend
OptCategory[STARS_NN_pmovzxwd] = 1; // Packed Move with Zero Extend
OptCategory[STARS_NN_pmovzxwq] = 1; // Packed Move with Zero Extend
OptCategory[STARS_NN_pmovzxdq] = 1; // Packed Move with Zero Extend
OptCategory[STARS_NN_pmuldq] = 1; // Multiply Packed Signed Dword Integers
OptCategory[STARS_NN_pmulld] = 1; // Multiply Packed Signed Dword Integers and Store Low Result
OptCategory[STARS_NN_ptest] = 1; // Logical Compare
OptCategory[STARS_NN_roundpd] = 1; // Round Packed Double Precision Floating-Point Values
OptCategory[STARS_NN_roundps] = 1; // Round Packed Single Precision Floating-Point Values
OptCategory[STARS_NN_roundsd] = 1; // Round Scalar Double Precision Floating-Point Values
OptCategory[STARS_NN_roundss] = 1; // Round Scalar Single Precision Floating-Point Values
// SSSE4.2 instructions
OptCategory[STARS_NN_crc32] = 2; // Accumulate CRC32 Value
OptCategory[STARS_NN_pcmpestri] = 2; // Packed Compare Explicit Length Strings, Return Index
OptCategory[STARS_NN_pcmpestrm] = 2; // Packed Compare Explicit Length Strings, Return Mask
OptCategory[STARS_NN_pcmpistri] = 2; // Packed Compare Implicit Length Strings, Return Index
OptCategory[STARS_NN_pcmpistrm] = 2; // Packed Compare Implicit Length Strings, Return Mask
OptCategory[STARS_NN_pcmpgtq] = 1; // Compare Packed Data for Greater Than
OptCategory[STARS_NN_popcnt] = 2; // Return the Count of Number of Bits Set to 1
// AMD SSE4a instructions
OptCategory[STARS_NN_extrq] = 1; // Extract Field From Register
OptCategory[STARS_NN_insertq] = 1; // Insert Field
OptCategory[STARS_NN_movntsd] = 0; // Move Non-Temporal Scalar Double-Precision Floating-Point
OptCategory[STARS_NN_movntss] = 0; // Move Non-Temporal Scalar Single-Precision Floating-Point
OptCategory[STARS_NN_lzcnt] = 2; // Leading Zero Count
// xsave/xrstor instructions
OptCategory[STARS_NN_xgetbv] = 8; // Get Value of Extended Control Register
OptCategory[STARS_NN_xrstor] = 0; // Restore Processor Extended States
OptCategory[STARS_NN_xsave] = 1; // Save Processor Extended States
OptCategory[STARS_NN_xsetbv] = 1; // Set Value of Extended Control Register
// Intel Safer Mode Extensions (SMX)
OptCategory[STARS_NN_getsec] = 1; // Safer Mode Extensions (SMX) Instruction
// AMD-V Virtualization ISA Extension
OptCategory[STARS_NN_clgi] = 0; // Clear Global Interrupt Flag
OptCategory[STARS_NN_invlpga] = 1; // Invalidate TLB Entry in a Specified ASID
OptCategory[STARS_NN_skinit] = 1; // Secure Init and Jump with Attestation
OptCategory[STARS_NN_stgi] = 0; // Set Global Interrupt Flag
OptCategory[STARS_NN_vmexit] = 1; // Stop Executing Guest, Begin Executing Host
OptCategory[STARS_NN_vmload] = 0; // Load State from VMCB
OptCategory[STARS_NN_vmmcall] = 1; // Call VMM
OptCategory[STARS_NN_vmrun] = 1; // Run Virtual Machine
OptCategory[STARS_NN_vmsave] = 0; // Save State to VMCB
// VMX+ instructions
OptCategory[STARS_NN_invept] = 1; // Invalidate Translations Derived from EPT
OptCategory[STARS_NN_invvpid] = 1; // Invalidate Translations Based on VPID
// Intel Atom instructions
OptCategory[STARS_NN_movbe] = 3; // Move Data After Swapping Bytes
// Intel AES instructions
OptCategory[STARS_NN_aesenc] = 1; // Perform One Round of an AES Encryption Flow
OptCategory[STARS_NN_aesenclast] = 1; // Perform the Last Round of an AES Encryption Flow
OptCategory[STARS_NN_aesdec] = 1; // Perform One Round of an AES Decryption Flow
OptCategory[STARS_NN_aesdeclast] = 1; // Perform the Last Round of an AES Decryption Flow
OptCategory[STARS_NN_aesimc] = 1; // Perform the AES InvMixColumn Transformation
OptCategory[STARS_NN_aeskeygenassist] = 1; // AES Round Key Generation Assist
// Carryless multiplication
OptCategory[STARS_NN_pclmulqdq] = 1; // Carry-Less Multiplication Quadword
// Returns modified by operand size prefixes
OptCategory[STARS_NN_retnw] = 0; // Return Near from Procedure (use16)
OptCategory[STARS_NN_retnd] = 0; // Return Near from Procedure (use32)
OptCategory[STARS_NN_retnq] = 0; // Return Near from Procedure (use64)
OptCategory[STARS_NN_retfw] = 0; // Return Far from Procedure (use16)
OptCategory[STARS_NN_retfd] = 0; // Return Far from Procedure (use32)
OptCategory[STARS_NN_retfq] = 0; // Return Far from Procedure (use64)
// RDRAND support
OptCategory[STARS_NN_rdrand] = 2; // Read Random Number
// new GPR instructions
OptCategory[STARS_NN_adcx] = 5; // Unsigned Integer Addition of Two Operands with Carry Flag
OptCategory[STARS_NN_adox] = 5; // Unsigned Integer Addition of Two Operands with Overflow Flag
OptCategory[STARS_NN_andn] = 0; // Logical AND NOT
OptCategory[STARS_NN_bextr] = 2; // Bit Field Extract
OptCategory[STARS_NN_blsi] = 2; // Extract Lowest Set Isolated Bit
OptCategory[STARS_NN_blsmsk] = 2; // Get Mask Up to Lowest Set Bit
OptCategory[STARS_NN_blsr] = 2; // Reset Lowest Set Bit
OptCategory[STARS_NN_bzhi] = 2; // Zero High Bits Starting with Specified Bit Position
OptCategory[STARS_NN_clac] = 1; // Clear AC Flag in EFLAGS Register
OptCategory[STARS_NN_mulx] = 2; // Unsigned Multiply Without Affecting Flags
OptCategory[STARS_NN_pdep] = 2; // Parallel Bits Deposit
OptCategory[STARS_NN_pext] = 2; // Parallel Bits Extract
OptCategory[STARS_NN_rorx] = 2; // Rotate Right Logical Without Affecting Flags
OptCategory[STARS_NN_sarx] = 2; // Shift Arithmetically Right Without Affecting Flags
OptCategory[STARS_NN_shlx] = 2; // Shift Logically Left Without Affecting Flags
OptCategory[STARS_NN_shrx] = 2; // Shift Logically Right Without Affecting Flags
OptCategory[STARS_NN_stac] = 1; // Set AC Flag in EFLAGS Register
OptCategory[STARS_NN_tzcnt] = 2; // Count the Number of Trailing Zero Bits
OptCategory[STARS_NN_xsaveopt] = 1; // Save Processor Extended States Optimized
OptCategory[STARS_NN_invpcid] = 1; // Invalidate Processor Context ID
OptCategory[STARS_NN_rdseed] = 2; // Read Random Seed
OptCategory[STARS_NN_rdfsbase] = 6; // Read FS Segment Base
OptCategory[STARS_NN_rdgsbase] = 6; // Read GS Segment Base
OptCategory[STARS_NN_wrfsbase] = 6; // Write FS Segment Base
OptCategory[STARS_NN_wrgsbase] = 6; // Write GS Segment Base
// new AVX instructions
OptCategory[STARS_NN_vaddpd] = 1; // Add Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vaddps] = 1; // Packed Single-FP Add
OptCategory[STARS_NN_vaddsd] = 1; // Add Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_vaddss] = 1; // Scalar Single-FP Add
OptCategory[STARS_NN_vaddsubpd] = 1; // Add /Sub packed DP FP numbers
OptCategory[STARS_NN_vaddsubps] = 1; // Add /Sub packed SP FP numbers
OptCategory[STARS_NN_vaesdec] = 1; // Perform One Round of an AES Decryption Flow
OptCategory[STARS_NN_vaesdeclast] = 1; // Perform the Last Round of an AES Decryption Flow
OptCategory[STARS_NN_vaesenc] = 1; // Perform One Round of an AES Encryption Flow
OptCategory[STARS_NN_vaesenclast] = 1; // Perform the Last Round of an AES Encryption Flow
OptCategory[STARS_NN_vaesimc] = 1; // Perform the AES InvMixColumn Transformation
OptCategory[STARS_NN_vaeskeygenassist] = 1; // AES Round Key Generation Assist
OptCategory[STARS_NN_vandnpd] = 1; // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vandnps] = 1; // Bitwise Logical And Not for Single-FP
OptCategory[STARS_NN_vandpd] = 1; // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vandps] = 1; // Bitwise Logical And for Single-FP
OptCategory[STARS_NN_vblendpd] = 1; // Blend Packed Double Precision Floating-Point Values
OptCategory[STARS_NN_vblendps] = 1; // Blend Packed Single Precision Floating-Point Values
OptCategory[STARS_NN_vblendvpd] = 1; // Variable Blend Packed Double Precision Floating-Point Values
OptCategory[STARS_NN_vblendvps] = 1; // Variable Blend Packed Single Precision Floating-Point Values
OptCategory[STARS_NN_vbroadcastf128] = 1; // Broadcast 128 Bits of Floating-Point Data
OptCategory[STARS_NN_vbroadcasti128] = 1; // Broadcast 128 Bits of Integer Data
OptCategory[STARS_NN_vbroadcastsd] = 1; // Broadcast Double-Precision Floating-Point Element
OptCategory[STARS_NN_vbroadcastss] = 1; // Broadcast Single-Precision Floating-Point Element
OptCategory[STARS_NN_vcmppd] = 1; // Compare Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vcmpps] = 1; // Packed Single-FP Compare
OptCategory[STARS_NN_vcmpsd] = 1; // Compare Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_vcmpss] = 1; // Scalar Single-FP Compare
OptCategory[STARS_NN_vcomisd] = 1; // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
OptCategory[STARS_NN_vcomiss] = 1; // Scalar Ordered Single-FP Compare and Set EFLAGS
OptCategory[STARS_NN_vcvtdq2pd] = 1; // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vcvtdq2ps] = 1; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vcvtpd2dq] = 1; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
OptCategory[STARS_NN_vcvtpd2ps] = 1; // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vcvtph2ps] = 1; // Convert 16-bit FP Values to Single-Precision FP Values
OptCategory[STARS_NN_vcvtps2dq] = 1; // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
OptCategory[STARS_NN_vcvtps2pd] = 1; // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vcvtps2ph] = 1; // Convert Single-Precision FP value to 16-bit FP value
OptCategory[STARS_NN_vcvtsd2si] = 1; // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
OptCategory[STARS_NN_vcvtsd2ss] = 1; // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
OptCategory[STARS_NN_vcvtsi2sd] = 1; // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
OptCategory[STARS_NN_vcvtsi2ss] = 1; // Scalar signed INT32 to Single-FP conversion
OptCategory[STARS_NN_vcvtss2sd] = 1; // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
OptCategory[STARS_NN_vcvtss2si] = 1; // Scalar Single-FP to signed INT32 conversion
OptCategory[STARS_NN_vcvttpd2dq] = 1; // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
OptCategory[STARS_NN_vcvttps2dq] = 1; // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
OptCategory[STARS_NN_vcvttsd2si] = 1; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
OptCategory[STARS_NN_vcvttss2si] = 1; // Scalar Single-FP to signed INT32 conversion (truncate)
OptCategory[STARS_NN_vdivpd] = 1; // Divide Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vdivps] = 1; // Packed Single-FP Divide
OptCategory[STARS_NN_vdivsd] = 1; // Divide Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_vdivss] = 1; // Scalar Single-FP Divide
OptCategory[STARS_NN_vdppd] = 1; // Dot Product of Packed Double Precision Floating-Point Values
OptCategory[STARS_NN_vdpps] = 1; // Dot Product of Packed Single Precision Floating-Point Values
OptCategory[STARS_NN_vextractf128] = 1; // Extract Packed Floating-Point Values
OptCategory[STARS_NN_vextracti128] = 1; // Extract Packed Integer Values
OptCategory[STARS_NN_vextractps] = 1; // Extract Packed Floating-Point Values
OptCategory[STARS_NN_vfmadd132pd] = 1; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfmadd132ps] = 1; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfmadd132sd] = 1; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfmadd132ss] = 1; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfmadd213pd] = 1; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfmadd213ps] = 1; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfmadd213sd] = 1; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfmadd213ss] = 1; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfmadd231pd] = 1; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfmadd231ps] = 1; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfmadd231sd] = 1; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfmadd231ss] = 1; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfmaddsub132pd] = 1; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfmaddsub132ps] = 1; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfmaddsub213pd] = 1; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfmaddsub213ps] = 1; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfmaddsub231pd] = 1; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfmaddsub231ps] = 1; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfmsub132pd] = 1; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfmsub132ps] = 1; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfmsub132sd] = 1; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfmsub132ss] = 1; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfmsub213pd] = 1; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfmsub213ps] = 1; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfmsub213sd] = 1; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfmsub213ss] = 1; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfmsub231pd] = 1; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfmsub231ps] = 1; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfmsub231sd] = 1; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfmsub231ss] = 1; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfmsubadd132pd] = 1; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfmsubadd132ps] = 1; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfmsubadd213pd] = 1; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfmsubadd213ps] = 1; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfmsubadd231pd] = 1; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfmsubadd231ps] = 1; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmadd132pd] = 1; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmadd132ps] = 1; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmadd132sd] = 1; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmadd132ss] = 1; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmadd213pd] = 1; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmadd213ps] = 1; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmadd213sd] = 1; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmadd213ss] = 1; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmadd231pd] = 1; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmadd231ps] = 1; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmadd231sd] = 1; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmadd231ss] = 1; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmsub132pd] = 1; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmsub132ps] = 1; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmsub132sd] = 1; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmsub132ss] = 1; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmsub213pd] = 1; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmsub213ps] = 1; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmsub213sd] = 1; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmsub213ss] = 1; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmsub231pd] = 1; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmsub231ps] = 1; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmsub231sd] = 1; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_vfnmsub231ss] = 1; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
OptCategory[STARS_NN_vgatherdps] = 1; // Gather Packed SP FP Values Using Signed Dword Indices
OptCategory[STARS_NN_vgatherdpd] = 1; // Gather Packed DP FP Values Using Signed Dword Indices
OptCategory[STARS_NN_vgatherqps] = 1; // Gather Packed SP FP Values Using Signed Qword Indices
OptCategory[STARS_NN_vgatherqpd] = 1; // Gather Packed DP FP Values Using Signed Qword Indices
OptCategory[STARS_NN_vhaddpd] = 1; // Add horizontally packed DP FP numbers
OptCategory[STARS_NN_vhaddps] = 1; // Add horizontally packed SP FP numbers
OptCategory[STARS_NN_vhsubpd] = 1; // Sub horizontally packed DP FP numbers
OptCategory[STARS_NN_vhsubps] = 1; // Sub horizontally packed SP FP numbers
OptCategory[STARS_NN_vinsertf128] = 1; // Insert Packed Floating-Point Values
OptCategory[STARS_NN_vinserti128] = 1; // Insert Packed Integer Values
OptCategory[STARS_NN_vinsertps] = 1; // Insert Packed Single Precision Floating-Point Value
OptCategory[STARS_NN_vlddqu] = 1; // Load Unaligned Packed Integer Values
OptCategory[STARS_NN_vldmxcsr] = 1; // Load Streaming SIMD Extensions Technology Control/Status Register
OptCategory[STARS_NN_vmaskmovdqu] = 9; // Store Selected Bytes of Double Quadword with NT Hint
OptCategory[STARS_NN_vmaskmovpd] = 9; // Conditionally Load Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vmaskmovps] = 9; // Conditionally Load Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vmaxpd] = 1; // Return Maximum Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vmaxps] = 1; // Packed Single-FP Maximum
OptCategory[STARS_NN_vmaxsd] = 1; // Return Maximum Scalar Double-Precision Floating-Point Value
OptCategory[STARS_NN_vmaxss] = 1; // Scalar Single-FP Maximum
OptCategory[STARS_NN_vminpd] = 1; // Return Minimum Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vminps] = 1; // Packed Single-FP Minimum
OptCategory[STARS_NN_vminsd] = 1; // Return Minimum Scalar Double-Precision Floating-Point Value
OptCategory[STARS_NN_vminss] = 1; // Scalar Single-FP Minimum
OptCategory[STARS_NN_vmovapd] = 9; // Move Aligned Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vmovaps] = 9; // Move Aligned Four Packed Single-FP
OptCategory[STARS_NN_vmovd] = 9; // Move 32 bits
OptCategory[STARS_NN_vmovddup] = 1; // Move One Double-FP and Duplicate
OptCategory[STARS_NN_vmovdqa] = 1; // Move Aligned Double Quadword
OptCategory[STARS_NN_vmovdqu] = 1; // Move Unaligned Double Quadword
OptCategory[STARS_NN_vmovhlps] = 1; // Move High to Low Packed Single-FP
OptCategory[STARS_NN_vmovhpd] = 1; // Move High Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vmovhps] = 1; // Move High Packed Single-FP
OptCategory[STARS_NN_vmovlhps] = 1; // Move Low to High Packed Single-FP
OptCategory[STARS_NN_vmovlpd] = 1; // Move Low Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vmovlps] = 1; // Move Low Packed Single-FP
OptCategory[STARS_NN_vmovmskpd] = 1; // Extract Packed Double-Precision Floating-Point Sign Mask
OptCategory[STARS_NN_vmovmskps] = 1; // Move Mask to Register
OptCategory[STARS_NN_vmovntdq] = 1; // Store Double Quadword Using Non-Temporal Hint
OptCategory[STARS_NN_vmovntdqa] = 1; // Load Double Quadword Non-Temporal Aligned Hint
OptCategory[STARS_NN_vmovntpd] = 1; // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
OptCategory[STARS_NN_vmovntps] = 1; // Move Aligned Four Packed Single-FP Non Temporal
#if (IDA_SDK_VERSION < 700) // Incredibly, these opcodes were removed in IDA Pro 7.0
OptCategory[STARS_NN_vmovntsd] = 1; // Move Non-Temporal Scalar Double-Precision Floating-Point
OptCategory[STARS_NN_vmovntss] = 1; // Move Non-Temporal Scalar Single-Precision Floating-Point
#endif
OptCategory[STARS_NN_vmovq] = 1; // Move 64 bits
OptCategory[STARS_NN_vmovsd] = 1; // Move Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_vmovshdup] = 1; // Move Packed Single-FP High and Duplicate
OptCategory[STARS_NN_vmovsldup] = 1; // Move Packed Single-FP Low and Duplicate
OptCategory[STARS_NN_vmovss] = 1; // Move Scalar Single-FP
OptCategory[STARS_NN_vmovupd] = 1; // Move Unaligned Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vmovups] = 1; // Move Unaligned Four Packed Single-FP
OptCategory[STARS_NN_vmpsadbw] = 1; // Compute Multiple Packed Sums of Absolute Difference
OptCategory[STARS_NN_vmulpd] = 1; // Multiply Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vmulps] = 1; // Packed Single-FP Multiply
OptCategory[STARS_NN_vmulsd] = 1; // Multiply Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_vmulss] = 1; // Scalar Single-FP Multiply
OptCategory[STARS_NN_vorpd] = 1; // Bitwise Logical OR of Double-Precision Floating-Point Values
OptCategory[STARS_NN_vorps] = 1; // Bitwise Logical OR for Single-FP Data
OptCategory[STARS_NN_vpabsb] = 1; // Packed Absolute Value Byte
OptCategory[STARS_NN_vpabsd] = 1; // Packed Absolute Value Doubleword
OptCategory[STARS_NN_vpabsw] = 1; // Packed Absolute Value Word
OptCategory[STARS_NN_vpackssdw] = 1; // Pack with Signed Saturation (Dword->Word)
OptCategory[STARS_NN_vpacksswb] = 1; // Pack with Signed Saturation (Word->Byte)
OptCategory[STARS_NN_vpackusdw] = 1; // Pack with Unsigned Saturation
OptCategory[STARS_NN_vpackuswb] = 1; // Pack with Unsigned Saturation (Word->Byte)
OptCategory[STARS_NN_vpaddb] = 1; // Packed Add Byte
OptCategory[STARS_NN_vpaddd] = 1; // Packed Add Dword
OptCategory[STARS_NN_vpaddq] = 1; // Add Packed Quadword Integers
OptCategory[STARS_NN_vpaddsb] = 1; // Packed Add with Saturation (Byte)
OptCategory[STARS_NN_vpaddsw] = 1; // Packed Add with Saturation (Word)
OptCategory[STARS_NN_vpaddusb] = 1; // Packed Add Unsigned with Saturation (Byte)
OptCategory[STARS_NN_vpaddusw] = 1; // Packed Add Unsigned with Saturation (Word)
OptCategory[STARS_NN_vpaddw] = 1; // Packed Add Word
OptCategory[STARS_NN_vpalignr] = 1; // Packed Align Right
OptCategory[STARS_NN_vpand] = 1; // Bitwise Logical And
OptCategory[STARS_NN_vpandn] = 1; // Bitwise Logical And Not
OptCategory[STARS_NN_vpavgb] = 1; // Packed Average (Byte)
OptCategory[STARS_NN_vpavgw] = 1; // Packed Average (Word)
OptCategory[STARS_NN_vpblendd] = 1; // Blend Packed Dwords
OptCategory[STARS_NN_vpblendvb] = 1; // Variable Blend Packed Bytes
OptCategory[STARS_NN_vpblendw] = 1; // Blend Packed Words
OptCategory[STARS_NN_vpbroadcastb] = 1; // Broadcast a Byte Integer
OptCategory[STARS_NN_vpbroadcastd] = 1; // Broadcast a Dword Integer
OptCategory[STARS_NN_vpbroadcastq] = 1; // Broadcast a Qword Integer
OptCategory[STARS_NN_vpbroadcastw] = 1; // Broadcast a Word Integer
OptCategory[STARS_NN_vpclmulqdq] = 1; // Carry-Less Multiplication Quadword
OptCategory[STARS_NN_vpcmpeqb] = 1; // Packed Compare for Equal (Byte)
OptCategory[STARS_NN_vpcmpeqd] = 1; // Packed Compare for Equal (Dword)
OptCategory[STARS_NN_vpcmpeqq] = 1; // Compare Packed Qword Data for Equal
OptCategory[STARS_NN_vpcmpeqw] = 1; // Packed Compare for Equal (Word)
OptCategory[STARS_NN_vpcmpestri] = 1; // Packed Compare Explicit Length Strings, Return Index
OptCategory[STARS_NN_vpcmpestrm] = 1; // Packed Compare Explicit Length Strings, Return Mask
OptCategory[STARS_NN_vpcmpgtb] = 1; // Packed Compare for Greater Than (Byte)
OptCategory[STARS_NN_vpcmpgtd] = 1; // Packed Compare for Greater Than (Dword)
OptCategory[STARS_NN_vpcmpgtq] = 1; // Compare Packed Data for Greater Than
OptCategory[STARS_NN_vpcmpgtw] = 1; // Packed Compare for Greater Than (Word)
OptCategory[STARS_NN_vpcmpistri] = 1; // Packed Compare Implicit Length Strings, Return Index
OptCategory[STARS_NN_vpcmpistrm] = 1; // Packed Compare Implicit Length Strings, Return Mask
OptCategory[STARS_NN_vperm2f128] = 1; // Permute Floating-Point Values
OptCategory[STARS_NN_vperm2i128] = 1; // Permute Integer Values
OptCategory[STARS_NN_vpermd] = 1; // Full Doublewords Element Permutation
OptCategory[STARS_NN_vpermilpd] = 1; // Permute Double-Precision Floating-Point Values
OptCategory[STARS_NN_vpermilps] = 1; // Permute Single-Precision Floating-Point Values
OptCategory[STARS_NN_vpermpd] = 1; // Permute Double-Precision Floating-Point Elements
OptCategory[STARS_NN_vpermps] = 1; // Permute Single-Precision Floating-Point Elements
OptCategory[STARS_NN_vpermq] = 1; // Qwords Element Permutation
OptCategory[STARS_NN_vpextrb] = 1; // Extract Byte
OptCategory[STARS_NN_vpextrd] = 1; // Extract Dword
OptCategory[STARS_NN_vpextrq] = 1; // Extract Qword
OptCategory[STARS_NN_vpextrw] = 1; // Extract Word
OptCategory[STARS_NN_vpgatherdd] = 1; // Gather Packed Dword Values Using Signed Dword Indices
OptCategory[STARS_NN_vpgatherdq] = 1; // Gather Packed Qword Values Using Signed Dword Indices
OptCategory[STARS_NN_vpgatherqd] = 1; // Gather Packed Dword Values Using Signed Qword Indices
OptCategory[STARS_NN_vpgatherqq] = 1; // Gather Packed Qword Values Using Signed Qword Indices
OptCategory[STARS_NN_vphaddd] = 1; // Packed Horizontal Add Doubleword
OptCategory[STARS_NN_vphaddsw] = 1; // Packed Horizontal Add and Saturate
OptCategory[STARS_NN_vphaddw] = 1; // Packed Horizontal Add Word
OptCategory[STARS_NN_vphminposuw] = 1; // Packed Horizontal Word Minimum
OptCategory[STARS_NN_vphsubd] = 1; // Packed Horizontal Subtract Doubleword
OptCategory[STARS_NN_vphsubsw] = 1; // Packed Horizontal Subtract and Saturate
OptCategory[STARS_NN_vphsubw] = 1; // Packed Horizontal Subtract Word
OptCategory[STARS_NN_vpinsrb] = 1; // Insert Byte
OptCategory[STARS_NN_vpinsrd] = 1; // Insert Dword
OptCategory[STARS_NN_vpinsrq] = 1; // Insert Qword
OptCategory[STARS_NN_vpinsrw] = 1; // Insert Word
OptCategory[STARS_NN_vpmaddubsw] = 1; // Multiply and Add Packed Signed and Unsigned Bytes
OptCategory[STARS_NN_vpmaddwd] = 1; // Packed Multiply and Add
OptCategory[STARS_NN_vpmaskmovd] = 1; // Conditionally Store Dword Values Using Mask
OptCategory[STARS_NN_vpmaskmovq] = 1; // Conditionally Store Qword Values Using Mask
OptCategory[STARS_NN_vpmaxsb] = 1; // Maximum of Packed Signed Byte Integers
OptCategory[STARS_NN_vpmaxsd] = 1; // Maximum of Packed Signed Dword Integers
OptCategory[STARS_NN_vpmaxsw] = 1; // Packed Signed Integer Word Maximum
OptCategory[STARS_NN_vpmaxub] = 1; // Packed Unsigned Integer Byte Maximum
OptCategory[STARS_NN_vpmaxud] = 1; // Maximum of Packed Unsigned Dword Integers
OptCategory[STARS_NN_vpmaxuw] = 1; // Maximum of Packed Word Integers
OptCategory[STARS_NN_vpminsb] = 1; // Minimum of Packed Signed Byte Integers
OptCategory[STARS_NN_vpminsd] = 1; // Minimum of Packed Signed Dword Integers
OptCategory[STARS_NN_vpminsw] = 1; // Packed Signed Integer Word Minimum
OptCategory[STARS_NN_vpminub] = 1; // Packed Unsigned Integer Byte Minimum
OptCategory[STARS_NN_vpminud] = 1; // Minimum of Packed Unsigned Dword Integers
OptCategory[STARS_NN_vpminuw] = 1; // Minimum of Packed Word Integers
OptCategory[STARS_NN_vpmovmskb] = 1; // Move Byte Mask to Integer
OptCategory[STARS_NN_vpmovsxbd] = 1; // Packed Move with Sign Extend
OptCategory[STARS_NN_vpmovsxbq] = 1; // Packed Move with Sign Extend
OptCategory[STARS_NN_vpmovsxbw] = 1; // Packed Move with Sign Extend
OptCategory[STARS_NN_vpmovsxdq] = 1; // Packed Move with Sign Extend
OptCategory[STARS_NN_vpmovsxwd] = 1; // Packed Move with Sign Extend
OptCategory[STARS_NN_vpmovsxwq] = 1; // Packed Move with Sign Extend
OptCategory[STARS_NN_vpmovzxbd] = 1; // Packed Move with Zero Extend
OptCategory[STARS_NN_vpmovzxbq] = 1; // Packed Move with Zero Extend
OptCategory[STARS_NN_vpmovzxbw] = 1; // Packed Move with Zero Extend
OptCategory[STARS_NN_vpmovzxdq] = 1; // Packed Move with Zero Extend
OptCategory[STARS_NN_vpmovzxwd] = 1; // Packed Move with Zero Extend
OptCategory[STARS_NN_vpmovzxwq] = 1; // Packed Move with Zero Extend
OptCategory[STARS_NN_vpmuldq] = 1; // Multiply Packed Signed Dword Integers
OptCategory[STARS_NN_vpmulhrsw] = 1; // Packed Multiply High with Round and Scale
OptCategory[STARS_NN_vpmulhuw] = 1; // Packed Multiply High Unsigned
OptCategory[STARS_NN_vpmulhw] = 1; // Packed Multiply High
OptCategory[STARS_NN_vpmulld] = 1; // Multiply Packed Signed Dword Integers and Store Low Result
OptCategory[STARS_NN_vpmullw] = 1; // Packed Multiply Low
OptCategory[STARS_NN_vpmuludq] = 1; // Multiply Packed Unsigned Doubleword Integers
OptCategory[STARS_NN_vpor] = 1; // Bitwise Logical Or
OptCategory[STARS_NN_vpsadbw] = 1; // Packed Sum of Absolute Differences
OptCategory[STARS_NN_vpshufb] = 1; // Packed Shuffle Bytes
OptCategory[STARS_NN_vpshufd] = 1; // Shuffle Packed Doublewords
OptCategory[STARS_NN_vpshufhw] = 1; // Shuffle Packed High Words
OptCategory[STARS_NN_vpshuflw] = 1; // Shuffle Packed Low Words
OptCategory[STARS_NN_vpsignb] = 1; // Packed SIGN Byte
OptCategory[STARS_NN_vpsignd] = 1; // Packed SIGN Doubleword
OptCategory[STARS_NN_vpsignw] = 1; // Packed SIGN Word
OptCategory[STARS_NN_vpslld] = 1; // Packed Shift Left Logical (Dword)
OptCategory[STARS_NN_vpslldq] = 1; // Shift Double Quadword Left Logical
OptCategory[STARS_NN_vpsllq] = 1; // Packed Shift Left Logical (Qword)
OptCategory[STARS_NN_vpsllvd] = 1; // Variable Bit Shift Left Logical (Dword)
OptCategory[STARS_NN_vpsllvq] = 1; // Variable Bit Shift Left Logical (Qword)
OptCategory[STARS_NN_vpsllw] = 1; // Packed Shift Left Logical (Word)
OptCategory[STARS_NN_vpsrad] = 1; // Packed Shift Right Arithmetic (Dword)
OptCategory[STARS_NN_vpsravd] = 1; // Variable Bit Shift Right Arithmetic
OptCategory[STARS_NN_vpsraw] = 1; // Packed Shift Right Arithmetic (Word)
OptCategory[STARS_NN_vpsrld] = 1; // Packed Shift Right Logical (Dword)
OptCategory[STARS_NN_vpsrldq] = 1; // Shift Double Quadword Right Logical (Qword)
OptCategory[STARS_NN_vpsrlq] = 1; // Packed Shift Right Logical (Qword)
OptCategory[STARS_NN_vpsrlvd] = 1; // Variable Bit Shift Right Logical (Dword)
OptCategory[STARS_NN_vpsrlvq] = 1; // Variable Bit Shift Right Logical (Qword)
OptCategory[STARS_NN_vpsrlw] = 1; // Packed Shift Right Logical (Word)
OptCategory[STARS_NN_vpsubb] = 1; // Packed Subtract Byte
OptCategory[STARS_NN_vpsubd] = 1; // Packed Subtract Dword
OptCategory[STARS_NN_vpsubq] = 1; // Subtract Packed Quadword Integers
OptCategory[STARS_NN_vpsubsb] = 1; // Packed Subtract with Saturation (Byte)
OptCategory[STARS_NN_vpsubsw] = 1; // Packed Subtract with Saturation (Word)
OptCategory[STARS_NN_vpsubusb] = 1; // Packed Subtract Unsigned with Saturation (Byte)
OptCategory[STARS_NN_vpsubusw] = 1; // Packed Subtract Unsigned with Saturation (Word)
OptCategory[STARS_NN_vpsubw] = 1; // Packed Subtract Word
OptCategory[STARS_NN_vptest] = 1; // Logical Compare
OptCategory[STARS_NN_vpunpckhbw] = 1; // Unpack High Packed Data (Byte->Word)
OptCategory[STARS_NN_vpunpckhdq] = 1; // Unpack High Packed Data (Dword->Qword)
OptCategory[STARS_NN_vpunpckhqdq] = 1; // Unpack High Packed Data (Qword->Xmmword)
OptCategory[STARS_NN_vpunpckhwd] = 1; // Unpack High Packed Data (Word->Dword)
OptCategory[STARS_NN_vpunpcklbw] = 1; // Unpack Low Packed Data (Byte->Word)
OptCategory[STARS_NN_vpunpckldq] = 1; // Unpack Low Packed Data (Dword->Qword)
OptCategory[STARS_NN_vpunpcklqdq] = 1; // Unpack Low Packed Data (Qword->Xmmword)
OptCategory[STARS_NN_vpunpcklwd] = 1; // Unpack Low Packed Data (Word->Dword)
OptCategory[STARS_NN_vpxor] = 1; // Bitwise Logical Exclusive Or
OptCategory[STARS_NN_vrcpps] = 1; // Packed Single-FP Reciprocal
OptCategory[STARS_NN_vrcpss] = 1; // Scalar Single-FP Reciprocal
OptCategory[STARS_NN_vroundpd] = 1; // Round Packed Double Precision Floating-Point Values
OptCategory[STARS_NN_vroundps] = 1; // Round Packed Single Precision Floating-Point Values
OptCategory[STARS_NN_vroundsd] = 1; // Round Scalar Double Precision Floating-Point Values
OptCategory[STARS_NN_vroundss] = 1; // Round Scalar Single Precision Floating-Point Values
OptCategory[STARS_NN_vrsqrtps] = 1; // Packed Single-FP Square Root Reciprocal
OptCategory[STARS_NN_vrsqrtss] = 1; // Scalar Single-FP Square Root Reciprocal
OptCategory[STARS_NN_vshufpd] = 1; // Shuffle Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vshufps] = 1; // Shuffle Single-FP
OptCategory[STARS_NN_vsqrtpd] = 1; // Compute Square Roots of Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vsqrtps] = 1; // Packed Single-FP Square Root
OptCategory[STARS_NN_vsqrtsd] = 1; // Compute Square Rootof Scalar Double-Precision Floating-Point Value
OptCategory[STARS_NN_vsqrtss] = 1; // Scalar Single-FP Square Root
OptCategory[STARS_NN_vstmxcsr] = 1; // Store Streaming SIMD Extensions Technology Control/Status Register
OptCategory[STARS_NN_vsubpd] = 1; // Subtract Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vsubps] = 1; // Packed Single-FP Subtract
OptCategory[STARS_NN_vsubsd] = 1; // Subtract Scalar Double-Precision Floating-Point Values
OptCategory[STARS_NN_vsubss] = 1; // Scalar Single-FP Subtract
OptCategory[STARS_NN_vtestpd] = 1; // Packed Double-Precision Floating-Point Bit Test
OptCategory[STARS_NN_vtestps] = 1; // Packed Single-Precision Floating-Point Bit Test
OptCategory[STARS_NN_vucomisd] = 1; // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
OptCategory[STARS_NN_vucomiss] = 1; // Scalar Unordered Single-FP Compare and Set EFLAGS
OptCategory[STARS_NN_vunpckhpd] = 1; // Unpack and Interleave High Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vunpckhps] = 1; // Unpack High Packed Single-FP Data
OptCategory[STARS_NN_vunpcklpd] = 1; // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vunpcklps] = 1; // Unpack Low Packed Single-FP Data
OptCategory[STARS_NN_vxorpd] = 1; // Bitwise Logical OR of Double-Precision Floating-Point Values
OptCategory[STARS_NN_vxorps] = 1; // Bitwise Logical XOR for Single-FP Data
OptCategory[STARS_NN_vzeroall] = 1; // Zero All YMM Registers
OptCategory[STARS_NN_vzeroupper] = 1; // Zero Upper Bits of YMM Registers
// Transactional Synchronization Extensions
OptCategory[STARS_NN_xabort] = 1; // Transaction Abort
OptCategory[STARS_NN_xbegin] = 1; // Transaction Begin
OptCategory[STARS_NN_xend] = 1; // Transaction End
OptCategory[STARS_NN_xtest] = 1; // Test If In Transactional Execution
// Virtual PC synthetic instructions
OptCategory[STARS_NN_vmgetinfo] = 1; // Virtual PC - Get VM Information
OptCategory[STARS_NN_vmsetinfo] = 1; // Virtual PC - Set VM Information
OptCategory[STARS_NN_vmdxdsbl] = 1; // Virtual PC - Disable Direct Execution
OptCategory[STARS_NN_vmdxenbl] = 1; // Virtual PC - Enable Direct Execution
OptCategory[STARS_NN_vmcpuid] = 1; // Virtual PC - Virtualized CPU Information
OptCategory[STARS_NN_vmhlt] = 1; // Virtual PC - Halt
OptCategory[STARS_NN_vmsplaf] = 1; // Virtual PC - Spin Lock Acquisition Failed
OptCategory[STARS_NN_vmpushfd] = 1; // Virtual PC - Push virtualized flags register
OptCategory[STARS_NN_vmpopfd] = 1; // Virtual PC - Pop virtualized flags register
OptCategory[STARS_NN_vmcli] = 1; // Virtual PC - Clear Interrupt Flag
OptCategory[STARS_NN_vmsti] = 1; // Virtual PC - Set Interrupt Flag
OptCategory[STARS_NN_vmiretd] = 1; // Virtual PC - Return From Interrupt
OptCategory[STARS_NN_vmsgdt] = 1; // Virtual PC - Store Global Descriptor Table
OptCategory[STARS_NN_vmsidt] = 1; // Virtual PC - Store Interrupt Descriptor Table
OptCategory[STARS_NN_vmsldt] = 1; // Virtual PC - Store Local Descriptor Table
OptCategory[STARS_NN_vmstr] = 1; // Virtual PC - Store Task Register
OptCategory[STARS_NN_vmsdte] = 1; // Virtual PC - Store to Descriptor Table Entry
OptCategory[STARS_NN_vpcext] = 1; // Virtual PC - ISA extension
// FMA4
OptCategory[STARS_NN_vfmaddsubps] = 1; // Multiply with Alternating Add/Subtract of Packed Single-Precision Floating-Point
OptCategory[STARS_NN_vfmaddsubpd] = 1; // Multiply with Alternating Add/Subtract of Packed Double-Precision Floating-Point
OptCategory[STARS_NN_vfmsubaddps] = 1; // Multiply with Alternating Subtract/Add of Packed Single-Precision Floating-Point
OptCategory[STARS_NN_vfmsubaddpd] = 1; // Multiply with Alternating Subtract/Add of Packed Double-Precision Floating-Point
OptCategory[STARS_NN_vfmaddps] = 1; // Multiply and Add Packed Single-Precision Floating-Point
OptCategory[STARS_NN_vfmaddpd] = 1; // Multiply and Add Packed Double-Precision Floating-Point
OptCategory[STARS_NN_vfmaddss] = 1; // Multiply and Add Scalar Single-Precision Floating-Point
OptCategory[STARS_NN_vfmaddsd] = 1; // Multiply and Add Scalar Double-Precision Floating-Point
OptCategory[STARS_NN_vfmsubps] = 1; // Multiply and Subtract Packed Single-Precision Floating-Point
OptCategory[STARS_NN_vfmsubpd] = 1; // Multiply and Subtract Packed Double-Precision Floating-Point
OptCategory[STARS_NN_vfmsubss] = 1; // Multiply and Subtract Scalar Single-Precision Floating-Point
OptCategory[STARS_NN_vfmsubsd] = 1; // Multiply and Subtract Scalar Double-Precision Floating-Point
OptCategory[STARS_NN_vfnmaddps] = 1; // Negative Multiply and Add Packed Single-Precision Floating-Point
OptCategory[STARS_NN_vfnmaddpd] = 1; // Negative Multiply and Add Packed Double-Precision Floating-Point
OptCategory[STARS_NN_vfnmaddss] = 1; // Negative Multiply and Add Scalar Single-Precision Floating-Point
OptCategory[STARS_NN_vfnmaddsd] = 1; // Negative Multiply and Add Double Single-Precision Floating-Point
OptCategory[STARS_NN_vfnmsubps] = 1; // Negative Multiply and Subtract Packed Single-Precision Floating-Point
OptCategory[STARS_NN_vfnmsubpd] = 1; // Negative Multiply and Subtract Packed Double-Precision Floating-Point
OptCategory[STARS_NN_vfnmsubss] = 1; // Negative Multiply and Subtract Scalar Single-Precision Floating-Point
OptCategory[STARS_NN_vfnmsubsd] = 1; // Negative Multiply and Subtract Double Single-Precision Floating-Point
// Intel Memory Protection Extensions (MPX)
OptCategory[STARS_NN_bndmk] = 1; // Make Bounds
OptCategory[STARS_NN_bndcl] = 1; // Check Lower Bound
OptCategory[STARS_NN_bndcu] = 1; // Check Upper Bound
OptCategory[STARS_NN_bndcn] = 1; // Check Upper Bound
OptCategory[STARS_NN_bndmov] = 1; // Move Bounds
OptCategory[STARS_NN_bndldx] = 1; // Load Extended Bounds Using Address Translation
OptCategory[STARS_NN_bndstx] = 1; // Store Extended Bounds Using Address Translation
// New xstate instructions
OptCategory[STARS_NN_xrstors] = 1; // Restore Processor Extended States Supervisor
OptCategory[STARS_NN_xsavec] = 1; // Save Processor Extended States with Compaction
OptCategory[STARS_NN_xsaves] = 1; // Save Processor Extended States Supervisor
// PREFETCHWT1 support
OptCategory[STARS_NN_prefetchwt1] = 1; // Prefetch Vector Data Into Caches with Intent to Write and T1 Hint
// Memory instructions
OptCategory[STARS_NN_clflushopt] = 1; // Flush a Cache Line Optimized
OptCategory[STARS_NN_clwb] = 1; // Cache Line Write Back
OptCategory[STARS_NN_pcommit] = 1; // Persistent Commit (deprecated by Intel)
// Protection Key Rights for User Pages
OptCategory[STARS_NN_rdpkru] = 1; // Read Protection Key Rights for User Pages
OptCategory[STARS_NN_wrpkru] = 1; // Write Data to User Page Key Register
// AVX comparison pseudo-ops
OptCategory[STARS_NN_vcmpeqpd] = 1; // Compare Packed Double-Precision Floating-Point Values - Equal (ordered, non-signaling)
OptCategory[STARS_NN_vcmpltpd] = 1; // Compare Packed Double-Precision Floating-Point Values - Less-than (ordered, signaling)
OptCategory[STARS_NN_vcmplepd] = 1; // Compare Packed Double-Precision Floating-Point Values - Less-than-or-equal (ordered, signaling)
OptCategory[STARS_NN_vcmpunordpd] = 1; // Compare Packed Double-Precision Floating-Point Values - Unordered (non-signaling)
OptCategory[STARS_NN_vcmpneqpd] = 1; // Compare Packed Double-Precision Floating-Point Values - Not-equal (unordered, non-signaling)
OptCategory[STARS_NN_vcmpnltpd] = 1; // Compare Packed Double-Precision Floating-Point Values - Not-less-than (unordered, signaling)
OptCategory[STARS_NN_vcmpnlepd] = 1; // Compare Packed Double-Precision Floating-Point Values - Not-less-than-or-equal (unordered, signaling)
OptCategory[STARS_NN_vcmpordpd] = 1; // Compare Packed Double-Precision Floating-Point Values - Ordered (non-signaling)
OptCategory[STARS_NN_vcmpeq_uqpd] = 1; // Compare Packed Double-Precision Floating-Point Values - Equal (unordered, non-signaling)
OptCategory[STARS_NN_vcmpngepd] = 1; // Compare Packed Double-Precision Floating-Point Values - Not-greater-than-or-equal (unordered, signaling)
OptCategory[STARS_NN_vcmpngtpd] = 1; // Compare Packed Double-Precision Floating-Point Values - Not-greater-than (unordered, signaling)
OptCategory[STARS_NN_vcmpfalsepd] = 1; // Compare Packed Double-Precision Floating-Point Values - False (ordered, non-signaling)
OptCategory[STARS_NN_vcmpneq_oqpd] = 1; // Compare Packed Double-Precision Floating-Point Values - Not-equal (ordered, non-signaling)
OptCategory[STARS_NN_vcmpgepd] = 1; // Compare Packed Double-Precision Floating-Point Values - Greater-than-or-equal (ordered, signaling)
OptCategory[STARS_NN_vcmpgtpd] = 1; // Compare Packed Double-Precision Floating-Point Values - Greater-than (ordered, signaling)
OptCategory[STARS_NN_vcmptruepd] = 1; // Compare Packed Double-Precision Floating-Point Values - True (unordered, non-signaling)
OptCategory[STARS_NN_vcmpeq_ospd] = 1; // Compare Packed Double-Precision Floating-Point Values - Equal (ordered, signaling)
OptCategory[STARS_NN_vcmplt_oqpd] = 1; // Compare Packed Double-Precision Floating-Point Values - Less-than (ordered, non-signaling)
OptCategory[STARS_NN_vcmple_oqpd] = 1; // Compare Packed Double-Precision Floating-Point Values - Less-than-or-equal (ordered, non-signaling)
OptCategory[STARS_NN_vcmpunord_spd] = 1; // Compare Packed Double-Precision Floating-Point Values - Unordered (signaling)
OptCategory[STARS_NN_vcmpneq_uspd] = 1; // Compare Packed Double-Precision Floating-Point Values - Not-equal (unordered, signaling)
OptCategory[STARS_NN_vcmpnlt_uqpd] = 1; // Compare Packed Double-Precision Floating-Point Values - Not-less-than (unordered, non-signaling)
OptCategory[STARS_NN_vcmpnle_uqpd] = 1; // Compare Packed Double-Precision Floating-Point Values - Not-less-than-or-equal (unordered, non-signaling)
OptCategory[STARS_NN_vcmpord_spd] = 1; // Compare Packed Double-Precision Floating-Point Values - Ordered (signaling)
OptCategory[STARS_NN_vcmpeq_uspd] = 1; // Compare Packed Double-Precision Floating-Point Values - Equal (unordered, signaling)
OptCategory[STARS_NN_vcmpnge_uqpd] = 1; // Compare Packed Double-Precision Floating-Point Values - Not-greater-than-or-equal (unordered, non-signaling)
OptCategory[STARS_NN_vcmpngt_uqpd] = 1; // Compare Packed Double-Precision Floating-Point Values - Not-greater-than (unordered, non-signaling)
OptCategory[STARS_NN_vcmpfalse_ospd] = 1; // Compare Packed Double-Precision Floating-Point Values - False (ordered, signaling)
OptCategory[STARS_NN_vcmpneq_ospd] = 1; // Compare Packed Double-Precision Floating-Point Values - Not-equal (ordered, signaling)
OptCategory[STARS_NN_vcmpge_oqpd] = 1; // Compare Packed Double-Precision Floating-Point Values - Greater-than-or-equal (ordered, non-signaling)
OptCategory[STARS_NN_vcmpgt_oqpd] = 1; // Compare Packed Double-Precision Floating-Point Values - Greater-than (ordered, non-signaling)
OptCategory[STARS_NN_vcmptrue_uspd] = 1; // Compare Packed Double-Precision Floating-Point Values - True (unordered, signaling)
OptCategory[STARS_NN_vcmpeqps] = 1; // Packed Single-FP Compare - Equal (ordered, non-signaling)
OptCategory[STARS_NN_vcmpltps] = 1; // Packed Single-FP Compare - Less-than (ordered, signaling)
OptCategory[STARS_NN_vcmpleps] = 1; // Packed Single-FP Compare - Less-than-or-equal (ordered, signaling)
OptCategory[STARS_NN_vcmpunordps] = 1; // Packed Single-FP Compare - Unordered (non-signaling)
OptCategory[STARS_NN_vcmpneqps] = 1; // Packed Single-FP Compare - Not-equal (unordered, non-signaling)
OptCategory[STARS_NN_vcmpnltps] = 1; // Packed Single-FP Compare - Not-less-than (unordered, signaling)
OptCategory[STARS_NN_vcmpnleps] = 1; // Packed Single-FP Compare - Not-less-than-or-equal (unordered, signaling)
OptCategory[STARS_NN_vcmpordps] = 1; // Packed Single-FP Compare - Ordered (non-signaling)
OptCategory[STARS_NN_vcmpeq_uqps] = 1; // Packed Single-FP Compare - Equal (unordered, non-signaling)
OptCategory[STARS_NN_vcmpngeps] = 1; // Packed Single-FP Compare - Not-greater-than-or-equal (unordered, signaling)
OptCategory[STARS_NN_vcmpngtps] = 1; // Packed Single-FP Compare - Not-greater-than (unordered, signaling)
OptCategory[STARS_NN_vcmpfalseps] = 1; // Packed Single-FP Compare - False (ordered, non-signaling)
OptCategory[STARS_NN_vcmpneq_oqps] = 1; // Packed Single-FP Compare - Not-equal (ordered, non-signaling)
OptCategory[STARS_NN_vcmpgeps] = 1; // Packed Single-FP Compare - Greater-than-or-equal (ordered, signaling)
OptCategory[STARS_NN_vcmpgtps] = 1; // Packed Single-FP Compare - Greater-than (ordered, signaling)
OptCategory[STARS_NN_vcmptrueps] = 1; // Packed Single-FP Compare - True (unordered, non-signaling)
OptCategory[STARS_NN_vcmpeq_osps] = 1; // Packed Single-FP Compare - Equal (ordered, signaling)
OptCategory[STARS_NN_vcmplt_oqps] = 1; // Packed Single-FP Compare - Less-than (ordered, non-signaling)
OptCategory[STARS_NN_vcmple_oqps] = 1; // Packed Single-FP Compare - Less-than-or-equal (ordered, non-signaling)
OptCategory[STARS_NN_vcmpunord_sps] = 1; // Packed Single-FP Compare - Unordered (signaling)
OptCategory[STARS_NN_vcmpneq_usps] = 1; // Packed Single-FP Compare - Not-equal (unordered, signaling)
OptCategory[STARS_NN_vcmpnlt_uqps] = 1; // Packed Single-FP Compare - Not-less-than (unordered, non-signaling)
OptCategory[STARS_NN_vcmpnle_uqps] = 1; // Packed Single-FP Compare - Not-less-than-or-equal (unordered, non-signaling)
OptCategory[STARS_NN_vcmpord_sps] = 1; // Packed Single-FP Compare - Ordered (signaling)
OptCategory[STARS_NN_vcmpeq_usps] = 1; // Packed Single-FP Compare - Equal (unordered, signaling)
OptCategory[STARS_NN_vcmpnge_uqps] = 1; // Packed Single-FP Compare - Not-greater-than-or-equal (unordered, non-signaling)
OptCategory[STARS_NN_vcmpngt_uqps] = 1; // Packed Single-FP Compare - Not-greater-than (unordered, non-signaling)
OptCategory[STARS_NN_vcmpfalse_osps] = 1; // Packed Single-FP Compare - False (ordered, signaling)
OptCategory[STARS_NN_vcmpneq_osps] = 1; // Packed Single-FP Compare - Not-equal (ordered, signaling)
OptCategory[STARS_NN_vcmpge_oqps] = 1; // Packed Single-FP Compare - Greater-than-or-equal (ordered, non-signaling)
OptCategory[STARS_NN_vcmpgt_oqps] = 1; // Packed Single-FP Compare - Greater-than (ordered, non-signaling)
OptCategory[STARS_NN_vcmptrue_usps] = 1; // Packed Single-FP Compare - True (unordered, signaling)
OptCategory[STARS_NN_vcmpeqsd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Equal (ordered, non-signaling)
OptCategory[STARS_NN_vcmpltsd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Less-than (ordered, signaling)
OptCategory[STARS_NN_vcmplesd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Less-than-or-equal (ordered, signaling)
OptCategory[STARS_NN_vcmpunordsd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Unordered (non-signaling)
OptCategory[STARS_NN_vcmpneqsd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Not-equal (unordered, non-signaling)
OptCategory[STARS_NN_vcmpnltsd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Not-less-than (unordered, signaling)
OptCategory[STARS_NN_vcmpnlesd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Not-less-than-or-equal (unordered, signaling)
OptCategory[STARS_NN_vcmpordsd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Ordered (non-signaling)
OptCategory[STARS_NN_vcmpeq_uqsd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Equal (unordered, non-signaling)
OptCategory[STARS_NN_vcmpngesd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Not-greater-than-or-equal (unordered, signaling)
OptCategory[STARS_NN_vcmpngtsd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Not-greater-than (unordered, signaling)
OptCategory[STARS_NN_vcmpfalsesd] = 1; // Compare Scalar Double-Precision Floating-Point Values - False (ordered, non-signaling)
OptCategory[STARS_NN_vcmpneq_oqsd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Not-equal (ordered, non-signaling)
OptCategory[STARS_NN_vcmpgesd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Greater-than-or-equal (ordered, signaling)
OptCategory[STARS_NN_vcmpgtsd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Greater-than (ordered, signaling)
OptCategory[STARS_NN_vcmptruesd] = 1; // Compare Scalar Double-Precision Floating-Point Values - True (unordered, non-signaling)
OptCategory[STARS_NN_vcmpeq_ossd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Equal (ordered, signaling)
OptCategory[STARS_NN_vcmplt_oqsd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Less-than (ordered, non-signaling)
OptCategory[STARS_NN_vcmple_oqsd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Less-than-or-equal (ordered, non-signaling)
OptCategory[STARS_NN_vcmpunord_ssd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Unordered (signaling)
OptCategory[STARS_NN_vcmpneq_ussd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Not-equal (unordered, signaling)
OptCategory[STARS_NN_vcmpnlt_uqsd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Not-less-than (unordered, non-signaling)
OptCategory[STARS_NN_vcmpnle_uqsd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Not-less-than-or-equal (unordered, non-signaling)
OptCategory[STARS_NN_vcmpord_ssd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Ordered (signaling)
OptCategory[STARS_NN_vcmpeq_ussd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Equal (unordered, signaling)
OptCategory[STARS_NN_vcmpnge_uqsd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Not-greater-than-or-equal (unordered, non-signaling)
OptCategory[STARS_NN_vcmpngt_uqsd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Not-greater-than (unordered, non-signaling)
OptCategory[STARS_NN_vcmpfalse_ossd] = 1; // Compare Scalar Double-Precision Floating-Point Values - False (ordered, signaling)
OptCategory[STARS_NN_vcmpneq_ossd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Not-equal (ordered, signaling)
OptCategory[STARS_NN_vcmpge_oqsd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Greater-than-or-equal (ordered, non-signaling)
OptCategory[STARS_NN_vcmpgt_oqsd] = 1; // Compare Scalar Double-Precision Floating-Point Values - Greater-than (ordered, non-signaling)
OptCategory[STARS_NN_vcmptrue_ussd] = 1; // Compare Scalar Double-Precision Floating-Point Values - True (unordered, signaling)
OptCategory[STARS_NN_vcmpeqss] = 1; // Scalar Single-FP Compare - Equal (ordered, non-signaling)
OptCategory[STARS_NN_vcmpltss] = 1; // Scalar Single-FP Compare - Less-than (ordered, signaling)
OptCategory[STARS_NN_vcmpless] = 1; // Scalar Single-FP Compare - Less-than-or-equal (ordered, signaling)
OptCategory[STARS_NN_vcmpunordss] = 1; // Scalar Single-FP Compare - Unordered (non-signaling)
OptCategory[STARS_NN_vcmpneqss] = 1; // Scalar Single-FP Compare - Not-equal (unordered, non-signaling)
OptCategory[STARS_NN_vcmpnltss] = 1; // Scalar Single-FP Compare - Not-less-than (unordered, signaling)
OptCategory[STARS_NN_vcmpnless] = 1; // Scalar Single-FP Compare - Not-less-than-or-equal (unordered, signaling)
OptCategory[STARS_NN_vcmpordss] = 1; // Scalar Single-FP Compare - Ordered (non-signaling)
OptCategory[STARS_NN_vcmpeq_uqss] = 1; // Scalar Single-FP Compare - Equal (unordered, non-signaling)
OptCategory[STARS_NN_vcmpngess] = 1; // Scalar Single-FP Compare - Not-greater-than-or-equal (unordered, signaling)
OptCategory[STARS_NN_vcmpngtss] = 1; // Scalar Single-FP Compare - Not-greater-than (unordered, signaling)
OptCategory[STARS_NN_vcmpfalsess] = 1; // Scalar Single-FP Compare - False (ordered, non-signaling)
OptCategory[STARS_NN_vcmpneq_oqss] = 1; // Scalar Single-FP Compare - Not-equal (ordered, non-signaling)
OptCategory[STARS_NN_vcmpgess] = 1; // Scalar Single-FP Compare - Greater-than-or-equal (ordered, signaling)
OptCategory[STARS_NN_vcmpgtss] = 1; // Scalar Single-FP Compare - Greater-than (ordered, signaling)
OptCategory[STARS_NN_vcmptruess] = 1; // Scalar Single-FP Compare - True (unordered, non-signaling)
OptCategory[STARS_NN_vcmpeq_osss] = 1; // Scalar Single-FP Compare - Equal (ordered, signaling)
OptCategory[STARS_NN_vcmplt_oqss] = 1; // Scalar Single-FP Compare - Less-than (ordered, non-signaling)
OptCategory[STARS_NN_vcmple_oqss] = 1; // Scalar Single-FP Compare - Less-than-or-equal (ordered, non-signaling)
OptCategory[STARS_NN_vcmpunord_sss] = 1; // Scalar Single-FP Compare - Unordered (signaling)
OptCategory[STARS_NN_vcmpneq_usss] = 1; // Scalar Single-FP Compare - Not-equal (unordered, signaling)
OptCategory[STARS_NN_vcmpnlt_uqss] = 1; // Scalar Single-FP Compare - Not-less-than (unordered, non-signaling)
OptCategory[STARS_NN_vcmpnle_uqss] = 1; // Scalar Single-FP Compare - Not-less-than-or-equal (unordered, non-signaling)
OptCategory[STARS_NN_vcmpord_sss] = 1; // Scalar Single-FP Compare - Ordered (signaling)
OptCategory[STARS_NN_vcmpeq_usss] = 1; // Scalar Single-FP Compare - Equal (unordered, signaling)
OptCategory[STARS_NN_vcmpnge_uqss] = 1; // Scalar Single-FP Compare - Not-greater-than-or-equal (unordered, non-signaling)
OptCategory[STARS_NN_vcmpngt_uqss] = 1; // Scalar Single-FP Compare - Not-greater-than (unordered, non-signaling)
OptCategory[STARS_NN_vcmpfalse_osss] = 1; // Scalar Single-FP Compare - False (ordered, signaling)
OptCategory[STARS_NN_vcmpneq_osss] = 1; // Scalar Single-FP Compare - Not-equal (ordered, signaling)
OptCategory[STARS_NN_vcmpge_oqss] = 1; // Scalar Single-FP Compare - Greater-than-or-equal (ordered, non-signaling)
OptCategory[STARS_NN_vcmpgt_oqss] = 1; // Scalar Single-FP Compare - Greater-than (ordered, non-signaling)
OptCategory[STARS_NN_vcmptrue_usss] = 1; // Scalar Single-FP Compare - True (unordered, signaling)
// AVX-512 instructions
OptCategory[STARS_NN_valignd] = 1; // Align Doubleword Vectors
OptCategory[STARS_NN_valignq] = 1; // Align Quadword Vectors
OptCategory[STARS_NN_vblendmpd] = 1; // Blend Float64 Vectors Using an OpMask Control
OptCategory[STARS_NN_vblendmps] = 1; // Blend Float32 Vectors Using an OpMask Control
OptCategory[STARS_NN_vpblendmb] = 1; // Blend Byte Vectors Using an Opmask Control
OptCategory[STARS_NN_vpblendmw] = 1; // Blend Word Vectors Using an Opmask Control
OptCategory[STARS_NN_vpblendmd] = 1; // Blend Int32 Vectors Using an OpMask Control
OptCategory[STARS_NN_vpblendmq] = 1; // Blend Int64 Vectors Using an OpMask Control
OptCategory[STARS_NN_vbroadcastf32x2] = 1; // Load with Broadcast Floating-Point Data
OptCategory[STARS_NN_vbroadcastf32x4] = 1; // Load with Broadcast Floating-Point Data
OptCategory[STARS_NN_vbroadcastf64x2] = 1; // Load with Broadcast Floating-Point Data
OptCategory[STARS_NN_vbroadcastf32x8] = 1; // Load with Broadcast Floating-Point Data
OptCategory[STARS_NN_vbroadcastf64x4] = 1; // Load with Broadcast Floating-Point Data
OptCategory[STARS_NN_vbroadcasti32x2] = 1; // Load Integer and Broadcast
OptCategory[STARS_NN_vbroadcasti32x4] = 1; // Load Integer and Broadcast
OptCategory[STARS_NN_vbroadcasti64x2] = 1; // Load Integer and Broadcast
OptCategory[STARS_NN_vbroadcasti32x8] = 1; // Load Integer and Broadcast
OptCategory[STARS_NN_vbroadcasti64x4] = 1; // Load Integer and Broadcast
OptCategory[STARS_NN_vcompresspd] = 1; // Store Sparse Packed Double-Precision Floating-Point Values into Dense Memory
OptCategory[STARS_NN_vcompressps] = 1; // Store Sparse Packed Single-Precision Floating-Point Values into Dense Memory
OptCategory[STARS_NN_vcvtpd2qq] = 1; // Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers
OptCategory[STARS_NN_vcvtpd2udq] = 1; // Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers
OptCategory[STARS_NN_vcvtpd2uqq] = 1; // Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers
OptCategory[STARS_NN_vcvtps2udq] = 1; // Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values
OptCategory[STARS_NN_vcvtps2qq] = 1; // Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values
OptCategory[STARS_NN_vcvtps2uqq] = 1; // Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values
OptCategory[STARS_NN_vcvtqq2pd] = 1; // Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vcvtqq2ps] = 1; // Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vcvtsd2usi] = 1; // Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer
OptCategory[STARS_NN_vcvtss2usi] = 1; // Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer
OptCategory[STARS_NN_vcvttpd2qq] = 1; // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers
OptCategory[STARS_NN_vcvttpd2udq] = 1; // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers
OptCategory[STARS_NN_vcvttpd2uqq] = 1; // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers
OptCategory[STARS_NN_vcvttps2udq] = 1; // Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values
OptCategory[STARS_NN_vcvttps2qq] = 1; // Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values
OptCategory[STARS_NN_vcvttps2uqq] = 1; // Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values
OptCategory[STARS_NN_vcvttsd2usi] = 1; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer
OptCategory[STARS_NN_vcvttss2usi] = 1; // Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer
OptCategory[STARS_NN_vcvtudq2pd] = 1; // Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vcvtudq2ps] = 1; // Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vcvtuqq2pd] = 1; // Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values
OptCategory[STARS_NN_vcvtuqq2ps] = 1; // Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values
OptCategory[STARS_NN_vcvtusi2sd] = 1; // Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value
OptCategory[STARS_NN_vcvtusi2ss] = 1; // Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value
OptCategory[STARS_NN_vdbpsadbw] = 1; // Double Block Packed Sum-Absolute-Differences (SAD) on Unsigned Bytes
OptCategory[STARS_NN_vexpandpd] = 1; // Load Sparse Packed Double-Precision Floating-Point Values from Dense Memory
OptCategory[STARS_NN_vexpandps] = 1; // Load Sparse Packed Single-Precision Floating-Point Values from Dense Memory
OptCategory[STARS_NN_vextractf32x4] = 1; // Extract Packed Floating-Point Values
OptCategory[STARS_NN_vextractf64x2] = 1; // Extract Packed Floating-Point Values
OptCategory[STARS_NN_vextractf32x8] = 1; // Extract Packed Floating-Point Values
OptCategory[STARS_NN_vextractf64x4] = 1; // Extract Packed Floating-Point Values
OptCategory[STARS_NN_vextracti32x4] = 1; // Extract packed Integer Values
OptCategory[STARS_NN_vextracti64x2] = 1; // Extract packed Integer Values
OptCategory[STARS_NN_vextracti32x8] = 1; // Extract packed Integer Values
OptCategory[STARS_NN_vextracti64x4] = 1; // Extract packed Integer Values
OptCategory[STARS_NN_vfixupimmpd] = 1; // Fix Up Special Packed Float64 Values
OptCategory[STARS_NN_vfixupimmps] = 1; // Fix Up Special Packed Float32 Values
OptCategory[STARS_NN_vfixupimmsd] = 1; // Fix Up Special Scalar Float64 Value
OptCategory[STARS_NN_vfixupimmss] = 1; // Fix Up Special Scalar Float32 Value
OptCategory[STARS_NN_vfpclasspd] = 1; // Tests Types Of a Packed Float64 Values
OptCategory[STARS_NN_vfpclassps] = 1; // Tests Types Of a Packed Float32 Values
OptCategory[STARS_NN_vfpclasssd] = 1; // Tests Types Of a Scalar Float64 Values
OptCategory[STARS_NN_vfpclassss] = 1; // Tests Types Of a Scalar Float32 Values
OptCategory[STARS_NN_vgetexppd] = 1; // Convert Exponents of Packed DP FP Values to DP FP Values
OptCategory[STARS_NN_vgetexpps] = 1; // Convert Exponents of Packed SP FP Values to SP FP Values
OptCategory[STARS_NN_vgetexpsd] = 1; // Convert Exponents of Scalar DP FP Values to DP FP Value
OptCategory[STARS_NN_vgetexpss] = 1; // Convert Exponents of Scalar SP FP Values to SP FP Value
OptCategory[STARS_NN_vgetmantpd] = 1; // Extract Float64 Vector of Normalized Mantissas from Float64 Vector
OptCategory[STARS_NN_vgetmantps] = 1; // Extract Float32 Vector of Normalized Mantissas from Float32 Vector
OptCategory[STARS_NN_vgetmantsd] = 1; // Extract Float64 of Normalized Mantissas from Float64 Scalar
OptCategory[STARS_NN_vgetmantss] = 1; // Extract Float32 Vector of Normalized Mantissa from Float32 Vector
OptCategory[STARS_NN_vinsertf32x4] = 1; // Insert Packed Floating-Point Values
OptCategory[STARS_NN_vinsertf64x2] = 1; // Insert Packed Floating-Point Values
OptCategory[STARS_NN_vinsertf32x8] = 1; // Insert Packed Floating-Point Values
OptCategory[STARS_NN_vinsertf64x4] = 1; // Insert Packed Floating-Point Values
OptCategory[STARS_NN_vinserti32x4] = 1; // Insert Packed Integer Values
OptCategory[STARS_NN_vinserti64x2] = 1; // Insert Packed Integer Values
OptCategory[STARS_NN_vinserti32x8] = 1; // Insert Packed Integer Values
OptCategory[STARS_NN_vinserti64x4] = 1; // Insert Packed Integer Values
OptCategory[STARS_NN_vmovdqa32] = 1; // Move Aligned Packed Integer Values
OptCategory[STARS_NN_vmovdqa64] = 1; // Move Aligned Packed Integer Values
OptCategory[STARS_NN_vmovdqu8] = 1; // Move Unaligned Packed Integer Values
OptCategory[STARS_NN_vmovdqu16] = 1; // Move Unaligned Packed Integer Values
OptCategory[STARS_NN_vmovdqu32] = 1; // Move Unaligned Packed Integer Values
OptCategory[STARS_NN_vmovdqu64] = 1; // Move Unaligned Packed Integer Values
OptCategory[STARS_NN_vpabsq] = 1; // Packed Absolute Value
OptCategory[STARS_NN_vpandd] = 1; // Logical AND
OptCategory[STARS_NN_vpandq] = 1; // Logical AND
OptCategory[STARS_NN_vpandnd] = 1; // Logical AND NOT
OptCategory[STARS_NN_vpandnq] = 1; // Logical AND NOT
OptCategory[STARS_NN_vpbroadcastmb2q] = 1; // Broadcast Mask to Vector Register
OptCategory[STARS_NN_vpbroadcastmw2d] = 1; // Broadcast Mask to Vector Register
OptCategory[STARS_NN_vpcmpb] = 1; // Compare Packed Byte Values Into Mask
OptCategory[STARS_NN_vpcmpub] = 1; // Compare Packed Byte Values Into Mask
OptCategory[STARS_NN_vpcmpd] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpud] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpq] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpuq] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpw] = 1; // Compare Packed Word Values Into Mask
OptCategory[STARS_NN_vpcmpuw] = 1; // Compare Packed Word Values Into Mask
OptCategory[STARS_NN_vpcompressd] = 1; // Store Sparse Packed Doubleword Integer Values into Dense Memory/Register
OptCategory[STARS_NN_vpcompressq] = 1; // Store Sparse Packed Quadword Integer Values into Dense Memory/Register
OptCategory[STARS_NN_vpconflictd] = 1; // Detect Conflicts Within a Vector of Packed Dword Values into Dense Memory/Register
OptCategory[STARS_NN_vpconflictq] = 1; // Detect Conflicts Within a Vector of Packed Qword Values into Dense Memory/Register
OptCategory[STARS_NN_vpermb] = 1; // Permute Packed Bytes Elements
OptCategory[STARS_NN_vpermw] = 1; // Permute Packed Words Elements
OptCategory[STARS_NN_vpermi2b] = 1; // Full Permute of Bytes From Two Tables Overwriting the Index
OptCategory[STARS_NN_vpermi2w] = 1; // Full Permute From Two Tables Overwriting the Index
OptCategory[STARS_NN_vpermi2d] = 1; // Full Permute From Two Tables Overwriting the Index
OptCategory[STARS_NN_vpermi2q] = 1; // Full Permute From Two Tables Overwriting the Index
OptCategory[STARS_NN_vpermi2ps] = 1; // Full Permute From Two Tables Overwriting the Index
OptCategory[STARS_NN_vpermi2pd] = 1; // Full Permute From Two Tables Overwriting the Index
OptCategory[STARS_NN_vpermt2b] = 1; // Full Permute of Bytes From Two Tables Overwriting a Table
OptCategory[STARS_NN_vpermt2w] = 1; // Full Permute from Two Tables Overwriting one Table
OptCategory[STARS_NN_vpermt2d] = 1; // Full Permute from Two Tables Overwriting one Table
OptCategory[STARS_NN_vpermt2q] = 1; // Full Permute from Two Tables Overwriting one Table
OptCategory[STARS_NN_vpermt2ps] = 1; // Full Permute from Two Tables Overwriting one Table
OptCategory[STARS_NN_vpermt2pd] = 1; // Full Permute from Two Tables Overwriting one Table
OptCategory[STARS_NN_vpexpandd] = 1; // Load Sparse Packed Doubleword Integer Values from Dense Memory/Register
OptCategory[STARS_NN_vpexpandq] = 1; // Load Sparse Packed Quadword Integer Values from Dense Memory/Register
OptCategory[STARS_NN_vplzcntd] = 1; // Count the Number of Leading Zero Bits for Packed Dword Values
OptCategory[STARS_NN_vplzcntq] = 1; // Count the Number of Leading Zero Bits for Packed Qword Values
OptCategory[STARS_NN_vpmadd52luq] = 1; // Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Qword Accumulators
OptCategory[STARS_NN_vpmadd52huq] = 1; // Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to 64-bit Accumulators
OptCategory[STARS_NN_vpmaxsq] = 1; // Maximum of Packed Signed Integers
OptCategory[STARS_NN_vpmaxuq] = 1; // Maximum of Packed Unsigned Integers
OptCategory[STARS_NN_vpminsq] = 1; // Minimum of Packed Signed Integers
OptCategory[STARS_NN_vpminuq] = 1; // Minimum of Packed Unsigned Integers
OptCategory[STARS_NN_vpmovm2b] = 1; // Convert a Mask Register to a Vector Register
OptCategory[STARS_NN_vpmovm2w] = 1; // Convert a Mask Register to a Vector Register
OptCategory[STARS_NN_vpmovm2d] = 1; // Convert a Mask Register to a Vector Register
OptCategory[STARS_NN_vpmovm2q] = 1; // Convert a Mask Register to a Vector Register
OptCategory[STARS_NN_vpmovb2m] = 1; // Convert a Vector Register to a Mask
OptCategory[STARS_NN_vpmovw2m] = 1; // Convert a Vector Register to a Mask
OptCategory[STARS_NN_vpmovd2m] = 1; // Convert a Vector Register to a Mask
OptCategory[STARS_NN_vpmovq2m] = 1; // Convert a Vector Register to a Mask
OptCategory[STARS_NN_vpmovqb] = 1; // Down Convert QWord to Byte
OptCategory[STARS_NN_vpmovsqb] = 1; // Down Convert QWord to Byte
OptCategory[STARS_NN_vpmovusqb] = 1; // Down Convert QWord to Byte
OptCategory[STARS_NN_vpmovqw] = 1; // Down Convert QWord to Word
OptCategory[STARS_NN_vpmovsqw] = 1; // Down Convert QWord to Word
OptCategory[STARS_NN_vpmovusqw] = 1; // Down Convert QWord to Word
OptCategory[STARS_NN_vpmovqd] = 1; // Down Convert QWord to DWord
OptCategory[STARS_NN_vpmovsqd] = 1; // Down Convert QWord to DWord
OptCategory[STARS_NN_vpmovusqd] = 1; // Down Convert QWord to DWord
OptCategory[STARS_NN_vpmovdb] = 1; // Down Convert DWord to Byte
OptCategory[STARS_NN_vpmovsdb] = 1; // Down Convert DWord to Byte
OptCategory[STARS_NN_vpmovusdb] = 1; // Down Convert DWord to Byte
OptCategory[STARS_NN_vpmovdw] = 1; // Down Convert DWord to Word
OptCategory[STARS_NN_vpmovsdw] = 1; // Down Convert DWord to Word
OptCategory[STARS_NN_vpmovusdw] = 1; // Down Convert DWord to Word
OptCategory[STARS_NN_vpmovwb] = 1; // Down Convert Word to Byte
OptCategory[STARS_NN_vpmovswb] = 1; // Down Convert Word to Byte
OptCategory[STARS_NN_vpmovuswb] = 1; // Down Convert Word to Byte
OptCategory[STARS_NN_vpmullq] = 1; // Multiply Packed Integers and Store Low Result
OptCategory[STARS_NN_vpmultishiftqb] = 1; // Select Packed Unaligned Bytes from Quadword Sources
OptCategory[STARS_NN_vpord] = 1; // Bitwise Logical Or
OptCategory[STARS_NN_vporq] = 1; // Bitwise Logical Or
OptCategory[STARS_NN_vprold] = 1; // Bit Rotate Left
OptCategory[STARS_NN_vprolvd] = 1; // Bit Rotate Left
OptCategory[STARS_NN_vprolq] = 1; // Bit Rotate Left
OptCategory[STARS_NN_vprolvq] = 1; // Bit Rotate Left
OptCategory[STARS_NN_vprord] = 1; // Bit Rotate Right
OptCategory[STARS_NN_vprorvd] = 1; // Bit Rotate Right
OptCategory[STARS_NN_vprorq] = 1; // Bit Rotate Right
OptCategory[STARS_NN_vprorvq] = 1; // Bit Rotate Right
OptCategory[STARS_NN_vpscatterdd] = 1; // Scatter Packed Dword with Signed Dword
OptCategory[STARS_NN_vpscatterdq] = 1; // Scatter Packed Qword with Signed Qword Indices
OptCategory[STARS_NN_vpscatterqd] = 1; // Scatter Packed Dword with Signed Dword
OptCategory[STARS_NN_vpscatterqq] = 1; // Scatter Packed Qword with Signed Qword Indices
OptCategory[STARS_NN_vpsraq] = 1; // Bit Shift Arithmetic Right
OptCategory[STARS_NN_vpsllvw] = 1; // Variable Bit Shift Left Logical
OptCategory[STARS_NN_vpsrlvw] = 1; // Variable Bit Shift Right Logical
OptCategory[STARS_NN_vptestnmb] = 1; // Logical NAND and Set
OptCategory[STARS_NN_vptestnmw] = 1; // Logical NAND and Set
OptCategory[STARS_NN_vptestnmd] = 1; // Logical NAND and Set
OptCategory[STARS_NN_vptestnmq] = 1; // Logical NAND and Set
OptCategory[STARS_NN_vshuff32x4] = 1; // Shuffle Packed Values at 128-bit Granularity
OptCategory[STARS_NN_vshuff64x2] = 1; // Shuffle Packed Values at 128-bit Granularity
OptCategory[STARS_NN_vshufi32x4] = 1; // Shuffle Packed Values at 128-bit Granularity
OptCategory[STARS_NN_vshufi64x2] = 1; // Shuffle Packed Values at 128-bit Granularity
OptCategory[STARS_NN_vpternlogd] = 1; // Bitwise Ternary Logic
OptCategory[STARS_NN_vpternlogq] = 1; // Bitwise Ternary Logic
OptCategory[STARS_NN_vptestmb] = 1; // Logical AND and Set Mask
OptCategory[STARS_NN_vptestmw] = 1; // Logical AND and Set Mask
OptCategory[STARS_NN_vptestmd] = 1; // Logical AND and Set Mask
OptCategory[STARS_NN_vptestmq] = 1; // Logical AND and Set Mask
OptCategory[STARS_NN_vpsravw] = 1; // Variable Bit Shift Right Arithmetic
OptCategory[STARS_NN_vpsravq] = 1; // Variable Bit Shift Right Arithmetic
OptCategory[STARS_NN_vpxord] = 1; // Exclusive Or
OptCategory[STARS_NN_vpxorq] = 1; // Exclusive Or
OptCategory[STARS_NN_vrangepd] = 1; // Range Restriction Calculation For Packed Pairs of Float64 Values
OptCategory[STARS_NN_vrangeps] = 1; // Range Restriction Calculation For Packed Pairs of Float32 Values
OptCategory[STARS_NN_vrangesd] = 1; // Range Restriction Calculation From a pair of Scalar Float64 Values
OptCategory[STARS_NN_vrangess] = 1; // Range Restriction Calculation From a Pair of Scalar Float32 Values
OptCategory[STARS_NN_vrcp14pd] = 1; // Compute Approximate Reciprocals of Packed Float64 Values
OptCategory[STARS_NN_vrcp14sd] = 1; // Compute Approximate Reciprocal of Scalar Float64 Value
OptCategory[STARS_NN_vrcp14ps] = 1; // Compute Approximate Reciprocals of Packed Float32 Values
OptCategory[STARS_NN_vrcp14ss] = 1; // Compute Approximate Reciprocal of Scalar Float32 Value
OptCategory[STARS_NN_vreducepd] = 1; // Perform Reduction Transformation on Packed Float64 Values
OptCategory[STARS_NN_vreducesd] = 1; // Perform a Reduction Transformation on a Scalar Float64 Value
OptCategory[STARS_NN_vreduceps] = 1; // Perform Reduction Transformation on Packed Float32 Values
OptCategory[STARS_NN_vreducess] = 1; // Perform a Reduction Transformation on a Scalar Float32 Value
OptCategory[STARS_NN_vrndscalepd] = 1; // Round Packed Float64 Values To Include A Given Number Of Fraction Bits
OptCategory[STARS_NN_vrndscalesd] = 1; // Round Scalar Float64 Value To Include A Given Number Of Fraction Bits
OptCategory[STARS_NN_vrndscaleps] = 1; // Round Packed Float32 Values To Include A Given Number Of Fraction Bits
OptCategory[STARS_NN_vrndscaless] = 1; // Round Scalar Float32 Value To Include A Given Number Of Fraction Bits
OptCategory[STARS_NN_vrsqrt14pd] = 1; // Compute Approximate Reciprocals of Square Roots of Packed Float64 Values
OptCategory[STARS_NN_vrsqrt14sd] = 1; // Compute Approximate Reciprocal of Square Root of Scalar Float64 Value
OptCategory[STARS_NN_vrsqrt14ps] = 1; // Compute Approximate Reciprocals of Square Roots of Packed Float32 Values
OptCategory[STARS_NN_vrsqrt14ss] = 1; // Compute Approximate Reciprocal of Square Root of Scalar Float32 Value
OptCategory[STARS_NN_vscalefpd] = 1; // Scale Packed Float64 Values With Float64 Values
OptCategory[STARS_NN_vscalefsd] = 1; // Scale Scalar Float64 Values With Float64 Values
OptCategory[STARS_NN_vscalefps] = 1; // Scale Packed Float32 Values With Float32 Values
OptCategory[STARS_NN_vscalefss] = 1; // Scale Scalar Float32 Value With Float32 Value
OptCategory[STARS_NN_vscatterdps] = 1; // Scatter Packed Single, Packed Double with Signed Dword and Qword Indices
OptCategory[STARS_NN_vscatterdpd] = 1; // Scatter Packed Single, Packed Double with Signed Dword and Qword Indices
OptCategory[STARS_NN_vscatterqps] = 1; // Scatter Packed Single, Packed Double with Signed Dword and Qword Indices
OptCategory[STARS_NN_vscatterqpd] = 1; // Scatter Packed Single, Packed Double with Signed Dword and Qword Indices
OptCategory[STARS_NN_vexp2pd] = 1; // Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error
OptCategory[STARS_NN_vexp2ps] = 1; // Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error
OptCategory[STARS_NN_vrcp28pd] = 1; // Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error
OptCategory[STARS_NN_vrcp28sd] = 1; // Approximation to the Reciprocal of Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error
OptCategory[STARS_NN_vrcp28ps] = 1; // Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error
OptCategory[STARS_NN_vrcp28ss] = 1; // Approximation to the Reciprocal of Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error
OptCategory[STARS_NN_vrsqrt28pd] = 1; // Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error
OptCategory[STARS_NN_vrsqrt28sd] = 1; // Approximation to the Reciprocal Square Root of Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error
OptCategory[STARS_NN_vrsqrt28ps] = 1; // Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error
OptCategory[STARS_NN_vrsqrt28ss] = 1; // Approximation to the Reciprocal Square Root of Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error
OptCategory[STARS_NN_vgatherpf0dps] = 1; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
OptCategory[STARS_NN_vgatherpf0qps] = 1; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
OptCategory[STARS_NN_vgatherpf0dpd] = 1; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
OptCategory[STARS_NN_vgatherpf0qpd] = 1; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
OptCategory[STARS_NN_vgatherpf1dps] = 1; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
OptCategory[STARS_NN_vgatherpf1qps] = 1; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
OptCategory[STARS_NN_vgatherpf1dpd] = 1; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
OptCategory[STARS_NN_vgatherpf1qpd] = 1; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
OptCategory[STARS_NN_vscatterpf0dps] = 1; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
OptCategory[STARS_NN_vscatterpf0qps] = 1; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
OptCategory[STARS_NN_vscatterpf0dpd] = 1; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
OptCategory[STARS_NN_vscatterpf0qpd] = 1; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
OptCategory[STARS_NN_vscatterpf1dps] = 1; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
OptCategory[STARS_NN_vscatterpf1qps] = 1; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
OptCategory[STARS_NN_vscatterpf1dpd] = 1; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
OptCategory[STARS_NN_vscatterpf1qpd] = 1; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
// AVX-512 comparison pseudo-ops
OptCategory[STARS_NN_vpcmpltd] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpled] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpneqd] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpnltd] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpnled] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpequd] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpltud] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpleud] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpnequd] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpnltud] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpnleud] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpltq] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpleq] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpneqq] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpnltq] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpnleq] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpequq] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpltuq] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpleuq] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpnequq] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpnltuq] = 1; // Compare Packed Integer Values into Mask
OptCategory[STARS_NN_vpcmpnleuq] = 1; // Compare Packed Integer Values into Mask
// Opmask instructions
OptCategory[STARS_NN_kaddw] = 1; // ADD Two Masks
OptCategory[STARS_NN_kaddb] = 1; // ADD Two Masks
OptCategory[STARS_NN_kaddq] = 1; // ADD Two Masks
OptCategory[STARS_NN_kaddd] = 1; // ADD Two Masks
OptCategory[STARS_NN_kandw] = 1; // Bitwise Logical AND Masks
OptCategory[STARS_NN_kandb] = 1; // Bitwise Logical AND Masks
OptCategory[STARS_NN_kandq] = 1; // Bitwise Logical AND Masks
OptCategory[STARS_NN_kandd] = 1; // Bitwise Logical AND Masks
OptCategory[STARS_NN_kandnw] = 1; // Bitwise Logical AND NOT Masks
OptCategory[STARS_NN_kandnb] = 1; // Bitwise Logical AND NOT Masks
OptCategory[STARS_NN_kandnq] = 1; // Bitwise Logical AND NOT Masks
OptCategory[STARS_NN_kandnd] = 1; // Bitwise Logical AND NOT Masks
OptCategory[STARS_NN_kmovw] = 1; // Move from and to Mask Registers
OptCategory[STARS_NN_kmovb] = 1; // Move from and to Mask Registers
OptCategory[STARS_NN_kmovq] = 1; // Move from and to Mask Registers
OptCategory[STARS_NN_kmovd] = 1; // Move from and to Mask Registers
OptCategory[STARS_NN_kunpckbw] = 1; // Unpack for Mask Registers
OptCategory[STARS_NN_kunpckwd] = 1; // Unpack for Mask Registers
OptCategory[STARS_NN_kunpckdq] = 1; // Unpack for Mask Registers
OptCategory[STARS_NN_knotw] = 1; // NOT Mask Register
OptCategory[STARS_NN_knotb] = 1; // NOT Mask Register
OptCategory[STARS_NN_knotq] = 1; // NOT Mask Register
OptCategory[STARS_NN_knotd] = 1; // NOT Mask Register
OptCategory[STARS_NN_korw] = 1; // Bitwise Logical OR Masks
OptCategory[STARS_NN_korb] = 1; // Bitwise Logical OR Masks
OptCategory[STARS_NN_korq] = 1; // Bitwise Logical OR Masks
OptCategory[STARS_NN_kord] = 1; // Bitwise Logical OR Masks
OptCategory[STARS_NN_kortestw] = 1; // OR Masks And Set Flags
OptCategory[STARS_NN_kortestb] = 1; // OR Masks And Set Flags
OptCategory[STARS_NN_kortestq] = 1; // OR Masks And Set Flags
OptCategory[STARS_NN_kortestd] = 1; // OR Masks And Set Flags
OptCategory[STARS_NN_kshiftlw] = 1; // Shift Left Mask Registers
OptCategory[STARS_NN_kshiftlb] = 1; // Shift Left Mask Registers
OptCategory[STARS_NN_kshiftlq] = 1; // Shift Left Mask Registers
OptCategory[STARS_NN_kshiftld] = 1; // Shift Left Mask Registers
OptCategory[STARS_NN_kshiftrw] = 1; // Shift Right Mask Registers
OptCategory[STARS_NN_kshiftrb] = 1; // Shift Right Mask Registers
OptCategory[STARS_NN_kshiftrq] = 1; // Shift Right Mask Registers
OptCategory[STARS_NN_kshiftrd] = 1; // Shift Right Mask Registers
OptCategory[STARS_NN_kxnorw] = 1; // Bitwise Logical XNOR Masks
OptCategory[STARS_NN_kxnorb] = 1; // Bitwise Logical XNOR Masks
OptCategory[STARS_NN_kxnorq] = 1; // Bitwise Logical XNOR Masks
OptCategory[STARS_NN_kxnord] = 1; // Bitwise Logical XNOR Masks
OptCategory[STARS_NN_ktestw] = 1; // Packed Bit Test Masks and Set Flags
OptCategory[STARS_NN_ktestb] = 1; // Packed Bit Test Masks and Set Flags
OptCategory[STARS_NN_ktestq] = 1; // Packed Bit Test Masks and Set Flags
OptCategory[STARS_NN_ktestd] = 1; // Packed Bit Test Masks and Set Flags
OptCategory[STARS_NN_kxorw] = 1; // Bitwise Logical XOR Masks
OptCategory[STARS_NN_kxorb] = 1; // Bitwise Logical XOR Masks
OptCategory[STARS_NN_kxorq] = 1; // Bitwise Logical XOR Masks
OptCategory[STARS_NN_kxord] = 1; // Bitwise Logical XOR Masks
// SHA Extensions
OptCategory[STARS_NN_sha1rnds4] = 1; // Perform Four Rounds of SHA1 Operation
OptCategory[STARS_NN_sha1nexte] = 1; // Calculate SHA1 State Variable E after Four Rounds
OptCategory[STARS_NN_sha1msg1] = 1; // Perform an Intermediate Calculation for the Next Four SHA1 Message Dwords
OptCategory[STARS_NN_sha1msg2] = 1; // Perform a Final Calculation for the Next Four SHA1 Message Dwords
OptCategory[STARS_NN_sha256rnds2] = 1; // Perform Two Rounds of SHA256 Operation
OptCategory[STARS_NN_sha256msg1] = 1; // Perform an Intermediate Calculation for the Next Four SHA256 Message Dwords
OptCategory[STARS_NN_sha256msg2] = 1; // Perform a Final Calculation for the Next Four SHA256 Message Dwords
// Intel Software Guard Extensions
OptCategory[STARS_NN_encls] = 1; // Execute an Enclave System Function of Specified Leaf Number
OptCategory[STARS_NN_enclu] = 1; // Execute an Enclave User Function of Specified Leaf Number
// AMD XOP
OptCategory[STARS_NN_vfrczpd] = 1; // Extract Fraction Packed Double-Precision Floating-Point
OptCategory[STARS_NN_vfrczps] = 1; // Extract Fraction Packed Single-Precision Floating-Point
OptCategory[STARS_NN_vfrczsd] = 1; // Extract Fraction Scalar Double-Precision Floating-Point
OptCategory[STARS_NN_vfrczss] = 1; // Extract Fraction Scalar Single-Precision Floating Point
OptCategory[STARS_NN_vpcmov] = 1; // Vector Conditional Moves
OptCategory[STARS_NN_vpcomb] = 1; // Compare Vector Signed Bytes
OptCategory[STARS_NN_vpcomd] = 1; // Compare Vector Signed Doublewords
OptCategory[STARS_NN_vpcomq] = 1; // Compare Vector Signed Quadwords
OptCategory[STARS_NN_vpcomub] = 1; // Compare Vector Unsigned Bytes
OptCategory[STARS_NN_vpcomud] = 1; // Compare Vector Unsigned Doublewords
OptCategory[STARS_NN_vpcomuq] = 1; // Compare Vector Unsigned Quadwords
OptCategory[STARS_NN_vpcomuw] = 1; // Compare Vector Unsigned Words
OptCategory[STARS_NN_vpcomw] = 1; // Compare Vector Signed Words
OptCategory[STARS_NN_vpermil2pd] = 1; // Permute Two-Source Double-Precision Floating-Point Values
OptCategory[STARS_NN_vpermil2ps] = 1; // Permute Two-Source Single-Precision Floating-Point Values
OptCategory[STARS_NN_vphaddbd] = 1; // Packed Horizontal Add Signed Byte to Signed Doubleword
OptCategory[STARS_NN_vphaddbq] = 1; // Packed Horizontal Add Signed Byte to Signed Quadword
OptCategory[STARS_NN_vphaddbw] = 1; // Packed Horizontal Add Signed Byte to Signed Word
OptCategory[STARS_NN_vphadddq] = 1; // Packed Horizontal Add Signed Doubleword to Signed Quadword
OptCategory[STARS_NN_vphaddubd] = 1; // Packed Horizontal Add Unsigned Byte to Doubleword
OptCategory[STARS_NN_vphaddubq] = 1; // Packed Horizontal Add Unsigned Byte to Quadword
OptCategory[STARS_NN_vphaddubw] = 1; // Packed Horizontal Add Unsigned Byte to Word
OptCategory[STARS_NN_vphaddudq] = 1; // Packed Horizontal Add Unsigned Doubleword to Quadword
OptCategory[STARS_NN_vphadduwd] = 1; // Packed Horizontal Add Unsigned Word to Doubleword
OptCategory[STARS_NN_vphadduwq] = 1; // Packed Horizontal Add Unsigned Word to Quadword
OptCategory[STARS_NN_vphaddwd] = 1; // Packed Horizontal Add Signed Word to Signed Doubleword
OptCategory[STARS_NN_vphaddwq] = 1; // Packed Horizontal Add Signed Word to Signed Quadword
OptCategory[STARS_NN_vphsubbw] = 1; // Packed Horizontal Subtract Signed Byte to Signed Word
OptCategory[STARS_NN_vphsubdq] = 1; // Packed Horizontal Subtract Signed Doubleword to Signed Quadword
OptCategory[STARS_NN_vphsubwd] = 1; // Packed Horizontal Subtract Signed Word to Signed Doubleword
OptCategory[STARS_NN_vpmacsdd] = 1; // Packed Multiply Accumulate Signed Doubleword to Signed Doubleword
OptCategory[STARS_NN_vpmacsdqh] = 1; // Packed Multiply Accumulate Signed High Doubleword to Signed Quadword
OptCategory[STARS_NN_vpmacsdql] = 1; // Packed Multiply Accumulate Signed Low Doubleword to Signed Quadword
OptCategory[STARS_NN_vpmacssdd] = 1; // Packed Multiply Accumulate Signed Doubleword to Signed Doubleword with Saturation
OptCategory[STARS_NN_vpmacssdqh] = 1; // Packed Multiply Accumulate Signed High Doubleword to Signed Quadword with Saturation
OptCategory[STARS_NN_vpmacssdql] = 1; // Packed Multiply Accumulate Signed Low Doubleword to Signed Quadword with Saturation
OptCategory[STARS_NN_vpmacsswd] = 1; // Packed Multiply Accumulate Signed Word to Signed Doubleword with Saturation
OptCategory[STARS_NN_vpmacssww] = 1; // Packed Multiply Accumulate Signed Word to Signed Word with Saturation
OptCategory[STARS_NN_vpmacswd] = 1; // Packed Multiply Accumulate Signed Word to Signed Doubleword
OptCategory[STARS_NN_vpmacsww] = 1; // Packed Multiply Accumulate Signed Word to Signed Word
OptCategory[STARS_NN_vpmadcsswd] = 1; // Packed Multiply, Add and Accumulate Signed Word to Signed Doubleword with Saturation
OptCategory[STARS_NN_vpmadcswd] = 1; // Packed Multiply Add and Accumulate Signed Word to Signed Doubleword
OptCategory[STARS_NN_vpperm] = 1; // Packed Permute Bytes
OptCategory[STARS_NN_vprotb] = 1; // Packed Rotate Bytes
OptCategory[STARS_NN_vprotd] = 1; // Packed Rotate Doublewords
OptCategory[STARS_NN_vprotq] = 1; // Packed Rotate Quadwords
OptCategory[STARS_NN_vprotw] = 1; // Packed Rotate Words
OptCategory[STARS_NN_vpshab] = 1; // Packed Shift Arithmetic Bytes
OptCategory[STARS_NN_vpshad] = 1; // Packed Shift Arithmetic Doublewords
OptCategory[STARS_NN_vpshaq] = 1; // Packed Shift Arithmetic Quadwords
OptCategory[STARS_NN_vpshaw] = 1; // Packed Shift Arithmetic Words
OptCategory[STARS_NN_vpshlb] = 1; // Packed Shift Logical Bytes
OptCategory[STARS_NN_vpshld] = 1; // Packed Shift Logical Doublewords
OptCategory[STARS_NN_vpshlq] = 1; // Packed Shift Logical Quadwords
OptCategory[STARS_NN_vpshlw] = 1; // Packed Shift Logical Words
// AMP XOP comparison pseudo-ops
OptCategory[STARS_NN_vpcomltb] = 1; // Compare Vector Signed Bytes
OptCategory[STARS_NN_vpcomleb] = 1; // Compare Vector Signed Bytes
OptCategory[STARS_NN_vpcomgtb] = 1; // Compare Vector Signed Bytes
OptCategory[STARS_NN_vpcomgeb] = 1; // Compare Vector Signed Bytes
OptCategory[STARS_NN_vpcomeqb] = 1; // Compare Vector Signed Bytes
OptCategory[STARS_NN_vpcomneqb] = 1; // Compare Vector Signed Bytes
OptCategory[STARS_NN_vpcomfalseb] = 1; // Compare Vector Signed Bytes
OptCategory[STARS_NN_vpcomtrueb] = 1; // Compare Vector Signed Bytes
OptCategory[STARS_NN_vpcomltw] = 1; // Compare Vector Signed Words
OptCategory[STARS_NN_vpcomlew] = 1; // Compare Vector Signed Words
OptCategory[STARS_NN_vpcomgtw] = 1; // Compare Vector Signed Words
OptCategory[STARS_NN_vpcomgew] = 1; // Compare Vector Signed Words
OptCategory[STARS_NN_vpcomeqw] = 1; // Compare Vector Signed Words
OptCategory[STARS_NN_vpcomneqw] = 1; // Compare Vector Signed Words
OptCategory[STARS_NN_vpcomfalsew] = 1; // Compare Vector Signed Words
OptCategory[STARS_NN_vpcomtruew] = 1; // Compare Vector Signed Words
OptCategory[STARS_NN_vpcomltd] = 1; // Compare Vector Signed Doublewords
OptCategory[STARS_NN_vpcomled] = 1; // Compare Vector Signed Doublewords
OptCategory[STARS_NN_vpcomgtd] = 1; // Compare Vector Signed Doublewords
OptCategory[STARS_NN_vpcomged] = 1; // Compare Vector Signed Doublewords
OptCategory[STARS_NN_vpcomeqd] = 1; // Compare Vector Signed Doublewords
OptCategory[STARS_NN_vpcomneqd] = 1; // Compare Vector Signed Doublewords
OptCategory[STARS_NN_vpcomfalsed] = 1; // Compare Vector Signed Doublewords
OptCategory[STARS_NN_vpcomtrued] = 1; // Compare Vector Signed Doublewords
OptCategory[STARS_NN_vpcomltq] = 1; // Compare Vector Signed Quadwords
OptCategory[STARS_NN_vpcomleq] = 1; // Compare Vector Signed Quadwords
OptCategory[STARS_NN_vpcomgtq] = 1; // Compare Vector Signed Quadwords
OptCategory[STARS_NN_vpcomgeq] = 1; // Compare Vector Signed Quadwords
OptCategory[STARS_NN_vpcomeqq] = 1; // Compare Vector Signed Quadwords
OptCategory[STARS_NN_vpcomneqq] = 1; // Compare Vector Signed Quadwords
OptCategory[STARS_NN_vpcomfalseq] = 1; // Compare Vector Signed Quadwords
OptCategory[STARS_NN_vpcomtrueq] = 1; // Compare Vector Signed Quadwords
OptCategory[STARS_NN_vpcomltub] = 1; // Compare Vector Unsigned Bytes
OptCategory[STARS_NN_vpcomleub] = 1; // Compare Vector Unsigned Bytes
OptCategory[STARS_NN_vpcomgtub] = 1; // Compare Vector Unsigned Bytes
OptCategory[STARS_NN_vpcomgeub] = 1; // Compare Vector Unsigned Bytes
OptCategory[STARS_NN_vpcomequb] = 1; // Compare Vector Unsigned Bytes
OptCategory[STARS_NN_vpcomnequb] = 1; // Compare Vector Unsigned Bytes
OptCategory[STARS_NN_vpcomfalseub] = 1; // Compare Vector Unsigned Bytes
OptCategory[STARS_NN_vpcomtrueub] = 1; // Compare Vector Unsigned Bytes
OptCategory[STARS_NN_vpcomltuw] = 1; // Compare Vector Unsigned Words
OptCategory[STARS_NN_vpcomleuw] = 1; // Compare Vector Unsigned Words
OptCategory[STARS_NN_vpcomgtuw] = 1; // Compare Vector Unsigned Words
OptCategory[STARS_NN_vpcomgeuw] = 1; // Compare Vector Unsigned Words
OptCategory[STARS_NN_vpcomequw] = 1; // Compare Vector Unsigned Words
OptCategory[STARS_NN_vpcomnequw] = 1; // Compare Vector Unsigned Words
OptCategory[STARS_NN_vpcomfalseuw] = 1; // Compare Vector Unsigned Words
OptCategory[STARS_NN_vpcomtrueuw] = 1; // Compare Vector Unsigned Words
OptCategory[STARS_NN_vpcomltud] = 1; // Compare Vector Unsigned Doublewords
OptCategory[STARS_NN_vpcomleud] = 1; // Compare Vector Unsigned Doublewords
OptCategory[STARS_NN_vpcomgtud] = 1; // Compare Vector Unsigned Doublewords
OptCategory[STARS_NN_vpcomgeud] = 1; // Compare Vector Unsigned Doublewords
OptCategory[STARS_NN_vpcomequd] = 1; // Compare Vector Unsigned Doublewords
OptCategory[STARS_NN_vpcomnequd] = 1; // Compare Vector Unsigned Doublewords
OptCategory[STARS_NN_vpcomfalseud] = 1; // Compare Vector Unsigned Doublewords
OptCategory[STARS_NN_vpcomtrueud] = 1; // Compare Vector Unsigned Doublewords
OptCategory[STARS_NN_vpcomltuq] = 1; // Compare Vector Unsigned Quadwords
OptCategory[STARS_NN_vpcomleuq] = 1; // Compare Vector Unsigned Quadwords
OptCategory[STARS_NN_vpcomgtuq] = 1; // Compare Vector Unsigned Quadwords
OptCategory[STARS_NN_vpcomgeuq] = 1; // Compare Vector Unsigned Quadwords
OptCategory[STARS_NN_vpcomequq] = 1; // Compare Vector Unsigned Quadwords
OptCategory[STARS_NN_vpcomnequq] = 1; // Compare Vector Unsigned Quadwords
OptCategory[STARS_NN_vpcomfalseuq] = 1; // Compare Vector Unsigned Quadwords
OptCategory[STARS_NN_vpcomtrueuq] = 1; // Compare Vector Unsigned Quadwords
// AMD Excavator
OptCategory[STARS_NN_monitorx] = 1; // Setup Monitor Address
OptCategory[STARS_NN_mwaitx] = 1; // Monitor Wait with Timeout
// AMD Zen
OptCategory[STARS_NN_clzero] = 1; // Zero out 64 byte cache
// Intel Processor Trace
OptCategory[STARS_NN_ptwrite] = 1; // Write Data to a Processor Trace Packet
// new Intel AVX-512 instructions (December 2016)
OptCategory[STARS_NN_v4fmaddps] = 1; // Packed Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
OptCategory[STARS_NN_v4fnmaddps] = 1; // Packed Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
OptCategory[STARS_NN_v4fmaddss] = 1; // Scalar Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
OptCategory[STARS_NN_v4fnmaddss] = 1; // Scalar Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
OptCategory[STARS_NN_vp4dpwssd] = 1; // Dot Product of Signed Words with Dword Accumulation (4-iterations)
OptCategory[STARS_NN_vp4dpwssds] = 1; // Dot Product of Signed Words with Dword Accumulation and Saturation (4-iterations)
OptCategory[STARS_NN_vpopcntd] = 1; // Return the Count of Number of Bits Set to 1 in DWORD
OptCategory[STARS_NN_vpopcntq] = 1; // Return the Count of Number of Bits Set to 1 in QWORD
// Read Processor ID
OptCategory[STARS_NN_rdpid] = 2; // Read Processor ID
// Invoke VM function
OptCategory[STARS_NN_vmfunc] = 1; // Invoke VM function
// Control-flow Enforcement
OptCategory[STARS_NN_incsspd] = 1; // Increment Shadow Stack Pointer (by 4)
OptCategory[STARS_NN_incsspq] = 1; // Increment Shadow Stack Pointer (by 8)
OptCategory[STARS_NN_rdsspd] = 6; // Read (low 32 bits of) Shadow Stack Pointer
OptCategory[STARS_NN_rdsspq] = 6; // Read Shadow Stack Pointer
OptCategory[STARS_NN_saveprevssp] = 1; // Save Previous Shadow Stack Pointer
OptCategory[STARS_NN_rstorssp] = 1; // Restore saved Shadow Stack Pointer
OptCategory[STARS_NN_wrssd] = 1; // Write (4 bytes) to shadow stack
OptCategory[STARS_NN_wrssq] = 1; // Write (8 bytes) to shadow stack
OptCategory[STARS_NN_wrussd] = 1; // Write (4 bytes) to User Shadow Stack
OptCategory[STARS_NN_wrussq] = 1; // Write (8 bytes) to User Shadow Stack
OptCategory[STARS_NN_setssbsy] = 1; // Mark Shadow Stack Busy
OptCategory[STARS_NN_clrssbsy] = 1; // Clear Shadow Stack Busy Flag
OptCategory[STARS_NN_endbr64] = 1; // Terminate an Indirect Branch in 64-bit Mode
OptCategory[STARS_NN_endbr32] = 1; // Terminate an Indirect Branch in 32-bit and Compatibility Mode
// Undefined Instruction
OptCategory[STARS_NN_ud0] = 1; // Undefined Instruction
OptCategory[STARS_NN_ud1] = 1; // Undefined Instruction
// Enqueue Stores
OptCategory[STARS_NN_enqcmd] = 1; // Enqueue Command
OptCategory[STARS_NN_enqcmds] = 1; // Enqueue Command Supervisor
// AMD Zen2
OptCategory[STARS_NN_mcommit] = 1; // Commit Stores to Memory
OptCategory[STARS_NN_rdpru] = 8; // Read Processor Register
// Intel Tremont instructions
OptCategory[STARS_NN_cldemote] = 1; // Cache Line Demote
OptCategory[STARS_NN_enclv] = 1; // Execute an Enclave VMM Function of Specified Leaf Number
// Direct Stores
OptCategory[STARS_NN_movdiri] = 1; // Move Doubleword as Direct Store
OptCategory[STARS_NN_movdir64b] = 1; // Move 64 Bytes as Direct Store
// Intel WAITPKG instructions
OptCategory[STARS_NN_tpause] = 1; // Timed PAUSE
OptCategory[STARS_NN_umonitor] = 1; // User Level Set Up Monitor Address
OptCategory[STARS_NN_umwait] = 1; // User Level Monitor Wait
// Intel Sapphire Rapids instructions
OptCategory[STARS_NN_serialize] = 1; // Serialize Instruction Execution
// Intel TSX
OptCategory[STARS_NN_xresldtrk] = 1; // Resume Tracking Load Addresses
OptCategory[STARS_NN_xsusldtrk] = 1; // Suspend Tracking Load Addresses
// Intel Affine Transformation instructions
OptCategory[STARS_NN_gf2p8mulb] = 1; // Galois Field Multiply Bytes
OptCategory[STARS_NN_gf2p8affineqb] = 1; // Computes Affine Transformation
OptCategory[STARS_NN_gf2p8affineinvqb] = 1; // Computes Inverse Affine Transformation
// VEX versions
OptCategory[STARS_NN_vgf2p8mulb] = 1; // Galois Field Multiply Bytes
OptCategory[STARS_NN_vgf2p8affineqb] = 1; // Computes Affine Transformation
OptCategory[STARS_NN_vgf2p8affineinvqb] = 1; // Computes Inverse Affine Transformation
// Intrinsics for Saving and Restoring the Extended Processor States (64-bits)
OptCategory[STARS_NN_fxsave64] = 1; // Fast save FP context (64-bits)
OptCategory[STARS_NN_fxrstor64] = 1; // Fast restore FP context (64-bits)
OptCategory[STARS_NN_last] = 1;
return;
} // end of STARS_Program_t::InitOptCategory()
// Initialize the StackAlteration[] array to define how opcodes adjust the stack pointer.
void STARS_Program_t::InitStackAlteration(void) {
// Default category is 0; most instructions do not alter the stack pointer.
(void)memset(StackAlteration, 0, sizeof(StackAlteration));
// Many arithmetic instructions could alter the stack pointer. We will have to
// examine each instruction that performs addition, subtraction, logical AND, etc.,
// to determine if the stack pointer was the DEF operand. We cannot use a purely
// table driven approach to compute stack pointer alteration. The table is used for
// the deterministic cases, e.g. push, pop, call, return. Because of variability on
// a few of these instructions, a value of 1 in the table below is a trigger to investigate RTLs
// that might or might not alter the stack pointer, e.g. add, subtract, etc., or that might
// have operand-dependent effects on the stack pointer.
StackAlteration[STARS_NN_add] = 1; // Addition; check operands for stack pointer
StackAlteration[STARS_NN_adc] = 1; // Addition; check operands for stack pointer ; RARE for stack pointer
StackAlteration[STARS_NN_and] = 1; // Logical AND; check operands for stack pointer
StackAlteration[STARS_NN_call] = -((STARS_sval_t) this->GetSTARS_ISA_Bytewidth()); // Call Procedure; -4, but return cancels it to zero
StackAlteration[STARS_NN_callfi] = -2 * ((STARS_sval_t) this->GetSTARS_ISA_Bytewidth()); // Indirect Call Far Procedure; -8, but far return cancels it to zero
StackAlteration[STARS_NN_callni] = -((STARS_sval_t) this->GetSTARS_ISA_Bytewidth()); // Indirect Call Near Procedure; -4, but return cancels it to zero
StackAlteration[STARS_NN_enterw] = 1; // Make Stack Frame for Procedure Parameters **
StackAlteration[STARS_NN_enter] = 1; // Make Stack Frame for Procedure Parameters **
StackAlteration[STARS_NN_enterd] = 1; // Make Stack Frame for Procedure Parameters **
StackAlteration[STARS_NN_enterq] = 1; // Make Stack Frame for Procedure Parameters **
StackAlteration[STARS_NN_int] = 0; // Call to Interrupt Procedure
StackAlteration[STARS_NN_into] = 0; // Call to Interrupt Procedure if Overflow Flag = 1
StackAlteration[STARS_NN_int3] = 0; // Trap to Debugger
StackAlteration[STARS_NN_iretw] = 6; // Interrupt Return
StackAlteration[STARS_NN_iret] = 12; // Interrupt Return
StackAlteration[STARS_NN_iretd] = 12; // Interrupt Return (use32)
StackAlteration[STARS_NN_iretq] = 40; // Interrupt Return (use64)
StackAlteration[STARS_NN_lea] = 1; // Load Effective Address (can be used for basic arithmetic assignments)
StackAlteration[STARS_NN_leavew] = 1; // High Level Procedure Exit **
StackAlteration[STARS_NN_leave] = 1; // High Level Procedure Exit **
StackAlteration[STARS_NN_leaved] = 1; // High Level Procedure Exit **
StackAlteration[STARS_NN_leaveq] = 1; // High Level Procedure Exit **
StackAlteration[STARS_NN_mov] = 1; // Move Data ; could be esp := ebp (deallocate stack frame) or esp := ebx (unknown)
StackAlteration[STARS_NN_pop] = 1; // Pop a word from the Stack ; could be 16-bit or 32-bit operand, etc.
StackAlteration[STARS_NN_popaw] = 14; // Pop all General Registers
StackAlteration[STARS_NN_popa] = 28; // Pop all General Registers
StackAlteration[STARS_NN_popad] = 28; // Pop all General Registers (use32)
StackAlteration[STARS_NN_popaq] = 56; // Pop all General Registers (use64)
StackAlteration[STARS_NN_popfw] = 2; // Pop Stack into Flags Register **
StackAlteration[STARS_NN_popf] = 4; // Pop Stack into Flags Register **
StackAlteration[STARS_NN_popfd] = 4; // Pop Stack into Eflags Register **
StackAlteration[STARS_NN_popfq] = 8; // Pop Stack into Rflags Register **
StackAlteration[STARS_NN_push] = 1; // Push Operand onto the Stack ; could be 16-bit or 32-bit operand, etc.
StackAlteration[STARS_NN_pushaw] = -14; // Push all General Registers
StackAlteration[STARS_NN_pusha] = -28; // Push all General Registers
StackAlteration[STARS_NN_pushad] = -28; // Push all General Registers (use32)
StackAlteration[STARS_NN_pushaq] = -56; // Push all General Registers (use64)
StackAlteration[STARS_NN_pushfw] = -2; // Push Flags Register onto the Stack
StackAlteration[STARS_NN_pushf] = -4; // Push Flags Register onto the Stack
StackAlteration[STARS_NN_pushfd] = -4; // Push Flags Register onto the Stack (use32)
StackAlteration[STARS_NN_pushfq] = -8; // Push Flags Register onto the Stack (use64)
StackAlteration[STARS_NN_retn] = 1; // Return Near from Procedure (usually 4 bytes)
StackAlteration[STARS_NN_retf] = 1; // Return Far from Procedure (usually 8 bytes)
StackAlteration[STARS_NN_sub] = 1; // Subtraction; check operands for stack pointer
StackAlteration[STARS_NN_sbb] = 1; // Subtraction; check operands for stack pointer ; RARE for stack pointer
//
// 486 instructions
//
//
// Pentium instructions
//
//
// Pentium Pro instructions
//
//
// FPP instructions
//
//
// 80387 instructions
//
//
// Instructions added 28.02.96
//
StackAlteration[STARS_NN_loadall] = 0; // Load the entire CPU state from ES:EDI ?? Cannot find in Intel manuals
//
// MMX instructions
//
//
// Undocumented Deschutes processor instructions
//
// Pentium II instructions
StackAlteration[STARS_NN_sysenter] = 0; // Fast Transition to System Call Entry Point
StackAlteration[STARS_NN_sysexit] = 0; // Fast Transition from System Call Entry Point
// 3DNow! instructions
// Pentium III instructions
// Pentium III Pseudo instructions
// AMD K7 instructions
// Revisit AMD if we port to it.
// Undocumented FP instructions (thanks to norbert.juffa@adm.com)
// Pentium 4 instructions
// AMD syscall/sysret instructions NOTE: not AMD, found in Intel manual
StackAlteration[STARS_NN_syscall] = 0; // Low latency system call
StackAlteration[STARS_NN_sysret] = 0; // Return from system call
// AMD64 instructions NOTE: not AMD, found in Intel manual
// New Pentium instructions (SSE3)
// Missing AMD64 instructions NOTE: also found in Intel manual
// SSE3 instructions
// SSSE3 instructions
// VMX instructions
// Added with x86-64
// Geode LX 3DNow! extensions
// SSE2 pseudoinstructions
// SSSE4.1 instructions
// SSSE4.2 instructions
// AMD SSE4a instructions
// xsave/xrstor instructions
// Intel Safer Mode Extensions (SMX)
// AMD-V Virtualization ISA Extension
// VMX+ instructions
// Intel Atom instructions
// Intel AES instructions
// Carryless multiplication
// Returns modified by operand size prefixes
StackAlteration[STARS_NN_retnw] = 1; // Return Near from Procedure (use16)
StackAlteration[STARS_NN_retnd] = 1; // Return Near from Procedure (use32)
StackAlteration[STARS_NN_retnq] = 1; // Return Near from Procedure (use64)
StackAlteration[STARS_NN_retfw] = 1; // Return Far from Procedure (use16)
StackAlteration[STARS_NN_retfd] = 1; // Return Far from Procedure (use32)
StackAlteration[STARS_NN_retfq] = 1; // Return Far from Procedure (use64)
// RDRAND support
// new GPR instructions
// new AVX instructions
// Transactional Synchronization Extensions
// Virtual PC synthetic instructions
// FMA4
// Intel Memory Protection Extensions (MPX)
// New xstate instructions
// PREFETCHWT1 support
// Memory instructions
// Protection Key Rights for User Pages
// AVX comparison pseudo-ops
// AVX-512 instructions
// AVX-512 comparison pseudo-ops
// Opmask instructions
// SHA Extensions
// Intel Software Guard Extensions
// AMD XOP
// AMP XOP comparison pseudo-ops
// AMD Excavator
// AMD Zen
// Intel Processor Trace
// new Intel AVX-512 instructions (December 2016)
// Read Processor ID
// Invoke VM function
// Control-flow Enforcement
// Undefined Instruction
// Enqueue Stores
// AMD Zen2
// Intel Tremont instructions
// Direct Stores
// Intel WAITPKG instructions
// Intel Sapphire Rapids instructions
// Intel TSX
// Intel Affine Transformation instructions
// VEX versions
// Intrinsics for Saving and Restoring the Extended Processor States (64-bits)
StackAlteration[STARS_NN_last] = 0;
return;
} // end STARS_Program_t::InitStackAlteration()
// Initialize the lookup maps that are used to define the FG info that can
// be inferred from a library function name.
void STARS_Program_t::InitLibFuncFGInfoMaps(void) {
// empty it in case it was filled from a prevoius stars invocation.
ReturnRegisterTypeMap.clear();
struct FineGrainedInfo FGEntry;
pair<string, struct FineGrainedInfo> MapEntry;
pair<map<string, struct FineGrainedInfo>::iterator, bool> InsertResult;
// Add functions that return signed integers.
FGEntry.SignMiscInfo = FG_MASK_SIGNED;
FGEntry.SizeInfo = (FG_MASK_INTEGER | ComputeOperandBitWidthMask(nullptr, sizeof(int)));
MapEntry.second = FGEntry;
MapEntry.first = "atoi";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "strcmp";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "strcoll";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "strncmp";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "memcmp";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "isalnum";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "isalpha";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "islower";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "isupper";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "isdigit";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "isxdigit";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "iscntrl";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "isgraph";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "isblank";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "isspace";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "isprint";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "ispunct";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
// Functions that return signed longs.
if (sizeof(long int) != sizeof(int)) {
FGEntry.SizeInfo = (FG_MASK_INTEGER | ComputeOperandBitWidthMask(nullptr, sizeof(long int)));
MapEntry.second = FGEntry;
}
MapEntry.first = "atol";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "strtol";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
// Functions that return signed long longs.
if (sizeof(long long int) != sizeof(long int)) {
FGEntry.SizeInfo = (FG_MASK_INTEGER | ComputeOperandBitWidthMask(nullptr, sizeof(long long int)));
MapEntry.second = FGEntry;
}
MapEntry.first = "atoll";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "strtoll";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
// Functions that return unsigned long longs.
FGEntry.SignMiscInfo = FG_MASK_UNSIGNED;
MapEntry.second = FGEntry;
MapEntry.first = "strtoull";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
// Functions that return unsigned longs.
if (sizeof(long long int) != sizeof(long int)) {
FGEntry.SizeInfo = (FG_MASK_INTEGER | ComputeOperandBitWidthMask(nullptr, sizeof(long int)));
MapEntry.second = FGEntry;
}
MapEntry.first = "strtoul";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
// Functions that return size_t.
FGEntry.SizeInfo = (FG_MASK_INTEGER | ComputeOperandBitWidthMask(nullptr, sizeof(size_t)));
FGEntry.SignMiscInfo = FG_MASK_UNSIGNED;
MapEntry.second = FGEntry;
MapEntry.first = "strlen";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "strxfrm";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "strspn";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "strcspn";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "strftime";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
// Functions that return (char *).
FGEntry.SizeInfo = (FG_MASK_DATAPOINTER | ComputeOperandBitWidthMask(nullptr, sizeof(char *)));
FGEntry.SignMiscInfo = FG_MASK_UNSIGNED;
MapEntry.second = FGEntry;
MapEntry.first = "strcpy";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "strncpy";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "strcat";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "strncat";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "strchr";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "strrchr";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "strpbrk";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "strstr";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "strtok";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "strerror";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "asctime";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "ctime";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
// Functions that return (void *) or a similar data pointer.
FGEntry.SizeInfo = (FG_MASK_DATAPOINTER | ComputeOperandBitWidthMask(nullptr, sizeof(void *)));
FGEntry.SignMiscInfo = FG_MASK_UNSIGNED;
MapEntry.second = FGEntry;
MapEntry.first = "setlocale";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "localeconv";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "malloc";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "calloc";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "realloc";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "memchr";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "memcpy";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "mempcpy"; // non-standard, found in glibc
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "memmove";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "memset";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "gmtime";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
MapEntry.first = "localtime";
InsertResult = ReturnRegisterTypeMap.insert(MapEntry);
assert(InsertResult.second);
// Functions that return bool.
FGEntry.SizeInfo = (FG_MASK_INTEGER | ComputeOperandBitWidthMask(nullptr, sizeof(bool)));
FGEntry.SignMiscInfo = FG_MASK_UNSIGNED;
MapEntry.second = FGEntry;
// NOTE: Add <math.h> functions later.
return;
} // end of STARS_Program_t::InitLibFuncFGInfoMaps()
// Initialize the DFACategory[] array to define instruction classes
// for the purposes of data flow analysis. (Really, control flow analysis.)
void STARS_Program_t::InitDFACategory(void)
{
if(processor_type==ptARM64)
{
DFACategory.resize(STARS_ARM_last+1);
DFACategory[STARS_ARM_bl] = CALL;
DFACategory[STARS_ARM_blr] = INDIR_CALL;
DFACategory[STARS_ARM_br] = INDIR_JUMP;
DFACategory[STARS_ARM_ret] = RETURN;
}
else
{
// Default category is 0, not the start or end of a basic block.
DFACategory.resize(STARS_NN_last+1);
DFACategory[STARS_NN_call] = CALL; // Call Procedure
DFACategory[STARS_NN_callfi] = INDIR_CALL; // Indirect Call Far Procedure
DFACategory[STARS_NN_callni] = INDIR_CALL; // Indirect Call Near Procedure
DFACategory[STARS_NN_hlt] = HALT; // Halt
DFACategory[STARS_NN_int] = INDIR_CALL; // Call to Interrupt Procedure
DFACategory[STARS_NN_into] = INDIR_CALL; // Call to Interrupt Procedure if Overflow Flag = 1
DFACategory[STARS_NN_int3] = INDIR_CALL; // Trap to Debugger
DFACategory[STARS_NN_iretw] = RETURN; // Interrupt Return
DFACategory[STARS_NN_iret] = RETURN; // Interrupt Return
DFACategory[STARS_NN_iretd] = RETURN; // Interrupt Return (use32)
DFACategory[STARS_NN_iretq] = RETURN; // Interrupt Return (use64)
DFACategory[STARS_NN_ja] = COND_BRANCH; // Jump if Above (CF=0 & ZF=0)
DFACategory[STARS_NN_jae] = COND_BRANCH; // Jump if Above or Equal (CF=0)
DFACategory[STARS_NN_jb] = COND_BRANCH; // Jump if Below (CF=1)
DFACategory[STARS_NN_jbe] = COND_BRANCH; // Jump if Below or Equal (CF=1 | ZF=1)
DFACategory[STARS_NN_jc] = COND_BRANCH; // Jump if Carry (CF=1)
DFACategory[STARS_NN_jcxz] = COND_BRANCH; // Jump if CX is 0
DFACategory[STARS_NN_jecxz] = COND_BRANCH; // Jump if ECX is 0
DFACategory[STARS_NN_jrcxz] = COND_BRANCH; // Jump if RCX is 0
DFACategory[STARS_NN_je] = COND_BRANCH; // Jump if Equal (ZF=1)
DFACategory[STARS_NN_jg] = COND_BRANCH; // Jump if Greater (ZF=0 & SF=OF)
DFACategory[STARS_NN_jge] = COND_BRANCH; // Jump if Greater or Equal (SF=OF)
DFACategory[STARS_NN_jl] = COND_BRANCH; // Jump if Less (SF!=OF)
DFACategory[STARS_NN_jle] = COND_BRANCH; // Jump if Less or Equal (ZF=1 | SF!=OF)
DFACategory[STARS_NN_jna] = COND_BRANCH; // Jump if Not Above (CF=1 | ZF=1)
DFACategory[STARS_NN_jnae] = COND_BRANCH; // Jump if Not Above or Equal (CF=1)
DFACategory[STARS_NN_jnb] = COND_BRANCH; // Jump if Not Below (CF=0)
DFACategory[STARS_NN_jnbe] = COND_BRANCH; // Jump if Not Below or Equal (CF=0 & ZF=0)
DFACategory[STARS_NN_jnc] = COND_BRANCH; // Jump if Not Carry (CF=0)
DFACategory[STARS_NN_jne] = COND_BRANCH; // Jump if Not Equal (ZF=0)
DFACategory[STARS_NN_jng] = COND_BRANCH; // Jump if Not Greater (ZF=1 | SF!=OF)
DFACategory[STARS_NN_jnge] = COND_BRANCH; // Jump if Not Greater or Equal (SF!=OF)
DFACategory[STARS_NN_jnl] = COND_BRANCH; // Jump if Not Less (SF=OF)
DFACategory[STARS_NN_jnle] = COND_BRANCH; // Jump if Not Less or Equal (ZF=0 & SF=OF)
DFACategory[STARS_NN_jno] = COND_BRANCH; // Jump if Not Overflow (OF=0)
DFACategory[STARS_NN_jnp] = COND_BRANCH; // Jump if Not Parity (PF=0)
DFACategory[STARS_NN_jns] = COND_BRANCH; // Jump if Not Sign (SF=0)
DFACategory[STARS_NN_jnz] = COND_BRANCH; // Jump if Not Zero (ZF=0)
DFACategory[STARS_NN_jo] = COND_BRANCH; // Jump if Overflow (OF=1)
DFACategory[STARS_NN_jp] = COND_BRANCH; // Jump if Parity (PF=1)
DFACategory[STARS_NN_jpe] = COND_BRANCH; // Jump if Parity Even (PF=1)
DFACategory[STARS_NN_jpo] = COND_BRANCH; // Jump if Parity Odd (PF=0)
DFACategory[STARS_NN_js] = COND_BRANCH; // Jump if Sign (SF=1)
DFACategory[STARS_NN_jz] = COND_BRANCH; // Jump if Zero (ZF=1)
DFACategory[STARS_NN_jmp] = JUMP; // Jump
DFACategory[STARS_NN_jmpfi] = INDIR_JUMP; // Indirect Far Jump
DFACategory[STARS_NN_jmpni] = INDIR_JUMP; // Indirect Near Jump
DFACategory[STARS_NN_jmpshort] = JUMP; // Jump Short (only in 64-bit mode)
DFACategory[STARS_NN_loopw] = COND_BRANCH; // Loop while ECX != 0
DFACategory[STARS_NN_loop] = COND_BRANCH; // Loop while CX != 0
DFACategory[STARS_NN_loopd] = COND_BRANCH; // Loop while ECX != 0
DFACategory[STARS_NN_loopq] = COND_BRANCH; // Loop while RCX != 0
DFACategory[STARS_NN_loopwe] = COND_BRANCH; // Loop while CX != 0 and ZF=1
DFACategory[STARS_NN_loope] = COND_BRANCH; // Loop while rCX != 0 and ZF=1
DFACategory[STARS_NN_loopde] = COND_BRANCH; // Loop while ECX != 0 and ZF=1
DFACategory[STARS_NN_loopqe] = COND_BRANCH; // Loop while RCX != 0 and ZF=1
DFACategory[STARS_NN_loopwne] = COND_BRANCH; // Loop while CX != 0 and ZF=0
DFACategory[STARS_NN_loopne] = COND_BRANCH; // Loop while rCX != 0 and ZF=0
DFACategory[STARS_NN_loopdne] = COND_BRANCH; // Loop while ECX != 0 and ZF=0
DFACategory[STARS_NN_loopqne] = COND_BRANCH; // Loop while RCX != 0 and ZF=0
DFACategory[STARS_NN_retn] = RETURN; // Return Near from Procedure
DFACategory[STARS_NN_retf] = RETURN; // Return Far from Procedure
//
// Pentium instructions
//
DFACategory[STARS_NN_rsm] = HALT; // Resume from System Management Mode
// Pentium II instructions
DFACategory[STARS_NN_sysenter] = INDIR_CALL; // Fast Transition to System Call Entry Point
DFACategory[STARS_NN_sysexit] = RETURN; // Fast Transition from System Call Entry Point
// AMD syscall/sysret instructions NOTE: not AMD, found in Intel manual
DFACategory[STARS_NN_syscall] = INDIR_CALL; // Low latency system call
DFACategory[STARS_NN_sysret] = RETURN; // Return from system call
// VMX instructions
DFACategory[STARS_NN_vmcall] = INDIR_CALL; // Call to VM Monitor
// Added with x86-64
// Geode LX 3DNow! extensions
// SSE2 pseudoinstructions
// SSSE4.1 instructions
// SSSE4.2 instructions
// AMD SSE4a instructions
// xsave/xrstor instructions
// Intel Safer Mode Extensions (SMX)
// AMD-V Virtualization ISA Extension
// VMX+ instructions
// Intel Atom instructions
// Intel AES instructions
// Carryless multiplication
// Returns modified by operand size prefixes
DFACategory[STARS_NN_retnw] = RETURN; // Return Near from Procedure (use16)
DFACategory[STARS_NN_retnd] = RETURN; // Return Near from Procedure (use32)
DFACategory[STARS_NN_retnq] = RETURN; // Return Near from Procedure (use64)
DFACategory[STARS_NN_retfw] = RETURN; // Return Far from Procedure (use16)
DFACategory[STARS_NN_retfd] = RETURN; // Return Far from Procedure (use32)
DFACategory[STARS_NN_retfq] = RETURN; // Return Far from Procedure (use64)
// RDRAND support
// new GPR instructions
// new AVX instructions
// Transactional Synchronization Extensions
// Virtual PC synthetic instructions
// FMA4
// Intel Memory Protection Extensions (MPX)
// New xstate instructions
// PREFETCHWT1 support
// Memory instructions
// Protection Key Rights for User Pages
// AVX comparison pseudo-ops
// AVX-512 instructions
// AVX-512 comparison pseudo-ops
// Opmask instructions
// SHA Extensions
// Intel Software Guard Extensions
// AMD XOP
// AMP XOP comparison pseudo-ops
// AMD Excavator
// AMD Zen
// Intel Processor Trace
// new Intel AVX-512 instructions (December 2016)
// Read Processor ID
// Invoke VM function
// Control-flow Enforcement
// Undefined Instruction
// Enqueue Stores
// AMD Zen2
// Intel Tremont instructions
// Direct Stores
// Intel WAITPKG instructions
// Intel Sapphire Rapids instructions
// Intel TSX
// Intel Affine Transformation instructions
// VEX versions
// Intrinsics for Saving and Restoring the Extended Processor States (64-bits)
return;
}
} // end of STARS_Program_t::InitDFACategory()
// Initialize the SMPDefsFlags[] array to define how we emit
// optimizing annotations.
void STARS_Program_t::InitSMPDefsFlags(void) {
// Default value is true. Many instructions set the flags.
(void) memset(SMPDefsFlags, true, sizeof(SMPDefsFlags));
SMPDefsFlags[STARS_NN_null] = false; // Unknown Operation
SMPDefsFlags[STARS_NN_bound] = false; // Check Array Index Against Bounds
SMPDefsFlags[STARS_NN_call] = false; // Call Procedure
SMPDefsFlags[STARS_NN_callfi] = false; // Indirect Call Far Procedure
SMPDefsFlags[STARS_NN_callni] = false; // Indirect Call Near Procedure
SMPDefsFlags[STARS_NN_cbw] = false; // AL -> AX (with sign)
SMPDefsFlags[STARS_NN_cwde] = false; // AX -> EAX (with sign)
SMPDefsFlags[STARS_NN_cdqe] = false; // EAX -> RAX (with sign)
SMPDefsFlags[STARS_NN_clts] = false; // Clear Task-Switched Flag in CR0
SMPDefsFlags[STARS_NN_cwd] = false; // AX -> DX:AX (with sign)
SMPDefsFlags[STARS_NN_cdq] = false; // EAX -> EDX:EAX (with sign)
SMPDefsFlags[STARS_NN_cqo] = false; // RAX -> RDX:RAX (with sign)
SMPDefsFlags[STARS_NN_enterw] = false; // Make Stack Frame for Procedure Parameters
SMPDefsFlags[STARS_NN_enter] = false; // Make Stack Frame for Procedure Parameters
SMPDefsFlags[STARS_NN_enterd] = false; // Make Stack Frame for Procedure Parameters
SMPDefsFlags[STARS_NN_enterq] = false; // Make Stack Frame for Procedure Parameters
SMPDefsFlags[STARS_NN_hlt] = false; // Halt
SMPDefsFlags[STARS_NN_in] = false; // Input from Port
SMPDefsFlags[STARS_NN_ins] = false; // Input Byte(s) from Port to String
SMPDefsFlags[STARS_NN_iretw] = false; // Interrupt Return
SMPDefsFlags[STARS_NN_iret] = false; // Interrupt Return
SMPDefsFlags[STARS_NN_iretd] = false; // Interrupt Return (use32)
SMPDefsFlags[STARS_NN_iretq] = false; // Interrupt Return (use64)
SMPDefsFlags[STARS_NN_ja] = false; // Jump if Above (CF=0 & ZF=0)
SMPDefsFlags[STARS_NN_jae] = false; // Jump if Above or Equal (CF=0)
SMPDefsFlags[STARS_NN_jb] = false; // Jump if Below (CF=1)
SMPDefsFlags[STARS_NN_jbe] = false; // Jump if Below or Equal (CF=1 | ZF=1)
SMPDefsFlags[STARS_NN_jc] = false; // Jump if Carry (CF=1)
SMPDefsFlags[STARS_NN_jcxz] = false; // Jump if CX is 0
SMPDefsFlags[STARS_NN_jecxz] = false; // Jump if ECX is 0
SMPDefsFlags[STARS_NN_jrcxz] = false; // Jump if RCX is 0
SMPDefsFlags[STARS_NN_je] = false; // Jump if Equal (ZF=1)
SMPDefsFlags[STARS_NN_jg] = false; // Jump if Greater (ZF=0 & SF=OF)
SMPDefsFlags[STARS_NN_jge] = false; // Jump if Greater or Equal (SF=OF)
SMPDefsFlags[STARS_NN_jl] = false; // Jump if Less (SF!=OF)
SMPDefsFlags[STARS_NN_jle] = false; // Jump if Less or Equal (ZF=1 | SF!=OF)
SMPDefsFlags[STARS_NN_jna] = false; // Jump if Not Above (CF=1 | ZF=1)
SMPDefsFlags[STARS_NN_jnae] = false; // Jump if Not Above or Equal (CF=1)
SMPDefsFlags[STARS_NN_jnb] = false; // Jump if Not Below (CF=0)
SMPDefsFlags[STARS_NN_jnbe] = false; // Jump if Not Below or Equal (CF=0 & ZF=0)
SMPDefsFlags[STARS_NN_jnc] = false; // Jump if Not Carry (CF=0)
SMPDefsFlags[STARS_NN_jne] = false; // Jump if Not Equal (ZF=0)
SMPDefsFlags[STARS_NN_jng] = false; // Jump if Not Greater (ZF=1 | SF!=OF)
SMPDefsFlags[STARS_NN_jnge] = false; // Jump if Not Greater or Equal (SF!=OF)
SMPDefsFlags[STARS_NN_jnl] = false; // Jump if Not Less (SF=OF)
SMPDefsFlags[STARS_NN_jnle] = false; // Jump if Not Less or Equal (ZF=0 & SF=OF)
SMPDefsFlags[STARS_NN_jno] = false; // Jump if Not Overflow (OF=0)
SMPDefsFlags[STARS_NN_jnp] = false; // Jump if Not Parity (PF=0)
SMPDefsFlags[STARS_NN_jns] = false; // Jump if Not Sign (SF=0)
SMPDefsFlags[STARS_NN_jnz] = false; // Jump if Not Zero (ZF=0)
SMPDefsFlags[STARS_NN_jo] = false; // Jump if Overflow (OF=1)
SMPDefsFlags[STARS_NN_jp] = false; // Jump if Parity (PF=1)
SMPDefsFlags[STARS_NN_jpe] = false; // Jump if Parity Even (PF=1)
SMPDefsFlags[STARS_NN_jpo] = false; // Jump if Parity Odd (PF=0)
SMPDefsFlags[STARS_NN_js] = false; // Jump if Sign (SF=1)
SMPDefsFlags[STARS_NN_jz] = false; // Jump if Zero (ZF=1)
SMPDefsFlags[STARS_NN_jmp] = false; // Jump
SMPDefsFlags[STARS_NN_jmpfi] = false; // Indirect Far Jump
SMPDefsFlags[STARS_NN_jmpni] = false; // Indirect Near Jump
SMPDefsFlags[STARS_NN_jmpshort] = false; // Jump Short (not used)
SMPDefsFlags[STARS_NN_lahf] = false; // Load Flags into AH Register
SMPDefsFlags[STARS_NN_lea] = false; // Load Effective Address
SMPDefsFlags[STARS_NN_leavew] = false; // High Level Procedure Exit
SMPDefsFlags[STARS_NN_leave] = false; // High Level Procedure Exit
SMPDefsFlags[STARS_NN_leaved] = false; // High Level Procedure Exit
SMPDefsFlags[STARS_NN_leaveq] = false; // High Level Procedure Exit
SMPDefsFlags[STARS_NN_lgdt] = false; // Load Global Descriptor Table Register
SMPDefsFlags[STARS_NN_lidt] = false; // Load Interrupt Descriptor Table Register
SMPDefsFlags[STARS_NN_lgs] = false; // Load Full Pointer to GS:xx
SMPDefsFlags[STARS_NN_lss] = false; // Load Full Pointer to SS:xx
SMPDefsFlags[STARS_NN_lds] = false; // Load Full Pointer to DS:xx
SMPDefsFlags[STARS_NN_les] = false; // Load Full Pointer to ES:xx
SMPDefsFlags[STARS_NN_lfs] = false; // Load Full Pointer to FS:xx
SMPDefsFlags[STARS_NN_loopw] = false; // Loop while ECX != 0
SMPDefsFlags[STARS_NN_loop] = false; // Loop while ECX != 0
SMPDefsFlags[STARS_NN_loopwe] = false; // Loop while CX != 0 and ZF=1
SMPDefsFlags[STARS_NN_loope] = false; // Loop while rCX != 0 and ZF=1
SMPDefsFlags[STARS_NN_loopde] = false; // Loop while ECX != 0 and ZF=1
SMPDefsFlags[STARS_NN_loopqe] = false; // Loop while RCX != 0 and ZF=1
SMPDefsFlags[STARS_NN_loopwne] = false; // Loop while CX != 0 and ZF=0
SMPDefsFlags[STARS_NN_loopne] = false; // Loop while rCX != 0 and ZF=0
SMPDefsFlags[STARS_NN_loopdne] = false; // Loop while ECX != 0 and ZF=0
SMPDefsFlags[STARS_NN_loopqne] = false; // Loop while RCX != 0 and ZF=0
SMPDefsFlags[STARS_NN_ltr] = false; // Load Task Register
SMPDefsFlags[STARS_NN_mov] = false; // Move Data
SMPDefsFlags[STARS_NN_movsp] = true; // Move to/from Special Registers
SMPDefsFlags[STARS_NN_movs] = false; // Move Byte(s) from String to String
SMPDefsFlags[STARS_NN_movsx] = false; // Move with Sign-Extend
SMPDefsFlags[STARS_NN_movzx] = false; // Move with Zero-Extend
SMPDefsFlags[STARS_NN_nop] = false; // No Operation
SMPDefsFlags[STARS_NN_not] = false; // One's Complement Negation
SMPDefsFlags[STARS_NN_out] = false; // Output to Port
SMPDefsFlags[STARS_NN_outs] = false; // Output Byte(s) to Port
SMPDefsFlags[STARS_NN_pop] = false; // Pop a word from the Stack
SMPDefsFlags[STARS_NN_popaw] = false; // Pop all General Registers
SMPDefsFlags[STARS_NN_popa] = false; // Pop all General Registers
SMPDefsFlags[STARS_NN_popad] = false; // Pop all General Registers (use32)
SMPDefsFlags[STARS_NN_popaq] = false; // Pop all General Registers (use64)
SMPDefsFlags[STARS_NN_push] = false; // Push Operand onto the Stack
SMPDefsFlags[STARS_NN_pushaw] = false; // Push all General Registers
SMPDefsFlags[STARS_NN_pusha] = false; // Push all General Registers
SMPDefsFlags[STARS_NN_pushad] = false; // Push all General Registers (use32)
SMPDefsFlags[STARS_NN_pushaq] = false; // Push all General Registers (use64)
SMPDefsFlags[STARS_NN_pushfw] = false; // Push Flags Register onto the Stack
SMPDefsFlags[STARS_NN_pushf] = false; // Push Flags Register onto the Stack
SMPDefsFlags[STARS_NN_pushfd] = false; // Push Flags Register onto the Stack (use32)
SMPDefsFlags[STARS_NN_pushfq] = false; // Push Flags Register onto the Stack (use64)
SMPDefsFlags[STARS_NN_rep] = false; // Repeat String Operation
SMPDefsFlags[STARS_NN_repe] = false; // Repeat String Operation while ZF=1
SMPDefsFlags[STARS_NN_repne] = false; // Repeat String Operation while ZF=0
SMPDefsFlags[STARS_NN_retn] = false; // Return Near from Procedure
SMPDefsFlags[STARS_NN_retf] = false; // Return Far from Procedure
SMPDefsFlags[STARS_NN_sahf] = true; // Store AH into flags
SMPDefsFlags[STARS_NN_shl] = true; // Shift Logical Left
SMPDefsFlags[STARS_NN_shr] = true; // Shift Logical Right
SMPDefsFlags[STARS_NN_seta] = false; // Set Byte if Above (CF=0 & ZF=0)
SMPDefsFlags[STARS_NN_setae] = false; // Set Byte if Above or Equal (CF=0)
SMPDefsFlags[STARS_NN_setb] = false; // Set Byte if Below (CF=1)
SMPDefsFlags[STARS_NN_setbe] = false; // Set Byte if Below or Equal (CF=1 | ZF=1)
SMPDefsFlags[STARS_NN_setc] = false; // Set Byte if Carry (CF=1)
SMPDefsFlags[STARS_NN_sete] = false; // Set Byte if Equal (ZF=1)
SMPDefsFlags[STARS_NN_setg] = false; // Set Byte if Greater (ZF=0 & SF=OF)
SMPDefsFlags[STARS_NN_setge] = false; // Set Byte if Greater or Equal (SF=OF)
SMPDefsFlags[STARS_NN_setl] = false; // Set Byte if Less (SF!=OF)
SMPDefsFlags[STARS_NN_setle] = false; // Set Byte if Less or Equal (ZF=1 | SF!=OF)
SMPDefsFlags[STARS_NN_setna] = false; // Set Byte if Not Above (CF=1 | ZF=1)
SMPDefsFlags[STARS_NN_setnae] = false; // Set Byte if Not Above or Equal (CF=1)
SMPDefsFlags[STARS_NN_setnb] = false; // Set Byte if Not Below (CF=0)
SMPDefsFlags[STARS_NN_setnbe] = false; // Set Byte if Not Below or Equal (CF=0 & ZF=0)
SMPDefsFlags[STARS_NN_setnc] = false; // Set Byte if Not Carry (CF=0)
SMPDefsFlags[STARS_NN_setne] = false; // Set Byte if Not Equal (ZF=0)
SMPDefsFlags[STARS_NN_setng] = false; // Set Byte if Not Greater (ZF=1 | SF!=OF)
SMPDefsFlags[STARS_NN_setnge] = false; // Set Byte if Not Greater or Equal (SF!=OF)
SMPDefsFlags[STARS_NN_setnl] = false; // Set Byte if Not Less (SF=OF)
SMPDefsFlags[STARS_NN_setnle] = false; // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
SMPDefsFlags[STARS_NN_setno] = false; // Set Byte if Not Overflow (OF=0)
SMPDefsFlags[STARS_NN_setnp] = false; // Set Byte if Not Parity (PF=0)
SMPDefsFlags[STARS_NN_setns] = false; // Set Byte if Not Sign (SF=0)
SMPDefsFlags[STARS_NN_setnz] = false; // Set Byte if Not Zero (ZF=0)
SMPDefsFlags[STARS_NN_seto] = false; // Set Byte if Overflow (OF=1)
SMPDefsFlags[STARS_NN_setp] = false; // Set Byte if Parity (PF=1)
SMPDefsFlags[STARS_NN_setpe] = false; // Set Byte if Parity Even (PF=1)
SMPDefsFlags[STARS_NN_setpo] = false; // Set Byte if Parity Odd (PF=0)
SMPDefsFlags[STARS_NN_sets] = false; // Set Byte if Sign (SF=1)
SMPDefsFlags[STARS_NN_setz] = false; // Set Byte if Zero (ZF=1)
SMPDefsFlags[STARS_NN_sgdt] = false; // Store Global Descriptor Table Register
SMPDefsFlags[STARS_NN_sidt] = false; // Store Interrupt Descriptor Table Register
SMPDefsFlags[STARS_NN_sldt] = false; // Store Local Descriptor Table Register
SMPDefsFlags[STARS_NN_str] = false; // Store Task Register
SMPDefsFlags[STARS_NN_wait] = false; // Wait until BUSY# Pin is Inactive (HIGH)
SMPDefsFlags[STARS_NN_xchg] = false; // Exchange Register/Memory with Register
SMPDefsFlags[STARS_NN_xlat] = false; // Table Lookup Translation
//
// 486 instructions
//
SMPDefsFlags[STARS_NN_bswap] = false; // Swap bytes in register
SMPDefsFlags[STARS_NN_invd] = false; // Invalidate Data Cache
SMPDefsFlags[STARS_NN_wbinvd] = false; // Invalidate Data Cache (write changes)
SMPDefsFlags[STARS_NN_invlpg] = false; // Invalidate TLB entry
//
// Pentium instructions
//
SMPDefsFlags[STARS_NN_rdmsr] = false; // Read Machine Status Register
SMPDefsFlags[STARS_NN_wrmsr] = false; // Write Machine Status Register
SMPDefsFlags[STARS_NN_cpuid] = false; // Get CPU ID
SMPDefsFlags[STARS_NN_rdtsc] = false; // Read Time Stamp Counter
//
// Pentium Pro instructions
//
SMPDefsFlags[STARS_NN_cmova] = false; // Move if Above (CF=0 & ZF=0)
SMPDefsFlags[STARS_NN_cmovb] = false; // Move if Below (CF=1)
SMPDefsFlags[STARS_NN_cmovbe] = false; // Move if Below or Equal (CF=1 | ZF=1)
SMPDefsFlags[STARS_NN_cmovg] = false; // Move if Greater (ZF=0 & SF=OF)
SMPDefsFlags[STARS_NN_cmovge] = false; // Move if Greater or Equal (SF=OF)
SMPDefsFlags[STARS_NN_cmovl] = false; // Move if Less (SF!=OF)
SMPDefsFlags[STARS_NN_cmovle] = false; // Move if Less or Equal (ZF=1 | SF!=OF)
SMPDefsFlags[STARS_NN_cmovnb] = false; // Move if Not Below (CF=0)
SMPDefsFlags[STARS_NN_cmovno] = false; // Move if Not Overflow (OF=0)
SMPDefsFlags[STARS_NN_cmovnp] = false; // Move if Not Parity (PF=0)
SMPDefsFlags[STARS_NN_cmovns] = false; // Move if Not Sign (SF=0)
SMPDefsFlags[STARS_NN_cmovnz] = false; // Move if Not Zero (ZF=0)
SMPDefsFlags[STARS_NN_cmovo] = false; // Move if Overflow (OF=1)
SMPDefsFlags[STARS_NN_cmovp] = false; // Move if Parity (PF=1)
SMPDefsFlags[STARS_NN_cmovs] = false; // Move if Sign (SF=1)
SMPDefsFlags[STARS_NN_cmovz] = false; // Move if Zero (ZF=1)
SMPDefsFlags[STARS_NN_fcmovb] = false; // Floating Move if Below
SMPDefsFlags[STARS_NN_fcmove] = false; // Floating Move if Equal
SMPDefsFlags[STARS_NN_fcmovbe] = false; // Floating Move if Below or Equal
SMPDefsFlags[STARS_NN_fcmovu] = false; // Floating Move if Unordered
SMPDefsFlags[STARS_NN_fcmovnb] = false; // Floating Move if Not Below
SMPDefsFlags[STARS_NN_fcmovne] = false; // Floating Move if Not Equal
SMPDefsFlags[STARS_NN_fcmovnbe] = false; // Floating Move if Not Below or Equal
SMPDefsFlags[STARS_NN_fcmovnu] = false; // Floating Move if Not Unordered
SMPDefsFlags[STARS_NN_rdpmc] = false; // Read Performance Monitor Counter
//
// FPP instructions
//
SMPDefsFlags[STARS_NN_fld] = false; // Load Real
SMPDefsFlags[STARS_NN_fst] = false; // Store Real
SMPDefsFlags[STARS_NN_fstp] = false; // Store Real and Pop
SMPDefsFlags[STARS_NN_fxch] = false; // Exchange Registers
SMPDefsFlags[STARS_NN_fild] = false; // Load Integer
SMPDefsFlags[STARS_NN_fist] = false; // Store Integer
SMPDefsFlags[STARS_NN_fistp] = false; // Store Integer and Pop
SMPDefsFlags[STARS_NN_fbld] = false; // Load BCD
SMPDefsFlags[STARS_NN_fbstp] = false; // Store BCD and Pop
SMPDefsFlags[STARS_NN_fadd] = false; // Add Real
SMPDefsFlags[STARS_NN_faddp] = false; // Add Real and Pop
SMPDefsFlags[STARS_NN_fiadd] = false; // Add Integer
SMPDefsFlags[STARS_NN_fsub] = false; // Subtract Real
SMPDefsFlags[STARS_NN_fsubp] = false; // Subtract Real and Pop
SMPDefsFlags[STARS_NN_fisub] = false; // Subtract Integer
SMPDefsFlags[STARS_NN_fsubr] = false; // Subtract Real Reversed
SMPDefsFlags[STARS_NN_fsubrp] = false; // Subtract Real Reversed and Pop
SMPDefsFlags[STARS_NN_fisubr] = false; // Subtract Integer Reversed
SMPDefsFlags[STARS_NN_fmul] = false; // Multiply Real
SMPDefsFlags[STARS_NN_fmulp] = false; // Multiply Real and Pop
SMPDefsFlags[STARS_NN_fimul] = false; // Multiply Integer
SMPDefsFlags[STARS_NN_fdiv] = false; // Divide Real
SMPDefsFlags[STARS_NN_fdivp] = false; // Divide Real and Pop
SMPDefsFlags[STARS_NN_fidiv] = false; // Divide Integer
SMPDefsFlags[STARS_NN_fdivr] = false; // Divide Real Reversed
SMPDefsFlags[STARS_NN_fdivrp] = false; // Divide Real Reversed and Pop
SMPDefsFlags[STARS_NN_fidivr] = false; // Divide Integer Reversed
SMPDefsFlags[STARS_NN_fsqrt] = false; // Square Root
SMPDefsFlags[STARS_NN_fscale] = false; // Scale: st(0) <- st(0) * 2^st(1)
SMPDefsFlags[STARS_NN_fprem] = false; // Partial Remainder
SMPDefsFlags[STARS_NN_frndint] = false; // Round to Integer
SMPDefsFlags[STARS_NN_fxtract] = false; // Extract exponent and significand
SMPDefsFlags[STARS_NN_fabs] = false; // Absolute value
SMPDefsFlags[STARS_NN_fchs] = false; // Change Sign
SMPDefsFlags[STARS_NN_ficom] = false; // Compare Integer
SMPDefsFlags[STARS_NN_ficomp] = false; // Compare Integer and Pop
SMPDefsFlags[STARS_NN_ftst] = false; // Test
SMPDefsFlags[STARS_NN_fxam] = false; // Examine
SMPDefsFlags[STARS_NN_fptan] = false; // Partial tangent
SMPDefsFlags[STARS_NN_fpatan] = false; // Partial arctangent
SMPDefsFlags[STARS_NN_f2xm1] = false; // 2^x - 1
SMPDefsFlags[STARS_NN_fyl2x] = false; // Y * lg2(X)
SMPDefsFlags[STARS_NN_fyl2xp1] = false; // Y * lg2(X+1)
SMPDefsFlags[STARS_NN_fldz] = false; // Load +0.0
SMPDefsFlags[STARS_NN_fld1] = false; // Load +1.0
SMPDefsFlags[STARS_NN_fldpi] = false; // Load PI=3.14...
SMPDefsFlags[STARS_NN_fldl2t] = false; // Load lg2(10)
SMPDefsFlags[STARS_NN_fldl2e] = false; // Load lg2(e)
SMPDefsFlags[STARS_NN_fldlg2] = false; // Load lg10(2)
SMPDefsFlags[STARS_NN_fldln2] = false; // Load ln(2)
SMPDefsFlags[STARS_NN_finit] = false; // Initialize Processor
SMPDefsFlags[STARS_NN_fninit] = false; // Initialize Processor (no wait)
SMPDefsFlags[STARS_NN_fsetpm] = false; // Set Protected Mode
SMPDefsFlags[STARS_NN_fldcw] = false; // Load Control Word
SMPDefsFlags[STARS_NN_fstcw] = false; // Store Control Word
SMPDefsFlags[STARS_NN_fnstcw] = false; // Store Control Word (no wait)
SMPDefsFlags[STARS_NN_fstsw] = false; // Store Status Word to memory or AX
SMPDefsFlags[STARS_NN_fnstsw] = false; // Store Status Word (no wait) to memory or AX
SMPDefsFlags[STARS_NN_fclex] = false; // Clear Exceptions
SMPDefsFlags[STARS_NN_fnclex] = false; // Clear Exceptions (no wait)
SMPDefsFlags[STARS_NN_fstenv] = false; // Store Environment
SMPDefsFlags[STARS_NN_fnstenv] = false; // Store Environment (no wait)
SMPDefsFlags[STARS_NN_fldenv] = false; // Load Environment
SMPDefsFlags[STARS_NN_fsave] = false; // Save State
SMPDefsFlags[STARS_NN_fnsave] = false; // Save State (no wait)
SMPDefsFlags[STARS_NN_frstor] = false; // Restore State
SMPDefsFlags[STARS_NN_fincstp] = false; // Increment Stack Pointer
SMPDefsFlags[STARS_NN_fdecstp] = false; // Decrement Stack Pointer
SMPDefsFlags[STARS_NN_ffree] = false; // Free Register
SMPDefsFlags[STARS_NN_fnop] = false; // No Operation
SMPDefsFlags[STARS_NN_feni] = false; // (8087 only)
SMPDefsFlags[STARS_NN_fneni] = false; // (no wait) (8087 only)
SMPDefsFlags[STARS_NN_fdisi] = false; // (8087 only)
SMPDefsFlags[STARS_NN_fndisi] = false; // (no wait) (8087 only)
//
// 80387 instructions
//
SMPDefsFlags[STARS_NN_fprem1] = false; // Partial Remainder ( < half )
SMPDefsFlags[STARS_NN_fsincos] = false; // t<-cos(st); st<-sin(st); push t
SMPDefsFlags[STARS_NN_fsin] = false; // Sine
SMPDefsFlags[STARS_NN_fcos] = false; // Cosine
SMPDefsFlags[STARS_NN_fucom] = false; // Compare Unordered Real
SMPDefsFlags[STARS_NN_fucomp] = false; // Compare Unordered Real and Pop
SMPDefsFlags[STARS_NN_fucompp] = false; // Compare Unordered Real and Pop Twice
//
// Instructions added 28.02.96
//
SMPDefsFlags[STARS_NN_svdc] = false; // Save Register and Descriptor
SMPDefsFlags[STARS_NN_rsdc] = false; // Restore Register and Descriptor
SMPDefsFlags[STARS_NN_svldt] = false; // Save LDTR and Descriptor
SMPDefsFlags[STARS_NN_rsldt] = false; // Restore LDTR and Descriptor
SMPDefsFlags[STARS_NN_svts] = false; // Save TR and Descriptor
SMPDefsFlags[STARS_NN_rsts] = false; // Restore TR and Descriptor
SMPDefsFlags[STARS_NN_icebp] = false; // ICE Break Point
//
// MMX instructions
//
SMPDefsFlags[STARS_NN_emms] = false; // Empty MMX state
SMPDefsFlags[STARS_NN_movd] = false; // Move 32 bits
SMPDefsFlags[STARS_NN_movq] = false; // Move 64 bits
SMPDefsFlags[STARS_NN_packsswb] = false; // Pack with Signed Saturation (Word->Byte)
SMPDefsFlags[STARS_NN_packssdw] = false; // Pack with Signed Saturation (Dword->Word)
SMPDefsFlags[STARS_NN_packuswb] = false; // Pack with Unsigned Saturation (Word->Byte)
SMPDefsFlags[STARS_NN_paddb] = false; // Packed Add Byte
SMPDefsFlags[STARS_NN_paddw] = false; // Packed Add Word
SMPDefsFlags[STARS_NN_paddd] = false; // Packed Add Dword
SMPDefsFlags[STARS_NN_paddsb] = false; // Packed Add with Saturation (Byte)
SMPDefsFlags[STARS_NN_paddsw] = false; // Packed Add with Saturation (Word)
SMPDefsFlags[STARS_NN_paddusb] = false; // Packed Add Unsigned with Saturation (Byte)
SMPDefsFlags[STARS_NN_paddusw] = false; // Packed Add Unsigned with Saturation (Word)
SMPDefsFlags[STARS_NN_pand] = false; // Bitwise Logical And
SMPDefsFlags[STARS_NN_pandn] = false; // Bitwise Logical And Not
SMPDefsFlags[STARS_NN_pcmpeqb] = false; // Packed Compare for Equal (Byte)
SMPDefsFlags[STARS_NN_pcmpeqw] = false; // Packed Compare for Equal (Word)
SMPDefsFlags[STARS_NN_pcmpeqd] = false; // Packed Compare for Equal (Dword)
SMPDefsFlags[STARS_NN_pcmpgtb] = false; // Packed Compare for Greater Than (Byte)
SMPDefsFlags[STARS_NN_pcmpgtw] = false; // Packed Compare for Greater Than (Word)
SMPDefsFlags[STARS_NN_pcmpgtd] = false; // Packed Compare for Greater Than (Dword)
SMPDefsFlags[STARS_NN_pmaddwd] = false; // Packed Multiply and Add
SMPDefsFlags[STARS_NN_pmulhw] = false; // Packed Multiply High
SMPDefsFlags[STARS_NN_pmullw] = false; // Packed Multiply Low
SMPDefsFlags[STARS_NN_por] = false; // Bitwise Logical Or
SMPDefsFlags[STARS_NN_psllw] = false; // Packed Shift Left Logical (Word)
SMPDefsFlags[STARS_NN_pslld] = false; // Packed Shift Left Logical (Dword)
SMPDefsFlags[STARS_NN_psllq] = false; // Packed Shift Left Logical (Qword)
SMPDefsFlags[STARS_NN_psraw] = false; // Packed Shift Right Arithmetic (Word)
SMPDefsFlags[STARS_NN_psrad] = false; // Packed Shift Right Arithmetic (Dword)
SMPDefsFlags[STARS_NN_psrlw] = false; // Packed Shift Right Logical (Word)
SMPDefsFlags[STARS_NN_psrld] = false; // Packed Shift Right Logical (Dword)
SMPDefsFlags[STARS_NN_psrlq] = false; // Packed Shift Right Logical (Qword)
SMPDefsFlags[STARS_NN_psubb] = false; // Packed Subtract Byte
SMPDefsFlags[STARS_NN_psubw] = false; // Packed Subtract Word
SMPDefsFlags[STARS_NN_psubd] = false; // Packed Subtract Dword
SMPDefsFlags[STARS_NN_psubsb] = false; // Packed Subtract with Saturation (Byte)
SMPDefsFlags[STARS_NN_psubsw] = false; // Packed Subtract with Saturation (Word)
SMPDefsFlags[STARS_NN_psubusb] = false; // Packed Subtract Unsigned with Saturation (Byte)
SMPDefsFlags[STARS_NN_psubusw] = false; // Packed Subtract Unsigned with Saturation (Word)
SMPDefsFlags[STARS_NN_punpckhbw] = false; // Unpack High Packed Data (Byte->Word)
SMPDefsFlags[STARS_NN_punpckhwd] = false; // Unpack High Packed Data (Word->Dword)
SMPDefsFlags[STARS_NN_punpckhdq] = false; // Unpack High Packed Data (Dword->Qword)
SMPDefsFlags[STARS_NN_punpcklbw] = false; // Unpack Low Packed Data (Byte->Word)
SMPDefsFlags[STARS_NN_punpcklwd] = false; // Unpack Low Packed Data (Word->Dword)
SMPDefsFlags[STARS_NN_punpckldq] = false; // Unpack Low Packed Data (Dword->Qword)
SMPDefsFlags[STARS_NN_pxor] = false; // Bitwise Logical Exclusive Or
//
// Undocumented Deschutes processor instructions
//
SMPDefsFlags[STARS_NN_fxsave] = false; // Fast save FP context
SMPDefsFlags[STARS_NN_fxrstor] = false; // Fast restore FP context
// Pentium II instructions
SMPDefsFlags[STARS_NN_sysexit] = false; // Fast Transition from System Call Entry Point
// 3DNow! instructions
SMPDefsFlags[STARS_NN_pavgusb] = false; // Packed 8-bit Unsigned Integer Averaging
SMPDefsFlags[STARS_NN_pfadd] = false; // Packed Floating-Point Addition
SMPDefsFlags[STARS_NN_pfsub] = false; // Packed Floating-Point Subtraction
SMPDefsFlags[STARS_NN_pfsubr] = false; // Packed Floating-Point Reverse Subtraction
SMPDefsFlags[STARS_NN_pfacc] = false; // Packed Floating-Point Accumulate
SMPDefsFlags[STARS_NN_pfcmpge] = false; // Packed Floating-Point Comparison, Greater or Equal
SMPDefsFlags[STARS_NN_pfcmpgt] = false; // Packed Floating-Point Comparison, Greater
SMPDefsFlags[STARS_NN_pfcmpeq] = false; // Packed Floating-Point Comparison, Equal
SMPDefsFlags[STARS_NN_pfmin] = false; // Packed Floating-Point Minimum
SMPDefsFlags[STARS_NN_pfmax] = false; // Packed Floating-Point Maximum
SMPDefsFlags[STARS_NN_pi2fd] = false; // Packed 32-bit Integer to Floating-Point
SMPDefsFlags[STARS_NN_pf2id] = false; // Packed Floating-Point to 32-bit Integer
SMPDefsFlags[STARS_NN_pfrcp] = false; // Packed Floating-Point Reciprocal Approximation
SMPDefsFlags[STARS_NN_pfrsqrt] = false; // Packed Floating-Point Reciprocal Square Root Approximation
SMPDefsFlags[STARS_NN_pfmul] = false; // Packed Floating-Point Multiplication
SMPDefsFlags[STARS_NN_pfrcpit1] = false; // Packed Floating-Point Reciprocal First Iteration Step
SMPDefsFlags[STARS_NN_pfrsqit1] = false; // Packed Floating-Point Reciprocal Square Root First Iteration Step
SMPDefsFlags[STARS_NN_pfrcpit2] = false; // Packed Floating-Point Reciprocal Second Iteration Step
SMPDefsFlags[STARS_NN_pmulhrw] = false; // Packed Floating-Point 16-bit Integer Multiply with rounding
SMPDefsFlags[STARS_NN_femms] = false; // Faster entry/exit of the MMX or floating-point state
SMPDefsFlags[STARS_NN_prefetch] = false; // Prefetch at least a 32-byte line into L1 data cache
SMPDefsFlags[STARS_NN_prefetchw] = false; // Prefetch processor cache line into L1 data cache (mark as modified)
// Pentium III instructions
SMPDefsFlags[STARS_NN_addps] = false; // Packed Single-FP Add
SMPDefsFlags[STARS_NN_addss] = false; // Scalar Single-FP Add
SMPDefsFlags[STARS_NN_andnps] = false; // Bitwise Logical And Not for Single-FP
SMPDefsFlags[STARS_NN_andps] = false; // Bitwise Logical And for Single-FP
SMPDefsFlags[STARS_NN_cmpps] = false; // Packed Single-FP Compare
SMPDefsFlags[STARS_NN_cmpss] = false; // Scalar Single-FP Compare
SMPDefsFlags[STARS_NN_cvtpi2ps] = false; // Packed signed INT32 to Packed Single-FP conversion
SMPDefsFlags[STARS_NN_cvtps2pi] = false; // Packed Single-FP to Packed INT32 conversion
SMPDefsFlags[STARS_NN_cvtsi2ss] = false; // Scalar signed INT32 to Single-FP conversion
SMPDefsFlags[STARS_NN_cvtss2si] = false; // Scalar Single-FP to signed INT32 conversion
SMPDefsFlags[STARS_NN_cvttps2pi] = false; // Packed Single-FP to Packed INT32 conversion (truncate)
SMPDefsFlags[STARS_NN_cvttss2si] = false; // Scalar Single-FP to signed INT32 conversion (truncate)
SMPDefsFlags[STARS_NN_divps] = false; // Packed Single-FP Divide
SMPDefsFlags[STARS_NN_divss] = false; // Scalar Single-FP Divide
SMPDefsFlags[STARS_NN_ldmxcsr] = false; // Load Streaming SIMD Extensions Technology Control/Status Register
SMPDefsFlags[STARS_NN_maxps] = false; // Packed Single-FP Maximum
SMPDefsFlags[STARS_NN_maxss] = false; // Scalar Single-FP Maximum
SMPDefsFlags[STARS_NN_minps] = false; // Packed Single-FP Minimum
SMPDefsFlags[STARS_NN_minss] = false; // Scalar Single-FP Minimum
SMPDefsFlags[STARS_NN_movaps] = false; // Move Aligned Four Packed Single-FP
SMPDefsFlags[STARS_NN_movhlps] = false; // Move High to Low Packed Single-FP
SMPDefsFlags[STARS_NN_movhps] = false; // Move High Packed Single-FP
SMPDefsFlags[STARS_NN_movlhps] = false; // Move Low to High Packed Single-FP
SMPDefsFlags[STARS_NN_movlps] = false; // Move Low Packed Single-FP
SMPDefsFlags[STARS_NN_movmskps] = false; // Move Mask to Register
SMPDefsFlags[STARS_NN_movss] = false; // Move Scalar Single-FP
SMPDefsFlags[STARS_NN_movups] = false; // Move Unaligned Four Packed Single-FP
SMPDefsFlags[STARS_NN_mulps] = false; // Packed Single-FP Multiply
SMPDefsFlags[STARS_NN_mulss] = false; // Scalar Single-FP Multiply
SMPDefsFlags[STARS_NN_orps] = false; // Bitwise Logical OR for Single-FP Data
SMPDefsFlags[STARS_NN_rcpps] = false; // Packed Single-FP Reciprocal
SMPDefsFlags[STARS_NN_rcpss] = false; // Scalar Single-FP Reciprocal
SMPDefsFlags[STARS_NN_rsqrtps] = false; // Packed Single-FP Square Root Reciprocal
SMPDefsFlags[STARS_NN_rsqrtss] = false; // Scalar Single-FP Square Root Reciprocal
SMPDefsFlags[STARS_NN_shufps] = false; // Shuffle Single-FP
SMPDefsFlags[STARS_NN_sqrtps] = false; // Packed Single-FP Square Root
SMPDefsFlags[STARS_NN_sqrtss] = false; // Scalar Single-FP Square Root
SMPDefsFlags[STARS_NN_stmxcsr] = false; // Store Streaming SIMD Extensions Technology Control/Status Register
SMPDefsFlags[STARS_NN_subps] = false; // Packed Single-FP Subtract
SMPDefsFlags[STARS_NN_subss] = false; // Scalar Single-FP Subtract
SMPDefsFlags[STARS_NN_unpckhps] = false; // Unpack High Packed Single-FP Data
SMPDefsFlags[STARS_NN_unpcklps] = false; // Unpack Low Packed Single-FP Data
SMPDefsFlags[STARS_NN_xorps] = false; // Bitwise Logical XOR for Single-FP Data
SMPDefsFlags[STARS_NN_pavgb] = false; // Packed Average (Byte)
SMPDefsFlags[STARS_NN_pavgw] = false; // Packed Average (Word)
SMPDefsFlags[STARS_NN_pextrw] = false; // Extract Word
SMPDefsFlags[STARS_NN_pinsrw] = false; // Insert Word
SMPDefsFlags[STARS_NN_pmaxsw] = false; // Packed Signed Integer Word Maximum
SMPDefsFlags[STARS_NN_pmaxub] = false; // Packed Unsigned Integer Byte Maximum
SMPDefsFlags[STARS_NN_pminsw] = false; // Packed Signed Integer Word Minimum
SMPDefsFlags[STARS_NN_pminub] = false; // Packed Unsigned Integer Byte Minimum
SMPDefsFlags[STARS_NN_pmovmskb] = false; // Move Byte Mask to Integer
SMPDefsFlags[STARS_NN_pmulhuw] = false; // Packed Multiply High Unsigned
SMPDefsFlags[STARS_NN_psadbw] = false; // Packed Sum of Absolute Differences
SMPDefsFlags[STARS_NN_pshufw] = false; // Packed Shuffle Word
SMPDefsFlags[STARS_NN_maskmovq] = false; // Byte Mask write
SMPDefsFlags[STARS_NN_movntps] = false; // Move Aligned Four Packed Single-FP Non Temporal
SMPDefsFlags[STARS_NN_movntq] = false; // Move 64 Bits Non Temporal
SMPDefsFlags[STARS_NN_prefetcht0] = false; // Prefetch to all cache levels
SMPDefsFlags[STARS_NN_prefetcht1] = false; // Prefetch to all cache levels
SMPDefsFlags[STARS_NN_prefetcht2] = false; // Prefetch to L2 cache
SMPDefsFlags[STARS_NN_prefetchnta] = false; // Prefetch to L1 cache
SMPDefsFlags[STARS_NN_sfence] = false; // Store Fence
// Pentium III Pseudo instructions
SMPDefsFlags[STARS_NN_cmpeqps] = false; // Packed Single-FP Compare EQ
SMPDefsFlags[STARS_NN_cmpltps] = false; // Packed Single-FP Compare LT
SMPDefsFlags[STARS_NN_cmpleps] = false; // Packed Single-FP Compare LE
SMPDefsFlags[STARS_NN_cmpunordps] = false; // Packed Single-FP Compare UNORD
SMPDefsFlags[STARS_NN_cmpneqps] = false; // Packed Single-FP Compare NOT EQ
SMPDefsFlags[STARS_NN_cmpnltps] = false; // Packed Single-FP Compare NOT LT
SMPDefsFlags[STARS_NN_cmpnleps] = false; // Packed Single-FP Compare NOT LE
SMPDefsFlags[STARS_NN_cmpordps] = false; // Packed Single-FP Compare ORDERED
SMPDefsFlags[STARS_NN_cmpeqss] = false; // Scalar Single-FP Compare EQ
SMPDefsFlags[STARS_NN_cmpltss] = false; // Scalar Single-FP Compare LT
SMPDefsFlags[STARS_NN_cmpless] = false; // Scalar Single-FP Compare LE
SMPDefsFlags[STARS_NN_cmpunordss] = false; // Scalar Single-FP Compare UNORD
SMPDefsFlags[STARS_NN_cmpneqss] = false; // Scalar Single-FP Compare NOT EQ
SMPDefsFlags[STARS_NN_cmpnltss] = false; // Scalar Single-FP Compare NOT LT
SMPDefsFlags[STARS_NN_cmpnless] = false; // Scalar Single-FP Compare NOT LE
SMPDefsFlags[STARS_NN_cmpordss] = false; // Scalar Single-FP Compare ORDERED
// AMD K7 instructions
// Revisit AMD if we port to it.
SMPDefsFlags[STARS_NN_pf2iw] = false; // Packed Floating-Point to Integer with Sign Extend
SMPDefsFlags[STARS_NN_pfnacc] = false; // Packed Floating-Point Negative Accumulate
SMPDefsFlags[STARS_NN_pfpnacc] = false; // Packed Floating-Point Mixed Positive-Negative Accumulate
SMPDefsFlags[STARS_NN_pi2fw] = false; // Packed 16-bit Integer to Floating-Point
SMPDefsFlags[STARS_NN_pswapd] = false; // Packed Swap Double Word
// Undocumented FP instructions (thanks to norbert.juffa@adm.com)
SMPDefsFlags[STARS_NN_fstp1] = false; // Alias of Store Real and Pop
SMPDefsFlags[STARS_NN_fxch4] = false; // Alias of Exchange Registers
SMPDefsFlags[STARS_NN_ffreep] = false; // Free Register and Pop
SMPDefsFlags[STARS_NN_fxch7] = false; // Alias of Exchange Registers
SMPDefsFlags[STARS_NN_fstp8] = false; // Alias of Store Real and Pop
SMPDefsFlags[STARS_NN_fstp9] = false; // Alias of Store Real and Pop
// Pentium 4 instructions
SMPDefsFlags[STARS_NN_addpd] = false; // Add Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_addsd] = false; // Add Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_andnpd] = false; // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_andpd] = false; // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_clflush] = false; // Flush Cache Line
SMPDefsFlags[STARS_NN_cmppd] = false; // Compare Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_cmpsd] = false; // Compare Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_cvtdq2pd] = false; // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_cvtdq2ps] = false; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_cvtpd2dq] = false; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
SMPDefsFlags[STARS_NN_cvtpd2pi] = false; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
SMPDefsFlags[STARS_NN_cvtpd2ps] = false; // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_cvtpi2pd] = false; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_cvtps2dq] = false; // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
SMPDefsFlags[STARS_NN_cvtps2pd] = false; // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_cvtsd2si] = false; // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
SMPDefsFlags[STARS_NN_cvtsd2ss] = false; // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
SMPDefsFlags[STARS_NN_cvtsi2sd] = false; // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
SMPDefsFlags[STARS_NN_cvtss2sd] = false; // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
SMPDefsFlags[STARS_NN_cvttpd2dq] = false; // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
SMPDefsFlags[STARS_NN_cvttpd2pi] = false; // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
SMPDefsFlags[STARS_NN_cvttps2dq] = false; // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
SMPDefsFlags[STARS_NN_cvttsd2si] = false; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
SMPDefsFlags[STARS_NN_divpd] = false; // Divide Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_divsd] = false; // Divide Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_lfence] = false; // Load Fence
SMPDefsFlags[STARS_NN_maskmovdqu] = false; // Store Selected Bytes of Double Quadword
SMPDefsFlags[STARS_NN_maxpd] = false; // Return Maximum Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_maxsd] = false; // Return Maximum Scalar Double-Precision Floating-Point Value
SMPDefsFlags[STARS_NN_mfence] = false; // Memory Fence
SMPDefsFlags[STARS_NN_minpd] = false; // Return Minimum Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_minsd] = false; // Return Minimum Scalar Double-Precision Floating-Point Value
SMPDefsFlags[STARS_NN_movapd] = false; // Move Aligned Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_movdq2q] = false; // Move Quadword from XMM to MMX Register
SMPDefsFlags[STARS_NN_movdqa] = false; // Move Aligned Double Quadword
SMPDefsFlags[STARS_NN_movdqu] = false; // Move Unaligned Double Quadword
SMPDefsFlags[STARS_NN_movhpd] = false; // Move High Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_movlpd] = false; // Move Low Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_movmskpd] = false; // Extract Packed Double-Precision Floating-Point Sign Mask
SMPDefsFlags[STARS_NN_movntdq] = false; // Store Double Quadword Using Non-Temporal Hint
SMPDefsFlags[STARS_NN_movnti] = false; // Store Doubleword Using Non-Temporal Hint
SMPDefsFlags[STARS_NN_movntpd] = false; // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
SMPDefsFlags[STARS_NN_movq2dq] = false; // Move Quadword from MMX to XMM Register
SMPDefsFlags[STARS_NN_movsd] = false; // Move Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_movupd] = false; // Move Unaligned Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_mulpd] = false; // Multiply Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_mulsd] = false; // Multiply Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_orpd] = false; // Bitwise Logical OR of Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_paddq] = false; // Add Packed Quadword Integers
SMPDefsFlags[STARS_NN_pause] = false; // Spin Loop Hint
SMPDefsFlags[STARS_NN_pmuludq] = false; // Multiply Packed Unsigned Doubleword Integers
SMPDefsFlags[STARS_NN_pshufd] = false; // Shuffle Packed Doublewords
SMPDefsFlags[STARS_NN_pshufhw] = false; // Shuffle Packed High Words
SMPDefsFlags[STARS_NN_pshuflw] = false; // Shuffle Packed Low Words
SMPDefsFlags[STARS_NN_pslldq] = false; // Shift Double Quadword Left Logical
SMPDefsFlags[STARS_NN_psrldq] = false; // Shift Double Quadword Right Logical
SMPDefsFlags[STARS_NN_psubq] = false; // Subtract Packed Quadword Integers
SMPDefsFlags[STARS_NN_punpckhqdq] = false; // Unpack High Data
SMPDefsFlags[STARS_NN_punpcklqdq] = false; // Unpack Low Data
SMPDefsFlags[STARS_NN_shufpd] = false; // Shuffle Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_sqrtpd] = false; // Compute Square Roots of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_sqrtsd] = false; // Compute Square Rootof Scalar Double-Precision Floating-Point Value
SMPDefsFlags[STARS_NN_subpd] = false; // Subtract Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_subsd] = false; // Subtract Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_unpckhpd] = false; // Unpack and Interleave High Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_unpcklpd] = false; // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_xorpd] = false; // Bitwise Logical OR of Double-Precision Floating-Point Values
// AMD syscall/sysret instructions NOTE: not AMD, found in Intel manual
// AMD64 instructions NOTE: not AMD, found in Intel manual
SMPDefsFlags[STARS_NN_swapgs] = false; // Exchange GS base with KernelGSBase MSR
// New Pentium instructions (SSE3)
SMPDefsFlags[STARS_NN_movddup] = false; // Move One Double-FP and Duplicate
SMPDefsFlags[STARS_NN_movshdup] = false; // Move Packed Single-FP High and Duplicate
SMPDefsFlags[STARS_NN_movsldup] = false; // Move Packed Single-FP Low and Duplicate
// Missing AMD64 instructions NOTE: also found in Intel manual
SMPDefsFlags[STARS_NN_movsxd] = false; // Move with Sign-Extend Doubleword
// SSE3 instructions
SMPDefsFlags[STARS_NN_addsubpd] = false; // Add /Sub packed DP FP numbers
SMPDefsFlags[STARS_NN_addsubps] = false; // Add /Sub packed SP FP numbers
SMPDefsFlags[STARS_NN_haddpd] = false; // Add horizontally packed DP FP numbers
SMPDefsFlags[STARS_NN_haddps] = false; // Add horizontally packed SP FP numbers
SMPDefsFlags[STARS_NN_hsubpd] = false; // Sub horizontally packed DP FP numbers
SMPDefsFlags[STARS_NN_hsubps] = false; // Sub horizontally packed SP FP numbers
SMPDefsFlags[STARS_NN_monitor] = false; // Set up a linear address range to be monitored by hardware
SMPDefsFlags[STARS_NN_mwait] = false; // Wait until write-back store performed within the range specified by the MONITOR instruction
SMPDefsFlags[STARS_NN_fisttp] = false; // Store ST in intXX (chop) and pop
SMPDefsFlags[STARS_NN_lddqu] = false; // Load unaligned integer 128-bit
// SSSE3 instructions
SMPDefsFlags[STARS_NN_psignb] = false; // Packed SIGN Byte
SMPDefsFlags[STARS_NN_psignw] = false; // Packed SIGN Word
SMPDefsFlags[STARS_NN_psignd] = false; // Packed SIGN Doubleword
SMPDefsFlags[STARS_NN_pshufb] = false; // Packed Shuffle Bytes
SMPDefsFlags[STARS_NN_pmulhrsw] = false; // Packed Multiply High with Round and Scale
SMPDefsFlags[STARS_NN_pmaddubsw] = false; // Multiply and Add Packed Signed and Unsigned Bytes
SMPDefsFlags[STARS_NN_phsubsw] = false; // Packed Horizontal Subtract and Saturate
SMPDefsFlags[STARS_NN_phaddsw] = false; // Packed Horizontal Add and Saturate
SMPDefsFlags[STARS_NN_phaddw] = false; // Packed Horizontal Add Word
SMPDefsFlags[STARS_NN_phaddd] = false; // Packed Horizontal Add Doubleword
SMPDefsFlags[STARS_NN_phsubw] = false; // Packed Horizontal Subtract Word
SMPDefsFlags[STARS_NN_phsubd] = false; // Packed Horizontal Subtract Doubleword
SMPDefsFlags[STARS_NN_palignr] = false; // Packed Align Right
SMPDefsFlags[STARS_NN_pabsb] = false; // Packed Absolute Value Byte
SMPDefsFlags[STARS_NN_pabsw] = false; // Packed Absolute Value Word
SMPDefsFlags[STARS_NN_pabsd] = false; // Packed Absolute Value Doubleword
// VMX instructions
SMPDefsFlags[STARS_NN_ud2] = false; // Undefined Instruction
// Added with x86-64
SMPDefsFlags[STARS_NN_rdtscp] = false; // Read Time-Stamp Counter and Processor ID
// Geode LX 3DNow! extensions
SMPDefsFlags[STARS_NN_pfrcpv] = false; // Reciprocal Approximation for a Pair of 32-bit Floats
SMPDefsFlags[STARS_NN_pfrsqrtv] = false; // Reciprocal Square Root Approximation for a Pair of 32-bit Floats
// SSE2 pseudoinstructions
SMPDefsFlags[STARS_NN_cmpeqpd] = false; // Packed Double-FP Compare EQ
SMPDefsFlags[STARS_NN_cmpltpd] = false; // Packed Double-FP Compare LT
SMPDefsFlags[STARS_NN_cmplepd] = false; // Packed Double-FP Compare LE
SMPDefsFlags[STARS_NN_cmpunordpd] = false; // Packed Double-FP Compare UNORD
SMPDefsFlags[STARS_NN_cmpneqpd] = false; // Packed Double-FP Compare NOT EQ
SMPDefsFlags[STARS_NN_cmpnltpd] = false; // Packed Double-FP Compare NOT LT
SMPDefsFlags[STARS_NN_cmpnlepd] = false; // Packed Double-FP Compare NOT LE
SMPDefsFlags[STARS_NN_cmpordpd] = false; // Packed Double-FP Compare ORDERED
SMPDefsFlags[STARS_NN_cmpeqsd] = false; // Scalar Double-FP Compare EQ
SMPDefsFlags[STARS_NN_cmpltsd] = false; // Scalar Double-FP Compare LT
SMPDefsFlags[STARS_NN_cmplesd] = false; // Scalar Double-FP Compare LE
SMPDefsFlags[STARS_NN_cmpunordsd] = false; // Scalar Double-FP Compare UNORD
SMPDefsFlags[STARS_NN_cmpneqsd] = false; // Scalar Double-FP Compare NOT EQ
SMPDefsFlags[STARS_NN_cmpnltsd] = false; // Scalar Double-FP Compare NOT LT
SMPDefsFlags[STARS_NN_cmpnlesd] = false; // Scalar Double-FP Compare NOT LE
SMPDefsFlags[STARS_NN_cmpordsd] = false; // Scalar Double-FP Compare ORDERED
// SSSE4.1 instructions
SMPDefsFlags[STARS_NN_blendpd] = false; // Blend Packed Double Precision Floating-Point Values
SMPDefsFlags[STARS_NN_blendps] = false; // Blend Packed Single Precision Floating-Point Values
SMPDefsFlags[STARS_NN_blendvpd] = false; // Variable Blend Packed Double Precision Floating-Point Values
SMPDefsFlags[STARS_NN_blendvps] = false; // Variable Blend Packed Single Precision Floating-Point Values
SMPDefsFlags[STARS_NN_dppd] = false; // Dot Product of Packed Double Precision Floating-Point Values
SMPDefsFlags[STARS_NN_dpps] = false; // Dot Product of Packed Single Precision Floating-Point Values
SMPDefsFlags[STARS_NN_extractps] = 2; // Extract Packed Single Precision Floating-Point Value
SMPDefsFlags[STARS_NN_insertps] = false; // Insert Packed Single Precision Floating-Point Value
SMPDefsFlags[STARS_NN_movntdqa] = false; // Load Double Quadword Non-Temporal Aligned Hint
SMPDefsFlags[STARS_NN_mpsadbw] = false; // Compute Multiple Packed Sums of Absolute Difference
SMPDefsFlags[STARS_NN_packusdw] = false; // Pack with Unsigned Saturation
SMPDefsFlags[STARS_NN_pblendvb] = false; // Variable Blend Packed Bytes
SMPDefsFlags[STARS_NN_pblendw] = false; // Blend Packed Words
SMPDefsFlags[STARS_NN_pcmpeqq] = false; // Compare Packed Qword Data for Equal
SMPDefsFlags[STARS_NN_pextrb] = false; // Extract Byte
SMPDefsFlags[STARS_NN_pextrd] = false; // Extract Dword
SMPDefsFlags[STARS_NN_pextrq] = false; // Extract Qword
SMPDefsFlags[STARS_NN_phminposuw] = false; // Packed Horizontal Word Minimum
SMPDefsFlags[STARS_NN_pinsrb] = false; // Insert Byte
SMPDefsFlags[STARS_NN_pinsrd] = false; // Insert Dword
SMPDefsFlags[STARS_NN_pinsrq] = false; // Insert Qword
SMPDefsFlags[STARS_NN_pmaxsb] = false; // Maximum of Packed Signed Byte Integers
SMPDefsFlags[STARS_NN_pmaxsd] = false; // Maximum of Packed Signed Dword Integers
SMPDefsFlags[STARS_NN_pmaxud] = false; // Maximum of Packed Unsigned Dword Integers
SMPDefsFlags[STARS_NN_pmaxuw] = false; // Maximum of Packed Word Integers
SMPDefsFlags[STARS_NN_pminsb] = false; // Minimum of Packed Signed Byte Integers
SMPDefsFlags[STARS_NN_pminsd] = false; // Minimum of Packed Signed Dword Integers
SMPDefsFlags[STARS_NN_pminud] = false; // Minimum of Packed Unsigned Dword Integers
SMPDefsFlags[STARS_NN_pminuw] = false; // Minimum of Packed Word Integers
SMPDefsFlags[STARS_NN_pmovsxbw] = false; // Packed Move with Sign Extend
SMPDefsFlags[STARS_NN_pmovsxbd] = false; // Packed Move with Sign Extend
SMPDefsFlags[STARS_NN_pmovsxbq] = false; // Packed Move with Sign Extend
SMPDefsFlags[STARS_NN_pmovsxwd] = false; // Packed Move with Sign Extend
SMPDefsFlags[STARS_NN_pmovsxwq] = false; // Packed Move with Sign Extend
SMPDefsFlags[STARS_NN_pmovsxdq] = false; // Packed Move with Sign Extend
SMPDefsFlags[STARS_NN_pmovzxbw] = false; // Packed Move with Zero Extend
SMPDefsFlags[STARS_NN_pmovzxbd] = false; // Packed Move with Zero Extend
SMPDefsFlags[STARS_NN_pmovzxbq] = false; // Packed Move with Zero Extend
SMPDefsFlags[STARS_NN_pmovzxwd] = false; // Packed Move with Zero Extend
SMPDefsFlags[STARS_NN_pmovzxwq] = false; // Packed Move with Zero Extend
SMPDefsFlags[STARS_NN_pmovzxdq] = false; // Packed Move with Zero Extend
SMPDefsFlags[STARS_NN_pmuldq] = false; // Multiply Packed Signed Dword Integers
SMPDefsFlags[STARS_NN_pmulld] = false; // Multiply Packed Signed Dword Integers and Store Low Result
SMPDefsFlags[STARS_NN_roundpd] = false; // Round Packed Double Precision Floating-Point Values
SMPDefsFlags[STARS_NN_roundps] = false; // Round Packed Single Precision Floating-Point Values
SMPDefsFlags[STARS_NN_roundsd] = false; // Round Scalar Double Precision Floating-Point Values
SMPDefsFlags[STARS_NN_roundss] = false; // Round Scalar Single Precision Floating-Point Values
// SSSE4.2 instructions
SMPDefsFlags[STARS_NN_crc32] = false; // Accumulate CRC32 Value
SMPDefsFlags[STARS_NN_pcmpgtq] = false; // Compare Packed Data for Greater Than
// AMD SSE4a instructions
SMPDefsFlags[STARS_NN_extrq] = false; // Extract Field From Register
SMPDefsFlags[STARS_NN_insertq] = false; // Insert Field
SMPDefsFlags[STARS_NN_movntsd] = false; // Move Non-Temporal Scalar Double-Precision Floating-Point
SMPDefsFlags[STARS_NN_movntss] = false; // Move Non-Temporal Scalar Single-Precision Floating-Point
// xsave/xrstor instructions
SMPDefsFlags[STARS_NN_xgetbv] = false; // Get Value of Extended Control Register
SMPDefsFlags[STARS_NN_xrstor] = false; // Restore Processor Extended States
SMPDefsFlags[STARS_NN_xsave] = false; // Save Processor Extended States
SMPDefsFlags[STARS_NN_xsetbv] = false; // Set Value of Extended Control Register
// Intel Safer Mode Extensions (SMX)
// AMD-V Virtualization ISA Extension
SMPDefsFlags[STARS_NN_invlpga] = false; // Invalidate TLB Entry in a Specified ASID
SMPDefsFlags[STARS_NN_skinit] = false; // Secure Init and Jump with Attestation
SMPDefsFlags[STARS_NN_vmexit] = false; // Stop Executing Guest, Begin Executing Host
SMPDefsFlags[STARS_NN_vmload] = false; // Load State from VMCB
SMPDefsFlags[STARS_NN_vmmcall] = false; // Call VMM
SMPDefsFlags[STARS_NN_vmrun] = false; // Run Virtual Machine
SMPDefsFlags[STARS_NN_vmsave] = false; // Save State to VMCB
// VMX+ instructions
SMPDefsFlags[STARS_NN_invept] = false; // Invalidate Translations Derived from EPT
SMPDefsFlags[STARS_NN_invvpid] = false; // Invalidate Translations Based on VPID
// Intel Atom instructions
SMPDefsFlags[STARS_NN_movbe] = false; // Move Data After Swapping Bytes
// Intel AES instructions
SMPDefsFlags[STARS_NN_aesenc] = false; // Perform One Round of an AES Encryption Flow
SMPDefsFlags[STARS_NN_aesenclast] = false; // Perform the Last Round of an AES Encryption Flow
SMPDefsFlags[STARS_NN_aesdec] = false; // Perform One Round of an AES Decryption Flow
SMPDefsFlags[STARS_NN_aesdeclast] = false; // Perform the Last Round of an AES Decryption Flow
SMPDefsFlags[STARS_NN_aesimc] = false; // Perform the AES InvMixColumn Transformation
SMPDefsFlags[STARS_NN_aeskeygenassist] = false; // AES Round Key Generation Assist
// Carryless multiplication
SMPDefsFlags[STARS_NN_pclmulqdq] = false; // Carry-Less Multiplication Quadword
// Returns modified by operand size prefixes
SMPDefsFlags[STARS_NN_retnw] = false; // Return Near from Procedure (use16)
SMPDefsFlags[STARS_NN_retnd] = false; // Return Near from Procedure (use32)
SMPDefsFlags[STARS_NN_retnq] = false; // Return Near from Procedure (use64)
SMPDefsFlags[STARS_NN_retfw] = false; // Return Far from Procedure (use16)
SMPDefsFlags[STARS_NN_retfd] = false; // Return Far from Procedure (use32)
SMPDefsFlags[STARS_NN_retfq] = false; // Return Far from Procedure (use64)
// RDRAND support
// new GPR instructions
SMPDefsFlags[STARS_NN_mulx] = false; // Unsigned Multiply Without Affecting Flags
SMPDefsFlags[STARS_NN_pdep] = false; // Parallel Bits Deposit
SMPDefsFlags[STARS_NN_pext] = false; // Parallel Bits Extract
SMPDefsFlags[STARS_NN_rorx] = false; // Rotate Right Logical Without Affecting Flags
SMPDefsFlags[STARS_NN_sarx] = false; // Shift Arithmetically Right Without Affecting Flags
SMPDefsFlags[STARS_NN_shlx] = false; // Shift Logically Left Without Affecting Flags
SMPDefsFlags[STARS_NN_shrx] = false; // Shift Logically Right Without Affecting Flags
SMPDefsFlags[STARS_NN_xsaveopt] = false; // Save Processor Extended States Optimized
SMPDefsFlags[STARS_NN_invpcid] = false; // Invalidate Processor Context ID
SMPDefsFlags[STARS_NN_rdseed] = false; // Read Random Seed
SMPDefsFlags[STARS_NN_rdfsbase] = false; // Read FS Segment Base
SMPDefsFlags[STARS_NN_rdgsbase] = false; // Read GS Segment Base
SMPDefsFlags[STARS_NN_wrfsbase] = false; // Write FS Segment Base
SMPDefsFlags[STARS_NN_wrgsbase] = false; // Write GS Segment Base
// new AVX instructions
SMPDefsFlags[STARS_NN_vaddpd] = false; // Add Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vaddps] = false; // Packed Single-FP Add
SMPDefsFlags[STARS_NN_vaddsd] = false; // Add Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vaddss] = false; // Scalar Single-FP Add
SMPDefsFlags[STARS_NN_vaddsubpd] = false; // Add /Sub packed DP FP numbers
SMPDefsFlags[STARS_NN_vaddsubps] = false; // Add /Sub packed SP FP numbers
SMPDefsFlags[STARS_NN_vaesdec] = false; // Perform One Round of an AES Decryption Flow
SMPDefsFlags[STARS_NN_vaesdeclast] = false; // Perform the Last Round of an AES Decryption Flow
SMPDefsFlags[STARS_NN_vaesenc] = false; // Perform One Round of an AES Encryption Flow
SMPDefsFlags[STARS_NN_vaesenclast] = false; // Perform the Last Round of an AES Encryption Flow
SMPDefsFlags[STARS_NN_vaesimc] = false; // Perform the AES InvMixColumn Transformation
SMPDefsFlags[STARS_NN_vaeskeygenassist] = false; // AES Round Key Generation Assist
SMPDefsFlags[STARS_NN_vandnpd] = false; // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vandnps] = false; // Bitwise Logical And Not for Single-FP
SMPDefsFlags[STARS_NN_vandpd] = false; // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vandps] = false; // Bitwise Logical And for Single-FP
SMPDefsFlags[STARS_NN_vblendpd] = false; // Blend Packed Double Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vblendps] = false; // Blend Packed Single Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vblendvpd] = false; // Variable Blend Packed Double Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vblendvps] = false; // Variable Blend Packed Single Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vbroadcastf128] = false; // Broadcast 128 Bits of Floating-Point Data
SMPDefsFlags[STARS_NN_vbroadcasti128] = false; // Broadcast 128 Bits of Integer Data
SMPDefsFlags[STARS_NN_vbroadcastsd] = false; // Broadcast Double-Precision Floating-Point Element
SMPDefsFlags[STARS_NN_vbroadcastss] = false; // Broadcast Single-Precision Floating-Point Element
SMPDefsFlags[STARS_NN_vcmppd] = false; // Compare Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vcmpps] = false; // Packed Single-FP Compare
SMPDefsFlags[STARS_NN_vcmpsd] = false; // Compare Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vcmpss] = false; // Scalar Single-FP Compare
SMPDefsFlags[STARS_NN_vcomisd] = false; // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
SMPDefsFlags[STARS_NN_vcomiss] = false; // Scalar Ordered Single-FP Compare and Set EFLAGS
SMPDefsFlags[STARS_NN_vcvtdq2pd] = false; // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vcvtdq2ps] = false; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vcvtpd2dq] = false; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
SMPDefsFlags[STARS_NN_vcvtpd2ps] = false; // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vcvtph2ps] = false; // Convert 16-bit FP Values to Single-Precision FP Values
SMPDefsFlags[STARS_NN_vcvtps2dq] = false; // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
SMPDefsFlags[STARS_NN_vcvtps2pd] = false; // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vcvtps2ph] = false; // Convert Single-Precision FP value to 16-bit FP value
SMPDefsFlags[STARS_NN_vcvtsd2si] = false; // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
SMPDefsFlags[STARS_NN_vcvtsd2ss] = false; // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
SMPDefsFlags[STARS_NN_vcvtsi2sd] = false; // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
SMPDefsFlags[STARS_NN_vcvtsi2ss] = false; // Scalar signed INT32 to Single-FP conversion
SMPDefsFlags[STARS_NN_vcvtss2sd] = false; // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
SMPDefsFlags[STARS_NN_vcvtss2si] = false; // Scalar Single-FP to signed INT32 conversion
SMPDefsFlags[STARS_NN_vcvttpd2dq] = false; // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
SMPDefsFlags[STARS_NN_vcvttps2dq] = false; // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
SMPDefsFlags[STARS_NN_vcvttsd2si] = false; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
SMPDefsFlags[STARS_NN_vcvttss2si] = false; // Scalar Single-FP to signed INT32 conversion (truncate)
SMPDefsFlags[STARS_NN_vdivpd] = false; // Divide Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vdivps] = false; // Packed Single-FP Divide
SMPDefsFlags[STARS_NN_vdivsd] = false; // Divide Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vdivss] = false; // Scalar Single-FP Divide
SMPDefsFlags[STARS_NN_vdppd] = false; // Dot Product of Packed Double Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vdpps] = false; // Dot Product of Packed Single Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vextractf128] = false; // Extract Packed Floating-Point Values
SMPDefsFlags[STARS_NN_vextracti128] = false; // Extract Packed Integer Values
SMPDefsFlags[STARS_NN_vextractps] = false; // Extract Packed Floating-Point Values
SMPDefsFlags[STARS_NN_vfmadd132pd] = false; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmadd132ps] = false; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmadd132sd] = false; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmadd132ss] = false; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmadd213pd] = false; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmadd213ps] = false; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmadd213sd] = false; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmadd213ss] = false; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmadd231pd] = false; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmadd231ps] = false; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmadd231sd] = false; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmadd231ss] = false; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmaddsub132pd] = false; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmaddsub132ps] = false; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmaddsub213pd] = false; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmaddsub213ps] = false; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmaddsub231pd] = false; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmaddsub231ps] = false; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmsub132pd] = false; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmsub132ps] = false; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmsub132sd] = false; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmsub132ss] = false; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmsub213pd] = false; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmsub213ps] = false; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmsub213sd] = false; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmsub213ss] = false; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmsub231pd] = false; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmsub231ps] = false; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmsub231sd] = false; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmsub231ss] = false; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmsubadd132pd] = false; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmsubadd132ps] = false; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmsubadd213pd] = false; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmsubadd213ps] = false; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmsubadd231pd] = false; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfmsubadd231ps] = false; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmadd132pd] = false; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmadd132ps] = false; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmadd132sd] = false; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmadd132ss] = false; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmadd213pd] = false; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmadd213ps] = false; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmadd213sd] = false; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmadd213ss] = false; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmadd231pd] = false; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmadd231ps] = false; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmadd231sd] = false; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmadd231ss] = false; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmsub132pd] = false; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmsub132ps] = false; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmsub132sd] = false; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmsub132ss] = false; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmsub213pd] = false; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmsub213ps] = false; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmsub213sd] = false; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmsub213ss] = false; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmsub231pd] = false; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmsub231ps] = false; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmsub231sd] = false; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vfnmsub231ss] = false; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vgatherdps] = false; // Gather Packed SP FP Values Using Signed Dword Indices
SMPDefsFlags[STARS_NN_vgatherdpd] = false; // Gather Packed DP FP Values Using Signed Dword Indices
SMPDefsFlags[STARS_NN_vgatherqps] = false; // Gather Packed SP FP Values Using Signed Qword Indices
SMPDefsFlags[STARS_NN_vgatherqpd] = false; // Gather Packed DP FP Values Using Signed Qword Indices
SMPDefsFlags[STARS_NN_vhaddpd] = false; // Add horizontally packed DP FP numbers
SMPDefsFlags[STARS_NN_vhaddps] = false; // Add horizontally packed SP FP numbers
SMPDefsFlags[STARS_NN_vhsubpd] = false; // Sub horizontally packed DP FP numbers
SMPDefsFlags[STARS_NN_vhsubps] = false; // Sub horizontally packed SP FP numbers
SMPDefsFlags[STARS_NN_vinsertf128] = false; // Insert Packed Floating-Point Values
SMPDefsFlags[STARS_NN_vinserti128] = false; // Insert Packed Integer Values
SMPDefsFlags[STARS_NN_vinsertps] = false; // Insert Packed Single Precision Floating-Point Value
SMPDefsFlags[STARS_NN_vlddqu] = false; // Load Unaligned Packed Integer Values
SMPDefsFlags[STARS_NN_vldmxcsr] = false; // Load Streaming SIMD Extensions Technology Control/Status Register
SMPDefsFlags[STARS_NN_vmaskmovdqu] = false; // Store Selected Bytes of Double Quadword with NT Hint
SMPDefsFlags[STARS_NN_vmaskmovpd] = false; // Conditionally Load Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vmaskmovps] = false; // Conditionally Load Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vmaxpd] = false; // Return Maximum Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vmaxps] = false; // Packed Single-FP Maximum
SMPDefsFlags[STARS_NN_vmaxsd] = false; // Return Maximum Scalar Double-Precision Floating-Point Value
SMPDefsFlags[STARS_NN_vmaxss] = false; // Scalar Single-FP Maximum
SMPDefsFlags[STARS_NN_vminpd] = false; // Return Minimum Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vminps] = false; // Packed Single-FP Minimum
SMPDefsFlags[STARS_NN_vminsd] = false; // Return Minimum Scalar Double-Precision Floating-Point Value
SMPDefsFlags[STARS_NN_vminss] = false; // Scalar Single-FP Minimum
SMPDefsFlags[STARS_NN_vmovapd] = false; // Move Aligned Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vmovaps] = false; // Move Aligned Four Packed Single-FP
SMPDefsFlags[STARS_NN_vmovd] = false; // Move 32 bits
SMPDefsFlags[STARS_NN_vmovddup] = false; // Move One Double-FP and Duplicate
SMPDefsFlags[STARS_NN_vmovdqa] = false; // Move Aligned Double Quadword
SMPDefsFlags[STARS_NN_vmovdqu] = false; // Move Unaligned Double Quadword
SMPDefsFlags[STARS_NN_vmovhlps] = false; // Move High to Low Packed Single-FP
SMPDefsFlags[STARS_NN_vmovhpd] = false; // Move High Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vmovhps] = false; // Move High Packed Single-FP
SMPDefsFlags[STARS_NN_vmovlhps] = false; // Move Low to High Packed Single-FP
SMPDefsFlags[STARS_NN_vmovlpd] = false; // Move Low Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vmovlps] = false; // Move Low Packed Single-FP
SMPDefsFlags[STARS_NN_vmovmskpd] = false; // Extract Packed Double-Precision Floating-Point Sign Mask
SMPDefsFlags[STARS_NN_vmovmskps] = false; // Move Mask to Register
SMPDefsFlags[STARS_NN_vmovntdq] = false; // Store Double Quadword Using Non-Temporal Hint
SMPDefsFlags[STARS_NN_vmovntdqa] = false; // Load Double Quadword Non-Temporal Aligned Hint
SMPDefsFlags[STARS_NN_vmovntpd] = false; // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
SMPDefsFlags[STARS_NN_vmovntps] = false; // Move Aligned Four Packed Single-FP Non Temporal
#if (IDA_SDK_VERSION < 700) // Incredibly, these opcodes were removed in IDA Pro 7.0
SMPDefsFlags[STARS_NN_vmovntsd] = false; // Move Non-Temporal Scalar Double-Precision Floating-Point
SMPDefsFlags[STARS_NN_vmovntss] = false; // Move Non-Temporal Scalar Single-Precision Floating-Point
#endif
SMPDefsFlags[STARS_NN_vmovq] = false; // Move 64 bits
SMPDefsFlags[STARS_NN_vmovsd] = false; // Move Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vmovshdup] = false; // Move Packed Single-FP High and Duplicate
SMPDefsFlags[STARS_NN_vmovsldup] = false; // Move Packed Single-FP Low and Duplicate
SMPDefsFlags[STARS_NN_vmovss] = false; // Move Scalar Single-FP
SMPDefsFlags[STARS_NN_vmovupd] = false; // Move Unaligned Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vmovups] = false; // Move Unaligned Four Packed Single-FP
SMPDefsFlags[STARS_NN_vmpsadbw] = false; // Compute Multiple Packed Sums of Absolute Difference
SMPDefsFlags[STARS_NN_vmulpd] = false; // Multiply Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vmulps] = false; // Packed Single-FP Multiply
SMPDefsFlags[STARS_NN_vmulsd] = false; // Multiply Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vmulss] = false; // Scalar Single-FP Multiply
SMPDefsFlags[STARS_NN_vorpd] = false; // Bitwise Logical OR of Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vorps] = false; // Bitwise Logical OR for Single-FP Data
SMPDefsFlags[STARS_NN_vpabsb] = false; // Packed Absolute Value Byte
SMPDefsFlags[STARS_NN_vpabsd] = false; // Packed Absolute Value Doubleword
SMPDefsFlags[STARS_NN_vpabsw] = false; // Packed Absolute Value Word
SMPDefsFlags[STARS_NN_vpackssdw] = false; // Pack with Signed Saturation (Dword->Word)
SMPDefsFlags[STARS_NN_vpacksswb] = false; // Pack with Signed Saturation (Word->Byte)
SMPDefsFlags[STARS_NN_vpackusdw] = false; // Pack with Unsigned Saturation
SMPDefsFlags[STARS_NN_vpackuswb] = false; // Pack with Unsigned Saturation (Word->Byte)
SMPDefsFlags[STARS_NN_vpaddb] = false; // Packed Add Byte
SMPDefsFlags[STARS_NN_vpaddd] = false; // Packed Add Dword
SMPDefsFlags[STARS_NN_vpaddq] = false; // Add Packed Quadword Integers
SMPDefsFlags[STARS_NN_vpaddsb] = false; // Packed Add with Saturation (Byte)
SMPDefsFlags[STARS_NN_vpaddsw] = false; // Packed Add with Saturation (Word)
SMPDefsFlags[STARS_NN_vpaddusb] = false; // Packed Add Unsigned with Saturation (Byte)
SMPDefsFlags[STARS_NN_vpaddusw] = false; // Packed Add Unsigned with Saturation (Word)
SMPDefsFlags[STARS_NN_vpaddw] = false; // Packed Add Word
SMPDefsFlags[STARS_NN_vpalignr] = false; // Packed Align Right
SMPDefsFlags[STARS_NN_vpand] = false; // Bitwise Logical And
SMPDefsFlags[STARS_NN_vpandn] = false; // Bitwise Logical And Not
SMPDefsFlags[STARS_NN_vpavgb] = false; // Packed Average (Byte)
SMPDefsFlags[STARS_NN_vpavgw] = false; // Packed Average (Word)
SMPDefsFlags[STARS_NN_vpblendd] = false; // Blend Packed Dwords
SMPDefsFlags[STARS_NN_vpblendvb] = false; // Variable Blend Packed Bytes
SMPDefsFlags[STARS_NN_vpblendw] = false; // Blend Packed Words
SMPDefsFlags[STARS_NN_vpbroadcastb] = false; // Broadcast a Byte Integer
SMPDefsFlags[STARS_NN_vpbroadcastd] = false; // Broadcast a Dword Integer
SMPDefsFlags[STARS_NN_vpbroadcastq] = false; // Broadcast a Qword Integer
SMPDefsFlags[STARS_NN_vpbroadcastw] = false; // Broadcast a Word Integer
SMPDefsFlags[STARS_NN_vpclmulqdq] = false; // Carry-Less Multiplication Quadword
SMPDefsFlags[STARS_NN_vpcmpeqb] = false; // Packed Compare for Equal (Byte)
SMPDefsFlags[STARS_NN_vpcmpeqd] = false; // Packed Compare for Equal (Dword)
SMPDefsFlags[STARS_NN_vpcmpeqq] = false; // Compare Packed Qword Data for Equal
SMPDefsFlags[STARS_NN_vpcmpeqw] = false; // Packed Compare for Equal (Word)
SMPDefsFlags[STARS_NN_vpcmpestri] = false; // Packed Compare Explicit Length Strings, Return Index
SMPDefsFlags[STARS_NN_vpcmpestrm] = false; // Packed Compare Explicit Length Strings, Return Mask
SMPDefsFlags[STARS_NN_vpcmpgtb] = false; // Packed Compare for Greater Than (Byte)
SMPDefsFlags[STARS_NN_vpcmpgtd] = false; // Packed Compare for Greater Than (Dword)
SMPDefsFlags[STARS_NN_vpcmpgtq] = false; // Compare Packed Data for Greater Than
SMPDefsFlags[STARS_NN_vpcmpgtw] = false; // Packed Compare for Greater Than (Word)
SMPDefsFlags[STARS_NN_vpcmpistri] = false; // Packed Compare Implicit Length Strings, Return Index
SMPDefsFlags[STARS_NN_vpcmpistrm] = false; // Packed Compare Implicit Length Strings, Return Mask
SMPDefsFlags[STARS_NN_vperm2f128] = false; // Permute Floating-Point Values
SMPDefsFlags[STARS_NN_vperm2i128] = false; // Permute Integer Values
SMPDefsFlags[STARS_NN_vpermd] = false; // Full Doublewords Element Permutation
SMPDefsFlags[STARS_NN_vpermilpd] = false; // Permute Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vpermilps] = false; // Permute Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vpermpd] = false; // Permute Double-Precision Floating-Point Elements
SMPDefsFlags[STARS_NN_vpermps] = false; // Permute Single-Precision Floating-Point Elements
SMPDefsFlags[STARS_NN_vpermq] = false; // Qwords Element Permutation
SMPDefsFlags[STARS_NN_vpextrb] = false; // Extract Byte
SMPDefsFlags[STARS_NN_vpextrd] = false; // Extract Dword
SMPDefsFlags[STARS_NN_vpextrq] = false; // Extract Qword
SMPDefsFlags[STARS_NN_vpextrw] = false; // Extract Word
SMPDefsFlags[STARS_NN_vpgatherdd] = false; // Gather Packed Dword Values Using Signed Dword Indices
SMPDefsFlags[STARS_NN_vpgatherdq] = false; // Gather Packed Qword Values Using Signed Dword Indices
SMPDefsFlags[STARS_NN_vpgatherqd] = false; // Gather Packed Dword Values Using Signed Qword Indices
SMPDefsFlags[STARS_NN_vpgatherqq] = false; // Gather Packed Qword Values Using Signed Qword Indices
SMPDefsFlags[STARS_NN_vphaddd] = false; // Packed Horizontal Add Doubleword
SMPDefsFlags[STARS_NN_vphaddsw] = false; // Packed Horizontal Add and Saturate
SMPDefsFlags[STARS_NN_vphaddw] = false; // Packed Horizontal Add Word
SMPDefsFlags[STARS_NN_vphminposuw] = false; // Packed Horizontal Word Minimum
SMPDefsFlags[STARS_NN_vphsubd] = false; // Packed Horizontal Subtract Doubleword
SMPDefsFlags[STARS_NN_vphsubsw] = false; // Packed Horizontal Subtract and Saturate
SMPDefsFlags[STARS_NN_vphsubw] = false; // Packed Horizontal Subtract Word
SMPDefsFlags[STARS_NN_vpinsrb] = false; // Insert Byte
SMPDefsFlags[STARS_NN_vpinsrd] = false; // Insert Dword
SMPDefsFlags[STARS_NN_vpinsrq] = false; // Insert Qword
SMPDefsFlags[STARS_NN_vpinsrw] = false; // Insert Word
SMPDefsFlags[STARS_NN_vpmaddubsw] = false; // Multiply and Add Packed Signed and Unsigned Bytes
SMPDefsFlags[STARS_NN_vpmaddwd] = false; // Packed Multiply and Add
SMPDefsFlags[STARS_NN_vpmaskmovd] = false; // Conditionally Store Dword Values Using Mask
SMPDefsFlags[STARS_NN_vpmaskmovq] = false; // Conditionally Store Qword Values Using Mask
SMPDefsFlags[STARS_NN_vpmaxsb] = false; // Maximum of Packed Signed Byte Integers
SMPDefsFlags[STARS_NN_vpmaxsd] = false; // Maximum of Packed Signed Dword Integers
SMPDefsFlags[STARS_NN_vpmaxsw] = false; // Packed Signed Integer Word Maximum
SMPDefsFlags[STARS_NN_vpmaxub] = false; // Packed Unsigned Integer Byte Maximum
SMPDefsFlags[STARS_NN_vpmaxud] = false; // Maximum of Packed Unsigned Dword Integers
SMPDefsFlags[STARS_NN_vpmaxuw] = false; // Maximum of Packed Word Integers
SMPDefsFlags[STARS_NN_vpminsb] = false; // Minimum of Packed Signed Byte Integers
SMPDefsFlags[STARS_NN_vpminsd] = false; // Minimum of Packed Signed Dword Integers
SMPDefsFlags[STARS_NN_vpminsw] = false; // Packed Signed Integer Word Minimum
SMPDefsFlags[STARS_NN_vpminub] = false; // Packed Unsigned Integer Byte Minimum
SMPDefsFlags[STARS_NN_vpminud] = false; // Minimum of Packed Unsigned Dword Integers
SMPDefsFlags[STARS_NN_vpminuw] = false; // Minimum of Packed Word Integers
SMPDefsFlags[STARS_NN_vpmovmskb] = false; // Move Byte Mask to Integer
SMPDefsFlags[STARS_NN_vpmovsxbd] = false; // Packed Move with Sign Extend
SMPDefsFlags[STARS_NN_vpmovsxbq] = false; // Packed Move with Sign Extend
SMPDefsFlags[STARS_NN_vpmovsxbw] = false; // Packed Move with Sign Extend
SMPDefsFlags[STARS_NN_vpmovsxdq] = false; // Packed Move with Sign Extend
SMPDefsFlags[STARS_NN_vpmovsxwd] = false; // Packed Move with Sign Extend
SMPDefsFlags[STARS_NN_vpmovsxwq] = false; // Packed Move with Sign Extend
SMPDefsFlags[STARS_NN_vpmovzxbd] = false; // Packed Move with Zero Extend
SMPDefsFlags[STARS_NN_vpmovzxbq] = false; // Packed Move with Zero Extend
SMPDefsFlags[STARS_NN_vpmovzxbw] = false; // Packed Move with Zero Extend
SMPDefsFlags[STARS_NN_vpmovzxdq] = false; // Packed Move with Zero Extend
SMPDefsFlags[STARS_NN_vpmovzxwd] = false; // Packed Move with Zero Extend
SMPDefsFlags[STARS_NN_vpmovzxwq] = false; // Packed Move with Zero Extend
SMPDefsFlags[STARS_NN_vpmuldq] = false; // Multiply Packed Signed Dword Integers
SMPDefsFlags[STARS_NN_vpmulhrsw] = false; // Packed Multiply High with Round and Scale
SMPDefsFlags[STARS_NN_vpmulhuw] = false; // Packed Multiply High Unsigned
SMPDefsFlags[STARS_NN_vpmulhw] = false; // Packed Multiply High
SMPDefsFlags[STARS_NN_vpmulld] = false; // Multiply Packed Signed Dword Integers and Store Low Result
SMPDefsFlags[STARS_NN_vpmullw] = false; // Packed Multiply Low
SMPDefsFlags[STARS_NN_vpmuludq] = false; // Multiply Packed Unsigned Doubleword Integers
SMPDefsFlags[STARS_NN_vpor] = false; // Bitwise Logical Or
SMPDefsFlags[STARS_NN_vpsadbw] = false; // Packed Sum of Absolute Differences
SMPDefsFlags[STARS_NN_vpshufb] = false; // Packed Shuffle Bytes
SMPDefsFlags[STARS_NN_vpshufd] = false; // Shuffle Packed Doublewords
SMPDefsFlags[STARS_NN_vpshufhw] = false; // Shuffle Packed High Words
SMPDefsFlags[STARS_NN_vpshuflw] = false; // Shuffle Packed Low Words
SMPDefsFlags[STARS_NN_vpsignb] = false; // Packed SIGN Byte
SMPDefsFlags[STARS_NN_vpsignd] = false; // Packed SIGN Doubleword
SMPDefsFlags[STARS_NN_vpsignw] = false; // Packed SIGN Word
SMPDefsFlags[STARS_NN_vpslld] = false; // Packed Shift Left Logical (Dword)
SMPDefsFlags[STARS_NN_vpslldq] = false; // Shift Double Quadword Left Logical
SMPDefsFlags[STARS_NN_vpsllq] = false; // Packed Shift Left Logical (Qword)
SMPDefsFlags[STARS_NN_vpsllvd] = false; // Variable Bit Shift Left Logical (Dword)
SMPDefsFlags[STARS_NN_vpsllvq] = false; // Variable Bit Shift Left Logical (Qword)
SMPDefsFlags[STARS_NN_vpsllw] = false; // Packed Shift Left Logical (Word)
SMPDefsFlags[STARS_NN_vpsrad] = false; // Packed Shift Right Arithmetic (Dword)
SMPDefsFlags[STARS_NN_vpsravd] = false; // Variable Bit Shift Right Arithmetic
SMPDefsFlags[STARS_NN_vpsraw] = false; // Packed Shift Right Arithmetic (Word)
SMPDefsFlags[STARS_NN_vpsrld] = false; // Packed Shift Right Logical (Dword)
SMPDefsFlags[STARS_NN_vpsrldq] = false; // Shift Double Quadword Right Logical (Qword)
SMPDefsFlags[STARS_NN_vpsrlq] = false; // Packed Shift Right Logical (Qword)
SMPDefsFlags[STARS_NN_vpsrlvd] = false; // Variable Bit Shift Right Logical (Dword)
SMPDefsFlags[STARS_NN_vpsrlvq] = false; // Variable Bit Shift Right Logical (Qword)
SMPDefsFlags[STARS_NN_vpsrlw] = false; // Packed Shift Right Logical (Word)
SMPDefsFlags[STARS_NN_vpsubb] = false; // Packed Subtract Byte
SMPDefsFlags[STARS_NN_vpsubd] = false; // Packed Subtract Dword
SMPDefsFlags[STARS_NN_vpsubq] = false; // Subtract Packed Quadword Integers
SMPDefsFlags[STARS_NN_vpsubsb] = false; // Packed Subtract with Saturation (Byte)
SMPDefsFlags[STARS_NN_vpsubsw] = false; // Packed Subtract with Saturation (Word)
SMPDefsFlags[STARS_NN_vpsubusb] = false; // Packed Subtract Unsigned with Saturation (Byte)
SMPDefsFlags[STARS_NN_vpsubusw] = false; // Packed Subtract Unsigned with Saturation (Word)
SMPDefsFlags[STARS_NN_vpsubw] = false; // Packed Subtract Word
SMPDefsFlags[STARS_NN_vptest] = false; // Logical Compare
SMPDefsFlags[STARS_NN_vpunpckhbw] = false; // Unpack High Packed Data (Byte->Word)
SMPDefsFlags[STARS_NN_vpunpckhdq] = false; // Unpack High Packed Data (Dword->Qword)
SMPDefsFlags[STARS_NN_vpunpckhqdq] = false; // Unpack High Packed Data (Qword->Xmmword)
SMPDefsFlags[STARS_NN_vpunpckhwd] = false; // Unpack High Packed Data (Word->Dword)
SMPDefsFlags[STARS_NN_vpunpcklbw] = false; // Unpack Low Packed Data (Byte->Word)
SMPDefsFlags[STARS_NN_vpunpckldq] = false; // Unpack Low Packed Data (Dword->Qword)
SMPDefsFlags[STARS_NN_vpunpcklqdq] = false; // Unpack Low Packed Data (Qword->Xmmword)
SMPDefsFlags[STARS_NN_vpunpcklwd] = false; // Unpack Low Packed Data (Word->Dword)
SMPDefsFlags[STARS_NN_vpxor] = false; // Bitwise Logical Exclusive Or
SMPDefsFlags[STARS_NN_vrcpps] = false; // Packed Single-FP Reciprocal
SMPDefsFlags[STARS_NN_vrcpss] = false; // Scalar Single-FP Reciprocal
SMPDefsFlags[STARS_NN_vroundpd] = false; // Round Packed Double Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vroundps] = false; // Round Packed Single Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vroundsd] = false; // Round Scalar Double Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vroundss] = false; // Round Scalar Single Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vrsqrtps] = false; // Packed Single-FP Square Root Reciprocal
SMPDefsFlags[STARS_NN_vrsqrtss] = false; // Scalar Single-FP Square Root Reciprocal
SMPDefsFlags[STARS_NN_vshufpd] = false; // Shuffle Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vshufps] = false; // Shuffle Single-FP
SMPDefsFlags[STARS_NN_vsqrtpd] = false; // Compute Square Roots of Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vsqrtps] = false; // Packed Single-FP Square Root
SMPDefsFlags[STARS_NN_vsqrtsd] = false; // Compute Square Rootof Scalar Double-Precision Floating-Point Value
SMPDefsFlags[STARS_NN_vsqrtss] = false; // Scalar Single-FP Square Root
SMPDefsFlags[STARS_NN_vstmxcsr] = false; // Store Streaming SIMD Extensions Technology Control/Status Register
SMPDefsFlags[STARS_NN_vsubpd] = false; // Subtract Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vsubps] = false; // Packed Single-FP Subtract
SMPDefsFlags[STARS_NN_vsubsd] = false; // Subtract Scalar Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vsubss] = false; // Scalar Single-FP Subtract
SMPDefsFlags[STARS_NN_vtestpd] = false; // Packed Double-Precision Floating-Point Bit Test
SMPDefsFlags[STARS_NN_vtestps] = false; // Packed Single-Precision Floating-Point Bit Test
SMPDefsFlags[STARS_NN_vucomisd] = false; // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
SMPDefsFlags[STARS_NN_vucomiss] = false; // Scalar Unordered Single-FP Compare and Set EFLAGS
SMPDefsFlags[STARS_NN_vunpckhpd] = false; // Unpack and Interleave High Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vunpckhps] = false; // Unpack High Packed Single-FP Data
SMPDefsFlags[STARS_NN_vunpcklpd] = false; // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vunpcklps] = false; // Unpack Low Packed Single-FP Data
SMPDefsFlags[STARS_NN_vxorpd] = false; // Bitwise Logical OR of Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vxorps] = false; // Bitwise Logical XOR for Single-FP Data
SMPDefsFlags[STARS_NN_vzeroall] = false; // Zero All YMM Registers
SMPDefsFlags[STARS_NN_vzeroupper] = false; // Zero Upper Bits of YMM Registers
// Transactional Synchronization Extensions
SMPDefsFlags[STARS_NN_xabort] = false; // Transaction Abort
SMPDefsFlags[STARS_NN_xbegin] = false; // Transaction Begin
SMPDefsFlags[STARS_NN_xend] = false; // Transaction End
SMPDefsFlags[STARS_NN_xtest] = false; // Test If In Transactional Execution
// Virtual PC synthetic instructions
SMPDefsFlags[STARS_NN_vmgetinfo] = false; // Virtual PC - Get VM Information
SMPDefsFlags[STARS_NN_vmsetinfo] = false; // Virtual PC - Set VM Information
SMPDefsFlags[STARS_NN_vmdxdsbl] = false; // Virtual PC - Disable Direct Execution
SMPDefsFlags[STARS_NN_vmdxenbl] = false; // Virtual PC - Enable Direct Execution
SMPDefsFlags[STARS_NN_vmcpuid] = false; // Virtual PC - Virtualized CPU Information
SMPDefsFlags[STARS_NN_vmhlt] = false; // Virtual PC - Halt
SMPDefsFlags[STARS_NN_vmsplaf] = false; // Virtual PC - Spin Lock Acquisition Failed
SMPDefsFlags[STARS_NN_vmpushfd] = false; // Virtual PC - Push virtualized flags register
SMPDefsFlags[STARS_NN_vmpopfd] = false; // Virtual PC - Pop virtualized flags register
SMPDefsFlags[STARS_NN_vmcli] = false; // Virtual PC - Clear Interrupt Flag
SMPDefsFlags[STARS_NN_vmsti] = false; // Virtual PC - Set Interrupt Flag
SMPDefsFlags[STARS_NN_vmiretd] = false; // Virtual PC - Return From Interrupt
SMPDefsFlags[STARS_NN_vmsgdt] = false; // Virtual PC - Store Global Descriptor Table
SMPDefsFlags[STARS_NN_vmsidt] = false; // Virtual PC - Store Interrupt Descriptor Table
SMPDefsFlags[STARS_NN_vmsldt] = false; // Virtual PC - Store Local Descriptor Table
SMPDefsFlags[STARS_NN_vmstr] = false; // Virtual PC - Store Task Register
SMPDefsFlags[STARS_NN_vmsdte] = false; // Virtual PC - Store to Descriptor Table Entry
SMPDefsFlags[STARS_NN_vpcext] = false; // Virtual PC - ISA extension
// FMA4
SMPDefsFlags[STARS_NN_vfmaddsubps] = false; // Multiply with Alternating Add/Subtract of Packed Single-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfmaddsubpd] = false; // Multiply with Alternating Add/Subtract of Packed Double-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfmsubaddps] = false; // Multiply with Alternating Subtract/Add of Packed Single-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfmsubaddpd] = false; // Multiply with Alternating Subtract/Add of Packed Double-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfmaddps] = false; // Multiply and Add Packed Single-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfmaddpd] = false; // Multiply and Add Packed Double-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfmaddss] = false; // Multiply and Add Scalar Single-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfmaddsd] = false; // Multiply and Add Scalar Double-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfmsubps] = false; // Multiply and Subtract Packed Single-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfmsubpd] = false; // Multiply and Subtract Packed Double-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfmsubss] = false; // Multiply and Subtract Scalar Single-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfmsubsd] = false; // Multiply and Subtract Scalar Double-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfnmaddps] = false; // Negative Multiply and Add Packed Single-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfnmaddpd] = false; // Negative Multiply and Add Packed Double-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfnmaddss] = false; // Negative Multiply and Add Scalar Single-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfnmaddsd] = false; // Negative Multiply and Add Double Single-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfnmsubps] = false; // Negative Multiply and Subtract Packed Single-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfnmsubpd] = false; // Negative Multiply and Subtract Packed Double-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfnmsubss] = false; // Negative Multiply and Subtract Scalar Single-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfnmsubsd] = false; // Negative Multiply and Subtract Double Single-Precision Floating-Point
// Intel Memory Protection Extensions (MPX)
SMPDefsFlags[STARS_NN_bndmk] = false; // Make Bounds
SMPDefsFlags[STARS_NN_bndcl] = false; // Check Lower Bound
SMPDefsFlags[STARS_NN_bndcu] = false; // Check Upper Bound
SMPDefsFlags[STARS_NN_bndcn] = false; // Check Upper Bound
SMPDefsFlags[STARS_NN_bndmov] = false; // Move Bounds
SMPDefsFlags[STARS_NN_bndldx] = false; // Load Extended Bounds Using Address Translation
SMPDefsFlags[STARS_NN_bndstx] = false; // Store Extended Bounds Using Address Translation
// New xstate instructions
SMPDefsFlags[STARS_NN_xrstors] = false; // Restore Processor Extended States Supervisor
SMPDefsFlags[STARS_NN_xsavec] = false; // Save Processor Extended States with Compaction
SMPDefsFlags[STARS_NN_xsaves] = false; // Save Processor Extended States Supervisor
// PREFETCHWT1 support
SMPDefsFlags[STARS_NN_prefetchwt1] = true; // Prefetch Vector Data Into Caches with Intent to Write and T1 Hint
// Memory instructions
SMPDefsFlags[STARS_NN_clflushopt] = false; // Flush a Cache Line Optimized
SMPDefsFlags[STARS_NN_clwb] = false; // Cache Line Write Back
SMPDefsFlags[STARS_NN_pcommit] = false; // Persistent Commit (deprecated by Intel)
// Protection Key Rights for User Pages
SMPDefsFlags[STARS_NN_rdpkru] = false; // Read Protection Key Rights for User Pages
SMPDefsFlags[STARS_NN_wrpkru] = false; // Write Data to User Page Key Register
// AVX comparison pseudo-ops
SMPDefsFlags[STARS_NN_vcmpeqpd] = false; // Compare Packed Double-Precision Floating-Point Values - Equal (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpltpd] = false; // Compare Packed Double-Precision Floating-Point Values - Less-than (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmplepd] = false; // Compare Packed Double-Precision Floating-Point Values - Less-than-or-equal (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmpunordpd] = false; // Compare Packed Double-Precision Floating-Point Values - Unordered (non-signaling)
SMPDefsFlags[STARS_NN_vcmpneqpd] = false; // Compare Packed Double-Precision Floating-Point Values - Not-equal (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpnltpd] = false; // Compare Packed Double-Precision Floating-Point Values - Not-less-than (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpnlepd] = false; // Compare Packed Double-Precision Floating-Point Values - Not-less-than-or-equal (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpordpd] = false; // Compare Packed Double-Precision Floating-Point Values - Ordered (non-signaling)
SMPDefsFlags[STARS_NN_vcmpeq_uqpd] = false; // Compare Packed Double-Precision Floating-Point Values - Equal (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpngepd] = false; // Compare Packed Double-Precision Floating-Point Values - Not-greater-than-or-equal (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpngtpd] = false; // Compare Packed Double-Precision Floating-Point Values - Not-greater-than (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpfalsepd] = false; // Compare Packed Double-Precision Floating-Point Values - False (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpneq_oqpd] = false; // Compare Packed Double-Precision Floating-Point Values - Not-equal (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpgepd] = false; // Compare Packed Double-Precision Floating-Point Values - Greater-than-or-equal (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmpgtpd] = false; // Compare Packed Double-Precision Floating-Point Values - Greater-than (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmptruepd] = false; // Compare Packed Double-Precision Floating-Point Values - True (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpeq_ospd] = false; // Compare Packed Double-Precision Floating-Point Values - Equal (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmplt_oqpd] = false; // Compare Packed Double-Precision Floating-Point Values - Less-than (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmple_oqpd] = false; // Compare Packed Double-Precision Floating-Point Values - Less-than-or-equal (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpunord_spd] = false; // Compare Packed Double-Precision Floating-Point Values - Unordered (signaling)
SMPDefsFlags[STARS_NN_vcmpneq_uspd] = false; // Compare Packed Double-Precision Floating-Point Values - Not-equal (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpnlt_uqpd] = false; // Compare Packed Double-Precision Floating-Point Values - Not-less-than (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpnle_uqpd] = false; // Compare Packed Double-Precision Floating-Point Values - Not-less-than-or-equal (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpord_spd] = false; // Compare Packed Double-Precision Floating-Point Values - Ordered (signaling)
SMPDefsFlags[STARS_NN_vcmpeq_uspd] = false; // Compare Packed Double-Precision Floating-Point Values - Equal (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpnge_uqpd] = false; // Compare Packed Double-Precision Floating-Point Values - Not-greater-than-or-equal (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpngt_uqpd] = false; // Compare Packed Double-Precision Floating-Point Values - Not-greater-than (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpfalse_ospd] = false; // Compare Packed Double-Precision Floating-Point Values - False (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmpneq_ospd] = false; // Compare Packed Double-Precision Floating-Point Values - Not-equal (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmpge_oqpd] = false; // Compare Packed Double-Precision Floating-Point Values - Greater-than-or-equal (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpgt_oqpd] = false; // Compare Packed Double-Precision Floating-Point Values - Greater-than (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmptrue_uspd] = false; // Compare Packed Double-Precision Floating-Point Values - True (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpeqps] = false; // Packed Single-FP Compare - Equal (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpltps] = false; // Packed Single-FP Compare - Less-than (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmpleps] = false; // Packed Single-FP Compare - Less-than-or-equal (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmpunordps] = false; // Packed Single-FP Compare - Unordered (non-signaling)
SMPDefsFlags[STARS_NN_vcmpneqps] = false; // Packed Single-FP Compare - Not-equal (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpnltps] = false; // Packed Single-FP Compare - Not-less-than (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpnleps] = false; // Packed Single-FP Compare - Not-less-than-or-equal (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpordps] = false; // Packed Single-FP Compare - Ordered (non-signaling)
SMPDefsFlags[STARS_NN_vcmpeq_uqps] = false; // Packed Single-FP Compare - Equal (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpngeps] = false; // Packed Single-FP Compare - Not-greater-than-or-equal (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpngtps] = false; // Packed Single-FP Compare - Not-greater-than (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpfalseps] = false; // Packed Single-FP Compare - False (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpneq_oqps] = false; // Packed Single-FP Compare - Not-equal (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpgeps] = false; // Packed Single-FP Compare - Greater-than-or-equal (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmpgtps] = false; // Packed Single-FP Compare - Greater-than (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmptrueps] = false; // Packed Single-FP Compare - True (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpeq_osps] = false; // Packed Single-FP Compare - Equal (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmplt_oqps] = false; // Packed Single-FP Compare - Less-than (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmple_oqps] = false; // Packed Single-FP Compare - Less-than-or-equal (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpunord_sps] = false; // Packed Single-FP Compare - Unordered (signaling)
SMPDefsFlags[STARS_NN_vcmpneq_usps] = false; // Packed Single-FP Compare - Not-equal (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpnlt_uqps] = false; // Packed Single-FP Compare - Not-less-than (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpnle_uqps] = false; // Packed Single-FP Compare - Not-less-than-or-equal (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpord_sps] = false; // Packed Single-FP Compare - Ordered (signaling)
SMPDefsFlags[STARS_NN_vcmpeq_usps] = false; // Packed Single-FP Compare - Equal (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpnge_uqps] = false; // Packed Single-FP Compare - Not-greater-than-or-equal (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpngt_uqps] = false; // Packed Single-FP Compare - Not-greater-than (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpfalse_osps] = false; // Packed Single-FP Compare - False (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmpneq_osps] = false; // Packed Single-FP Compare - Not-equal (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmpge_oqps] = false; // Packed Single-FP Compare - Greater-than-or-equal (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpgt_oqps] = false; // Packed Single-FP Compare - Greater-than (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmptrue_usps] = false; // Packed Single-FP Compare - True (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpeqsd] = false; // Compare Scalar Double-Precision Floating-Point Values - Equal (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpltsd] = false; // Compare Scalar Double-Precision Floating-Point Values - Less-than (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmplesd] = false; // Compare Scalar Double-Precision Floating-Point Values - Less-than-or-equal (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmpunordsd] = false; // Compare Scalar Double-Precision Floating-Point Values - Unordered (non-signaling)
SMPDefsFlags[STARS_NN_vcmpneqsd] = false; // Compare Scalar Double-Precision Floating-Point Values - Not-equal (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpnltsd] = false; // Compare Scalar Double-Precision Floating-Point Values - Not-less-than (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpnlesd] = false; // Compare Scalar Double-Precision Floating-Point Values - Not-less-than-or-equal (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpordsd] = false; // Compare Scalar Double-Precision Floating-Point Values - Ordered (non-signaling)
SMPDefsFlags[STARS_NN_vcmpeq_uqsd] = false; // Compare Scalar Double-Precision Floating-Point Values - Equal (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpngesd] = false; // Compare Scalar Double-Precision Floating-Point Values - Not-greater-than-or-equal (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpngtsd] = false; // Compare Scalar Double-Precision Floating-Point Values - Not-greater-than (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpfalsesd] = false; // Compare Scalar Double-Precision Floating-Point Values - False (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpneq_oqsd] = false; // Compare Scalar Double-Precision Floating-Point Values - Not-equal (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpgesd] = false; // Compare Scalar Double-Precision Floating-Point Values - Greater-than-or-equal (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmpgtsd] = false; // Compare Scalar Double-Precision Floating-Point Values - Greater-than (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmptruesd] = false; // Compare Scalar Double-Precision Floating-Point Values - True (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpeq_ossd] = false; // Compare Scalar Double-Precision Floating-Point Values - Equal (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmplt_oqsd] = false; // Compare Scalar Double-Precision Floating-Point Values - Less-than (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmple_oqsd] = false; // Compare Scalar Double-Precision Floating-Point Values - Less-than-or-equal (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpunord_ssd] = false; // Compare Scalar Double-Precision Floating-Point Values - Unordered (signaling)
SMPDefsFlags[STARS_NN_vcmpneq_ussd] = false; // Compare Scalar Double-Precision Floating-Point Values - Not-equal (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpnlt_uqsd] = false; // Compare Scalar Double-Precision Floating-Point Values - Not-less-than (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpnle_uqsd] = false; // Compare Scalar Double-Precision Floating-Point Values - Not-less-than-or-equal (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpord_ssd] = false; // Compare Scalar Double-Precision Floating-Point Values - Ordered (signaling)
SMPDefsFlags[STARS_NN_vcmpeq_ussd] = false; // Compare Scalar Double-Precision Floating-Point Values - Equal (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpnge_uqsd] = false; // Compare Scalar Double-Precision Floating-Point Values - Not-greater-than-or-equal (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpngt_uqsd] = false; // Compare Scalar Double-Precision Floating-Point Values - Not-greater-than (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpfalse_ossd] = false; // Compare Scalar Double-Precision Floating-Point Values - False (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmpneq_ossd] = false; // Compare Scalar Double-Precision Floating-Point Values - Not-equal (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmpge_oqsd] = false; // Compare Scalar Double-Precision Floating-Point Values - Greater-than-or-equal (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpgt_oqsd] = false; // Compare Scalar Double-Precision Floating-Point Values - Greater-than (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmptrue_ussd] = false; // Compare Scalar Double-Precision Floating-Point Values - True (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpeqss] = false; // Scalar Single-FP Compare - Equal (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpltss] = false; // Scalar Single-FP Compare - Less-than (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmpless] = false; // Scalar Single-FP Compare - Less-than-or-equal (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmpunordss] = false; // Scalar Single-FP Compare - Unordered (non-signaling)
SMPDefsFlags[STARS_NN_vcmpneqss] = false; // Scalar Single-FP Compare - Not-equal (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpnltss] = false; // Scalar Single-FP Compare - Not-less-than (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpnless] = false; // Scalar Single-FP Compare - Not-less-than-or-equal (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpordss] = false; // Scalar Single-FP Compare - Ordered (non-signaling)
SMPDefsFlags[STARS_NN_vcmpeq_uqss] = false; // Scalar Single-FP Compare - Equal (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpngess] = false; // Scalar Single-FP Compare - Not-greater-than-or-equal (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpngtss] = false; // Scalar Single-FP Compare - Not-greater-than (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpfalsess] = false; // Scalar Single-FP Compare - False (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpneq_oqss] = false; // Scalar Single-FP Compare - Not-equal (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpgess] = false; // Scalar Single-FP Compare - Greater-than-or-equal (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmpgtss] = false; // Scalar Single-FP Compare - Greater-than (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmptruess] = false; // Scalar Single-FP Compare - True (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpeq_osss] = false; // Scalar Single-FP Compare - Equal (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmplt_oqss] = false; // Scalar Single-FP Compare - Less-than (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmple_oqss] = false; // Scalar Single-FP Compare - Less-than-or-equal (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpunord_sss] = false; // Scalar Single-FP Compare - Unordered (signaling)
SMPDefsFlags[STARS_NN_vcmpneq_usss] = false; // Scalar Single-FP Compare - Not-equal (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpnlt_uqss] = false; // Scalar Single-FP Compare - Not-less-than (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpnle_uqss] = false; // Scalar Single-FP Compare - Not-less-than-or-equal (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpord_sss] = false; // Scalar Single-FP Compare - Ordered (signaling)
SMPDefsFlags[STARS_NN_vcmpeq_usss] = false; // Scalar Single-FP Compare - Equal (unordered, signaling)
SMPDefsFlags[STARS_NN_vcmpnge_uqss] = false; // Scalar Single-FP Compare - Not-greater-than-or-equal (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpngt_uqss] = false; // Scalar Single-FP Compare - Not-greater-than (unordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpfalse_osss] = false; // Scalar Single-FP Compare - False (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmpneq_osss] = false; // Scalar Single-FP Compare - Not-equal (ordered, signaling)
SMPDefsFlags[STARS_NN_vcmpge_oqss] = false; // Scalar Single-FP Compare - Greater-than-or-equal (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmpgt_oqss] = false; // Scalar Single-FP Compare - Greater-than (ordered, non-signaling)
SMPDefsFlags[STARS_NN_vcmptrue_usss] = false; // Scalar Single-FP Compare - True (unordered, signaling)
// AVX-512 instructions
SMPDefsFlags[STARS_NN_valignd] = false; // Align Doubleword Vectors
SMPDefsFlags[STARS_NN_valignq] = false; // Align Quadword Vectors
SMPDefsFlags[STARS_NN_vblendmpd] = false; // Blend Float64 Vectors Using an OpMask Control
SMPDefsFlags[STARS_NN_vblendmps] = false; // Blend Float32 Vectors Using an OpMask Control
SMPDefsFlags[STARS_NN_vpblendmb] = false; // Blend Byte Vectors Using an Opmask Control
SMPDefsFlags[STARS_NN_vpblendmw] = false; // Blend Word Vectors Using an Opmask Control
SMPDefsFlags[STARS_NN_vpblendmd] = false; // Blend Int32 Vectors Using an OpMask Control
SMPDefsFlags[STARS_NN_vpblendmq] = false; // Blend Int64 Vectors Using an OpMask Control
SMPDefsFlags[STARS_NN_vbroadcastf32x2] = false; // Load with Broadcast Floating-Point Data
SMPDefsFlags[STARS_NN_vbroadcastf32x4] = false; // Load with Broadcast Floating-Point Data
SMPDefsFlags[STARS_NN_vbroadcastf64x2] = false; // Load with Broadcast Floating-Point Data
SMPDefsFlags[STARS_NN_vbroadcastf32x8] = false; // Load with Broadcast Floating-Point Data
SMPDefsFlags[STARS_NN_vbroadcastf64x4] = false; // Load with Broadcast Floating-Point Data
SMPDefsFlags[STARS_NN_vbroadcasti32x2] = false; // Load Integer and Broadcast
SMPDefsFlags[STARS_NN_vbroadcasti32x4] = false; // Load Integer and Broadcast
SMPDefsFlags[STARS_NN_vbroadcasti64x2] = false; // Load Integer and Broadcast
SMPDefsFlags[STARS_NN_vbroadcasti32x8] = false; // Load Integer and Broadcast
SMPDefsFlags[STARS_NN_vbroadcasti64x4] = false; // Load Integer and Broadcast
SMPDefsFlags[STARS_NN_vcompresspd] = false; // Store Sparse Packed Double-Precision Floating-Point Values into Dense Memory
SMPDefsFlags[STARS_NN_vcompressps] = false; // Store Sparse Packed Single-Precision Floating-Point Values into Dense Memory
SMPDefsFlags[STARS_NN_vcvtpd2qq] = false; // Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers
SMPDefsFlags[STARS_NN_vcvtpd2udq] = false; // Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers
SMPDefsFlags[STARS_NN_vcvtpd2uqq] = false; // Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers
SMPDefsFlags[STARS_NN_vcvtps2udq] = false; // Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values
SMPDefsFlags[STARS_NN_vcvtps2qq] = false; // Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values
SMPDefsFlags[STARS_NN_vcvtps2uqq] = false; // Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values
SMPDefsFlags[STARS_NN_vcvtqq2pd] = false; // Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vcvtqq2ps] = false; // Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vcvtsd2usi] = false; // Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer
SMPDefsFlags[STARS_NN_vcvtss2usi] = false; // Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer
SMPDefsFlags[STARS_NN_vcvttpd2qq] = false; // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers
SMPDefsFlags[STARS_NN_vcvttpd2udq] = false; // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers
SMPDefsFlags[STARS_NN_vcvttpd2uqq] = false; // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers
SMPDefsFlags[STARS_NN_vcvttps2udq] = false; // Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values
SMPDefsFlags[STARS_NN_vcvttps2qq] = false; // Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values
SMPDefsFlags[STARS_NN_vcvttps2uqq] = false; // Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values
SMPDefsFlags[STARS_NN_vcvttsd2usi] = false; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer
SMPDefsFlags[STARS_NN_vcvttss2usi] = false; // Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer
SMPDefsFlags[STARS_NN_vcvtudq2pd] = false; // Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vcvtudq2ps] = false; // Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vcvtuqq2pd] = false; // Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vcvtuqq2ps] = false; // Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vcvtusi2sd] = false; // Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value
SMPDefsFlags[STARS_NN_vcvtusi2ss] = false; // Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value
SMPDefsFlags[STARS_NN_vdbpsadbw] = false; // Double Block Packed Sum-Absolute-Differences (SAD) on Unsigned Bytes
SMPDefsFlags[STARS_NN_vexpandpd] = false; // Load Sparse Packed Double-Precision Floating-Point Values from Dense Memory
SMPDefsFlags[STARS_NN_vexpandps] = false; // Load Sparse Packed Single-Precision Floating-Point Values from Dense Memory
SMPDefsFlags[STARS_NN_vextractf32x4] = false; // Extract Packed Floating-Point Values
SMPDefsFlags[STARS_NN_vextractf64x2] = false; // Extract Packed Floating-Point Values
SMPDefsFlags[STARS_NN_vextractf32x8] = false; // Extract Packed Floating-Point Values
SMPDefsFlags[STARS_NN_vextractf64x4] = false; // Extract Packed Floating-Point Values
SMPDefsFlags[STARS_NN_vextracti32x4] = false; // Extract packed Integer Values
SMPDefsFlags[STARS_NN_vextracti64x2] = false; // Extract packed Integer Values
SMPDefsFlags[STARS_NN_vextracti32x8] = false; // Extract packed Integer Values
SMPDefsFlags[STARS_NN_vextracti64x4] = false; // Extract packed Integer Values
SMPDefsFlags[STARS_NN_vfixupimmpd] = false; // Fix Up Special Packed Float64 Values
SMPDefsFlags[STARS_NN_vfixupimmps] = false; // Fix Up Special Packed Float32 Values
SMPDefsFlags[STARS_NN_vfixupimmsd] = false; // Fix Up Special Scalar Float64 Value
SMPDefsFlags[STARS_NN_vfixupimmss] = false; // Fix Up Special Scalar Float32 Value
SMPDefsFlags[STARS_NN_vfpclasspd] = false; // Tests Types Of a Packed Float64 Values
SMPDefsFlags[STARS_NN_vfpclassps] = false; // Tests Types Of a Packed Float32 Values
SMPDefsFlags[STARS_NN_vfpclasssd] = false; // Tests Types Of a Scalar Float64 Values
SMPDefsFlags[STARS_NN_vfpclassss] = false; // Tests Types Of a Scalar Float32 Values
SMPDefsFlags[STARS_NN_vgetexppd] = false; // Convert Exponents of Packed DP FP Values to DP FP Values
SMPDefsFlags[STARS_NN_vgetexpps] = false; // Convert Exponents of Packed SP FP Values to SP FP Values
SMPDefsFlags[STARS_NN_vgetexpsd] = false; // Convert Exponents of Scalar DP FP Values to DP FP Value
SMPDefsFlags[STARS_NN_vgetexpss] = false; // Convert Exponents of Scalar SP FP Values to SP FP Value
SMPDefsFlags[STARS_NN_vgetmantpd] = false; // Extract Float64 Vector of Normalized Mantissas from Float64 Vector
SMPDefsFlags[STARS_NN_vgetmantps] = false; // Extract Float32 Vector of Normalized Mantissas from Float32 Vector
SMPDefsFlags[STARS_NN_vgetmantsd] = false; // Extract Float64 of Normalized Mantissas from Float64 Scalar
SMPDefsFlags[STARS_NN_vgetmantss] = false; // Extract Float32 Vector of Normalized Mantissa from Float32 Vector
SMPDefsFlags[STARS_NN_vinsertf32x4] = false; // Insert Packed Floating-Point Values
SMPDefsFlags[STARS_NN_vinsertf64x2] = false; // Insert Packed Floating-Point Values
SMPDefsFlags[STARS_NN_vinsertf32x8] = false; // Insert Packed Floating-Point Values
SMPDefsFlags[STARS_NN_vinsertf64x4] = false; // Insert Packed Floating-Point Values
SMPDefsFlags[STARS_NN_vinserti32x4] = false; // Insert Packed Integer Values
SMPDefsFlags[STARS_NN_vinserti64x2] = false; // Insert Packed Integer Values
SMPDefsFlags[STARS_NN_vinserti32x8] = false; // Insert Packed Integer Values
SMPDefsFlags[STARS_NN_vinserti64x4] = false; // Insert Packed Integer Values
SMPDefsFlags[STARS_NN_vmovdqa32] = false; // Move Aligned Packed Integer Values
SMPDefsFlags[STARS_NN_vmovdqa64] = false; // Move Aligned Packed Integer Values
SMPDefsFlags[STARS_NN_vmovdqu8] = false; // Move Unaligned Packed Integer Values
SMPDefsFlags[STARS_NN_vmovdqu16] = false; // Move Unaligned Packed Integer Values
SMPDefsFlags[STARS_NN_vmovdqu32] = false; // Move Unaligned Packed Integer Values
SMPDefsFlags[STARS_NN_vmovdqu64] = false; // Move Unaligned Packed Integer Values
SMPDefsFlags[STARS_NN_vpabsq] = false; // Packed Absolute Value
SMPDefsFlags[STARS_NN_vpandd] = false; // Logical AND
SMPDefsFlags[STARS_NN_vpandq] = false; // Logical AND
SMPDefsFlags[STARS_NN_vpandnd] = false; // Logical AND NOT
SMPDefsFlags[STARS_NN_vpandnq] = false; // Logical AND NOT
SMPDefsFlags[STARS_NN_vpbroadcastmb2q] = false; // Broadcast Mask to Vector Register
SMPDefsFlags[STARS_NN_vpbroadcastmw2d] = false; // Broadcast Mask to Vector Register
SMPDefsFlags[STARS_NN_vpcmpb] = false; // Compare Packed Byte Values Into Mask
SMPDefsFlags[STARS_NN_vpcmpub] = false; // Compare Packed Byte Values Into Mask
SMPDefsFlags[STARS_NN_vpcmpd] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpud] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpq] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpuq] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpw] = false; // Compare Packed Word Values Into Mask
SMPDefsFlags[STARS_NN_vpcmpuw] = false; // Compare Packed Word Values Into Mask
SMPDefsFlags[STARS_NN_vpcompressd] = false; // Store Sparse Packed Doubleword Integer Values into Dense Memory/Register
SMPDefsFlags[STARS_NN_vpcompressq] = false; // Store Sparse Packed Quadword Integer Values into Dense Memory/Register
SMPDefsFlags[STARS_NN_vpconflictd] = false; // Detect Conflicts Within a Vector of Packed Dword Values into Dense Memory/Register
SMPDefsFlags[STARS_NN_vpconflictq] = false; // Detect Conflicts Within a Vector of Packed Qword Values into Dense Memory/Register
SMPDefsFlags[STARS_NN_vpermb] = false; // Permute Packed Bytes Elements
SMPDefsFlags[STARS_NN_vpermw] = false; // Permute Packed Words Elements
SMPDefsFlags[STARS_NN_vpermi2b] = false; // Full Permute of Bytes From Two Tables Overwriting the Index
SMPDefsFlags[STARS_NN_vpermi2w] = false; // Full Permute From Two Tables Overwriting the Index
SMPDefsFlags[STARS_NN_vpermi2d] = false; // Full Permute From Two Tables Overwriting the Index
SMPDefsFlags[STARS_NN_vpermi2q] = false; // Full Permute From Two Tables Overwriting the Index
SMPDefsFlags[STARS_NN_vpermi2ps] = false; // Full Permute From Two Tables Overwriting the Index
SMPDefsFlags[STARS_NN_vpermi2pd] = false; // Full Permute From Two Tables Overwriting the Index
SMPDefsFlags[STARS_NN_vpermt2b] = false; // Full Permute of Bytes From Two Tables Overwriting a Table
SMPDefsFlags[STARS_NN_vpermt2w] = false; // Full Permute from Two Tables Overwriting one Table
SMPDefsFlags[STARS_NN_vpermt2d] = false; // Full Permute from Two Tables Overwriting one Table
SMPDefsFlags[STARS_NN_vpermt2q] = false; // Full Permute from Two Tables Overwriting one Table
SMPDefsFlags[STARS_NN_vpermt2ps] = false; // Full Permute from Two Tables Overwriting one Table
SMPDefsFlags[STARS_NN_vpermt2pd] = false; // Full Permute from Two Tables Overwriting one Table
SMPDefsFlags[STARS_NN_vpexpandd] = false; // Load Sparse Packed Doubleword Integer Values from Dense Memory/Register
SMPDefsFlags[STARS_NN_vpexpandq] = false; // Load Sparse Packed Quadword Integer Values from Dense Memory/Register
SMPDefsFlags[STARS_NN_vplzcntd] = false; // Count the Number of Leading Zero Bits for Packed Dword Values
SMPDefsFlags[STARS_NN_vplzcntq] = false; // Count the Number of Leading Zero Bits for Packed Qword Values
SMPDefsFlags[STARS_NN_vpmadd52luq] = false; // Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Qword Accumulators
SMPDefsFlags[STARS_NN_vpmadd52huq] = false; // Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to 64-bit Accumulators
SMPDefsFlags[STARS_NN_vpmaxsq] = false; // Maximum of Packed Signed Integers
SMPDefsFlags[STARS_NN_vpmaxuq] = false; // Maximum of Packed Unsigned Integers
SMPDefsFlags[STARS_NN_vpminsq] = false; // Minimum of Packed Signed Integers
SMPDefsFlags[STARS_NN_vpminuq] = false; // Minimum of Packed Unsigned Integers
SMPDefsFlags[STARS_NN_vpmovm2b] = false; // Convert a Mask Register to a Vector Register
SMPDefsFlags[STARS_NN_vpmovm2w] = false; // Convert a Mask Register to a Vector Register
SMPDefsFlags[STARS_NN_vpmovm2d] = false; // Convert a Mask Register to a Vector Register
SMPDefsFlags[STARS_NN_vpmovm2q] = false; // Convert a Mask Register to a Vector Register
SMPDefsFlags[STARS_NN_vpmovb2m] = false; // Convert a Vector Register to a Mask
SMPDefsFlags[STARS_NN_vpmovw2m] = false; // Convert a Vector Register to a Mask
SMPDefsFlags[STARS_NN_vpmovd2m] = false; // Convert a Vector Register to a Mask
SMPDefsFlags[STARS_NN_vpmovq2m] = false; // Convert a Vector Register to a Mask
SMPDefsFlags[STARS_NN_vpmovqb] = false; // Down Convert QWord to Byte
SMPDefsFlags[STARS_NN_vpmovsqb] = false; // Down Convert QWord to Byte
SMPDefsFlags[STARS_NN_vpmovusqb] = false; // Down Convert QWord to Byte
SMPDefsFlags[STARS_NN_vpmovqw] = false; // Down Convert QWord to Word
SMPDefsFlags[STARS_NN_vpmovsqw] = false; // Down Convert QWord to Word
SMPDefsFlags[STARS_NN_vpmovusqw] = false; // Down Convert QWord to Word
SMPDefsFlags[STARS_NN_vpmovqd] = false; // Down Convert QWord to DWord
SMPDefsFlags[STARS_NN_vpmovsqd] = false; // Down Convert QWord to DWord
SMPDefsFlags[STARS_NN_vpmovusqd] = false; // Down Convert QWord to DWord
SMPDefsFlags[STARS_NN_vpmovdb] = false; // Down Convert DWord to Byte
SMPDefsFlags[STARS_NN_vpmovsdb] = false; // Down Convert DWord to Byte
SMPDefsFlags[STARS_NN_vpmovusdb] = false; // Down Convert DWord to Byte
SMPDefsFlags[STARS_NN_vpmovdw] = false; // Down Convert DWord to Word
SMPDefsFlags[STARS_NN_vpmovsdw] = false; // Down Convert DWord to Word
SMPDefsFlags[STARS_NN_vpmovusdw] = false; // Down Convert DWord to Word
SMPDefsFlags[STARS_NN_vpmovwb] = false; // Down Convert Word to Byte
SMPDefsFlags[STARS_NN_vpmovswb] = false; // Down Convert Word to Byte
SMPDefsFlags[STARS_NN_vpmovuswb] = false; // Down Convert Word to Byte
SMPDefsFlags[STARS_NN_vpmullq] = false; // Multiply Packed Integers and Store Low Result
SMPDefsFlags[STARS_NN_vpmultishiftqb] = false; // Select Packed Unaligned Bytes from Quadword Sources
SMPDefsFlags[STARS_NN_vpord] = false; // Bitwise Logical Or
SMPDefsFlags[STARS_NN_vporq] = false; // Bitwise Logical Or
SMPDefsFlags[STARS_NN_vprold] = false; // Bit Rotate Left
SMPDefsFlags[STARS_NN_vprolvd] = false; // Bit Rotate Left
SMPDefsFlags[STARS_NN_vprolq] = false; // Bit Rotate Left
SMPDefsFlags[STARS_NN_vprolvq] = false; // Bit Rotate Left
SMPDefsFlags[STARS_NN_vprord] = false; // Bit Rotate Right
SMPDefsFlags[STARS_NN_vprorvd] = false; // Bit Rotate Right
SMPDefsFlags[STARS_NN_vprorq] = false; // Bit Rotate Right
SMPDefsFlags[STARS_NN_vprorvq] = false; // Bit Rotate Right
SMPDefsFlags[STARS_NN_vpscatterdd] = false; // Scatter Packed Dword with Signed Dword
SMPDefsFlags[STARS_NN_vpscatterdq] = false; // Scatter Packed Qword with Signed Qword Indices
SMPDefsFlags[STARS_NN_vpscatterqd] = false; // Scatter Packed Dword with Signed Dword
SMPDefsFlags[STARS_NN_vpscatterqq] = false; // Scatter Packed Qword with Signed Qword Indices
SMPDefsFlags[STARS_NN_vpsraq] = false; // Bit Shift Arithmetic Right
SMPDefsFlags[STARS_NN_vpsllvw] = false; // Variable Bit Shift Left Logical
SMPDefsFlags[STARS_NN_vpsrlvw] = false; // Variable Bit Shift Right Logical
SMPDefsFlags[STARS_NN_vptestnmb] = false; // Logical NAND and Set
SMPDefsFlags[STARS_NN_vptestnmw] = false; // Logical NAND and Set
SMPDefsFlags[STARS_NN_vptestnmd] = false; // Logical NAND and Set
SMPDefsFlags[STARS_NN_vptestnmq] = false; // Logical NAND and Set
SMPDefsFlags[STARS_NN_vshuff32x4] = false; // Shuffle Packed Values at 128-bit Granularity
SMPDefsFlags[STARS_NN_vshuff64x2] = false; // Shuffle Packed Values at 128-bit Granularity
SMPDefsFlags[STARS_NN_vshufi32x4] = false; // Shuffle Packed Values at 128-bit Granularity
SMPDefsFlags[STARS_NN_vshufi64x2] = false; // Shuffle Packed Values at 128-bit Granularity
SMPDefsFlags[STARS_NN_vpternlogd] = false; // Bitwise Ternary Logic
SMPDefsFlags[STARS_NN_vpternlogq] = false; // Bitwise Ternary Logic
SMPDefsFlags[STARS_NN_vptestmb] = false; // Logical AND and Set Mask
SMPDefsFlags[STARS_NN_vptestmw] = false; // Logical AND and Set Mask
SMPDefsFlags[STARS_NN_vptestmd] = false; // Logical AND and Set Mask
SMPDefsFlags[STARS_NN_vptestmq] = false; // Logical AND and Set Mask
SMPDefsFlags[STARS_NN_vpsravw] = false; // Variable Bit Shift Right Arithmetic
SMPDefsFlags[STARS_NN_vpsravq] = false; // Variable Bit Shift Right Arithmetic
SMPDefsFlags[STARS_NN_vpxord] = false; // Exclusive Or
SMPDefsFlags[STARS_NN_vpxorq] = false; // Exclusive Or
SMPDefsFlags[STARS_NN_vrangepd] = false; // Range Restriction Calculation For Packed Pairs of Float64 Values
SMPDefsFlags[STARS_NN_vrangeps] = false; // Range Restriction Calculation For Packed Pairs of Float32 Values
SMPDefsFlags[STARS_NN_vrangesd] = false; // Range Restriction Calculation From a pair of Scalar Float64 Values
SMPDefsFlags[STARS_NN_vrangess] = false; // Range Restriction Calculation From a Pair of Scalar Float32 Values
SMPDefsFlags[STARS_NN_vrcp14pd] = false; // Compute Approximate Reciprocals of Packed Float64 Values
SMPDefsFlags[STARS_NN_vrcp14sd] = false; // Compute Approximate Reciprocal of Scalar Float64 Value
SMPDefsFlags[STARS_NN_vrcp14ps] = false; // Compute Approximate Reciprocals of Packed Float32 Values
SMPDefsFlags[STARS_NN_vrcp14ss] = false; // Compute Approximate Reciprocal of Scalar Float32 Value
SMPDefsFlags[STARS_NN_vreducepd] = false; // Perform Reduction Transformation on Packed Float64 Values
SMPDefsFlags[STARS_NN_vreducesd] = false; // Perform a Reduction Transformation on a Scalar Float64 Value
SMPDefsFlags[STARS_NN_vreduceps] = false; // Perform Reduction Transformation on Packed Float32 Values
SMPDefsFlags[STARS_NN_vreducess] = false; // Perform a Reduction Transformation on a Scalar Float32 Value
SMPDefsFlags[STARS_NN_vrndscalepd] = false; // Round Packed Float64 Values To Include A Given Number Of Fraction Bits
SMPDefsFlags[STARS_NN_vrndscalesd] = false; // Round Scalar Float64 Value To Include A Given Number Of Fraction Bits
SMPDefsFlags[STARS_NN_vrndscaleps] = false; // Round Packed Float32 Values To Include A Given Number Of Fraction Bits
SMPDefsFlags[STARS_NN_vrndscaless] = false; // Round Scalar Float32 Value To Include A Given Number Of Fraction Bits
SMPDefsFlags[STARS_NN_vrsqrt14pd] = false; // Compute Approximate Reciprocals of Square Roots of Packed Float64 Values
SMPDefsFlags[STARS_NN_vrsqrt14sd] = false; // Compute Approximate Reciprocal of Square Root of Scalar Float64 Value
SMPDefsFlags[STARS_NN_vrsqrt14ps] = false; // Compute Approximate Reciprocals of Square Roots of Packed Float32 Values
SMPDefsFlags[STARS_NN_vrsqrt14ss] = false; // Compute Approximate Reciprocal of Square Root of Scalar Float32 Value
SMPDefsFlags[STARS_NN_vscalefpd] = false; // Scale Packed Float64 Values With Float64 Values
SMPDefsFlags[STARS_NN_vscalefsd] = false; // Scale Scalar Float64 Values With Float64 Values
SMPDefsFlags[STARS_NN_vscalefps] = false; // Scale Packed Float32 Values With Float32 Values
SMPDefsFlags[STARS_NN_vscalefss] = false; // Scale Scalar Float32 Value With Float32 Value
SMPDefsFlags[STARS_NN_vscatterdps] = false; // Scatter Packed Single, Packed Double with Signed Dword and Qword Indices
SMPDefsFlags[STARS_NN_vscatterdpd] = false; // Scatter Packed Single, Packed Double with Signed Dword and Qword Indices
SMPDefsFlags[STARS_NN_vscatterqps] = false; // Scatter Packed Single, Packed Double with Signed Dword and Qword Indices
SMPDefsFlags[STARS_NN_vscatterqpd] = false; // Scatter Packed Single, Packed Double with Signed Dword and Qword Indices
SMPDefsFlags[STARS_NN_vexp2pd] = false; // Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error
SMPDefsFlags[STARS_NN_vexp2ps] = false; // Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error
SMPDefsFlags[STARS_NN_vrcp28pd] = false; // Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error
SMPDefsFlags[STARS_NN_vrcp28sd] = false; // Approximation to the Reciprocal of Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error
SMPDefsFlags[STARS_NN_vrcp28ps] = false; // Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error
SMPDefsFlags[STARS_NN_vrcp28ss] = false; // Approximation to the Reciprocal of Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error
SMPDefsFlags[STARS_NN_vrsqrt28pd] = false; // Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error
SMPDefsFlags[STARS_NN_vrsqrt28sd] = false; // Approximation to the Reciprocal Square Root of Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error
SMPDefsFlags[STARS_NN_vrsqrt28ps] = false; // Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error
SMPDefsFlags[STARS_NN_vrsqrt28ss] = false; // Approximation to the Reciprocal Square Root of Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error
SMPDefsFlags[STARS_NN_vgatherpf0dps] = false; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
SMPDefsFlags[STARS_NN_vgatherpf0qps] = false; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
SMPDefsFlags[STARS_NN_vgatherpf0dpd] = false; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
SMPDefsFlags[STARS_NN_vgatherpf0qpd] = false; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
SMPDefsFlags[STARS_NN_vgatherpf1dps] = false; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
SMPDefsFlags[STARS_NN_vgatherpf1qps] = false; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
SMPDefsFlags[STARS_NN_vgatherpf1dpd] = false; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
SMPDefsFlags[STARS_NN_vgatherpf1qpd] = false; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
SMPDefsFlags[STARS_NN_vscatterpf0dps] = false; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
SMPDefsFlags[STARS_NN_vscatterpf0qps] = false; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
SMPDefsFlags[STARS_NN_vscatterpf0dpd] = false; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
SMPDefsFlags[STARS_NN_vscatterpf0qpd] = false; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
SMPDefsFlags[STARS_NN_vscatterpf1dps] = false; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
SMPDefsFlags[STARS_NN_vscatterpf1qps] = false; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
SMPDefsFlags[STARS_NN_vscatterpf1dpd] = false; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
SMPDefsFlags[STARS_NN_vscatterpf1qpd] = false; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
// AVX-512 comparison pseudo-ops
SMPDefsFlags[STARS_NN_vpcmpltd] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpled] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpneqd] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpnltd] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpnled] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpequd] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpltud] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpleud] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpnequd] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpnltud] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpnleud] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpltq] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpleq] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpneqq] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpnltq] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpnleq] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpequq] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpltuq] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpleuq] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpnequq] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpnltuq] = false; // Compare Packed Integer Values into Mask
SMPDefsFlags[STARS_NN_vpcmpnleuq] = false; // Compare Packed Integer Values into Mask
// Opmask instructions
SMPDefsFlags[STARS_NN_kaddw] = false; // ADD Two Masks
SMPDefsFlags[STARS_NN_kaddb] = false; // ADD Two Masks
SMPDefsFlags[STARS_NN_kaddq] = false; // ADD Two Masks
SMPDefsFlags[STARS_NN_kaddd] = false; // ADD Two Masks
SMPDefsFlags[STARS_NN_kandw] = false; // Bitwise Logical AND Masks
SMPDefsFlags[STARS_NN_kandb] = false; // Bitwise Logical AND Masks
SMPDefsFlags[STARS_NN_kandq] = false; // Bitwise Logical AND Masks
SMPDefsFlags[STARS_NN_kandd] = false; // Bitwise Logical AND Masks
SMPDefsFlags[STARS_NN_kandnw] = false; // Bitwise Logical AND NOT Masks
SMPDefsFlags[STARS_NN_kandnb] = false; // Bitwise Logical AND NOT Masks
SMPDefsFlags[STARS_NN_kandnq] = false; // Bitwise Logical AND NOT Masks
SMPDefsFlags[STARS_NN_kandnd] = false; // Bitwise Logical AND NOT Masks
SMPDefsFlags[STARS_NN_kmovw] = false; // Move from and to Mask Registers
SMPDefsFlags[STARS_NN_kmovb] = false; // Move from and to Mask Registers
SMPDefsFlags[STARS_NN_kmovq] = false; // Move from and to Mask Registers
SMPDefsFlags[STARS_NN_kmovd] = false; // Move from and to Mask Registers
SMPDefsFlags[STARS_NN_kunpckbw] = false; // Unpack for Mask Registers
SMPDefsFlags[STARS_NN_kunpckwd] = false; // Unpack for Mask Registers
SMPDefsFlags[STARS_NN_kunpckdq] = false; // Unpack for Mask Registers
SMPDefsFlags[STARS_NN_knotw] = false; // NOT Mask Register
SMPDefsFlags[STARS_NN_knotb] = false; // NOT Mask Register
SMPDefsFlags[STARS_NN_knotq] = false; // NOT Mask Register
SMPDefsFlags[STARS_NN_knotd] = false; // NOT Mask Register
SMPDefsFlags[STARS_NN_korw] = false; // Bitwise Logical OR Masks
SMPDefsFlags[STARS_NN_korb] = false; // Bitwise Logical OR Masks
SMPDefsFlags[STARS_NN_korq] = false; // Bitwise Logical OR Masks
SMPDefsFlags[STARS_NN_kord] = false; // Bitwise Logical OR Masks
SMPDefsFlags[STARS_NN_kortestw] = true; // OR Masks And Set Flags
SMPDefsFlags[STARS_NN_kortestb] = true; // OR Masks And Set Flags
SMPDefsFlags[STARS_NN_kortestq] = true; // OR Masks And Set Flags
SMPDefsFlags[STARS_NN_kortestd] = true; // OR Masks And Set Flags
SMPDefsFlags[STARS_NN_kshiftlw] = false; // Shift Left Mask Registers
SMPDefsFlags[STARS_NN_kshiftlb] = false; // Shift Left Mask Registers
SMPDefsFlags[STARS_NN_kshiftlq] = false; // Shift Left Mask Registers
SMPDefsFlags[STARS_NN_kshiftld] = false; // Shift Left Mask Registers
SMPDefsFlags[STARS_NN_kshiftrw] = false; // Shift Right Mask Registers
SMPDefsFlags[STARS_NN_kshiftrb] = false; // Shift Right Mask Registers
SMPDefsFlags[STARS_NN_kshiftrq] = false; // Shift Right Mask Registers
SMPDefsFlags[STARS_NN_kshiftrd] = false; // Shift Right Mask Registers
SMPDefsFlags[STARS_NN_kxnorw] = false; // Bitwise Logical XNOR Masks
SMPDefsFlags[STARS_NN_kxnorb] = false; // Bitwise Logical XNOR Masks
SMPDefsFlags[STARS_NN_kxnorq] = false; // Bitwise Logical XNOR Masks
SMPDefsFlags[STARS_NN_kxnord] = false; // Bitwise Logical XNOR Masks
SMPDefsFlags[STARS_NN_ktestw] = true; // Packed Bit Test Masks and Set Flags
SMPDefsFlags[STARS_NN_ktestb] = true; // Packed Bit Test Masks and Set Flags
SMPDefsFlags[STARS_NN_ktestq] = true; // Packed Bit Test Masks and Set Flags
SMPDefsFlags[STARS_NN_ktestd] = true; // Packed Bit Test Masks and Set Flags
SMPDefsFlags[STARS_NN_kxorw] = false; // Bitwise Logical XOR Masks
SMPDefsFlags[STARS_NN_kxorb] = false; // Bitwise Logical XOR Masks
SMPDefsFlags[STARS_NN_kxorq] = false; // Bitwise Logical XOR Masks
SMPDefsFlags[STARS_NN_kxord] = false; // Bitwise Logical XOR Masks
// SHA Extensions
SMPDefsFlags[STARS_NN_sha1rnds4] = false; // Perform Four Rounds of SHA1 Operation
SMPDefsFlags[STARS_NN_sha1nexte] = false; // Calculate SHA1 State Variable E after Four Rounds
SMPDefsFlags[STARS_NN_sha1msg1] = false; // Perform an Intermediate Calculation for the Next Four SHA1 Message Dwords
SMPDefsFlags[STARS_NN_sha1msg2] = false; // Perform a Final Calculation for the Next Four SHA1 Message Dwords
SMPDefsFlags[STARS_NN_sha256rnds2] = false; // Perform Two Rounds of SHA256 Operation
SMPDefsFlags[STARS_NN_sha256msg1] = false; // Perform an Intermediate Calculation for the Next Four SHA256 Message Dwords
SMPDefsFlags[STARS_NN_sha256msg2] = false; // Perform a Final Calculation for the Next Four SHA256 Message Dwords
// Intel Software Guard Extensions
SMPDefsFlags[STARS_NN_encls] = false; // Execute an Enclave System Function of Specified Leaf Number
SMPDefsFlags[STARS_NN_enclu] = false; // Execute an Enclave User Function of Specified Leaf Number
// AMD XOP
SMPDefsFlags[STARS_NN_vfrczpd] = false; // Extract Fraction Packed Double-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfrczps] = false; // Extract Fraction Packed Single-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfrczsd] = false; // Extract Fraction Scalar Double-Precision Floating-Point
SMPDefsFlags[STARS_NN_vfrczss] = false; // Extract Fraction Scalar Single-Precision Floating Point
SMPDefsFlags[STARS_NN_vpcmov] = false; // Vector Conditional Moves
SMPDefsFlags[STARS_NN_vpcomb] = false; // Compare Vector Signed Bytes
SMPDefsFlags[STARS_NN_vpcomd] = false; // Compare Vector Signed Doublewords
SMPDefsFlags[STARS_NN_vpcomq] = false; // Compare Vector Signed Quadwords
SMPDefsFlags[STARS_NN_vpcomub] = false; // Compare Vector Unsigned Bytes
SMPDefsFlags[STARS_NN_vpcomud] = false; // Compare Vector Unsigned Doublewords
SMPDefsFlags[STARS_NN_vpcomuq] = false; // Compare Vector Unsigned Quadwords
SMPDefsFlags[STARS_NN_vpcomuw] = false; // Compare Vector Unsigned Words
SMPDefsFlags[STARS_NN_vpcomw] = false; // Compare Vector Signed Words
SMPDefsFlags[STARS_NN_vpermil2pd] = false; // Permute Two-Source Double-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vpermil2ps] = false; // Permute Two-Source Single-Precision Floating-Point Values
SMPDefsFlags[STARS_NN_vphaddbd] = false; // Packed Horizontal Add Signed Byte to Signed Doubleword
SMPDefsFlags[STARS_NN_vphaddbq] = false; // Packed Horizontal Add Signed Byte to Signed Quadword
SMPDefsFlags[STARS_NN_vphaddbw] = false; // Packed Horizontal Add Signed Byte to Signed Word
SMPDefsFlags[STARS_NN_vphadddq] = false; // Packed Horizontal Add Signed Doubleword to Signed Quadword
SMPDefsFlags[STARS_NN_vphaddubd] = false; // Packed Horizontal Add Unsigned Byte to Doubleword
SMPDefsFlags[STARS_NN_vphaddubq] = false; // Packed Horizontal Add Unsigned Byte to Quadword
SMPDefsFlags[STARS_NN_vphaddubw] = false; // Packed Horizontal Add Unsigned Byte to Word
SMPDefsFlags[STARS_NN_vphaddudq] = false; // Packed Horizontal Add Unsigned Doubleword to Quadword
SMPDefsFlags[STARS_NN_vphadduwd] = false; // Packed Horizontal Add Unsigned Word to Doubleword
SMPDefsFlags[STARS_NN_vphadduwq] = false; // Packed Horizontal Add Unsigned Word to Quadword
SMPDefsFlags[STARS_NN_vphaddwd] = false; // Packed Horizontal Add Signed Word to Signed Doubleword
SMPDefsFlags[STARS_NN_vphaddwq] = false; // Packed Horizontal Add Signed Word to Signed Quadword
SMPDefsFlags[STARS_NN_vphsubbw] = false; // Packed Horizontal Subtract Signed Byte to Signed Word
SMPDefsFlags[STARS_NN_vphsubdq] = false; // Packed Horizontal Subtract Signed Doubleword to Signed Quadword
SMPDefsFlags[STARS_NN_vphsubwd] = false; // Packed Horizontal Subtract Signed Word to Signed Doubleword
SMPDefsFlags[STARS_NN_vpmacsdd] = false; // Packed Multiply Accumulate Signed Doubleword to Signed Doubleword
SMPDefsFlags[STARS_NN_vpmacsdqh] = false; // Packed Multiply Accumulate Signed High Doubleword to Signed Quadword
SMPDefsFlags[STARS_NN_vpmacsdql] = false; // Packed Multiply Accumulate Signed Low Doubleword to Signed Quadword
SMPDefsFlags[STARS_NN_vpmacssdd] = false; // Packed Multiply Accumulate Signed Doubleword to Signed Doubleword with Saturation
SMPDefsFlags[STARS_NN_vpmacssdqh] = false; // Packed Multiply Accumulate Signed High Doubleword to Signed Quadword with Saturation
SMPDefsFlags[STARS_NN_vpmacssdql] = false; // Packed Multiply Accumulate Signed Low Doubleword to Signed Quadword with Saturation
SMPDefsFlags[STARS_NN_vpmacsswd] = false; // Packed Multiply Accumulate Signed Word to Signed Doubleword with Saturation
SMPDefsFlags[STARS_NN_vpmacssww] = false; // Packed Multiply Accumulate Signed Word to Signed Word with Saturation
SMPDefsFlags[STARS_NN_vpmacswd] = false; // Packed Multiply Accumulate Signed Word to Signed Doubleword
SMPDefsFlags[STARS_NN_vpmacsww] = false; // Packed Multiply Accumulate Signed Word to Signed Word
SMPDefsFlags[STARS_NN_vpmadcsswd] = false; // Packed Multiply, Add and Accumulate Signed Word to Signed Doubleword with Saturation
SMPDefsFlags[STARS_NN_vpmadcswd] = false; // Packed Multiply Add and Accumulate Signed Word to Signed Doubleword
SMPDefsFlags[STARS_NN_vpperm] = false; // Packed Permute Bytes
SMPDefsFlags[STARS_NN_vprotb] = false; // Packed Rotate Bytes
SMPDefsFlags[STARS_NN_vprotd] = false; // Packed Rotate Doublewords
SMPDefsFlags[STARS_NN_vprotq] = false; // Packed Rotate Quadwords
SMPDefsFlags[STARS_NN_vprotw] = false; // Packed Rotate Words
SMPDefsFlags[STARS_NN_vpshab] = false; // Packed Shift Arithmetic Bytes
SMPDefsFlags[STARS_NN_vpshad] = false; // Packed Shift Arithmetic Doublewords
SMPDefsFlags[STARS_NN_vpshaq] = false; // Packed Shift Arithmetic Quadwords
SMPDefsFlags[STARS_NN_vpshaw] = false; // Packed Shift Arithmetic Words
SMPDefsFlags[STARS_NN_vpshlb] = false; // Packed Shift Logical Bytes
SMPDefsFlags[STARS_NN_vpshld] = false; // Packed Shift Logical Doublewords
SMPDefsFlags[STARS_NN_vpshlq] = false; // Packed Shift Logical Quadwords
SMPDefsFlags[STARS_NN_vpshlw] = false; // Packed Shift Logical Words
// AMP XOP comparison pseudo-ops
SMPDefsFlags[STARS_NN_vpcomltb] = false; // Compare Vector Signed Bytes
SMPDefsFlags[STARS_NN_vpcomleb] = false; // Compare Vector Signed Bytes
SMPDefsFlags[STARS_NN_vpcomgtb] = false; // Compare Vector Signed Bytes
SMPDefsFlags[STARS_NN_vpcomgeb] = false; // Compare Vector Signed Bytes
SMPDefsFlags[STARS_NN_vpcomeqb] = false; // Compare Vector Signed Bytes
SMPDefsFlags[STARS_NN_vpcomneqb] = false; // Compare Vector Signed Bytes
SMPDefsFlags[STARS_NN_vpcomfalseb] = false; // Compare Vector Signed Bytes
SMPDefsFlags[STARS_NN_vpcomtrueb] = false; // Compare Vector Signed Bytes
SMPDefsFlags[STARS_NN_vpcomltw] = false; // Compare Vector Signed Words
SMPDefsFlags[STARS_NN_vpcomlew] = false; // Compare Vector Signed Words
SMPDefsFlags[STARS_NN_vpcomgtw] = false; // Compare Vector Signed Words
SMPDefsFlags[STARS_NN_vpcomgew] = false; // Compare Vector Signed Words
SMPDefsFlags[STARS_NN_vpcomeqw] = false; // Compare Vector Signed Words
SMPDefsFlags[STARS_NN_vpcomneqw] = false; // Compare Vector Signed Words
SMPDefsFlags[STARS_NN_vpcomfalsew] = false; // Compare Vector Signed Words
SMPDefsFlags[STARS_NN_vpcomtruew] = false; // Compare Vector Signed Words
SMPDefsFlags[STARS_NN_vpcomltd] = false; // Compare Vector Signed Doublewords
SMPDefsFlags[STARS_NN_vpcomled] = false; // Compare Vector Signed Doublewords
SMPDefsFlags[STARS_NN_vpcomgtd] = false; // Compare Vector Signed Doublewords
SMPDefsFlags[STARS_NN_vpcomged] = false; // Compare Vector Signed Doublewords
SMPDefsFlags[STARS_NN_vpcomeqd] = false; // Compare Vector Signed Doublewords
SMPDefsFlags[STARS_NN_vpcomneqd] = false; // Compare Vector Signed Doublewords
SMPDefsFlags[STARS_NN_vpcomfalsed] = false; // Compare Vector Signed Doublewords
SMPDefsFlags[STARS_NN_vpcomtrued] = false; // Compare Vector Signed Doublewords
SMPDefsFlags[STARS_NN_vpcomltq] = false; // Compare Vector Signed Quadwords
SMPDefsFlags[STARS_NN_vpcomleq] = false; // Compare Vector Signed Quadwords
SMPDefsFlags[STARS_NN_vpcomgtq] = false; // Compare Vector Signed Quadwords
SMPDefsFlags[STARS_NN_vpcomgeq] = false; // Compare Vector Signed Quadwords
SMPDefsFlags[STARS_NN_vpcomeqq] = false; // Compare Vector Signed Quadwords
SMPDefsFlags[STARS_NN_vpcomneqq] = false; // Compare Vector Signed Quadwords
SMPDefsFlags[STARS_NN_vpcomfalseq] = false; // Compare Vector Signed Quadwords
SMPDefsFlags[STARS_NN_vpcomtrueq] = false; // Compare Vector Signed Quadwords
SMPDefsFlags[STARS_NN_vpcomltub] = false; // Compare Vector Unsigned Bytes
SMPDefsFlags[STARS_NN_vpcomleub] = false; // Compare Vector Unsigned Bytes
SMPDefsFlags[STARS_NN_vpcomgtub] = false; // Compare Vector Unsigned Bytes
SMPDefsFlags[STARS_NN_vpcomgeub] = false; // Compare Vector Unsigned Bytes
SMPDefsFlags[STARS_NN_vpcomequb] = false; // Compare Vector Unsigned Bytes
SMPDefsFlags[STARS_NN_vpcomnequb] = false; // Compare Vector Unsigned Bytes
SMPDefsFlags[STARS_NN_vpcomfalseub] = false; // Compare Vector Unsigned Bytes
SMPDefsFlags[STARS_NN_vpcomtrueub] = false; // Compare Vector Unsigned Bytes
SMPDefsFlags[STARS_NN_vpcomltuw] = false; // Compare Vector Unsigned Words
SMPDefsFlags[STARS_NN_vpcomleuw] = false; // Compare Vector Unsigned Words
SMPDefsFlags[STARS_NN_vpcomgtuw] = false; // Compare Vector Unsigned Words
SMPDefsFlags[STARS_NN_vpcomgeuw] = false; // Compare Vector Unsigned Words
SMPDefsFlags[STARS_NN_vpcomequw] = false; // Compare Vector Unsigned Words
SMPDefsFlags[STARS_NN_vpcomnequw] = false; // Compare Vector Unsigned Words
SMPDefsFlags[STARS_NN_vpcomfalseuw] = false; // Compare Vector Unsigned Words
SMPDefsFlags[STARS_NN_vpcomtrueuw] = false; // Compare Vector Unsigned Words
SMPDefsFlags[STARS_NN_vpcomltud] = false; // Compare Vector Unsigned Doublewords
SMPDefsFlags[STARS_NN_vpcomleud] = false; // Compare Vector Unsigned Doublewords
SMPDefsFlags[STARS_NN_vpcomgtud] = false; // Compare Vector Unsigned Doublewords
SMPDefsFlags[STARS_NN_vpcomgeud] = false; // Compare Vector Unsigned Doublewords
SMPDefsFlags[STARS_NN_vpcomequd] = false; // Compare Vector Unsigned Doublewords
SMPDefsFlags[STARS_NN_vpcomnequd] = false; // Compare Vector Unsigned Doublewords
SMPDefsFlags[STARS_NN_vpcomfalseud] = false; // Compare Vector Unsigned Doublewords
SMPDefsFlags[STARS_NN_vpcomtrueud] = false; // Compare Vector Unsigned Doublewords
SMPDefsFlags[STARS_NN_vpcomltuq] = false; // Compare Vector Unsigned Quadwords
SMPDefsFlags[STARS_NN_vpcomleuq] = false; // Compare Vector Unsigned Quadwords
SMPDefsFlags[STARS_NN_vpcomgtuq] = false; // Compare Vector Unsigned Quadwords
SMPDefsFlags[STARS_NN_vpcomgeuq] = false; // Compare Vector Unsigned Quadwords
SMPDefsFlags[STARS_NN_vpcomequq] = false; // Compare Vector Unsigned Quadwords
SMPDefsFlags[STARS_NN_vpcomnequq] = false; // Compare Vector Unsigned Quadwords
SMPDefsFlags[STARS_NN_vpcomfalseuq] = false; // Compare Vector Unsigned Quadwords
SMPDefsFlags[STARS_NN_vpcomtrueuq] = false; // Compare Vector Unsigned Quadwords
// AMD Excavator
SMPDefsFlags[STARS_NN_monitorx] = false; // Setup Monitor Address
SMPDefsFlags[STARS_NN_mwaitx] = false; // Monitor Wait with Timeout
// AMD Zen
SMPDefsFlags[STARS_NN_clzero] = false; // Zero out 64 byte cache
// Intel Processor Trace
SMPDefsFlags[STARS_NN_ptwrite] = false; // Write Data to a Processor Trace Packet
// new Intel AVX-512 instructions (December 2016)
SMPDefsFlags[STARS_NN_v4fmaddps] = false; // Packed Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
SMPDefsFlags[STARS_NN_v4fnmaddps] = false; // Packed Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
SMPDefsFlags[STARS_NN_v4fmaddss] = false; // Scalar Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
SMPDefsFlags[STARS_NN_v4fnmaddss] = false; // Scalar Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
SMPDefsFlags[STARS_NN_vp4dpwssd] = false; // Dot Product of Signed Words with Dword Accumulation (4-iterations)
SMPDefsFlags[STARS_NN_vp4dpwssds] = false; // Dot Product of Signed Words with Dword Accumulation and Saturation (4-iterations)
SMPDefsFlags[STARS_NN_vpopcntd] = false; // Return the Count of Number of Bits Set to 1 in DWORD
SMPDefsFlags[STARS_NN_vpopcntq] = false; // Return the Count of Number of Bits Set to 1 in QWORD
// Read Processor ID
SMPDefsFlags[STARS_NN_rdpid] = false; // Read Processor ID
// Invoke VM function
SMPDefsFlags[STARS_NN_vmfunc] = false; // Invoke VM function
// Control-flow Enforcement
SMPDefsFlags[STARS_NN_incsspd] = false; // Increment Shadow Stack Pointer (by 4)
SMPDefsFlags[STARS_NN_incsspq] = false; // Increment Shadow Stack Pointer (by 8)
SMPDefsFlags[STARS_NN_rdsspd] = false; // Read (low 32 bits of) Shadow Stack Pointer
SMPDefsFlags[STARS_NN_rdsspq] = false; // Read Shadow Stack Pointer
SMPDefsFlags[STARS_NN_saveprevssp] = false; // Save Previous Shadow Stack Pointer
SMPDefsFlags[STARS_NN_rstorssp] = false; // Restore saved Shadow Stack Pointer
SMPDefsFlags[STARS_NN_wrssd] = false; // Write (4 bytes) to shadow stack
SMPDefsFlags[STARS_NN_wrssq] = false; // Write (8 bytes) to shadow stack
SMPDefsFlags[STARS_NN_wrussd] = false; // Write (4 bytes) to User Shadow Stack
SMPDefsFlags[STARS_NN_wrussq] = false; // Write (8 bytes) to User Shadow Stack
SMPDefsFlags[STARS_NN_setssbsy] = false; // Mark Shadow Stack Busy
SMPDefsFlags[STARS_NN_clrssbsy] = false; // Clear Shadow Stack Busy Flag
SMPDefsFlags[STARS_NN_endbr64] = false; // Terminate an Indirect Branch in 64-bit Mode
SMPDefsFlags[STARS_NN_endbr32] = false; // Terminate an Indirect Branch in 32-bit and Compatibility Mode
// Undefined Instruction
SMPDefsFlags[STARS_NN_ud0] = false; // Undefined Instruction
SMPDefsFlags[STARS_NN_ud1] = false; // Undefined Instruction
// Enqueue Stores
SMPDefsFlags[STARS_NN_enqcmd] = false; // Enqueue Command
SMPDefsFlags[STARS_NN_enqcmds] = false; // Enqueue Command Supervisor
// AMD Zen2
SMPDefsFlags[STARS_NN_mcommit] = false; // Commit Stores to Memory
SMPDefsFlags[STARS_NN_rdpru] = false; // Read Processor Register
// Intel Tremont instructions
SMPDefsFlags[STARS_NN_cldemote] = false; // Cache Line Demote
SMPDefsFlags[STARS_NN_enclv] = false; // Execute an Enclave VMM Function of Specified Leaf Number
// Direct Stores
SMPDefsFlags[STARS_NN_movdiri] = false; // Move Doubleword as Direct Store
SMPDefsFlags[STARS_NN_movdir64b] = false; // Move 64 Bytes as Direct Store
// Intel WAITPKG instructions
SMPDefsFlags[STARS_NN_tpause] = true; // Timed PAUSE
SMPDefsFlags[STARS_NN_umonitor] = false; // User Level Set Up Monitor Address
SMPDefsFlags[STARS_NN_umwait] = true; // User Level Monitor Wait
// Intel Sapphire Rapids instructions
SMPDefsFlags[STARS_NN_serialize] = false; // Serialize Instruction Execution
// Intel TSX
SMPDefsFlags[STARS_NN_xresldtrk] = false; // Resume Tracking Load Addresses
SMPDefsFlags[STARS_NN_xsusldtrk] = false; // Suspend Tracking Load Addresses
// Intel Affine Transformation instructions
SMPDefsFlags[STARS_NN_gf2p8mulb] = false; // Galois Field Multiply Bytes
SMPDefsFlags[STARS_NN_gf2p8affineqb] = false; // Computes Affine Transformation
SMPDefsFlags[STARS_NN_gf2p8affineinvqb] = false; // Computes Inverse Affine Transformation
// VEX versions
SMPDefsFlags[STARS_NN_vgf2p8mulb] = false; // Galois Field Multiply Bytes
SMPDefsFlags[STARS_NN_vgf2p8affineqb] = false; // Computes Affine Transformation
SMPDefsFlags[STARS_NN_vgf2p8affineinvqb] = false; // Computes Inverse Affine Transformation
// Intrinsics for Saving and Restoring the Extended Processor States (64-bits)
SMPDefsFlags[STARS_NN_fxsave64] = false; // Fast save FP context (64-bits)
SMPDefsFlags[STARS_NN_fxrstor64] = false; // Fast restore FP context (64-bits)
SMPDefsFlags[STARS_NN_last] = false;
return;
} // end of STARS_Program_t::InitSMPDefsFlags()
// Initialize the SMPUsesFlags[] array to define how we emit
// optimizing annotations.
void STARS_Program_t::InitSMPUsesFlags(void) {
// Default value is false. Few instructions use the flags.
(void) memset(SMPUsesFlags, false, sizeof(SMPUsesFlags));
SMPUsesFlags[STARS_NN_null] = true; // Unknown Operation
SMPUsesFlags[STARS_NN_aaa] = true; // ASCII adjust after addition
SMPUsesFlags[STARS_NN_aas] = true; // ASCII adjust after subtraction
SMPUsesFlags[STARS_NN_adc] = true; // Add with Carry
SMPUsesFlags[STARS_NN_cmps] = true; // Compare Strings (uses DF direction flag)
SMPUsesFlags[STARS_NN_daa] = true; // Decimal Adjust AL after Addition
SMPUsesFlags[STARS_NN_das] = true; // Decimal Adjust AL after Subtraction
SMPUsesFlags[STARS_NN_ins] = true; // Input Byte(s) from Port to String
SMPUsesFlags[STARS_NN_into] = true; // Call to Interrupt Procedure if Overflow Flag = 1
SMPUsesFlags[STARS_NN_ja] = true; // Jump if Above (CF=0 & ZF=0)
SMPUsesFlags[STARS_NN_jae] = true; // Jump if Above or Equal (CF=0)
SMPUsesFlags[STARS_NN_jb] = true; // Jump if Below (CF=1)
SMPUsesFlags[STARS_NN_jbe] = true; // Jump if Below or Equal (CF=1 | ZF=1)
SMPUsesFlags[STARS_NN_jc] = true; // Jump if Carry (CF=1)
SMPUsesFlags[STARS_NN_jcxz] = true; // Jump if CX is 0
SMPUsesFlags[STARS_NN_jecxz] = true; // Jump if ECX is 0
SMPUsesFlags[STARS_NN_jrcxz] = true; // Jump if RCX is 0
SMPUsesFlags[STARS_NN_je] = true; // Jump if Equal (ZF=1)
SMPUsesFlags[STARS_NN_jg] = true; // Jump if Greater (ZF=0 & SF=OF)
SMPUsesFlags[STARS_NN_jge] = true; // Jump if Greater or Equal (SF=OF)
SMPUsesFlags[STARS_NN_jl] = true; // Jump if Less (SF!=OF)
SMPUsesFlags[STARS_NN_jle] = true; // Jump if Less or Equal (ZF=1 | SF!=OF)
SMPUsesFlags[STARS_NN_jna] = true; // Jump if Not Above (CF=1 | ZF=1)
SMPUsesFlags[STARS_NN_jnae] = true; // Jump if Not Above or Equal (CF=1)
SMPUsesFlags[STARS_NN_jnb] = true; // Jump if Not Below (CF=0)
SMPUsesFlags[STARS_NN_jnbe] = true; // Jump if Not Below or Equal (CF=0 & ZF=0)
SMPUsesFlags[STARS_NN_jnc] = true; // Jump if Not Carry (CF=0)
SMPUsesFlags[STARS_NN_jne] = true; // Jump if Not Equal (ZF=0)
SMPUsesFlags[STARS_NN_jng] = true; // Jump if Not Greater (ZF=1 | SF!=OF)
SMPUsesFlags[STARS_NN_jnge] = true; // Jump if Not Greater or Equal (SF!=OF)
SMPUsesFlags[STARS_NN_jnl] = true; // Jump if Not Less (SF=OF)
SMPUsesFlags[STARS_NN_jnle] = true; // Jump if Not Less or Equal (ZF=0 & SF=OF)
SMPUsesFlags[STARS_NN_jno] = true; // Jump if Not Overflow (OF=0)
SMPUsesFlags[STARS_NN_jnp] = true; // Jump if Not Parity (PF=0)
SMPUsesFlags[STARS_NN_jns] = true; // Jump if Not Sign (SF=0)
SMPUsesFlags[STARS_NN_jnz] = true; // Jump if Not Zero (ZF=0)
SMPUsesFlags[STARS_NN_jo] = true; // Jump if Overflow (OF=1)
SMPUsesFlags[STARS_NN_jp] = true; // Jump if Parity (PF=1)
SMPUsesFlags[STARS_NN_jpe] = true; // Jump if Parity Even (PF=1)
SMPUsesFlags[STARS_NN_jpo] = true; // Jump if Parity Odd (PF=0)
SMPUsesFlags[STARS_NN_js] = true; // Jump if Sign (SF=1)
SMPUsesFlags[STARS_NN_jz] = true; // Jump if Zero (ZF=1)
SMPUsesFlags[STARS_NN_lahf] = true; // Load Flags into AH Register
SMPUsesFlags[STARS_NN_lods] = true; // Load String
SMPUsesFlags[STARS_NN_loopwe] = true; // Loop while CX != 0 and ZF=1
SMPUsesFlags[STARS_NN_loope] = true; // Loop while rCX != 0 and ZF=1
SMPUsesFlags[STARS_NN_loopde] = true; // Loop while ECX != 0 and ZF=1
SMPUsesFlags[STARS_NN_loopqe] = true; // Loop while RCX != 0 and ZF=1
SMPUsesFlags[STARS_NN_loopwne] = true; // Loop while CX != 0 and ZF=0
SMPUsesFlags[STARS_NN_loopne] = true; // Loop while rCX != 0 and ZF=0
SMPUsesFlags[STARS_NN_loopdne] = true; // Loop while ECX != 0 and ZF=0
SMPUsesFlags[STARS_NN_loopqne] = true; // Loop while RCX != 0 and ZF=0
SMPUsesFlags[STARS_NN_movs] = true; // Move String (uses flags if REP prefix)
SMPUsesFlags[STARS_NN_outs] = true; // Output Byte(s) to Port
SMPUsesFlags[STARS_NN_pushfw] = true; // Push Flags Register onto the Stack
SMPUsesFlags[STARS_NN_pushf] = true; // Push Flags Register onto the Stack
SMPUsesFlags[STARS_NN_pushfd] = true; // Push Flags Register onto the Stack (use32)
SMPUsesFlags[STARS_NN_pushfq] = true; // Push Flags Register onto the Stack (use64)
SMPUsesFlags[STARS_NN_rcl] = true; // Rotate Through Carry Left
SMPUsesFlags[STARS_NN_rcr] = true; // Rotate Through Carry Right
SMPUsesFlags[STARS_NN_repe] = true; // Repeat String Operation while ZF=1
SMPUsesFlags[STARS_NN_repne] = true; // Repeat String Operation while ZF=0
SMPUsesFlags[STARS_NN_sbb] = true; // Integer Subtraction with Borrow
SMPUsesFlags[STARS_NN_scas] = true; // Compare String (uses DF direction flag)
SMPUsesFlags[STARS_NN_seta] = true; // Set Byte if Above (CF=0 & ZF=0)
SMPUsesFlags[STARS_NN_setae] = true; // Set Byte if Above or Equal (CF=0)
SMPUsesFlags[STARS_NN_setb] = true; // Set Byte if Below (CF=1)
SMPUsesFlags[STARS_NN_setbe] = true; // Set Byte if Below or Equal (CF=1 | ZF=1)
SMPUsesFlags[STARS_NN_setc] = true; // Set Byte if Carry (CF=1)
SMPUsesFlags[STARS_NN_sete] = true; // Set Byte if Equal (ZF=1)
SMPUsesFlags[STARS_NN_setg] = true; // Set Byte if Greater (ZF=0 & SF=OF)
SMPUsesFlags[STARS_NN_setge] = true; // Set Byte if Greater or Equal (SF=OF)
SMPUsesFlags[STARS_NN_setl] = true; // Set Byte if Less (SF!=OF)
SMPUsesFlags[STARS_NN_setle] = true; // Set Byte if Less or Equal (ZF=1 | SF!=OF)
SMPUsesFlags[STARS_NN_setna] = true; // Set Byte if Not Above (CF=1 | ZF=1)
SMPUsesFlags[STARS_NN_setnae] = true; // Set Byte if Not Above or Equal (CF=1)
SMPUsesFlags[STARS_NN_setnb] = true; // Set Byte if Not Below (CF=0)
SMPUsesFlags[STARS_NN_setnbe] = true; // Set Byte if Not Below or Equal (CF=0 & ZF=0)
SMPUsesFlags[STARS_NN_setnc] = true; // Set Byte if Not Carry (CF=0)
SMPUsesFlags[STARS_NN_setne] = true; // Set Byte if Not Equal (ZF=0)
SMPUsesFlags[STARS_NN_setng] = true; // Set Byte if Not Greater (ZF=1 | SF!=OF)
SMPUsesFlags[STARS_NN_setnge] = true; // Set Byte if Not Greater or Equal (SF!=OF)
SMPUsesFlags[STARS_NN_setnl] = true; // Set Byte if Not Less (SF=OF)
SMPUsesFlags[STARS_NN_setnle] = true; // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
SMPUsesFlags[STARS_NN_setno] = true; // Set Byte if Not Overflow (OF=0)
SMPUsesFlags[STARS_NN_setnp] = true; // Set Byte if Not Parity (PF=0)
SMPUsesFlags[STARS_NN_setns] = true; // Set Byte if Not Sign (SF=0)
SMPUsesFlags[STARS_NN_setnz] = true; // Set Byte if Not Zero (ZF=0)
SMPUsesFlags[STARS_NN_seto] = true; // Set Byte if Overflow (OF=1)
SMPUsesFlags[STARS_NN_setp] = true; // Set Byte if Parity (PF=1)
SMPUsesFlags[STARS_NN_setpe] = true; // Set Byte if Parity Even (PF=1)
SMPUsesFlags[STARS_NN_setpo] = true; // Set Byte if Parity Odd (PF=0)
SMPUsesFlags[STARS_NN_sets] = true; // Set Byte if Sign (SF=1)
SMPUsesFlags[STARS_NN_setz] = true; // Set Byte if Zero (ZF=1)
SMPUsesFlags[STARS_NN_stos] = true; // Store String
//
// 486 instructions
//
//
// Pentium instructions
//
#if 0
SMPUsesFlags[STARS_NN_cpuid] = true; // Get CPU ID
SMPUsesFlags[STARS_NN_cmpxchg8b] = true; // Compare and Exchange Eight Bytes
#endif
//
// Pentium Pro instructions
//
SMPUsesFlags[STARS_NN_cmova] = true; // Move if Above (CF=0 & ZF=0)
SMPUsesFlags[STARS_NN_cmovb] = true; // Move if Below (CF=1)
SMPUsesFlags[STARS_NN_cmovbe] = true; // Move if Below or Equal (CF=1 | ZF=1)
SMPUsesFlags[STARS_NN_cmovg] = true; // Move if Greater (ZF=0 & SF=OF)
SMPUsesFlags[STARS_NN_cmovge] = true; // Move if Greater or Equal (SF=OF)
SMPUsesFlags[STARS_NN_cmovl] = true; // Move if Less (SF!=OF)
SMPUsesFlags[STARS_NN_cmovle] = true; // Move if Less or Equal (ZF=1 | SF!=OF)
SMPUsesFlags[STARS_NN_cmovnb] = true; // Move if Not Below (CF=0)
SMPUsesFlags[STARS_NN_cmovno] = true; // Move if Not Overflow (OF=0)
SMPUsesFlags[STARS_NN_cmovnp] = true; // Move if Not Parity (PF=0)
SMPUsesFlags[STARS_NN_cmovns] = true; // Move if Not Sign (SF=0)
SMPUsesFlags[STARS_NN_cmovnz] = true; // Move if Not Zero (ZF=0)
SMPUsesFlags[STARS_NN_cmovo] = true; // Move if Overflow (OF=1)
SMPUsesFlags[STARS_NN_cmovp] = true; // Move if Parity (PF=1)
SMPUsesFlags[STARS_NN_cmovs] = true; // Move if Sign (SF=1)
SMPUsesFlags[STARS_NN_cmovz] = true; // Move if Zero (ZF=1)
SMPUsesFlags[STARS_NN_fcmovb] = true; // Floating Move if Below
SMPUsesFlags[STARS_NN_fcmove] = true; // Floating Move if Equal
SMPUsesFlags[STARS_NN_fcmovbe] = true; // Floating Move if Below or Equal
SMPUsesFlags[STARS_NN_fcmovu] = true; // Floating Move if Unordered
SMPUsesFlags[STARS_NN_fcmovnb] = true; // Floating Move if Not Below
SMPUsesFlags[STARS_NN_fcmovne] = true; // Floating Move if Not Equal
SMPUsesFlags[STARS_NN_fcmovnbe] = true; // Floating Move if Not Below or Equal
SMPUsesFlags[STARS_NN_fcmovnu] = true; // Floating Move if Not Unordered
//
// FPP instructions
//
//
// 80387 instructions
//
//
// Instructions added 28.02.96
//
SMPUsesFlags[STARS_NN_setalc] = true; // Set AL to Carry Flag
//
// MMX instructions
//
//
// Undocumented Deschutes processor instructions
//
// Pentium II instructions
// 3DNow! instructions
// Pentium III instructions
// Pentium III Pseudo instructions
// AMD K7 instructions
// Revisit AMD if we port to it.
// Undocumented FP instructions (thanks to norbert.juffa@adm.com)
// Pentium 4 instructions
// AMD syscall/sysret instructions NOTE: not AMD, found in Intel manual
// AMD64 instructions NOTE: not AMD, found in Intel manual
// New Pentium instructions (SSE3)
// Missing AMD64 instructions NOTE: also found in Intel manual
// SSE3 instructions
// SSSE3 instructions
// VMX instructions
// Added with x86-64
// Geode LX 3DNow! extensions
// SSE2 pseudoinstructions
// SSSE4.1 instructions
// SSSE4.2 instructions
// AMD SSE4a instructions
// xsave/xrstor instructions
// Intel Safer Mode Extensions (SMX)
// AMD-V Virtualization ISA Extension
// VMX+ instructions
// Intel Atom instructions
// Intel AES instructions
// Carryless multiplication
// Returns modified by operand size prefixes
// RDRAND support
// new GPR instructions
SMPUsesFlags[STARS_NN_adcx] = true; // Unsigned Integer Addition of Two Operands with Carry Flag
SMPUsesFlags[STARS_NN_adox] = true; // Unsigned Integer Addition of Two Operands with Overflow Flag
// new AVX instructions
// Transactional Synchronization Extensions
// Virtual PC synthetic instructions
// FMA4
// Intel Memory Protection Extensions (MPX)
// New xstate instructions
// PREFETCHWT1 support
// Memory instructions
// Protection Key Rights for User Pages
// AVX comparison pseudo-ops
// AVX-512 instructions
// AVX-512 comparison pseudo-ops
// Opmask instructions
// SHA Extensions
// Intel Software Guard Extensions
// AMD XOP
// AMP XOP comparison pseudo-ops
// AMD Excavator
// AMD Zen
// Intel Processor Trace
// new Intel AVX-512 instructions (December 2016)
// Read Processor ID
// Invoke VM function
// Control-flow Enforcement
// Undefined Instruction
// Enqueue Stores
// AMD Zen2
// Intel Tremont instructions
// Direct Stores
// Intel WAITPKG instructions
// Intel Sapphire Rapids instructions
// Intel TSX
// Intel Affine Transformation instructions
// VEX versions
// Intrinsics for Saving and Restoring the Extended Processor States (64-bits)
SMPUsesFlags[STARS_NN_last] = false;
return;
} // end of STARS_Program_t::InitSMPUsesFlags()
// Initialize the SMPTypeCategory[] array to define how we infer
// numeric or pointer operand types for optimizing annotations.
void STARS_Program_t::InitTypeCategory(void) {
// Default category is 0, no type inference without knowing context.
(void)memset(SMPTypeCategory, 0, sizeof(SMPTypeCategory));
// Category 1 instructions will need no mmStrata instrumentation
// and are irrelevant to our type system, so we do not attempt
// to make type inferences. Many of these operate on numeric
// operands such as floating point or MMX/SSE registers. mmStrata
// assumes that such registers are always numeric, so we do not
// need annotations informing mmStrata that FP/MMX/SSE regs are numeric.
// Category 2 instructions always have a result type of 'n' (number).
// Category 3 instructions have a result type of 'n' (number)
// whenever the second source operand is an operand of type 'n'.
// NOTE: MOV is the only current example, and this will take some thought if
// other examples arise.
// Category 4 instructions have a result type identical to the 1st source operand type.
// NOTE: This is currently set for single-operand instructions such as
// INC, DEC. As a result, these are treated pretty much as if
// they were category 1 instructions, as there is no metadata update,
// even if the operand is a memory operand.
// If new instructions are added to this category that are not single
// operand and do require some updating, the category should be split.
// Category 5 instructions have a result type identical to the 1st source operand
// type whenever the 2nd source operand is an operand of type 'n' & vice versa.
// Examples are add, sub, adc, and sbb. There are subtle exceptions
// handled in the SMPInstr::EmitTypeAnnotations() method.
// Category 6 instructions always have a result type of 'p' (pointer).
// Category 7 instructions are category 2 instructions with two destinations,
// such as multiply and divide instructions that affect EDX:EAX. There are
// forms of these instructions that only have one destination, so they have
// to be distinguished via the operand info.
// Category 8 instructions implicitly write a numeric value to EDX:EAX, but
// EDX and EAX are not listed as operands. RDTSC, RDPMC, RDMSR, and other
// instructions that copy machine registers into EDX:EAX are category 8.
// Some instructions in category 8 also write to ECX.
// Category 9 instructions are floating point instructions that either
// have a memory destination (treat as category 13) or a FP reg destination
// (treat as category 1, as FP regs are always 'n' and ignored in our system).
// Category 10 instructions have 'n' results if the sources are all 'n';
// we cannot infer the type of the result if the sources are of mixed types.
// Bitwise OR and AND and LEA (load effective address) are examples.
// Category 11 instructions need to have their types and locations on the stack
// frame tracked, e.g. push and pop instructions. No direct type inference.
// Category 12 instructions are similar to category 10, except that we do not
// output 'n' annotations when all sources are 'n'; rather, the instruction can
// be simply ignored (not instrumented by mmStrata) in that case. Conditional
// exchange instructions are examples; we do or do not
// move a numeric value into a register that already has numeric metadata.
// Category 13 instructions imply that their memory destination is 'n'.
// Category 14 instructions imply that their reg or memory source operand is 'n';
// if source is not memory, they are category 1 (inferences, but no instrumentation).
// There should never be a memory destination (usual destination is fpreg or flags).
// Category 15 instructions always have 'n' source AND destination operands;
// if addressed using indirect or indexed addressing, they are a subset of category 0
// (must be instrumented by mmStrata to keep index in bounds). Memory destinations
// are common in this category.
// Category 16 instructions have type 'p' (pointer) for all operands, e.g. bounds checking opcodes.
// NOTE: The Memory Monitor SDT needs just three categories, corresponding
// to categories 0, 1, and all others. For all categories > 1, the
// annotation should tell the SDT exactly how to update its metadata.
// For example, a division instruction will write type 'n' (NUM) as
// the metadata for result registers EDX:EAX. So, the annotation should
// list 'n', EDX, EAX, and a terminator of ZZ. CWD (convert word to
// doubleword) should have a list of n EAX ZZ.
SMPTypeCategory[STARS_NN_null] = 0; // Unknown Operation
SMPTypeCategory[STARS_NN_aaa] = 2; // ASCII Adjust after Addition
SMPTypeCategory[STARS_NN_aad] = 2; // ASCII Adjust AX before Division
SMPTypeCategory[STARS_NN_aam] = 2; // ASCII Adjust AX after Multiply
SMPTypeCategory[STARS_NN_aas] = 2; // ASCII Adjust AL after Subtraction
SMPTypeCategory[STARS_NN_adc] = 5; // Add with Carry
SMPTypeCategory[STARS_NN_add] = 5; // Add
SMPTypeCategory[STARS_NN_and] = 10; // Logical AND
SMPTypeCategory[STARS_NN_arpl] = 1; // Adjust RPL Field of Selector
SMPTypeCategory[STARS_NN_bound] = 1; // Check Array Index Against Bounds
SMPTypeCategory[STARS_NN_bsf] = 2; // Bit Scan Forward
SMPTypeCategory[STARS_NN_bsr] = 2; // Bit Scan Reverse
SMPTypeCategory[STARS_NN_bt] = 10; // Bit Test
SMPTypeCategory[STARS_NN_btc] = 10; // Bit Test and Complement
SMPTypeCategory[STARS_NN_btr] = 10; // Bit Test and Reset
SMPTypeCategory[STARS_NN_bts] = 10; // Bit Test and Set
SMPTypeCategory[STARS_NN_call] = 1; // Call Procedure
SMPTypeCategory[STARS_NN_callfi] = 1; // Indirect Call Far Procedure
SMPTypeCategory[STARS_NN_callni] = 1; // Indirect Call Near Procedure
SMPTypeCategory[STARS_NN_cbw] = 2; // AL -> AX (with sign) ** No ops?
SMPTypeCategory[STARS_NN_cwde] = 2; // AX -> EAX (with sign) **
SMPTypeCategory[STARS_NN_cdqe] = 2; // EAX -> RAX (with sign) **
SMPTypeCategory[STARS_NN_clc] = 1; // Clear Carry Flag
SMPTypeCategory[STARS_NN_cld] = 1; // Clear Direction Flag
SMPTypeCategory[STARS_NN_cli] = 1; // Clear Interrupt Flag
SMPTypeCategory[STARS_NN_clts] = 1; // Clear Task-Switched Flag in CR0
SMPTypeCategory[STARS_NN_cmc] = 1; // Complement Carry Flag
SMPTypeCategory[STARS_NN_cmp] = 1; // Compare Two Operands
SMPTypeCategory[STARS_NN_cmps] = 14; // Compare Strings
SMPTypeCategory[STARS_NN_cwd] = 2; // AX -> DX:AX (with sign)
SMPTypeCategory[STARS_NN_cdq] = 2; // EAX -> EDX:EAX (with sign)
SMPTypeCategory[STARS_NN_cqo] = 2; // RAX -> RDX:RAX (with sign)
SMPTypeCategory[STARS_NN_daa] = 2; // Decimal Adjust AL after Addition
SMPTypeCategory[STARS_NN_das] = 2; // Decimal Adjust AL after Subtraction
SMPTypeCategory[STARS_NN_dec] = 4; // Decrement by 1
SMPTypeCategory[STARS_NN_div] = 7; // Unsigned Divide
SMPTypeCategory[STARS_NN_enterw] = 0; // Make Stack Frame for Procedure Parameters **
SMPTypeCategory[STARS_NN_enter] = 0; // Make Stack Frame for Procedure Parameters **
SMPTypeCategory[STARS_NN_enterd] = 0; // Make Stack Frame for Procedure Parameters **
SMPTypeCategory[STARS_NN_enterq] = 0; // Make Stack Frame for Procedure Parameters **
SMPTypeCategory[STARS_NN_hlt] = 0; // Halt
SMPTypeCategory[STARS_NN_idiv] = 7; // Signed Divide
SMPTypeCategory[STARS_NN_imul] = 7; // Signed Multiply
SMPTypeCategory[STARS_NN_in] = 0; // Input from Port **
SMPTypeCategory[STARS_NN_inc] = 4; // Increment by 1
SMPTypeCategory[STARS_NN_ins] = 2; // Input Byte(s) from Port to String **
SMPTypeCategory[STARS_NN_int] = 0; // Call to Interrupt Procedure
SMPTypeCategory[STARS_NN_into] = 0; // Call to Interrupt Procedure if Overflow Flag = 1
SMPTypeCategory[STARS_NN_int3] = 0; // Trap to Debugger
SMPTypeCategory[STARS_NN_iretw] = 0; // Interrupt Return
SMPTypeCategory[STARS_NN_iret] = 0; // Interrupt Return
SMPTypeCategory[STARS_NN_iretd] = 0; // Interrupt Return (use32)
SMPTypeCategory[STARS_NN_iretq] = 0; // Interrupt Return (use64)
SMPTypeCategory[STARS_NN_ja] = 1; // Jump if Above (CF=0 & ZF=0)
SMPTypeCategory[STARS_NN_jae] = 1; // Jump if Above or Equal (CF=0)
SMPTypeCategory[STARS_NN_jb] = 1; // Jump if Below (CF=1)
SMPTypeCategory[STARS_NN_jbe] = 1; // Jump if Below or Equal (CF=1 | ZF=1)
SMPTypeCategory[STARS_NN_jc] = 1; // Jump if Carry (CF=1)
SMPTypeCategory[STARS_NN_jcxz] = 1; // Jump if CX is 0
SMPTypeCategory[STARS_NN_jecxz] = 1; // Jump if ECX is 0
SMPTypeCategory[STARS_NN_jrcxz] = 1; // Jump if RCX is 0
SMPTypeCategory[STARS_NN_je] = 1; // Jump if Equal (ZF=1)
SMPTypeCategory[STARS_NN_jg] = 1; // Jump if Greater (ZF=0 & SF=OF)
SMPTypeCategory[STARS_NN_jge] = 1; // Jump if Greater or Equal (SF=OF)
SMPTypeCategory[STARS_NN_jl] = 1; // Jump if Less (SF!=OF)
SMPTypeCategory[STARS_NN_jle] = 1; // Jump if Less or Equal (ZF=1 | SF!=OF)
SMPTypeCategory[STARS_NN_jna] = 1; // Jump if Not Above (CF=1 | ZF=1)
SMPTypeCategory[STARS_NN_jnae] = 1; // Jump if Not Above or Equal (CF=1)
SMPTypeCategory[STARS_NN_jnb] = 1; // Jump if Not Below (CF=0)
SMPTypeCategory[STARS_NN_jnbe] = 1; // Jump if Not Below or Equal (CF=0 & ZF=0)
SMPTypeCategory[STARS_NN_jnc] = 1; // Jump if Not Carry (CF=0)
SMPTypeCategory[STARS_NN_jne] = 1; // Jump if Not Equal (ZF=0)
SMPTypeCategory[STARS_NN_jng] = 1; // Jump if Not Greater (ZF=1 | SF!=OF)
SMPTypeCategory[STARS_NN_jnge] = 1; // Jump if Not Greater or Equal (SF!=OF)
SMPTypeCategory[STARS_NN_jnl] = 1; // Jump if Not Less (SF=OF)
SMPTypeCategory[STARS_NN_jnle] = 1; // Jump if Not Less or Equal (ZF=0 & SF=OF)
SMPTypeCategory[STARS_NN_jno] = 1; // Jump if Not Overflow (OF=0)
SMPTypeCategory[STARS_NN_jnp] = 1; // Jump if Not Parity (PF=0)
SMPTypeCategory[STARS_NN_jns] = 1; // Jump if Not Sign (SF=0)
SMPTypeCategory[STARS_NN_jnz] = 1; // Jump if Not Zero (ZF=0)
SMPTypeCategory[STARS_NN_jo] = 1; // Jump if Overflow (OF=1)
SMPTypeCategory[STARS_NN_jp] = 1; // Jump if Parity (PF=1)
SMPTypeCategory[STARS_NN_jpe] = 1; // Jump if Parity Even (PF=1)
SMPTypeCategory[STARS_NN_jpo] = 1; // Jump if Parity Odd (PF=0)
SMPTypeCategory[STARS_NN_js] = 1; // Jump if Sign (SF=1)
SMPTypeCategory[STARS_NN_jz] = 1; // Jump if Zero (ZF=1)
SMPTypeCategory[STARS_NN_jmp] = 1; // Jump
SMPTypeCategory[STARS_NN_jmpfi] = 1; // Indirect Far Jump
SMPTypeCategory[STARS_NN_jmpni] = 1; // Indirect Near Jump
SMPTypeCategory[STARS_NN_jmpshort] = 1; // Jump Short (not used)
SMPTypeCategory[STARS_NN_lahf] = 2; // Load Flags into AH Register
SMPTypeCategory[STARS_NN_lar] = 2; // Load Access Rights Byte
SMPTypeCategory[STARS_NN_lea] = 10; // Load Effective Address **
SMPTypeCategory[STARS_NN_leavew] = 0; // High Level Procedure Exit **
SMPTypeCategory[STARS_NN_leave] = 0; // High Level Procedure Exit **
SMPTypeCategory[STARS_NN_leaved] = 0; // High Level Procedure Exit **
SMPTypeCategory[STARS_NN_leaveq] = 0; // High Level Procedure Exit **
SMPTypeCategory[STARS_NN_lgdt] = 0; // Load Global Descriptor Table Register
SMPTypeCategory[STARS_NN_lidt] = 0; // Load Interrupt Descriptor Table Register
SMPTypeCategory[STARS_NN_lgs] = 6; // Load Full Pointer to GS:xx
SMPTypeCategory[STARS_NN_lss] = 6; // Load Full Pointer to SS:xx
SMPTypeCategory[STARS_NN_lds] = 6; // Load Full Pointer to DS:xx
SMPTypeCategory[STARS_NN_les] = 6; // Load Full Pointer to ES:xx
SMPTypeCategory[STARS_NN_lfs] = 6; // Load Full Pointer to FS:xx
SMPTypeCategory[STARS_NN_lldt] = 0; // Load Local Descriptor Table Register
SMPTypeCategory[STARS_NN_lmsw] = 1; // Load Machine Status Word
SMPTypeCategory[STARS_NN_lock] = 1; // Assert LOCK# Signal Prefix
SMPTypeCategory[STARS_NN_lods] = 0; // Load String
SMPTypeCategory[STARS_NN_loopw] = 1; // Loop while ECX != 0
SMPTypeCategory[STARS_NN_loop] = 1; // Loop while CX != 0
SMPTypeCategory[STARS_NN_loopd] = 1; // Loop while ECX != 0
SMPTypeCategory[STARS_NN_loopq] = 1; // Loop while RCX != 0
SMPTypeCategory[STARS_NN_loopwe] = 1; // Loop while CX != 0 and ZF=1
SMPTypeCategory[STARS_NN_loope] = 1; // Loop while rCX != 0 and ZF=1
SMPTypeCategory[STARS_NN_loopde] = 1; // Loop while ECX != 0 and ZF=1
SMPTypeCategory[STARS_NN_loopqe] = 1; // Loop while RCX != 0 and ZF=1
SMPTypeCategory[STARS_NN_loopwne] = 1; // Loop while CX != 0 and ZF=0
SMPTypeCategory[STARS_NN_loopne] = 1; // Loop while rCX != 0 and ZF=0
SMPTypeCategory[STARS_NN_loopdne] = 1; // Loop while ECX != 0 and ZF=0
SMPTypeCategory[STARS_NN_loopqne] = 1; // Loop while RCX != 0 and ZF=0
SMPTypeCategory[STARS_NN_lsl] = 6; // Load Segment Limit
SMPTypeCategory[STARS_NN_ltr] = 1; // Load Task Register
SMPTypeCategory[STARS_NN_mov] = 3; // Move Data
SMPTypeCategory[STARS_NN_movsp] = 3; // Move to/from Special Registers
SMPTypeCategory[STARS_NN_movs] = 0; // Move Byte(s) from String to String
SMPTypeCategory[STARS_NN_movsx] = 3; // Move with Sign-Extend
SMPTypeCategory[STARS_NN_movzx] = 3; // Move with Zero-Extend
SMPTypeCategory[STARS_NN_mul] = 7; // Unsigned Multiplication of AL or AX
SMPTypeCategory[STARS_NN_neg] = 2; // Two's Complement Negation !!!!****!!!! Change this when mmStrata handles NEGATEDPTR type.
SMPTypeCategory[STARS_NN_nop] = 1; // No Operation
SMPTypeCategory[STARS_NN_not] = 2; // One's Complement Negation
SMPTypeCategory[STARS_NN_or] = 10; // Logical Inclusive OR
SMPTypeCategory[STARS_NN_out] = 0; // Output to Port
SMPTypeCategory[STARS_NN_outs] = 0; // Output Byte(s) to Port
SMPTypeCategory[STARS_NN_pop] = 11; // Pop a word from the Stack
SMPTypeCategory[STARS_NN_popaw] = 11; // Pop all General Registers
SMPTypeCategory[STARS_NN_popa] = 11; // Pop all General Registers
SMPTypeCategory[STARS_NN_popad] = 11; // Pop all General Registers (use32)
SMPTypeCategory[STARS_NN_popaq] = 11; // Pop all General Registers (use64)
SMPTypeCategory[STARS_NN_popfw] = 11; // Pop Stack into Flags Register **
SMPTypeCategory[STARS_NN_popf] = 11; // Pop Stack into Flags Register **
SMPTypeCategory[STARS_NN_popfd] = 11; // Pop Stack into Eflags Register **
SMPTypeCategory[STARS_NN_popfq] = 11; // Pop Stack into Rflags Register **
SMPTypeCategory[STARS_NN_push] = 11; // Push Operand onto the Stack
SMPTypeCategory[STARS_NN_pushaw] = 11; // Push all General Registers
SMPTypeCategory[STARS_NN_pusha] = 11; // Push all General Registers
SMPTypeCategory[STARS_NN_pushad] = 11; // Push all General Registers (use32)
SMPTypeCategory[STARS_NN_pushaq] = 11; // Push all General Registers (use64)
SMPTypeCategory[STARS_NN_pushfw] = 11; // Push Flags Register onto the Stack
SMPTypeCategory[STARS_NN_pushf] = 11; // Push Flags Register onto the Stack
SMPTypeCategory[STARS_NN_pushfd] = 11; // Push Flags Register onto the Stack (use32)
SMPTypeCategory[STARS_NN_pushfq] = 11; // Push Flags Register onto the Stack (use64)
SMPTypeCategory[STARS_NN_rcl] = 2; // Rotate Through Carry Left
SMPTypeCategory[STARS_NN_rcr] = 2; // Rotate Through Carry Right
SMPTypeCategory[STARS_NN_rol] = 2; // Rotate Left
SMPTypeCategory[STARS_NN_ror] = 2; // Rotate Right
SMPTypeCategory[STARS_NN_rep] = 0; // Repeat String Operation
SMPTypeCategory[STARS_NN_repe] = 0; // Repeat String Operation while ZF=1
SMPTypeCategory[STARS_NN_repne] = 0; // Repeat String Operation while ZF=0
SMPTypeCategory[STARS_NN_retn] = 0; // Return Near from Procedure
SMPTypeCategory[STARS_NN_retf] = 0; // Return Far from Procedure
SMPTypeCategory[STARS_NN_sahf] = 14; // Store AH into Flags Register
SMPTypeCategory[STARS_NN_sal] = 2; // Shift Arithmetic Left
SMPTypeCategory[STARS_NN_sar] = 2; // Shift Arithmetic Right
SMPTypeCategory[STARS_NN_shl] = 2; // Shift Logical Left
SMPTypeCategory[STARS_NN_shr] = 2; // Shift Logical Right
SMPTypeCategory[STARS_NN_sbb] = 5; // Integer Subtraction with Borrow
SMPTypeCategory[STARS_NN_scas] = 14; // Compare String
SMPTypeCategory[STARS_NN_seta] = 2; // Set Byte if Above (CF=0 & ZF=0)
SMPTypeCategory[STARS_NN_setae] = 2; // Set Byte if Above or Equal (CF=0)
SMPTypeCategory[STARS_NN_setb] = 2; // Set Byte if Below (CF=1)
SMPTypeCategory[STARS_NN_setbe] = 2; // Set Byte if Below or Equal (CF=1 | ZF=1)
SMPTypeCategory[STARS_NN_setc] = 2; // Set Byte if Carry (CF=1)
SMPTypeCategory[STARS_NN_sete] = 2; // Set Byte if Equal (ZF=1)
SMPTypeCategory[STARS_NN_setg] = 2; // Set Byte if Greater (ZF=0 & SF=OF)
SMPTypeCategory[STARS_NN_setge] = 2; // Set Byte if Greater or Equal (SF=OF)
SMPTypeCategory[STARS_NN_setl] = 2; // Set Byte if Less (SF!=OF)
SMPTypeCategory[STARS_NN_setle] = 2; // Set Byte if Less or Equal (ZF=1 | SF!=OF)
SMPTypeCategory[STARS_NN_setna] = 2; // Set Byte if Not Above (CF=1 | ZF=1)
SMPTypeCategory[STARS_NN_setnae] = 2; // Set Byte if Not Above or Equal (CF=1)
SMPTypeCategory[STARS_NN_setnb] = 2; // Set Byte if Not Below (CF=0)
SMPTypeCategory[STARS_NN_setnbe] = 2; // Set Byte if Not Below or Equal (CF=0 & ZF=0)
SMPTypeCategory[STARS_NN_setnc] = 2; // Set Byte if Not Carry (CF=0)
SMPTypeCategory[STARS_NN_setne] = 2; // Set Byte if Not Equal (ZF=0)
SMPTypeCategory[STARS_NN_setng] = 2; // Set Byte if Not Greater (ZF=1 | SF!=OF)
SMPTypeCategory[STARS_NN_setnge] = 2; // Set Byte if Not Greater or Equal (SF!=OF)
SMPTypeCategory[STARS_NN_setnl] = 2; // Set Byte if Not Less (SF=OF)
SMPTypeCategory[STARS_NN_setnle] = 2; // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
SMPTypeCategory[STARS_NN_setno] = 2; // Set Byte if Not Overflow (OF=0)
SMPTypeCategory[STARS_NN_setnp] = 2; // Set Byte if Not Parity (PF=0)
SMPTypeCategory[STARS_NN_setns] = 2; // Set Byte if Not Sign (SF=0)
SMPTypeCategory[STARS_NN_setnz] = 2; // Set Byte if Not Zero (ZF=0)
SMPTypeCategory[STARS_NN_seto] = 2; // Set Byte if Overflow (OF=1)
SMPTypeCategory[STARS_NN_setp] = 2; // Set Byte if Parity (PF=1)
SMPTypeCategory[STARS_NN_setpe] = 2; // Set Byte if Parity Even (PF=1)
SMPTypeCategory[STARS_NN_setpo] = 2; // Set Byte if Parity Odd (PF=0)
SMPTypeCategory[STARS_NN_sets] = 2; // Set Byte if Sign (SF=1)
SMPTypeCategory[STARS_NN_setz] = 2; // Set Byte if Zero (ZF=1)
SMPTypeCategory[STARS_NN_sgdt] = 0; // Store Global Descriptor Table Register
SMPTypeCategory[STARS_NN_sidt] = 0; // Store Interrupt Descriptor Table Register
SMPTypeCategory[STARS_NN_shld] = 2; // Double Precision Shift Left
SMPTypeCategory[STARS_NN_shrd] = 2; // Double Precision Shift Right
SMPTypeCategory[STARS_NN_sldt] = 6; // Store Local Descriptor Table Register
SMPTypeCategory[STARS_NN_smsw] = 2; // Store Machine Status Word
SMPTypeCategory[STARS_NN_stc] = 1; // Set Carry Flag
SMPTypeCategory[STARS_NN_std] = 1; // Set Direction Flag
SMPTypeCategory[STARS_NN_sti] = 1; // Set Interrupt Flag
SMPTypeCategory[STARS_NN_stos] = 0; // Store String
SMPTypeCategory[STARS_NN_str] = 6; // Store Task Register
SMPTypeCategory[STARS_NN_sub] = 5; // Integer Subtraction
SMPTypeCategory[STARS_NN_test] = 1; // Logical Compare
SMPTypeCategory[STARS_NN_verr] = 1; // Verify a Segment for Reading
SMPTypeCategory[STARS_NN_verw] = 1; // Verify a Segment for Writing
SMPTypeCategory[STARS_NN_wait] = 1; // Wait until BUSY# Pin is Inactive (HIGH)
SMPTypeCategory[STARS_NN_xchg] = 12; // Exchange Register/Memory with Register
SMPTypeCategory[STARS_NN_xlat] = 0; // Table Lookup Translation
SMPTypeCategory[STARS_NN_xor] = 2; // Logical Exclusive OR
//
// 486 instructions
//
SMPTypeCategory[STARS_NN_cmpxchg] = 12; // Compare and Exchange
SMPTypeCategory[STARS_NN_bswap] = 1; // Swap bytes in register
SMPTypeCategory[STARS_NN_xadd] = 12; // t<-dest; dest<-src+dest; src<-t
SMPTypeCategory[STARS_NN_invd] = 1; // Invalidate Data Cache
SMPTypeCategory[STARS_NN_wbinvd] = 1; // Invalidate Data Cache (write changes)
SMPTypeCategory[STARS_NN_invlpg] = 1; // Invalidate TLB entry
//
// Pentium instructions
//
SMPTypeCategory[STARS_NN_rdmsr] = 8; // Read Machine Status Register
SMPTypeCategory[STARS_NN_wrmsr] = 1; // Write Machine Status Register
SMPTypeCategory[STARS_NN_cpuid] = 8; // Get CPU ID
SMPTypeCategory[STARS_NN_cmpxchg8b] = 12; // Compare and Exchange Eight Bytes
SMPTypeCategory[STARS_NN_rdtsc] = 8; // Read Time Stamp Counter
SMPTypeCategory[STARS_NN_rsm] = 1; // Resume from System Management Mode
//
// Pentium Pro instructions
//
SMPTypeCategory[STARS_NN_cmova] = 0; // Move if Above (CF=0 & ZF=0)
SMPTypeCategory[STARS_NN_cmovb] = 0; // Move if Below (CF=1)
SMPTypeCategory[STARS_NN_cmovbe] = 0; // Move if Below or Equal (CF=1 | ZF=1)
SMPTypeCategory[STARS_NN_cmovg] = 0; // Move if Greater (ZF=0 & SF=OF)
SMPTypeCategory[STARS_NN_cmovge] = 0; // Move if Greater or Equal (SF=OF)
SMPTypeCategory[STARS_NN_cmovl] = 0; // Move if Less (SF!=OF)
SMPTypeCategory[STARS_NN_cmovle] = 0; // Move if Less or Equal (ZF=1 | SF!=OF)
SMPTypeCategory[STARS_NN_cmovnb] = 0; // Move if Not Below (CF=0)
SMPTypeCategory[STARS_NN_cmovno] = 0; // Move if Not Overflow (OF=0)
SMPTypeCategory[STARS_NN_cmovnp] = 0; // Move if Not Parity (PF=0)
SMPTypeCategory[STARS_NN_cmovns] = 0; // Move if Not Sign (SF=0)
SMPTypeCategory[STARS_NN_cmovnz] = 0; // Move if Not Zero (ZF=0)
SMPTypeCategory[STARS_NN_cmovo] = 0; // Move if Overflow (OF=1)
SMPTypeCategory[STARS_NN_cmovp] = 0; // Move if Parity (PF=1)
SMPTypeCategory[STARS_NN_cmovs] = 0; // Move if Sign (SF=1)
SMPTypeCategory[STARS_NN_cmovz] = 0; // Move if Zero (ZF=1)
SMPTypeCategory[STARS_NN_fcmovb] = 1; // Floating Move if Below
SMPTypeCategory[STARS_NN_fcmove] = 1; // Floating Move if Equal
SMPTypeCategory[STARS_NN_fcmovbe] = 1; // Floating Move if Below or Equal
SMPTypeCategory[STARS_NN_fcmovu] = 1; // Floating Move if Unordered
SMPTypeCategory[STARS_NN_fcmovnb] = 1; // Floating Move if Not Below
SMPTypeCategory[STARS_NN_fcmovne] = 1; // Floating Move if Not Equal
SMPTypeCategory[STARS_NN_fcmovnbe] = 1; // Floating Move if Not Below or Equal
SMPTypeCategory[STARS_NN_fcmovnu] = 1; // Floating Move if Not Unordered
SMPTypeCategory[STARS_NN_fcomi] = 1; // FP Compare, result in EFLAGS
SMPTypeCategory[STARS_NN_fucomi] = 1; // FP Unordered Compare, result in EFLAGS
SMPTypeCategory[STARS_NN_fcomip] = 1; // FP Compare, result in EFLAGS, pop stack
SMPTypeCategory[STARS_NN_fucomip] = 1; // FP Unordered Compare, result in EFLAGS, pop stack
SMPTypeCategory[STARS_NN_rdpmc] = 8; // Read Performance Monitor Counter
//
// FPP instructions
//
SMPTypeCategory[STARS_NN_fld] = 14; // Load Real ** Infer src is 'n'
SMPTypeCategory[STARS_NN_fst] = 9; // Store Real
SMPTypeCategory[STARS_NN_fstp] = 9; // Store Real and Pop
SMPTypeCategory[STARS_NN_fxch] = 1; // Exchange Registers
SMPTypeCategory[STARS_NN_fild] = 14; // Load Integer ** Infer src is 'n'
SMPTypeCategory[STARS_NN_fist] = 13; // Store Integer
SMPTypeCategory[STARS_NN_fistp] = 13; // Store Integer and Pop
SMPTypeCategory[STARS_NN_fbld] = 1; // Load BCD
SMPTypeCategory[STARS_NN_fbstp] = 13; // Store BCD and Pop
SMPTypeCategory[STARS_NN_fadd] = 14; // Add Real
SMPTypeCategory[STARS_NN_faddp] = 14; // Add Real and Pop
SMPTypeCategory[STARS_NN_fiadd] = 14; // Add Integer
SMPTypeCategory[STARS_NN_fsub] = 14; // Subtract Real
SMPTypeCategory[STARS_NN_fsubp] = 14; // Subtract Real and Pop
SMPTypeCategory[STARS_NN_fisub] = 14; // Subtract Integer
SMPTypeCategory[STARS_NN_fsubr] = 14; // Subtract Real Reversed
SMPTypeCategory[STARS_NN_fsubrp] = 14; // Subtract Real Reversed and Pop
SMPTypeCategory[STARS_NN_fisubr] = 14; // Subtract Integer Reversed
SMPTypeCategory[STARS_NN_fmul] = 14; // Multiply Real
SMPTypeCategory[STARS_NN_fmulp] = 14; // Multiply Real and Pop
SMPTypeCategory[STARS_NN_fimul] = 14; // Multiply Integer
SMPTypeCategory[STARS_NN_fdiv] = 14; // Divide Real
SMPTypeCategory[STARS_NN_fdivp] = 14; // Divide Real and Pop
SMPTypeCategory[STARS_NN_fidiv] = 14; // Divide Integer
SMPTypeCategory[STARS_NN_fdivr] = 14; // Divide Real Reversed
SMPTypeCategory[STARS_NN_fdivrp] = 14; // Divide Real Reversed and Pop
SMPTypeCategory[STARS_NN_fidivr] = 14; // Divide Integer Reversed
SMPTypeCategory[STARS_NN_fsqrt] = 1; // Square Root
SMPTypeCategory[STARS_NN_fscale] = 1; // Scale: st(0) <- st(0) * 2^st(1)
SMPTypeCategory[STARS_NN_fprem] = 1; // Partial Remainder
SMPTypeCategory[STARS_NN_frndint] = 1; // Round to Integer
SMPTypeCategory[STARS_NN_fxtract] = 1; // Extract exponent and significand
SMPTypeCategory[STARS_NN_fabs] = 1; // Absolute value
SMPTypeCategory[STARS_NN_fchs] = 1; // Change Sign
SMPTypeCategory[STARS_NN_fcom] = 1; // Compare Real
SMPTypeCategory[STARS_NN_fcomp] = 1; // Compare Real and Pop
SMPTypeCategory[STARS_NN_fcompp] = 1; // Compare Real and Pop Twice
SMPTypeCategory[STARS_NN_ficom] = 1; // Compare Integer
SMPTypeCategory[STARS_NN_ficomp] = 1; // Compare Integer and Pop
SMPTypeCategory[STARS_NN_ftst] = 1; // Test
SMPTypeCategory[STARS_NN_fxam] = 1; // Examine
SMPTypeCategory[STARS_NN_fptan] = 1; // Partial tangent
SMPTypeCategory[STARS_NN_fpatan] = 1; // Partial arctangent
SMPTypeCategory[STARS_NN_f2xm1] = 1; // 2^x - 1
SMPTypeCategory[STARS_NN_fyl2x] = 1; // Y * lg2(X)
SMPTypeCategory[STARS_NN_fyl2xp1] = 1; // Y * lg2(X+1)
SMPTypeCategory[STARS_NN_fldz] = 1; // Load +0.0
SMPTypeCategory[STARS_NN_fld1] = 1; // Load +1.0
SMPTypeCategory[STARS_NN_fldpi] = 1; // Load PI=3.14...
SMPTypeCategory[STARS_NN_fldl2t] = 1; // Load lg2(10)
SMPTypeCategory[STARS_NN_fldl2e] = 1; // Load lg2(e)
SMPTypeCategory[STARS_NN_fldlg2] = 1; // Load lg10(2)
SMPTypeCategory[STARS_NN_fldln2] = 1; // Load ln(2)
SMPTypeCategory[STARS_NN_finit] = 1; // Initialize Processor
SMPTypeCategory[STARS_NN_fninit] = 1; // Initialize Processor (no wait)
SMPTypeCategory[STARS_NN_fsetpm] = 1; // Set Protected Mode
SMPTypeCategory[STARS_NN_fldcw] = 14; // Load Control Word
SMPTypeCategory[STARS_NN_fstcw] = 13; // Store Control Word
SMPTypeCategory[STARS_NN_fnstcw] = 13; // Store Control Word (no wait)
SMPTypeCategory[STARS_NN_fstsw] = 2; // Store Status Word to memory or AX
SMPTypeCategory[STARS_NN_fnstsw] = 2; // Store Status Word (no wait) to memory or AX
SMPTypeCategory[STARS_NN_fclex] = 1; // Clear Exceptions
SMPTypeCategory[STARS_NN_fnclex] = 1; // Clear Exceptions (no wait)
SMPTypeCategory[STARS_NN_fstenv] = 13; // Store Environment
SMPTypeCategory[STARS_NN_fnstenv] = 13; // Store Environment (no wait)
SMPTypeCategory[STARS_NN_fldenv] = 14; // Load Environment
SMPTypeCategory[STARS_NN_fsave] = 13; // Save State
SMPTypeCategory[STARS_NN_fnsave] = 13; // Save State (no wait)
SMPTypeCategory[STARS_NN_frstor] = 14; // Restore State ** infer src is 'n'
SMPTypeCategory[STARS_NN_fincstp] = 1; // Increment Stack Pointer
SMPTypeCategory[STARS_NN_fdecstp] = 1; // Decrement Stack Pointer
SMPTypeCategory[STARS_NN_ffree] = 1; // Free Register
SMPTypeCategory[STARS_NN_fnop] = 1; // No Operation
SMPTypeCategory[STARS_NN_feni] = 1; // (8087 only)
SMPTypeCategory[STARS_NN_fneni] = 1; // (no wait) (8087 only)
SMPTypeCategory[STARS_NN_fdisi] = 1; // (8087 only)
SMPTypeCategory[STARS_NN_fndisi] = 1; // (no wait) (8087 only)
//
// 80387 instructions
//
SMPTypeCategory[STARS_NN_fprem1] = 1; // Partial Remainder ( < half )
SMPTypeCategory[STARS_NN_fsincos] = 1; // t<-cos(st); st<-sin(st); push t
SMPTypeCategory[STARS_NN_fsin] = 1; // Sine
SMPTypeCategory[STARS_NN_fcos] = 1; // Cosine
SMPTypeCategory[STARS_NN_fucom] = 1; // Compare Unordered Real
SMPTypeCategory[STARS_NN_fucomp] = 1; // Compare Unordered Real and Pop
SMPTypeCategory[STARS_NN_fucompp] = 1; // Compare Unordered Real and Pop Twice
//
// Instructions added 28.02.96
//
SMPTypeCategory[STARS_NN_setalc] = 2; // Set AL to Carry Flag **
SMPTypeCategory[STARS_NN_svdc] = 0; // Save Register and Descriptor
SMPTypeCategory[STARS_NN_rsdc] = 0; // Restore Register and Descriptor
SMPTypeCategory[STARS_NN_svldt] = 0; // Save LDTR and Descriptor
SMPTypeCategory[STARS_NN_rsldt] = 0; // Restore LDTR and Descriptor
SMPTypeCategory[STARS_NN_svts] = 1; // Save TR and Descriptor
SMPTypeCategory[STARS_NN_rsts] = 1; // Restore TR and Descriptor
SMPTypeCategory[STARS_NN_icebp] = 1; // ICE Break Point
SMPTypeCategory[STARS_NN_loadall] = 0; // Load the entire CPU state from ES:EDI ???
//
// MMX instructions
//
SMPTypeCategory[STARS_NN_emms] = 1; // Empty MMX state
SMPTypeCategory[STARS_NN_movd] = 15; // Move 32 bits
SMPTypeCategory[STARS_NN_movq] = 15; // Move 64 bits
SMPTypeCategory[STARS_NN_packsswb] = 14; // Pack with Signed Saturation (Word->Byte)
SMPTypeCategory[STARS_NN_packssdw] = 14; // Pack with Signed Saturation (Dword->Word)
SMPTypeCategory[STARS_NN_packuswb] = 14; // Pack with Unsigned Saturation (Word->Byte)
SMPTypeCategory[STARS_NN_paddb] = 14; // Packed Add Byte
SMPTypeCategory[STARS_NN_paddw] = 14; // Packed Add Word
SMPTypeCategory[STARS_NN_paddd] = 14; // Packed Add Dword
SMPTypeCategory[STARS_NN_paddsb] = 14; // Packed Add with Saturation (Byte)
SMPTypeCategory[STARS_NN_paddsw] = 14; // Packed Add with Saturation (Word)
SMPTypeCategory[STARS_NN_paddusb] = 14; // Packed Add Unsigned with Saturation (Byte)
SMPTypeCategory[STARS_NN_paddusw] = 14; // Packed Add Unsigned with Saturation (Word)
SMPTypeCategory[STARS_NN_pand] = 14; // Bitwise Logical And
SMPTypeCategory[STARS_NN_pandn] = 14; // Bitwise Logical And Not
SMPTypeCategory[STARS_NN_pcmpeqb] = 14; // Packed Compare for Equal (Byte)
SMPTypeCategory[STARS_NN_pcmpeqw] = 14; // Packed Compare for Equal (Word)
SMPTypeCategory[STARS_NN_pcmpeqd] = 14; // Packed Compare for Equal (Dword)
SMPTypeCategory[STARS_NN_pcmpgtb] = 14; // Packed Compare for Greater Than (Byte)
SMPTypeCategory[STARS_NN_pcmpgtw] = 14; // Packed Compare for Greater Than (Word)
SMPTypeCategory[STARS_NN_pcmpgtd] = 14; // Packed Compare for Greater Than (Dword)
SMPTypeCategory[STARS_NN_pmaddwd] = 14; // Packed Multiply and Add
SMPTypeCategory[STARS_NN_pmulhw] = 14; // Packed Multiply High
SMPTypeCategory[STARS_NN_pmullw] = 14; // Packed Multiply Low
SMPTypeCategory[STARS_NN_por] = 14; // Bitwise Logical Or
SMPTypeCategory[STARS_NN_psllw] = 14; // Packed Shift Left Logical (Word)
SMPTypeCategory[STARS_NN_pslld] = 14; // Packed Shift Left Logical (Dword)
SMPTypeCategory[STARS_NN_psllq] = 14; // Packed Shift Left Logical (Qword)
SMPTypeCategory[STARS_NN_psraw] = 14; // Packed Shift Right Arithmetic (Word)
SMPTypeCategory[STARS_NN_psrad] = 14; // Packed Shift Right Arithmetic (Dword)
SMPTypeCategory[STARS_NN_psrlw] = 14; // Packed Shift Right Logical (Word)
SMPTypeCategory[STARS_NN_psrld] = 14; // Packed Shift Right Logical (Dword)
SMPTypeCategory[STARS_NN_psrlq] = 14; // Packed Shift Right Logical (Qword)
SMPTypeCategory[STARS_NN_psubb] = 14; // Packed Subtract Byte
SMPTypeCategory[STARS_NN_psubw] = 14; // Packed Subtract Word
SMPTypeCategory[STARS_NN_psubd] = 14; // Packed Subtract Dword
SMPTypeCategory[STARS_NN_psubsb] = 14; // Packed Subtract with Saturation (Byte)
SMPTypeCategory[STARS_NN_psubsw] = 14; // Packed Subtract with Saturation (Word)
SMPTypeCategory[STARS_NN_psubusb] = 14; // Packed Subtract Unsigned with Saturation (Byte)
SMPTypeCategory[STARS_NN_psubusw] = 14; // Packed Subtract Unsigned with Saturation (Word)
SMPTypeCategory[STARS_NN_punpckhbw] = 14; // Unpack High Packed Data (Byte->Word)
SMPTypeCategory[STARS_NN_punpckhwd] = 14; // Unpack High Packed Data (Word->Dword)
SMPTypeCategory[STARS_NN_punpckhdq] = 14; // Unpack High Packed Data (Dword->Qword)
SMPTypeCategory[STARS_NN_punpcklbw] = 14; // Unpack Low Packed Data (Byte->Word)
SMPTypeCategory[STARS_NN_punpcklwd] = 14; // Unpack Low Packed Data (Word->Dword)
SMPTypeCategory[STARS_NN_punpckldq] = 14; // Unpack Low Packed Data (Dword->Qword)
SMPTypeCategory[STARS_NN_pxor] = 14; // Bitwise Logical Exclusive Or
//
// Undocumented Deschutes processor instructions
//
SMPTypeCategory[STARS_NN_fxsave] = 1; // Fast save FP context ** to where?
SMPTypeCategory[STARS_NN_fxrstor] = 1; // Fast restore FP context ** from where?
// Pentium II instructions
SMPTypeCategory[STARS_NN_sysenter] = 1; // Fast Transition to System Call Entry Point
SMPTypeCategory[STARS_NN_sysexit] = 1; // Fast Transition from System Call Entry Point
// 3DNow! instructions
SMPTypeCategory[STARS_NN_pavgusb] = 14; // Packed 8-bit Unsigned Integer Averaging
SMPTypeCategory[STARS_NN_pfadd] = 14; // Packed Floating-Point Addition
SMPTypeCategory[STARS_NN_pfsub] = 14; // Packed Floating-Point Subtraction
SMPTypeCategory[STARS_NN_pfsubr] = 14; // Packed Floating-Point Reverse Subtraction
SMPTypeCategory[STARS_NN_pfacc] = 14; // Packed Floating-Point Accumulate
SMPTypeCategory[STARS_NN_pfcmpge] = 14; // Packed Floating-Point Comparison, Greater or Equal
SMPTypeCategory[STARS_NN_pfcmpgt] = 14; // Packed Floating-Point Comparison, Greater
SMPTypeCategory[STARS_NN_pfcmpeq] = 14; // Packed Floating-Point Comparison, Equal
SMPTypeCategory[STARS_NN_pfmin] = 14; // Packed Floating-Point Minimum
SMPTypeCategory[STARS_NN_pfmax] = 14; // Packed Floating-Point Maximum
SMPTypeCategory[STARS_NN_pi2fd] = 14; // Packed 32-bit Integer to Floating-Point
SMPTypeCategory[STARS_NN_pf2id] = 14; // Packed Floating-Point to 32-bit Integer
SMPTypeCategory[STARS_NN_pfrcp] = 14; // Packed Floating-Point Reciprocal Approximation
SMPTypeCategory[STARS_NN_pfrsqrt] = 14; // Packed Floating-Point Reciprocal Square Root Approximation
SMPTypeCategory[STARS_NN_pfmul] = 14; // Packed Floating-Point Multiplication
SMPTypeCategory[STARS_NN_pfrcpit1] = 14; // Packed Floating-Point Reciprocal First Iteration Step
SMPTypeCategory[STARS_NN_pfrsqit1] = 14; // Packed Floating-Point Reciprocal Square Root First Iteration Step
SMPTypeCategory[STARS_NN_pfrcpit2] = 14; // Packed Floating-Point Reciprocal Second Iteration Step
SMPTypeCategory[STARS_NN_pmulhrw] = 14; // Packed Floating-Point 16-bit Integer Multiply with rounding
SMPTypeCategory[STARS_NN_femms] = 1; // Faster entry/exit of the MMX or floating-point state
SMPTypeCategory[STARS_NN_prefetch] = 16; // Prefetch at least a 32-byte line into L1 data cache
SMPTypeCategory[STARS_NN_prefetchw] = 16; // Prefetch processor cache line into L1 data cache (mark as modified)
// Pentium III instructions
SMPTypeCategory[STARS_NN_addps] = 14; // Packed Single-FP Add
SMPTypeCategory[STARS_NN_addss] = 14; // Scalar Single-FP Add
SMPTypeCategory[STARS_NN_andnps] = 14; // Bitwise Logical And Not for Single-FP
SMPTypeCategory[STARS_NN_andps] = 14; // Bitwise Logical And for Single-FP
SMPTypeCategory[STARS_NN_cmpps] = 14; // Packed Single-FP Compare
SMPTypeCategory[STARS_NN_cmpss] = 14; // Scalar Single-FP Compare
SMPTypeCategory[STARS_NN_comiss] = 14; // Scalar Ordered Single-FP Compare and Set EFLAGS
SMPTypeCategory[STARS_NN_cvtpi2ps] = 14; // Packed signed INT32 to Packed Single-FP conversion
SMPTypeCategory[STARS_NN_cvtps2pi] = 14; // Packed Single-FP to Packed INT32 conversion
SMPTypeCategory[STARS_NN_cvtsi2ss] = 14; // Scalar signed INT32 to Single-FP conversion
SMPTypeCategory[STARS_NN_cvtss2si] = 14; // Scalar Single-FP to signed INT32 conversion
SMPTypeCategory[STARS_NN_cvttps2pi] = 14; // Packed Single-FP to Packed INT32 conversion (truncate)
SMPTypeCategory[STARS_NN_cvttss2si] = 14; // Scalar Single-FP to signed INT32 conversion (truncate)
SMPTypeCategory[STARS_NN_divps] = 14; // Packed Single-FP Divide
SMPTypeCategory[STARS_NN_divss] = 14; // Scalar Single-FP Divide
SMPTypeCategory[STARS_NN_ldmxcsr] = 14; // Load Streaming SIMD Extensions Technology Control/Status Register
SMPTypeCategory[STARS_NN_maxps] = 14; // Packed Single-FP Maximum
SMPTypeCategory[STARS_NN_maxss] = 14; // Scalar Single-FP Maximum
SMPTypeCategory[STARS_NN_minps] = 14; // Packed Single-FP Minimum
SMPTypeCategory[STARS_NN_minss] = 14; // Scalar Single-FP Minimum
SMPTypeCategory[STARS_NN_movaps] = 15; // Move Aligned Four Packed Single-FP ** infer memsrc 'n'?
SMPTypeCategory[STARS_NN_movhlps] = 15; // Move High to Low Packed Single-FP
SMPTypeCategory[STARS_NN_movhps] = 15; // Move High Packed Single-FP
SMPTypeCategory[STARS_NN_movlhps] = 15; // Move Low to High Packed Single-FP
SMPTypeCategory[STARS_NN_movlps] = 15; // Move Low Packed Single-FP
SMPTypeCategory[STARS_NN_movmskps] = 15; // Move Mask to Register
SMPTypeCategory[STARS_NN_movss] = 15; // Move Scalar Single-FP
SMPTypeCategory[STARS_NN_movups] = 15; // Move Unaligned Four Packed Single-FP
SMPTypeCategory[STARS_NN_mulps] = 14; // Packed Single-FP Multiply
SMPTypeCategory[STARS_NN_mulss] = 14; // Scalar Single-FP Multiply
SMPTypeCategory[STARS_NN_orps] = 14; // Bitwise Logical OR for Single-FP Data
SMPTypeCategory[STARS_NN_rcpps] = 14; // Packed Single-FP Reciprocal
SMPTypeCategory[STARS_NN_rcpss] = 14; // Scalar Single-FP Reciprocal
SMPTypeCategory[STARS_NN_rsqrtps] = 14; // Packed Single-FP Square Root Reciprocal
SMPTypeCategory[STARS_NN_rsqrtss] = 14; // Scalar Single-FP Square Root Reciprocal
SMPTypeCategory[STARS_NN_shufps] = 14; // Shuffle Single-FP
SMPTypeCategory[STARS_NN_sqrtps] = 14; // Packed Single-FP Square Root
SMPTypeCategory[STARS_NN_sqrtss] = 14; // Scalar Single-FP Square Root
SMPTypeCategory[STARS_NN_stmxcsr] = 15; // Store Streaming SIMD Extensions Technology Control/Status Register ** Infer dest is 'n'
SMPTypeCategory[STARS_NN_subps] = 14; // Packed Single-FP Subtract
SMPTypeCategory[STARS_NN_subss] = 14; // Scalar Single-FP Subtract
SMPTypeCategory[STARS_NN_ucomiss] = 14; // Scalar Unordered Single-FP Compare and Set EFLAGS
SMPTypeCategory[STARS_NN_unpckhps] = 14; // Unpack High Packed Single-FP Data
SMPTypeCategory[STARS_NN_unpcklps] = 14; // Unpack Low Packed Single-FP Data
SMPTypeCategory[STARS_NN_xorps] = 14; // Bitwise Logical XOR for Single-FP Data
SMPTypeCategory[STARS_NN_pavgb] = 14; // Packed Average (Byte)
SMPTypeCategory[STARS_NN_pavgw] = 14; // Packed Average (Word)
SMPTypeCategory[STARS_NN_pextrw] = 15; // Extract Word
SMPTypeCategory[STARS_NN_pinsrw] = 14; // Insert Word
SMPTypeCategory[STARS_NN_pmaxsw] = 14; // Packed Signed Integer Word Maximum
SMPTypeCategory[STARS_NN_pmaxub] = 14; // Packed Unsigned Integer Byte Maximum
SMPTypeCategory[STARS_NN_pminsw] = 14; // Packed Signed Integer Word Minimum
SMPTypeCategory[STARS_NN_pminub] = 14; // Packed Unsigned Integer Byte Minimum
SMPTypeCategory[STARS_NN_pmovmskb] = 2; // Move Byte Mask to Integer
SMPTypeCategory[STARS_NN_pmulhuw] = 14; // Packed Multiply High Unsigned
SMPTypeCategory[STARS_NN_psadbw] = 14; // Packed Sum of Absolute Differences
SMPTypeCategory[STARS_NN_pshufw] = 14; // Packed Shuffle Word
SMPTypeCategory[STARS_NN_maskmovq] = 15; // Byte Mask write ** Infer dest is 'n'
SMPTypeCategory[STARS_NN_movntps] = 13; // Move Aligned Four Packed Single-FP Non Temporal * infer dest is 'n'
SMPTypeCategory[STARS_NN_movntq] = 13; // Move 64 Bits Non Temporal ** Infer dest is 'n'
SMPTypeCategory[STARS_NN_prefetcht0] = 16; // Prefetch to all cache levels
SMPTypeCategory[STARS_NN_prefetcht1] = 16; // Prefetch to all cache levels
SMPTypeCategory[STARS_NN_prefetcht2] = 16; // Prefetch to L2 cache
SMPTypeCategory[STARS_NN_prefetchnta] = 16; // Prefetch to L1 cache
SMPTypeCategory[STARS_NN_sfence] = 1; // Store Fence
// Pentium III Pseudo instructions
SMPTypeCategory[STARS_NN_cmpeqps] = 14; // Packed Single-FP Compare EQ
SMPTypeCategory[STARS_NN_cmpltps] = 14; // Packed Single-FP Compare LT
SMPTypeCategory[STARS_NN_cmpleps] = 14; // Packed Single-FP Compare LE
SMPTypeCategory[STARS_NN_cmpunordps] = 14; // Packed Single-FP Compare UNORD
SMPTypeCategory[STARS_NN_cmpneqps] = 14; // Packed Single-FP Compare NOT EQ
SMPTypeCategory[STARS_NN_cmpnltps] = 14; // Packed Single-FP Compare NOT LT
SMPTypeCategory[STARS_NN_cmpnleps] = 14; // Packed Single-FP Compare NOT LE
SMPTypeCategory[STARS_NN_cmpordps] = 14; // Packed Single-FP Compare ORDERED
SMPTypeCategory[STARS_NN_cmpeqss] = 14; // Scalar Single-FP Compare EQ
SMPTypeCategory[STARS_NN_cmpltss] = 14; // Scalar Single-FP Compare LT
SMPTypeCategory[STARS_NN_cmpless] = 14; // Scalar Single-FP Compare LE
SMPTypeCategory[STARS_NN_cmpunordss] = 14; // Scalar Single-FP Compare UNORD
SMPTypeCategory[STARS_NN_cmpneqss] = 14; // Scalar Single-FP Compare NOT EQ
SMPTypeCategory[STARS_NN_cmpnltss] = 14; // Scalar Single-FP Compare NOT LT
SMPTypeCategory[STARS_NN_cmpnless] = 14; // Scalar Single-FP Compare NOT LE
SMPTypeCategory[STARS_NN_cmpordss] = 14; // Scalar Single-FP Compare ORDERED
// AMD K7 instructions
// Revisit AMD if we port to it.
SMPTypeCategory[STARS_NN_pf2iw] = 15; // Packed Floating-Point to Integer with Sign Extend
SMPTypeCategory[STARS_NN_pfnacc] = 15; // Packed Floating-Point Negative Accumulate
SMPTypeCategory[STARS_NN_pfpnacc] = 15; // Packed Floating-Point Mixed Positive-Negative Accumulate
SMPTypeCategory[STARS_NN_pi2fw] = 15; // Packed 16-bit Integer to Floating-Point
SMPTypeCategory[STARS_NN_pswapd] = 15; // Packed Swap Double Word
// Undocumented FP instructions (thanks to norbert.juffa@adm.com)
SMPTypeCategory[STARS_NN_fstp1] = 9; // Alias of Store Real and Pop
SMPTypeCategory[STARS_NN_fcom2] = 1; // Alias of Compare Real
SMPTypeCategory[STARS_NN_fcomp3] = 1; // Alias of Compare Real and Pop
SMPTypeCategory[STARS_NN_fxch4] = 1; // Alias of Exchange Registers
SMPTypeCategory[STARS_NN_fcomp5] = 1; // Alias of Compare Real and Pop
SMPTypeCategory[STARS_NN_ffreep] = 1; // Free Register and Pop
SMPTypeCategory[STARS_NN_fxch7] = 1; // Alias of Exchange Registers
SMPTypeCategory[STARS_NN_fstp8] = 9; // Alias of Store Real and Pop
SMPTypeCategory[STARS_NN_fstp9] = 9; // Alias of Store Real and Pop
// Pentium 4 instructions
SMPTypeCategory[STARS_NN_addpd] = 14; // Add Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_addsd] = 14; // Add Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_andnpd] = 14; // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_andpd] = 14; // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_clflush] = 16; // Flush Cache Line
SMPTypeCategory[STARS_NN_cmppd] = 14; // Compare Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_cmpsd] = 14; // Compare Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_comisd] = 14; // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
SMPTypeCategory[STARS_NN_cvtdq2pd] = 14; // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_cvtdq2ps] = 14; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_cvtpd2dq] = 14; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
SMPTypeCategory[STARS_NN_cvtpd2pi] = 14; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
SMPTypeCategory[STARS_NN_cvtpd2ps] = 14; // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_cvtpi2pd] = 14; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_cvtps2dq] = 14; // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
SMPTypeCategory[STARS_NN_cvtps2pd] = 14; // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_cvtsd2si] = 14; // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
SMPTypeCategory[STARS_NN_cvtsd2ss] = 14; // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
SMPTypeCategory[STARS_NN_cvtsi2sd] = 14; // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
SMPTypeCategory[STARS_NN_cvtss2sd] = 14; // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
SMPTypeCategory[STARS_NN_cvttpd2dq] = 14; // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
SMPTypeCategory[STARS_NN_cvttpd2pi] = 14; // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
SMPTypeCategory[STARS_NN_cvttps2dq] = 14; // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
SMPTypeCategory[STARS_NN_cvttsd2si] = 14; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
SMPTypeCategory[STARS_NN_divpd] = 14; // Divide Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_divsd] = 14; // Divide Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_lfence] = 1; // Load Fence
SMPTypeCategory[STARS_NN_maskmovdqu] = 13; // Store Selected Bytes of Double Quadword ** Infer dest is 'n'
SMPTypeCategory[STARS_NN_maxpd] = 14; // Return Maximum Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_maxsd] = 14; // Return Maximum Scalar Double-Precision Floating-Point Value
SMPTypeCategory[STARS_NN_mfence] = 1; // Memory Fence
SMPTypeCategory[STARS_NN_minpd] = 14; // Return Minimum Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_minsd] = 14; // Return Minimum Scalar Double-Precision Floating-Point Value
SMPTypeCategory[STARS_NN_movapd] = 15; // Move Aligned Packed Double-Precision Floating-Point Values ** Infer dest is 'n'
SMPTypeCategory[STARS_NN_movdq2q] = 15; // Move Quadword from XMM to MMX Register
SMPTypeCategory[STARS_NN_movdqa] = 15; // Move Aligned Double Quadword ** Infer dest is 'n'
SMPTypeCategory[STARS_NN_movdqu] = 15; // Move Unaligned Double Quadword ** Infer dest is 'n'
SMPTypeCategory[STARS_NN_movhpd] = 15; // Move High Packed Double-Precision Floating-Point Values ** Infer dest is 'n'
SMPTypeCategory[STARS_NN_movlpd] = 15; // Move Low Packed Double-Precision Floating-Point Values ** Infer dest is 'n'
SMPTypeCategory[STARS_NN_movmskpd] = 15; // Extract Packed Double-Precision Floating-Point Sign Mask
SMPTypeCategory[STARS_NN_movntdq] = 13; // Store Double Quadword Using Non-Temporal Hint
SMPTypeCategory[STARS_NN_movnti] = 13; // Store Doubleword Using Non-Temporal Hint
SMPTypeCategory[STARS_NN_movntpd] = 13; // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
SMPTypeCategory[STARS_NN_movq2dq] = 1; // Move Quadword from MMX to XMM Register
SMPTypeCategory[STARS_NN_movsd] = 15; // Move Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_movupd] = 15; // Move Unaligned Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_mulpd] = 14; // Multiply Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_mulsd] = 14; // Multiply Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_orpd] = 14; // Bitwise Logical OR of Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_paddq] = 14; // Add Packed Quadword Integers
SMPTypeCategory[STARS_NN_pause] = 1; // Spin Loop Hint
SMPTypeCategory[STARS_NN_pmuludq] = 14; // Multiply Packed Unsigned Doubleword Integers
SMPTypeCategory[STARS_NN_pshufd] = 14; // Shuffle Packed Doublewords
SMPTypeCategory[STARS_NN_pshufhw] = 14; // Shuffle Packed High Words
SMPTypeCategory[STARS_NN_pshuflw] = 14; // Shuffle Packed Low Words
SMPTypeCategory[STARS_NN_pslldq] = 14; // Shift Double Quadword Left Logical
SMPTypeCategory[STARS_NN_psrldq] = 14; // Shift Double Quadword Right Logical
SMPTypeCategory[STARS_NN_psubq] = 14; // Subtract Packed Quadword Integers
SMPTypeCategory[STARS_NN_punpckhqdq] = 14; // Unpack High Data
SMPTypeCategory[STARS_NN_punpcklqdq] = 14; // Unpack Low Data
SMPTypeCategory[STARS_NN_shufpd] = 14; // Shuffle Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_sqrtpd] = 1; // Compute Square Roots of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_sqrtsd] = 14; // Compute Square Rootof Scalar Double-Precision Floating-Point Value
SMPTypeCategory[STARS_NN_subpd] = 14; // Subtract Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_subsd] = 14; // Subtract Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_ucomisd] = 14; // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
SMPTypeCategory[STARS_NN_unpckhpd] = 14; // Unpack and Interleave High Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_unpcklpd] = 14; // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_xorpd] = 14; // Bitwise Logical OR of Double-Precision Floating-Point Values
// AMD syscall/sysret instructions NOTE: not AMD, found in Intel manual
SMPTypeCategory[STARS_NN_syscall] = 1; // Low latency system call
SMPTypeCategory[STARS_NN_sysret] = 1; // Return from system call
// AMD64 instructions NOTE: not AMD, found in Intel manual
SMPTypeCategory[STARS_NN_swapgs] = 1; // Exchange GS base with KernelGSBase MSR
// New Pentium instructions (SSE3)
SMPTypeCategory[STARS_NN_movddup] = 14; // Move One Double-FP and Duplicate
SMPTypeCategory[STARS_NN_movshdup] = 14; // Move Packed Single-FP High and Duplicate
SMPTypeCategory[STARS_NN_movsldup] = 14; // Move Packed Single-FP Low and Duplicate
// Missing AMD64 instructions NOTE: also found in Intel manual
SMPTypeCategory[STARS_NN_movsxd] = 2; // Move with Sign-Extend Doubleword
SMPTypeCategory[STARS_NN_cmpxchg16b] = 0; // Compare and Exchange 16 Bytes
// SSE3 instructions
SMPTypeCategory[STARS_NN_addsubpd] = 14; // Add /Sub packed DP FP numbers
SMPTypeCategory[STARS_NN_addsubps] = 14; // Add /Sub packed SP FP numbers
SMPTypeCategory[STARS_NN_haddpd] = 14; // Add horizontally packed DP FP numbers
SMPTypeCategory[STARS_NN_haddps] = 14; // Add horizontally packed SP FP numbers
SMPTypeCategory[STARS_NN_hsubpd] = 14; // Sub horizontally packed DP FP numbers
SMPTypeCategory[STARS_NN_hsubps] = 14; // Sub horizontally packed SP FP numbers
SMPTypeCategory[STARS_NN_monitor] = 1; // Set up a linear address range to be monitored by hardware
SMPTypeCategory[STARS_NN_mwait] = 1; // Wait until write-back store performed within the range specified by the MONITOR instruction
SMPTypeCategory[STARS_NN_fisttp] = 13; // Store ST in intXX (chop) and pop
SMPTypeCategory[STARS_NN_lddqu] = 14; // Load unaligned integer 128-bit
// SSSE3 instructions
SMPTypeCategory[STARS_NN_psignb] = 14; // Packed SIGN Byte
SMPTypeCategory[STARS_NN_psignw] = 14; // Packed SIGN Word
SMPTypeCategory[STARS_NN_psignd] = 14; // Packed SIGN Doubleword
SMPTypeCategory[STARS_NN_pshufb] = 14; // Packed Shuffle Bytes
SMPTypeCategory[STARS_NN_pmulhrsw] = 14; // Packed Multiply High with Round and Scale
SMPTypeCategory[STARS_NN_pmaddubsw] = 14; // Multiply and Add Packed Signed and Unsigned Bytes
SMPTypeCategory[STARS_NN_phsubsw] = 14; // Packed Horizontal Subtract and Saturate
SMPTypeCategory[STARS_NN_phaddsw] = 14; // Packed Horizontal Add and Saturate
SMPTypeCategory[STARS_NN_phaddw] = 14; // Packed Horizontal Add Word
SMPTypeCategory[STARS_NN_phaddd] = 14; // Packed Horizontal Add Doubleword
SMPTypeCategory[STARS_NN_phsubw] = 14; // Packed Horizontal Subtract Word
SMPTypeCategory[STARS_NN_phsubd] = 14; // Packed Horizontal Subtract Doubleword
SMPTypeCategory[STARS_NN_palignr] = 15; // Packed Align Right
SMPTypeCategory[STARS_NN_pabsb] = 14; // Packed Absolute Value Byte
SMPTypeCategory[STARS_NN_pabsw] = 14; // Packed Absolute Value Word
SMPTypeCategory[STARS_NN_pabsd] = 14; // Packed Absolute Value Doubleword
// VMX instructions
SMPTypeCategory[STARS_NN_vmcall] = 1; // Call to VM Monitor
SMPTypeCategory[STARS_NN_vmclear] = 0; // Clear Virtual Machine Control Structure
SMPTypeCategory[STARS_NN_vmlaunch] = 1; // Launch Virtual Machine
SMPTypeCategory[STARS_NN_vmresume] = 1; // Resume Virtual Machine
SMPTypeCategory[STARS_NN_vmptrld] = 6; // Load Pointer to Virtual Machine Control Structure
SMPTypeCategory[STARS_NN_vmptrst] = 0; // Store Pointer to Virtual Machine Control Structure
SMPTypeCategory[STARS_NN_vmread] = 0; // Read Field from Virtual Machine Control Structure
SMPTypeCategory[STARS_NN_vmwrite] = 0; // Write Field from Virtual Machine Control Structure
SMPTypeCategory[STARS_NN_vmxoff] = 1; // Leave VMX Operation
SMPTypeCategory[STARS_NN_vmxon] = 1; // Enter VMX Operation
SMPTypeCategory[STARS_NN_ud2] = 1; // Undefined Instruction
// Added with x86-64
SMPTypeCategory[STARS_NN_rdtscp] = 8; // Read Time-Stamp Counter and Processor ID
// Geode LX 3DNow! extensions
SMPTypeCategory[STARS_NN_pfrcpv] = 1; // Reciprocal Approximation for a Pair of 32-bit Floats
SMPTypeCategory[STARS_NN_pfrsqrtv] = 1; // Reciprocal Square Root Approximation for a Pair of 32-bit Floats
// SSE2 pseudoinstructions
SMPTypeCategory[STARS_NN_cmpeqpd] = 1; // Packed Double-FP Compare EQ
SMPTypeCategory[STARS_NN_cmpltpd] = 1; // Packed Double-FP Compare LT
SMPTypeCategory[STARS_NN_cmplepd] = 1; // Packed Double-FP Compare LE
SMPTypeCategory[STARS_NN_cmpunordpd] = 1; // Packed Double-FP Compare UNORD
SMPTypeCategory[STARS_NN_cmpneqpd] = 1; // Packed Double-FP Compare NOT EQ
SMPTypeCategory[STARS_NN_cmpnltpd] = 1; // Packed Double-FP Compare NOT LT
SMPTypeCategory[STARS_NN_cmpnlepd] = 1; // Packed Double-FP Compare NOT LE
SMPTypeCategory[STARS_NN_cmpordpd] = 1; // Packed Double-FP Compare ORDERED
SMPTypeCategory[STARS_NN_cmpeqsd] = 1; // Scalar Double-FP Compare EQ
SMPTypeCategory[STARS_NN_cmpltsd] = 1; // Scalar Double-FP Compare LT
SMPTypeCategory[STARS_NN_cmplesd] = 1; // Scalar Double-FP Compare LE
SMPTypeCategory[STARS_NN_cmpunordsd] = 1; // Scalar Double-FP Compare UNORD
SMPTypeCategory[STARS_NN_cmpneqsd] = 1; // Scalar Double-FP Compare NOT EQ
SMPTypeCategory[STARS_NN_cmpnltsd] = 1; // Scalar Double-FP Compare NOT LT
SMPTypeCategory[STARS_NN_cmpnlesd] = 1; // Scalar Double-FP Compare NOT LE
SMPTypeCategory[STARS_NN_cmpordsd] = 1; // Scalar Double-FP Compare ORDERED
// SSSE4.1 instructions
SMPTypeCategory[STARS_NN_blendpd] = 14; // Blend Packed Double Precision Floating-Point Values
SMPTypeCategory[STARS_NN_blendps] = 14; // Blend Packed Single Precision Floating-Point Values
SMPTypeCategory[STARS_NN_blendvpd] = 14; // Variable Blend Packed Double Precision Floating-Point Values
SMPTypeCategory[STARS_NN_blendvps] = 14; // Variable Blend Packed Single Precision Floating-Point Values
SMPTypeCategory[STARS_NN_dppd] = 14; // Dot Product of Packed Double Precision Floating-Point Values
SMPTypeCategory[STARS_NN_dpps] = 14; // Dot Product of Packed Single Precision Floating-Point Values
SMPTypeCategory[STARS_NN_extractps] = 15; // Extract Packed Single Precision Floating-Point Value
SMPTypeCategory[STARS_NN_insertps] = 14; // Insert Packed Single Precision Floating-Point Value
SMPTypeCategory[STARS_NN_movntdqa] = 0; // Load Double Quadword Non-Temporal Aligned Hint
SMPTypeCategory[STARS_NN_mpsadbw] = 1; // Compute Multiple Packed Sums of Absolute Difference
SMPTypeCategory[STARS_NN_packusdw] = 14; // Pack with Unsigned Saturation
SMPTypeCategory[STARS_NN_pblendvb] = 14; // Variable Blend Packed Bytes
SMPTypeCategory[STARS_NN_pblendw] = 14; // Blend Packed Words
SMPTypeCategory[STARS_NN_pcmpeqq] = 14; // Compare Packed Qword Data for Equal
SMPTypeCategory[STARS_NN_pextrb] = 15; // Extract Byte
SMPTypeCategory[STARS_NN_pextrd] = 15; // Extract Dword
SMPTypeCategory[STARS_NN_pextrq] = 15; // Extract Qword
SMPTypeCategory[STARS_NN_phminposuw] = 14; // Packed Horizontal Word Minimum
SMPTypeCategory[STARS_NN_pinsrb] = 14; // Insert Byte !!! Could this be used as a generic move???
SMPTypeCategory[STARS_NN_pinsrd] = 14; // Insert Dword !!! Could this be used as a generic move???
SMPTypeCategory[STARS_NN_pinsrq] = 14; // Insert Qword !!! Could this be used as a generic move???
SMPTypeCategory[STARS_NN_pmaxsb] = 14; // Maximum of Packed Signed Byte Integers
SMPTypeCategory[STARS_NN_pmaxsd] = 14; // Maximum of Packed Signed Dword Integers
SMPTypeCategory[STARS_NN_pmaxud] = 14; // Maximum of Packed Unsigned Dword Integers
SMPTypeCategory[STARS_NN_pmaxuw] = 14; // Maximum of Packed Word Integers
SMPTypeCategory[STARS_NN_pminsb] = 14; // Minimum of Packed Signed Byte Integers
SMPTypeCategory[STARS_NN_pminsd] = 14; // Minimum of Packed Signed Dword Integers
SMPTypeCategory[STARS_NN_pminud] = 14; // Minimum of Packed Unsigned Dword Integers
SMPTypeCategory[STARS_NN_pminuw] = 14; // Minimum of Packed Word Integers
SMPTypeCategory[STARS_NN_pmovsxbw] = 14; // Packed Move with Sign Extend
SMPTypeCategory[STARS_NN_pmovsxbd] = 14; // Packed Move with Sign Extend
SMPTypeCategory[STARS_NN_pmovsxbq] = 14; // Packed Move with Sign Extend
SMPTypeCategory[STARS_NN_pmovsxwd] = 14; // Packed Move with Sign Extend
SMPTypeCategory[STARS_NN_pmovsxwq] = 14; // Packed Move with Sign Extend
SMPTypeCategory[STARS_NN_pmovsxdq] = 14; // Packed Move with Sign Extend
SMPTypeCategory[STARS_NN_pmovzxbw] = 14; // Packed Move with Zero Extend
SMPTypeCategory[STARS_NN_pmovzxbd] = 14; // Packed Move with Zero Extend
SMPTypeCategory[STARS_NN_pmovzxbq] = 14; // Packed Move with Zero Extend
SMPTypeCategory[STARS_NN_pmovzxwd] = 14; // Packed Move with Zero Extend
SMPTypeCategory[STARS_NN_pmovzxwq] = 14; // Packed Move with Zero Extend
SMPTypeCategory[STARS_NN_pmovzxdq] = 14; // Packed Move with Zero Extend
SMPTypeCategory[STARS_NN_pmuldq] = 14; // Multiply Packed Signed Dword Integers
SMPTypeCategory[STARS_NN_pmulld] = 14; // Multiply Packed Signed Dword Integers and Store Low Result
SMPTypeCategory[STARS_NN_ptest] = 1; // Logical Compare
SMPTypeCategory[STARS_NN_roundpd] = 14; // Round Packed Double Precision Floating-Point Values
SMPTypeCategory[STARS_NN_roundps] = 14; // Round Packed Single Precision Floating-Point Values
SMPTypeCategory[STARS_NN_roundsd] = 14; // Round Scalar Double Precision Floating-Point Values
SMPTypeCategory[STARS_NN_roundss] = 14; // Round Scalar Single Precision Floating-Point Values
// SSSE4.2 instructions
SMPTypeCategory[STARS_NN_crc32] = 14; // Accumulate CRC32 Value
SMPTypeCategory[STARS_NN_pcmpestri] = 2; // Packed Compare Explicit Length Strings, Return Index
SMPTypeCategory[STARS_NN_pcmpestrm] = 2; // Packed Compare Explicit Length Strings, Return Mask
SMPTypeCategory[STARS_NN_pcmpistri] = 2; // Packed Compare Implicit Length Strings, Return Index
SMPTypeCategory[STARS_NN_pcmpistrm] = 2; // Packed Compare Implicit Length Strings, Return Mask
SMPTypeCategory[STARS_NN_pcmpgtq] = 14; // Compare Packed Data for Greater Than
SMPTypeCategory[STARS_NN_popcnt] = 2; // Return the Count of Number of Bits Set to 1
// AMD SSE4a instructions
SMPTypeCategory[STARS_NN_extrq] = 1; // Extract Field From Register
SMPTypeCategory[STARS_NN_insertq] = 1; // Insert Field
SMPTypeCategory[STARS_NN_movntsd] = 13; // Move Non-Temporal Scalar Double-Precision Floating-Point !!! Could this be used as a generic move???
SMPTypeCategory[STARS_NN_movntss] = 13; // Move Non-Temporal Scalar Single-Precision Floating-Point !!! Could this be used as a generic move???
SMPTypeCategory[STARS_NN_lzcnt] = 2; // Leading Zero Count
// xsave/xrstor instructions
SMPTypeCategory[STARS_NN_xgetbv] = 8; // Get Value of Extended Control Register
SMPTypeCategory[STARS_NN_xrstor] = 0; // Restore Processor Extended States
SMPTypeCategory[STARS_NN_xsave] = 1; // Save Processor Extended States
SMPTypeCategory[STARS_NN_xsetbv] = 1; // Set Value of Extended Control Register
// Intel Safer Mode Extensions (SMX)
SMPTypeCategory[STARS_NN_getsec] = 1; // Safer Mode Extensions (SMX) Instruction
// AMD-V Virtualization ISA Extension
SMPTypeCategory[STARS_NN_clgi] = 0; // Clear Global Interrupt Flag
SMPTypeCategory[STARS_NN_invlpga] = 1; // Invalidate TLB Entry in a Specified ASID
SMPTypeCategory[STARS_NN_skinit] = 1; // Secure Init and Jump with Attestation
SMPTypeCategory[STARS_NN_stgi] = 0; // Set Global Interrupt Flag
SMPTypeCategory[STARS_NN_vmexit] = 1; // Stop Executing Guest, Begin Executing Host
SMPTypeCategory[STARS_NN_vmload] = 0; // Load State from VMCB
SMPTypeCategory[STARS_NN_vmmcall] = 1; // Call VMM
SMPTypeCategory[STARS_NN_vmrun] = 1; // Run Virtual Machine
SMPTypeCategory[STARS_NN_vmsave] = 0; // Save State to VMCB
// VMX+ instructions
SMPTypeCategory[STARS_NN_invept] = 1; // Invalidate Translations Derived from EPT
SMPTypeCategory[STARS_NN_invvpid] = 1; // Invalidate Translations Based on VPID
// Intel Atom instructions
// !!!! continue work here
SMPTypeCategory[STARS_NN_movbe] = 3; // Move Data After Swapping Bytes
// Intel AES instructions
SMPTypeCategory[STARS_NN_aesenc] = 14; // Perform One Round of an AES Encryption Flow
SMPTypeCategory[STARS_NN_aesenclast] = 14; // Perform the Last Round of an AES Encryption Flow
SMPTypeCategory[STARS_NN_aesdec] = 14; // Perform One Round of an AES Decryption Flow
SMPTypeCategory[STARS_NN_aesdeclast] = 14; // Perform the Last Round of an AES Decryption Flow
SMPTypeCategory[STARS_NN_aesimc] = 14; // Perform the AES InvMixColumn Transformation
SMPTypeCategory[STARS_NN_aeskeygenassist] = 14; // AES Round Key Generation Assist
// Carryless multiplication
SMPTypeCategory[STARS_NN_pclmulqdq] = 14; // Carry-Less Multiplication Quadword
// Returns modified by operand size prefixes
SMPTypeCategory[STARS_NN_retnw] = 0; // Return Near from Procedure (use16)
SMPTypeCategory[STARS_NN_retnd] = 0; // Return Near from Procedure (use32)
SMPTypeCategory[STARS_NN_retnq] = 0; // Return Near from Procedure (use64)
SMPTypeCategory[STARS_NN_retfw] = 0; // Return Far from Procedure (use16)
SMPTypeCategory[STARS_NN_retfd] = 0; // Return Far from Procedure (use32)
SMPTypeCategory[STARS_NN_retfq] = 0; // Return Far from Procedure (use64)
// RDRAND support
SMPTypeCategory[STARS_NN_rdrand] = 2; // Read Random Number
// new GPR instructions
SMPTypeCategory[STARS_NN_adcx] = 5; // Unsigned Integer Addition of Two Operands with Carry Flag
SMPTypeCategory[STARS_NN_adox] = 5; // Unsigned Integer Addition of Two Operands with Overflow Flag
SMPTypeCategory[STARS_NN_andn] = 10; // Logical AND NOT
SMPTypeCategory[STARS_NN_bextr] = 14; // Bit Field Extract
SMPTypeCategory[STARS_NN_blsi] = 14; // Extract Lowest Set Isolated Bit
SMPTypeCategory[STARS_NN_blsmsk] = 2; // Get Mask Up to Lowest Set Bit
SMPTypeCategory[STARS_NN_blsr] = 2; // Reset Lowest Set Bit
SMPTypeCategory[STARS_NN_bzhi] = 2; // Zero High Bits Starting with Specified Bit Position
SMPTypeCategory[STARS_NN_clac] = 1; // Clear AC Flag in EFLAGS Register
SMPTypeCategory[STARS_NN_mulx] = 2; // Unsigned Multiply Without Affecting Flags
SMPTypeCategory[STARS_NN_pdep] = 2; // Parallel Bits Deposit
SMPTypeCategory[STARS_NN_pext] = 2; // Parallel Bits Extract
SMPTypeCategory[STARS_NN_rorx] = 2; // Rotate Right Logical Without Affecting Flags
SMPTypeCategory[STARS_NN_sarx] = 2; // Shift Arithmetically Right Without Affecting Flags
SMPTypeCategory[STARS_NN_shlx] = 2; // Shift Logically Left Without Affecting Flags
SMPTypeCategory[STARS_NN_shrx] = 2; // Shift Logically Right Without Affecting Flags
SMPTypeCategory[STARS_NN_stac] = 1; // Set AC Flag in EFLAGS Register
SMPTypeCategory[STARS_NN_tzcnt] = 2; // Count the Number of Trailing Zero Bits
SMPTypeCategory[STARS_NN_xsaveopt] = 1; // Save Processor Extended States Optimized
SMPTypeCategory[STARS_NN_invpcid] = 1; // Invalidate Processor Context ID
SMPTypeCategory[STARS_NN_rdseed] = 2; // Read Random Seed
SMPTypeCategory[STARS_NN_rdfsbase] = 6; // Read FS Segment Base
SMPTypeCategory[STARS_NN_rdgsbase] = 6; // Read GS Segment Base
SMPTypeCategory[STARS_NN_wrfsbase] = 6; // Write FS Segment Base
SMPTypeCategory[STARS_NN_wrgsbase] = 6; // Write GS Segment Base
// new AVX instructions
SMPTypeCategory[STARS_NN_vaddpd] = 14; // Add Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vaddps] = 14; // Packed Single-FP Add
SMPTypeCategory[STARS_NN_vaddsd] = 14; // Add Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vaddss] = 14; // Scalar Single-FP Add
SMPTypeCategory[STARS_NN_vaddsubpd] = 14; // Add /Sub packed DP FP numbers
SMPTypeCategory[STARS_NN_vaddsubps] = 14; // Add /Sub packed SP FP numbers
SMPTypeCategory[STARS_NN_vaesdec] = 14; // Perform One Round of an AES Decryption Flow
SMPTypeCategory[STARS_NN_vaesdeclast] = 14; // Perform the Last Round of an AES Decryption Flow
SMPTypeCategory[STARS_NN_vaesenc] = 14; // Perform One Round of an AES Encryption Flow
SMPTypeCategory[STARS_NN_vaesenclast] = 14; // Perform the Last Round of an AES Encryption Flow
SMPTypeCategory[STARS_NN_vaesimc] = 14; // Perform the AES InvMixColumn Transformation
SMPTypeCategory[STARS_NN_vaeskeygenassist] = 14; // AES Round Key Generation Assist
SMPTypeCategory[STARS_NN_vandnpd] = 14; // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vandnps] = 14; // Bitwise Logical And Not for Single-FP
SMPTypeCategory[STARS_NN_vandpd] = 14; // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vandps] = 14; // Bitwise Logical And for Single-FP
SMPTypeCategory[STARS_NN_vblendpd] = 14; // Blend Packed Double Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vblendps] = 14; // Blend Packed Single Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vblendvpd] = 14; // Variable Blend Packed Double Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vblendvps] = 14; // Variable Blend Packed Single Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vbroadcastf128] = 14; // Broadcast 128 Bits of Floating-Point Data
SMPTypeCategory[STARS_NN_vbroadcasti128] = 14; // Broadcast 128 Bits of Integer Data
SMPTypeCategory[STARS_NN_vbroadcastsd] = 14; // Broadcast Double-Precision Floating-Point Element
SMPTypeCategory[STARS_NN_vbroadcastss] = 14; // Broadcast Single-Precision Floating-Point Element
SMPTypeCategory[STARS_NN_vcmppd] = 14; // Compare Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vcmpps] = 14; // Packed Single-FP Compare
SMPTypeCategory[STARS_NN_vcmpsd] = 14; // Compare Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vcmpss] = 14; // Scalar Single-FP Compare
SMPTypeCategory[STARS_NN_vcomisd] = 14; // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
SMPTypeCategory[STARS_NN_vcomiss] = 14; // Scalar Ordered Single-FP Compare and Set EFLAGS
SMPTypeCategory[STARS_NN_vcvtdq2pd] = 14; // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vcvtdq2ps] = 14; // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vcvtpd2dq] = 14; // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
SMPTypeCategory[STARS_NN_vcvtpd2ps] = 14; // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vcvtph2ps] = 14; // Convert 16-bit FP Values to Single-Precision FP Values
SMPTypeCategory[STARS_NN_vcvtps2dq] = 14; // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
SMPTypeCategory[STARS_NN_vcvtps2pd] = 14; // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vcvtps2ph] = 14; // Convert Single-Precision FP value to 16-bit FP value
SMPTypeCategory[STARS_NN_vcvtsd2si] = 14; // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
SMPTypeCategory[STARS_NN_vcvtsd2ss] = 14; // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
SMPTypeCategory[STARS_NN_vcvtsi2sd] = 14; // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
SMPTypeCategory[STARS_NN_vcvtsi2ss] = 14; // Scalar signed INT32 to Single-FP conversion
SMPTypeCategory[STARS_NN_vcvtss2sd] = 14; // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
SMPTypeCategory[STARS_NN_vcvtss2si] = 14; // Scalar Single-FP to signed INT32 conversion
SMPTypeCategory[STARS_NN_vcvttpd2dq] = 14; // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
SMPTypeCategory[STARS_NN_vcvttps2dq] = 14; // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
SMPTypeCategory[STARS_NN_vcvttsd2si] = 14; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
SMPTypeCategory[STARS_NN_vcvttss2si] = 14; // Scalar Single-FP to signed INT32 conversion (truncate)
SMPTypeCategory[STARS_NN_vdivpd] = 14; // Divide Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vdivps] = 14; // Packed Single-FP Divide
SMPTypeCategory[STARS_NN_vdivsd] = 14; // Divide Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vdivss] = 14; // Scalar Single-FP Divide
SMPTypeCategory[STARS_NN_vdppd] = 14; // Dot Product of Packed Double Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vdpps] = 14; // Dot Product of Packed Single Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vextractf128] = 9; // Extract Packed Floating-Point Values
SMPTypeCategory[STARS_NN_vextracti128] = 9; // Extract Packed Integer Values
SMPTypeCategory[STARS_NN_vextractps] = 9; // Extract Packed Floating-Point Values
SMPTypeCategory[STARS_NN_vfmadd132pd] = 14; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmadd132ps] = 14; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmadd132sd] = 14; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmadd132ss] = 14; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmadd213pd] = 14; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmadd213ps] = 14; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmadd213sd] = 14; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmadd213ss] = 14; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmadd231pd] = 14; // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmadd231ps] = 14; // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmadd231sd] = 14; // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmadd231ss] = 14; // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmaddsub132pd] = 14; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmaddsub132ps] = 14; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmaddsub213pd] = 14; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmaddsub213ps] = 14; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmaddsub231pd] = 14; // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmaddsub231ps] = 14; // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmsub132pd] = 14; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmsub132ps] = 14; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmsub132sd] = 14; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmsub132ss] = 14; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmsub213pd] = 14; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmsub213ps] = 14; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmsub213sd] = 14; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmsub213ss] = 14; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmsub231pd] = 14; // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmsub231ps] = 14; // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmsub231sd] = 14; // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmsub231ss] = 14; // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmsubadd132pd] = 14; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmsubadd132ps] = 14; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmsubadd213pd] = 14; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmsubadd213ps] = 14; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmsubadd231pd] = 14; // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfmsubadd231ps] = 14; // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmadd132pd] = 14; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmadd132ps] = 14; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmadd132sd] = 14; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmadd132ss] = 14; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmadd213pd] = 14; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmadd213ps] = 14; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmadd213sd] = 14; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmadd213ss] = 14; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmadd231pd] = 14; // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmadd231ps] = 14; // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmadd231sd] = 14; // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmadd231ss] = 14; // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmsub132pd] = 14; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmsub132ps] = 14; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmsub132sd] = 14; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmsub132ss] = 14; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmsub213pd] = 14; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmsub213ps] = 14; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmsub213sd] = 14; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmsub213ss] = 14; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmsub231pd] = 14; // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmsub231ps] = 14; // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmsub231sd] = 14; // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vfnmsub231ss] = 14; // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vgatherdps] = 14; // Gather Packed SP FP Values Using Signed Dword Indices
SMPTypeCategory[STARS_NN_vgatherdpd] = 14; // Gather Packed DP FP Values Using Signed Dword Indices
SMPTypeCategory[STARS_NN_vgatherqps] = 14; // Gather Packed SP FP Values Using Signed Qword Indices
SMPTypeCategory[STARS_NN_vgatherqpd] = 14; // Gather Packed DP FP Values Using Signed Qword Indices
SMPTypeCategory[STARS_NN_vhaddpd] = 14; // Add horizontally packed DP FP numbers
SMPTypeCategory[STARS_NN_vhaddps] = 14; // Add horizontally packed SP FP numbers
SMPTypeCategory[STARS_NN_vhsubpd] = 14; // Sub horizontally packed DP FP numbers
SMPTypeCategory[STARS_NN_vhsubps] = 14; // Sub horizontally packed SP FP numbers
SMPTypeCategory[STARS_NN_vinsertf128] = 14; // Insert Packed Floating-Point Values
SMPTypeCategory[STARS_NN_vinserti128] = 14; // Insert Packed Integer Values
SMPTypeCategory[STARS_NN_vinsertps] = 14; // Insert Packed Single Precision Floating-Point Value
SMPTypeCategory[STARS_NN_vlddqu] = 14; // Load Unaligned Packed Integer Values
SMPTypeCategory[STARS_NN_vldmxcsr] = 14; // Load Streaming SIMD Extensions Technology Control/Status Register
SMPTypeCategory[STARS_NN_vmaskmovdqu] = 15; // Store Selected Bytes of Double Quadword with NT Hint
SMPTypeCategory[STARS_NN_vmaskmovpd] = 15; // Conditionally Load Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vmaskmovps] = 15; // Conditionally Load Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vmaxpd] = 14; // Return Maximum Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vmaxps] = 14; // Packed Single-FP Maximum
SMPTypeCategory[STARS_NN_vmaxsd] = 14; // Return Maximum Scalar Double-Precision Floating-Point Value
SMPTypeCategory[STARS_NN_vmaxss] = 14; // Scalar Single-FP Maximum
SMPTypeCategory[STARS_NN_vminpd] = 14; // Return Minimum Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vminps] = 14; // Packed Single-FP Minimum
SMPTypeCategory[STARS_NN_vminsd] = 14; // Return Minimum Scalar Double-Precision Floating-Point Value
SMPTypeCategory[STARS_NN_vminss] = 14; // Scalar Single-FP Minimum
SMPTypeCategory[STARS_NN_vmovapd] = 15; // Move Aligned Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vmovaps] = 15; // Move Aligned Four Packed Single-FP
SMPTypeCategory[STARS_NN_vmovd] = 15; // Move 32 bits
SMPTypeCategory[STARS_NN_vmovddup] = 15; // Move One Double-FP and Duplicate
SMPTypeCategory[STARS_NN_vmovdqa] = 15; // Move Aligned Double Quadword
SMPTypeCategory[STARS_NN_vmovdqu] = 15; // Move Unaligned Double Quadword
SMPTypeCategory[STARS_NN_vmovhlps] = 15; // Move High to Low Packed Single-FP
SMPTypeCategory[STARS_NN_vmovhpd] = 15; // Move High Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vmovhps] = 15; // Move High Packed Single-FP
SMPTypeCategory[STARS_NN_vmovlhps] = 15; // Move Low to High Packed Single-FP
SMPTypeCategory[STARS_NN_vmovlpd] = 15; // Move Low Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vmovlps] = 15; // Move Low Packed Single-FP
SMPTypeCategory[STARS_NN_vmovmskpd] = 15; // Extract Packed Double-Precision Floating-Point Sign Mask
SMPTypeCategory[STARS_NN_vmovmskps] = 15; // Move Mask to Register
SMPTypeCategory[STARS_NN_vmovntdq] = 15; // Store Double Quadword Using Non-Temporal Hint
SMPTypeCategory[STARS_NN_vmovntdqa] = 15; // Load Double Quadword Non-Temporal Aligned Hint
SMPTypeCategory[STARS_NN_vmovntpd] = 15; // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
SMPTypeCategory[STARS_NN_vmovntps] = 15; // Move Aligned Four Packed Single-FP Non Temporal
#if (IDA_SDK_VERSION < 700) // Incredibly, these opcodes were removed in IDA Pro 7.0
SMPTypeCategory[STARS_NN_vmovntsd] = 15; // Move Non-Temporal Scalar Double-Precision Floating-Point
SMPTypeCategory[STARS_NN_vmovntss] = 15; // Move Non-Temporal Scalar Single-Precision Floating-Point
#endif
SMPTypeCategory[STARS_NN_vmovq] = 15; // Move 64 bits
SMPTypeCategory[STARS_NN_vmovsd] = 15; // Move Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vmovshdup] = 15; // Move Packed Single-FP High and Duplicate
SMPTypeCategory[STARS_NN_vmovsldup] = 15; // Move Packed Single-FP Low and Duplicate
SMPTypeCategory[STARS_NN_vmovss] = 15; // Move Scalar Single-FP
SMPTypeCategory[STARS_NN_vmovupd] = 15; // Move Unaligned Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vmovups] = 15; // Move Unaligned Four Packed Single-FP
SMPTypeCategory[STARS_NN_vmpsadbw] = 14; // Compute Multiple Packed Sums of Absolute Difference
SMPTypeCategory[STARS_NN_vmulpd] = 14; // Multiply Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vmulps] = 14; // Packed Single-FP Multiply
SMPTypeCategory[STARS_NN_vmulsd] = 14; // Multiply Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vmulss] = 14; // Scalar Single-FP Multiply
SMPTypeCategory[STARS_NN_vorpd] = 14; // Bitwise Logical OR of Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vorps] = 14; // Bitwise Logical OR for Single-FP Data
SMPTypeCategory[STARS_NN_vpabsb] = 14; // Packed Absolute Value Byte
SMPTypeCategory[STARS_NN_vpabsd] = 14; // Packed Absolute Value Doubleword
SMPTypeCategory[STARS_NN_vpabsw] = 14; // Packed Absolute Value Word
SMPTypeCategory[STARS_NN_vpackssdw] = 14; // Pack with Signed Saturation (Dword->Word)
SMPTypeCategory[STARS_NN_vpacksswb] = 14; // Pack with Signed Saturation (Word->Byte)
SMPTypeCategory[STARS_NN_vpackusdw] = 14; // Pack with Unsigned Saturation
SMPTypeCategory[STARS_NN_vpackuswb] = 14; // Pack with Unsigned Saturation (Word->Byte)
SMPTypeCategory[STARS_NN_vpaddb] = 14; // Packed Add Byte
SMPTypeCategory[STARS_NN_vpaddd] = 14; // Packed Add Dword
SMPTypeCategory[STARS_NN_vpaddq] = 14; // Add Packed Quadword Integers
SMPTypeCategory[STARS_NN_vpaddsb] = 14; // Packed Add with Saturation (Byte)
SMPTypeCategory[STARS_NN_vpaddsw] = 14; // Packed Add with Saturation (Word)
SMPTypeCategory[STARS_NN_vpaddusb] = 14; // Packed Add Unsigned with Saturation (Byte)
SMPTypeCategory[STARS_NN_vpaddusw] = 14; // Packed Add Unsigned with Saturation (Word)
SMPTypeCategory[STARS_NN_vpaddw] = 14; // Packed Add Word
SMPTypeCategory[STARS_NN_vpalignr] = 14; // Packed Align Right
SMPTypeCategory[STARS_NN_vpand] = 14; // Bitwise Logical And
SMPTypeCategory[STARS_NN_vpandn] = 14; // Bitwise Logical And Not
SMPTypeCategory[STARS_NN_vpavgb] = 14; // Packed Average (Byte)
SMPTypeCategory[STARS_NN_vpavgw] = 14; // Packed Average (Word)
SMPTypeCategory[STARS_NN_vpblendd] = 14; // Blend Packed Dwords
SMPTypeCategory[STARS_NN_vpblendvb] = 14; // Variable Blend Packed Bytes
SMPTypeCategory[STARS_NN_vpblendw] = 14; // Blend Packed Words
SMPTypeCategory[STARS_NN_vpbroadcastb] = 14; // Broadcast a Byte Integer
SMPTypeCategory[STARS_NN_vpbroadcastd] = 14; // Broadcast a Dword Integer
SMPTypeCategory[STARS_NN_vpbroadcastq] = 14; // Broadcast a Qword Integer
SMPTypeCategory[STARS_NN_vpbroadcastw] = 14; // Broadcast a Word Integer
SMPTypeCategory[STARS_NN_vpclmulqdq] = 14; // Carry-Less Multiplication Quadword
SMPTypeCategory[STARS_NN_vpcmpeqb] = 14; // Packed Compare for Equal (Byte)
SMPTypeCategory[STARS_NN_vpcmpeqd] = 14; // Packed Compare for Equal (Dword)
SMPTypeCategory[STARS_NN_vpcmpeqq] = 14; // Compare Packed Qword Data for Equal
SMPTypeCategory[STARS_NN_vpcmpeqw] = 14; // Packed Compare for Equal (Word)
SMPTypeCategory[STARS_NN_vpcmpestri] = 14; // Packed Compare Explicit Length Strings, Return Index
SMPTypeCategory[STARS_NN_vpcmpestrm] = 14; // Packed Compare Explicit Length Strings, Return Mask
SMPTypeCategory[STARS_NN_vpcmpgtb] = 14; // Packed Compare for Greater Than (Byte)
SMPTypeCategory[STARS_NN_vpcmpgtd] = 14; // Packed Compare for Greater Than (Dword)
SMPTypeCategory[STARS_NN_vpcmpgtq] = 14; // Compare Packed Data for Greater Than
SMPTypeCategory[STARS_NN_vpcmpgtw] = 14; // Packed Compare for Greater Than (Word)
SMPTypeCategory[STARS_NN_vpcmpistri] = 14; // Packed Compare Implicit Length Strings, Return Index
SMPTypeCategory[STARS_NN_vpcmpistrm] = 14; // Packed Compare Implicit Length Strings, Return Mask
SMPTypeCategory[STARS_NN_vperm2f128] = 14; // Permute Floating-Point Values
SMPTypeCategory[STARS_NN_vperm2i128] = 14; // Permute Integer Values
SMPTypeCategory[STARS_NN_vpermd] = 14; // Full Doublewords Element Permutation
SMPTypeCategory[STARS_NN_vpermilpd] = 14; // Permute Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vpermilps] = 14; // Permute Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vpermpd] = 14; // Permute Double-Precision Floating-Point Elements
SMPTypeCategory[STARS_NN_vpermps] = 14; // Permute Single-Precision Floating-Point Elements
SMPTypeCategory[STARS_NN_vpermq] = 14; // Qwords Element Permutation
SMPTypeCategory[STARS_NN_vpextrb] = 14; // Extract Byte
SMPTypeCategory[STARS_NN_vpextrd] = 14; // Extract Dword
SMPTypeCategory[STARS_NN_vpextrq] = 14; // Extract Qword
SMPTypeCategory[STARS_NN_vpextrw] = 14; // Extract Word
SMPTypeCategory[STARS_NN_vpgatherdd] = 14; // Gather Packed Dword Values Using Signed Dword Indices
SMPTypeCategory[STARS_NN_vpgatherdq] = 14; // Gather Packed Qword Values Using Signed Dword Indices
SMPTypeCategory[STARS_NN_vpgatherqd] = 14; // Gather Packed Dword Values Using Signed Qword Indices
SMPTypeCategory[STARS_NN_vpgatherqq] = 14; // Gather Packed Qword Values Using Signed Qword Indices
SMPTypeCategory[STARS_NN_vphaddd] = 14; // Packed Horizontal Add Doubleword
SMPTypeCategory[STARS_NN_vphaddsw] = 14; // Packed Horizontal Add and Saturate
SMPTypeCategory[STARS_NN_vphaddw] = 14; // Packed Horizontal Add Word
SMPTypeCategory[STARS_NN_vphminposuw] = 14; // Packed Horizontal Word Minimum
SMPTypeCategory[STARS_NN_vphsubd] = 14; // Packed Horizontal Subtract Doubleword
SMPTypeCategory[STARS_NN_vphsubsw] = 14; // Packed Horizontal Subtract and Saturate
SMPTypeCategory[STARS_NN_vphsubw] = 14; // Packed Horizontal Subtract Word
SMPTypeCategory[STARS_NN_vpinsrb] = 14; // Insert Byte
SMPTypeCategory[STARS_NN_vpinsrd] = 14; // Insert Dword
SMPTypeCategory[STARS_NN_vpinsrq] = 14; // Insert Qword
SMPTypeCategory[STARS_NN_vpinsrw] = 14; // Insert Word
SMPTypeCategory[STARS_NN_vpmaddubsw] = 14; // Multiply and Add Packed Signed and Unsigned Bytes
SMPTypeCategory[STARS_NN_vpmaddwd] = 14; // Packed Multiply and Add
SMPTypeCategory[STARS_NN_vpmaskmovd] = 15; // Conditionally Store Dword Values Using Mask
SMPTypeCategory[STARS_NN_vpmaskmovq] = 15; // Conditionally Store Qword Values Using Mask
SMPTypeCategory[STARS_NN_vpmaxsb] = 14; // Maximum of Packed Signed Byte Integers
SMPTypeCategory[STARS_NN_vpmaxsd] = 14; // Maximum of Packed Signed Dword Integers
SMPTypeCategory[STARS_NN_vpmaxsw] = 14; // Packed Signed Integer Word Maximum
SMPTypeCategory[STARS_NN_vpmaxub] = 14; // Packed Unsigned Integer Byte Maximum
SMPTypeCategory[STARS_NN_vpmaxud] = 14; // Maximum of Packed Unsigned Dword Integers
SMPTypeCategory[STARS_NN_vpmaxuw] = 14; // Maximum of Packed Word Integers
SMPTypeCategory[STARS_NN_vpminsb] = 14; // Minimum of Packed Signed Byte Integers
SMPTypeCategory[STARS_NN_vpminsd] = 14; // Minimum of Packed Signed Dword Integers
SMPTypeCategory[STARS_NN_vpminsw] = 14; // Packed Signed Integer Word Minimum
SMPTypeCategory[STARS_NN_vpminub] = 14; // Packed Unsigned Integer Byte Minimum
SMPTypeCategory[STARS_NN_vpminud] = 14; // Minimum of Packed Unsigned Dword Integers
SMPTypeCategory[STARS_NN_vpminuw] = 14; // Minimum of Packed Word Integers
SMPTypeCategory[STARS_NN_vpmovmskb] = 15; // Move Byte Mask to Integer
SMPTypeCategory[STARS_NN_vpmovsxbd] = 15; // Packed Move with Sign Extend
SMPTypeCategory[STARS_NN_vpmovsxbq] = 15; // Packed Move with Sign Extend
SMPTypeCategory[STARS_NN_vpmovsxbw] = 15; // Packed Move with Sign Extend
SMPTypeCategory[STARS_NN_vpmovsxdq] = 15; // Packed Move with Sign Extend
SMPTypeCategory[STARS_NN_vpmovsxwd] = 15; // Packed Move with Sign Extend
SMPTypeCategory[STARS_NN_vpmovsxwq] = 15; // Packed Move with Sign Extend
SMPTypeCategory[STARS_NN_vpmovzxbd] = 15; // Packed Move with Zero Extend
SMPTypeCategory[STARS_NN_vpmovzxbq] = 15; // Packed Move with Zero Extend
SMPTypeCategory[STARS_NN_vpmovzxbw] = 15; // Packed Move with Zero Extend
SMPTypeCategory[STARS_NN_vpmovzxdq] = 15; // Packed Move with Zero Extend
SMPTypeCategory[STARS_NN_vpmovzxwd] = 15; // Packed Move with Zero Extend
SMPTypeCategory[STARS_NN_vpmovzxwq] = 15; // Packed Move with Zero Extend
SMPTypeCategory[STARS_NN_vpmuldq] = 14; // Multiply Packed Signed Dword Integers
SMPTypeCategory[STARS_NN_vpmulhrsw] = 14; // Packed Multiply High with Round and Scale
SMPTypeCategory[STARS_NN_vpmulhuw] = 14; // Packed Multiply High Unsigned
SMPTypeCategory[STARS_NN_vpmulhw] = 14; // Packed Multiply High
SMPTypeCategory[STARS_NN_vpmulld] = 14; // Multiply Packed Signed Dword Integers and Store Low Result
SMPTypeCategory[STARS_NN_vpmullw] = 14; // Packed Multiply Low
SMPTypeCategory[STARS_NN_vpmuludq] = 14; // Multiply Packed Unsigned Doubleword Integers
SMPTypeCategory[STARS_NN_vpor] = 14; // Bitwise Logical Or
SMPTypeCategory[STARS_NN_vpsadbw] = 14; // Packed Sum of Absolute Differences
SMPTypeCategory[STARS_NN_vpshufb] = 14; // Packed Shuffle Bytes
SMPTypeCategory[STARS_NN_vpshufd] = 14; // Shuffle Packed Doublewords
SMPTypeCategory[STARS_NN_vpshufhw] = 14; // Shuffle Packed High Words
SMPTypeCategory[STARS_NN_vpshuflw] = 14; // Shuffle Packed Low Words
SMPTypeCategory[STARS_NN_vpsignb] = 14; // Packed SIGN Byte
SMPTypeCategory[STARS_NN_vpsignd] = 14; // Packed SIGN Doubleword
SMPTypeCategory[STARS_NN_vpsignw] = 14; // Packed SIGN Word
SMPTypeCategory[STARS_NN_vpslld] = 14; // Packed Shift Left Logical (Dword)
SMPTypeCategory[STARS_NN_vpslldq] = 14; // Shift Double Quadword Left Logical
SMPTypeCategory[STARS_NN_vpsllq] = 14; // Packed Shift Left Logical (Qword)
SMPTypeCategory[STARS_NN_vpsllvd] = 14; // Variable Bit Shift Left Logical (Dword)
SMPTypeCategory[STARS_NN_vpsllvq] = 14; // Variable Bit Shift Left Logical (Qword)
SMPTypeCategory[STARS_NN_vpsllw] = 14; // Packed Shift Left Logical (Word)
SMPTypeCategory[STARS_NN_vpsrad] = 14; // Packed Shift Right Arithmetic (Dword)
SMPTypeCategory[STARS_NN_vpsravd] = 14; // Variable Bit Shift Right Arithmetic
SMPTypeCategory[STARS_NN_vpsraw] = 14; // Packed Shift Right Arithmetic (Word)
SMPTypeCategory[STARS_NN_vpsrld] = 14; // Packed Shift Right Logical (Dword)
SMPTypeCategory[STARS_NN_vpsrldq] = 14; // Shift Double Quadword Right Logical (Qword)
SMPTypeCategory[STARS_NN_vpsrlq] = 14; // Packed Shift Right Logical (Qword)
SMPTypeCategory[STARS_NN_vpsrlvd] = 14; // Variable Bit Shift Right Logical (Dword)
SMPTypeCategory[STARS_NN_vpsrlvq] = 14; // Variable Bit Shift Right Logical (Qword)
SMPTypeCategory[STARS_NN_vpsrlw] = 14; // Packed Shift Right Logical (Word)
SMPTypeCategory[STARS_NN_vpsubb] = 14; // Packed Subtract Byte
SMPTypeCategory[STARS_NN_vpsubd] = 14; // Packed Subtract Dword
SMPTypeCategory[STARS_NN_vpsubq] = 14; // Subtract Packed Quadword Integers
SMPTypeCategory[STARS_NN_vpsubsb] = 14; // Packed Subtract with Saturation (Byte)
SMPTypeCategory[STARS_NN_vpsubsw] = 14; // Packed Subtract with Saturation (Word)
SMPTypeCategory[STARS_NN_vpsubusb] = 14; // Packed Subtract Unsigned with Saturation (Byte)
SMPTypeCategory[STARS_NN_vpsubusw] = 14; // Packed Subtract Unsigned with Saturation (Word)
SMPTypeCategory[STARS_NN_vpsubw] = 14; // Packed Subtract Word
SMPTypeCategory[STARS_NN_vptest] = 14; // Logical Compare
SMPTypeCategory[STARS_NN_vpunpckhbw] = 14; // Unpack High Packed Data (Byte->Word)
SMPTypeCategory[STARS_NN_vpunpckhdq] = 14; // Unpack High Packed Data (Dword->Qword)
SMPTypeCategory[STARS_NN_vpunpckhqdq] = 14; // Unpack High Packed Data (Qword->Xmmword)
SMPTypeCategory[STARS_NN_vpunpckhwd] = 14; // Unpack High Packed Data (Word->Dword)
SMPTypeCategory[STARS_NN_vpunpcklbw] = 14; // Unpack Low Packed Data (Byte->Word)
SMPTypeCategory[STARS_NN_vpunpckldq] = 14; // Unpack Low Packed Data (Dword->Qword)
SMPTypeCategory[STARS_NN_vpunpcklqdq] = 14; // Unpack Low Packed Data (Qword->Xmmword)
SMPTypeCategory[STARS_NN_vpunpcklwd] = 14; // Unpack Low Packed Data (Word->Dword)
SMPTypeCategory[STARS_NN_vpxor] = 14; // Bitwise Logical Exclusive Or
SMPTypeCategory[STARS_NN_vrcpps] = 14; // Packed Single-FP Reciprocal
SMPTypeCategory[STARS_NN_vrcpss] = 14; // Scalar Single-FP Reciprocal
SMPTypeCategory[STARS_NN_vroundpd] = 14; // Round Packed Double Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vroundps] = 14; // Round Packed Single Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vroundsd] = 14; // Round Scalar Double Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vroundss] = 14; // Round Scalar Single Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vrsqrtps] = 14; // Packed Single-FP Square Root Reciprocal
SMPTypeCategory[STARS_NN_vrsqrtss] = 14; // Scalar Single-FP Square Root Reciprocal
SMPTypeCategory[STARS_NN_vshufpd] = 14; // Shuffle Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vshufps] = 14; // Shuffle Single-FP
SMPTypeCategory[STARS_NN_vsqrtpd] = 14; // Compute Square Roots of Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vsqrtps] = 14; // Packed Single-FP Square Root
SMPTypeCategory[STARS_NN_vsqrtsd] = 14; // Compute Square Rootof Scalar Double-Precision Floating-Point Value
SMPTypeCategory[STARS_NN_vsqrtss] = 14; // Scalar Single-FP Square Root
SMPTypeCategory[STARS_NN_vstmxcsr] = 9; // Store Streaming SIMD Extensions Technology Control/Status Register
SMPTypeCategory[STARS_NN_vsubpd] = 14; // Subtract Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vsubps] = 14; // Packed Single-FP Subtract
SMPTypeCategory[STARS_NN_vsubsd] = 14; // Subtract Scalar Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vsubss] = 14; // Scalar Single-FP Subtract
SMPTypeCategory[STARS_NN_vtestpd] = 14; // Packed Double-Precision Floating-Point Bit Test
SMPTypeCategory[STARS_NN_vtestps] = 14; // Packed Single-Precision Floating-Point Bit Test
SMPTypeCategory[STARS_NN_vucomisd] = 14; // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
SMPTypeCategory[STARS_NN_vucomiss] = 14; // Scalar Unordered Single-FP Compare and Set EFLAGS
SMPTypeCategory[STARS_NN_vunpckhpd] = 14; // Unpack and Interleave High Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vunpckhps] = 14; // Unpack High Packed Single-FP Data
SMPTypeCategory[STARS_NN_vunpcklpd] = 14; // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vunpcklps] = 14; // Unpack Low Packed Single-FP Data
SMPTypeCategory[STARS_NN_vxorpd] = 14; // Bitwise Logical OR of Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vxorps] = 14; // Bitwise Logical XOR for Single-FP Data
SMPTypeCategory[STARS_NN_vzeroall] = 14; // Zero All YMM Registers
SMPTypeCategory[STARS_NN_vzeroupper] = 14; // Zero Upper Bits of YMM Registers
// Transactional Synchronization Extensions
SMPTypeCategory[STARS_NN_xabort] = 1; // Transaction Abort
SMPTypeCategory[STARS_NN_xbegin] = 1; // Transaction Begin
SMPTypeCategory[STARS_NN_xend] = 1; // Transaction End
SMPTypeCategory[STARS_NN_xtest] = 1; // Test If In Transactional Execution
// Virtual PC synthetic instructions
SMPTypeCategory[STARS_NN_vmgetinfo] = 1; // Virtual PC - Get VM Information
SMPTypeCategory[STARS_NN_vmsetinfo] = 1; // Virtual PC - Set VM Information
SMPTypeCategory[STARS_NN_vmdxdsbl] = 1; // Virtual PC - Disable Direct Execution
SMPTypeCategory[STARS_NN_vmdxenbl] = 1; // Virtual PC - Enable Direct Execution
SMPTypeCategory[STARS_NN_vmcpuid] = 1; // Virtual PC - Virtualized CPU Information
SMPTypeCategory[STARS_NN_vmhlt] = 1; // Virtual PC - Halt
SMPTypeCategory[STARS_NN_vmsplaf] = 1; // Virtual PC - Spin Lock Acquisition Failed
SMPTypeCategory[STARS_NN_vmpushfd] = 1; // Virtual PC - Push virtualized flags register
SMPTypeCategory[STARS_NN_vmpopfd] = 1; // Virtual PC - Pop virtualized flags register
SMPTypeCategory[STARS_NN_vmcli] = 1; // Virtual PC - Clear Interrupt Flag
SMPTypeCategory[STARS_NN_vmsti] = 1; // Virtual PC - Set Interrupt Flag
SMPTypeCategory[STARS_NN_vmiretd] = 1; // Virtual PC - Return From Interrupt
SMPTypeCategory[STARS_NN_vmsgdt] = 1; // Virtual PC - Store Global Descriptor Table
SMPTypeCategory[STARS_NN_vmsidt] = 1; // Virtual PC - Store Interrupt Descriptor Table
SMPTypeCategory[STARS_NN_vmsldt] = 1; // Virtual PC - Store Local Descriptor Table
SMPTypeCategory[STARS_NN_vmstr] = 1; // Virtual PC - Store Task Register
SMPTypeCategory[STARS_NN_vmsdte] = 1; // Virtual PC - Store to Descriptor Table Entry
SMPTypeCategory[STARS_NN_vpcext] = 1; // Virtual PC - ISA extension
// FMA4
SMPTypeCategory[STARS_NN_vfmaddsubps] = 14; // Multiply with Alternating Add/Subtract of Packed Single-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfmaddsubpd] = 14; // Multiply with Alternating Add/Subtract of Packed Double-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfmsubaddps] = 14; // Multiply with Alternating Subtract/Add of Packed Single-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfmsubaddpd] = 14; // Multiply with Alternating Subtract/Add of Packed Double-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfmaddps] = 14; // Multiply and Add Packed Single-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfmaddpd] = 14; // Multiply and Add Packed Double-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfmaddss] = 14; // Multiply and Add Scalar Single-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfmaddsd] = 14; // Multiply and Add Scalar Double-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfmsubps] = 14; // Multiply and Subtract Packed Single-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfmsubpd] = 14; // Multiply and Subtract Packed Double-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfmsubss] = 14; // Multiply and Subtract Scalar Single-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfmsubsd] = 14; // Multiply and Subtract Scalar Double-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfnmaddps] = 14; // Negative Multiply and Add Packed Single-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfnmaddpd] = 14; // Negative Multiply and Add Packed Double-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfnmaddss] = 14; // Negative Multiply and Add Scalar Single-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfnmaddsd] = 14; // Negative Multiply and Add Double Single-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfnmsubps] = 14; // Negative Multiply and Subtract Packed Single-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfnmsubpd] = 14; // Negative Multiply and Subtract Packed Double-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfnmsubss] = 14; // Negative Multiply and Subtract Scalar Single-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfnmsubsd] = 14; // Negative Multiply and Subtract Double Single-Precision Floating-Point
// Intel Memory Protection Extensions (MPX)
SMPTypeCategory[STARS_NN_bndmk] = 16; // Make Bounds
SMPTypeCategory[STARS_NN_bndcl] = 16; // Check Lower Bound
SMPTypeCategory[STARS_NN_bndcu] = 16; // Check Upper Bound
SMPTypeCategory[STARS_NN_bndcn] = 16; // Check Upper Bound
SMPTypeCategory[STARS_NN_bndmov] = 16; // Move Bounds
SMPTypeCategory[STARS_NN_bndldx] = 16; // Load Extended Bounds Using Address Translation
SMPTypeCategory[STARS_NN_bndstx] = 16; // Store Extended Bounds Using Address Translation
// New xstate instructions
SMPTypeCategory[STARS_NN_xrstors] = 1; // Restore Processor Extended States Supervisor
SMPTypeCategory[STARS_NN_xsavec] = 1; // Save Processor Extended States with Compaction
SMPTypeCategory[STARS_NN_xsaves] = 1; // Save Processor Extended States Supervisor
// PREFETCHWT1 support
SMPTypeCategory[STARS_NN_prefetchwt1] = 16; // Prefetch Vector Data Into Caches with Intent to Write and T1 Hint
// Memory instructions
SMPTypeCategory[STARS_NN_clflushopt] = 16; // Flush a Cache Line Optimized
SMPTypeCategory[STARS_NN_clwb] = 16; // Cache Line Write Back
SMPTypeCategory[STARS_NN_pcommit] = 1; // Persistent Commit (deprecated by Intel)
// Protection Key Rights for User Pages
SMPTypeCategory[STARS_NN_rdpkru] = 1; // Read Protection Key Rights for User Pages
SMPTypeCategory[STARS_NN_wrpkru] = 1; // Write Data to User Page Key Register
// AVX comparison pseudo-ops
SMPTypeCategory[STARS_NN_vcmpeqpd] = 14; // Compare Packed Double-Precision Floating-Point Values - Equal (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpltpd] = 14; // Compare Packed Double-Precision Floating-Point Values - Less-than (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmplepd] = 14; // Compare Packed Double-Precision Floating-Point Values - Less-than-or-equal (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmpunordpd] = 14; // Compare Packed Double-Precision Floating-Point Values - Unordered (non-signaling)
SMPTypeCategory[STARS_NN_vcmpneqpd] = 14; // Compare Packed Double-Precision Floating-Point Values - Not-equal (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpnltpd] = 14; // Compare Packed Double-Precision Floating-Point Values - Not-less-than (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpnlepd] = 14; // Compare Packed Double-Precision Floating-Point Values - Not-less-than-or-equal (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpordpd] = 14; // Compare Packed Double-Precision Floating-Point Values - Ordered (non-signaling)
SMPTypeCategory[STARS_NN_vcmpeq_uqpd] = 14; // Compare Packed Double-Precision Floating-Point Values - Equal (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpngepd] = 14; // Compare Packed Double-Precision Floating-Point Values - Not-greater-than-or-equal (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpngtpd] = 14; // Compare Packed Double-Precision Floating-Point Values - Not-greater-than (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpfalsepd] = 14; // Compare Packed Double-Precision Floating-Point Values - False (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpneq_oqpd] = 14; // Compare Packed Double-Precision Floating-Point Values - Not-equal (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpgepd] = 14; // Compare Packed Double-Precision Floating-Point Values - Greater-than-or-equal (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmpgtpd] = 14; // Compare Packed Double-Precision Floating-Point Values - Greater-than (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmptruepd] = 14; // Compare Packed Double-Precision Floating-Point Values - True (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpeq_ospd] = 14; // Compare Packed Double-Precision Floating-Point Values - Equal (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmplt_oqpd] = 14; // Compare Packed Double-Precision Floating-Point Values - Less-than (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmple_oqpd] = 14; // Compare Packed Double-Precision Floating-Point Values - Less-than-or-equal (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpunord_spd] = 14; // Compare Packed Double-Precision Floating-Point Values - Unordered (signaling)
SMPTypeCategory[STARS_NN_vcmpneq_uspd] = 14; // Compare Packed Double-Precision Floating-Point Values - Not-equal (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpnlt_uqpd] = 14; // Compare Packed Double-Precision Floating-Point Values - Not-less-than (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpnle_uqpd] = 14; // Compare Packed Double-Precision Floating-Point Values - Not-less-than-or-equal (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpord_spd] = 14; // Compare Packed Double-Precision Floating-Point Values - Ordered (signaling)
SMPTypeCategory[STARS_NN_vcmpeq_uspd] = 14; // Compare Packed Double-Precision Floating-Point Values - Equal (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpnge_uqpd] = 14; // Compare Packed Double-Precision Floating-Point Values - Not-greater-than-or-equal (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpngt_uqpd] = 14; // Compare Packed Double-Precision Floating-Point Values - Not-greater-than (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpfalse_ospd] = 14; // Compare Packed Double-Precision Floating-Point Values - False (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmpneq_ospd] = 14; // Compare Packed Double-Precision Floating-Point Values - Not-equal (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmpge_oqpd] = 14; // Compare Packed Double-Precision Floating-Point Values - Greater-than-or-equal (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpgt_oqpd] = 14; // Compare Packed Double-Precision Floating-Point Values - Greater-than (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmptrue_uspd] = 14; // Compare Packed Double-Precision Floating-Point Values - True (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpeqps] = 14; // Packed Single-FP Compare - Equal (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpltps] = 14; // Packed Single-FP Compare - Less-than (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmpleps] = 14; // Packed Single-FP Compare - Less-than-or-equal (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmpunordps] = 14; // Packed Single-FP Compare - Unordered (non-signaling)
SMPTypeCategory[STARS_NN_vcmpneqps] = 14; // Packed Single-FP Compare - Not-equal (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpnltps] = 14; // Packed Single-FP Compare - Not-less-than (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpnleps] = 14; // Packed Single-FP Compare - Not-less-than-or-equal (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpordps] = 14; // Packed Single-FP Compare - Ordered (non-signaling)
SMPTypeCategory[STARS_NN_vcmpeq_uqps] = 14; // Packed Single-FP Compare - Equal (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpngeps] = 14; // Packed Single-FP Compare - Not-greater-than-or-equal (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpngtps] = 14; // Packed Single-FP Compare - Not-greater-than (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpfalseps] = 14; // Packed Single-FP Compare - False (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpneq_oqps] = 14; // Packed Single-FP Compare - Not-equal (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpgeps] = 14; // Packed Single-FP Compare - Greater-than-or-equal (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmpgtps] = 14; // Packed Single-FP Compare - Greater-than (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmptrueps] = 14; // Packed Single-FP Compare - True (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpeq_osps] = 14; // Packed Single-FP Compare - Equal (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmplt_oqps] = 14; // Packed Single-FP Compare - Less-than (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmple_oqps] = 14; // Packed Single-FP Compare - Less-than-or-equal (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpunord_sps] = 14; // Packed Single-FP Compare - Unordered (signaling)
SMPTypeCategory[STARS_NN_vcmpneq_usps] = 14; // Packed Single-FP Compare - Not-equal (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpnlt_uqps] = 14; // Packed Single-FP Compare - Not-less-than (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpnle_uqps] = 14; // Packed Single-FP Compare - Not-less-than-or-equal (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpord_sps] = 14; // Packed Single-FP Compare - Ordered (signaling)
SMPTypeCategory[STARS_NN_vcmpeq_usps] = 14; // Packed Single-FP Compare - Equal (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpnge_uqps] = 14; // Packed Single-FP Compare - Not-greater-than-or-equal (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpngt_uqps] = 14; // Packed Single-FP Compare - Not-greater-than (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpfalse_osps] = 14; // Packed Single-FP Compare - False (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmpneq_osps] = 14; // Packed Single-FP Compare - Not-equal (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmpge_oqps] = 14; // Packed Single-FP Compare - Greater-than-or-equal (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpgt_oqps] = 14; // Packed Single-FP Compare - Greater-than (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmptrue_usps] = 14; // Packed Single-FP Compare - True (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpeqsd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Equal (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpltsd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Less-than (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmplesd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Less-than-or-equal (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmpunordsd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Unordered (non-signaling)
SMPTypeCategory[STARS_NN_vcmpneqsd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Not-equal (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpnltsd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Not-less-than (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpnlesd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Not-less-than-or-equal (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpordsd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Ordered (non-signaling)
SMPTypeCategory[STARS_NN_vcmpeq_uqsd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Equal (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpngesd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Not-greater-than-or-equal (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpngtsd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Not-greater-than (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpfalsesd] = 14; // Compare Scalar Double-Precision Floating-Point Values - False (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpneq_oqsd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Not-equal (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpgesd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Greater-than-or-equal (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmpgtsd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Greater-than (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmptruesd] = 14; // Compare Scalar Double-Precision Floating-Point Values - True (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpeq_ossd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Equal (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmplt_oqsd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Less-than (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmple_oqsd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Less-than-or-equal (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpunord_ssd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Unordered (signaling)
SMPTypeCategory[STARS_NN_vcmpneq_ussd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Not-equal (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpnlt_uqsd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Not-less-than (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpnle_uqsd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Not-less-than-or-equal (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpord_ssd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Ordered (signaling)
SMPTypeCategory[STARS_NN_vcmpeq_ussd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Equal (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpnge_uqsd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Not-greater-than-or-equal (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpngt_uqsd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Not-greater-than (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpfalse_ossd] = 14; // Compare Scalar Double-Precision Floating-Point Values - False (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmpneq_ossd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Not-equal (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmpge_oqsd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Greater-than-or-equal (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpgt_oqsd] = 14; // Compare Scalar Double-Precision Floating-Point Values - Greater-than (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmptrue_ussd] = 14; // Compare Scalar Double-Precision Floating-Point Values - True (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpeqss] = 14; // Scalar Single-FP Compare - Equal (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpltss] = 14; // Scalar Single-FP Compare - Less-than (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmpless] = 14; // Scalar Single-FP Compare - Less-than-or-equal (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmpunordss] = 14; // Scalar Single-FP Compare - Unordered (non-signaling)
SMPTypeCategory[STARS_NN_vcmpneqss] = 14; // Scalar Single-FP Compare - Not-equal (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpnltss] = 14; // Scalar Single-FP Compare - Not-less-than (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpnless] = 14; // Scalar Single-FP Compare - Not-less-than-or-equal (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpordss] = 14; // Scalar Single-FP Compare - Ordered (non-signaling)
SMPTypeCategory[STARS_NN_vcmpeq_uqss] = 14; // Scalar Single-FP Compare - Equal (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpngess] = 14; // Scalar Single-FP Compare - Not-greater-than-or-equal (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpngtss] = 14; // Scalar Single-FP Compare - Not-greater-than (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpfalsess] = 14; // Scalar Single-FP Compare - False (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpneq_oqss] = 14; // Scalar Single-FP Compare - Not-equal (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpgess] = 14; // Scalar Single-FP Compare - Greater-than-or-equal (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmpgtss] = 14; // Scalar Single-FP Compare - Greater-than (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmptruess] = 14; // Scalar Single-FP Compare - True (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpeq_osss] = 14; // Scalar Single-FP Compare - Equal (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmplt_oqss] = 14; // Scalar Single-FP Compare - Less-than (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmple_oqss] = 14; // Scalar Single-FP Compare - Less-than-or-equal (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpunord_sss] = 14; // Scalar Single-FP Compare - Unordered (signaling)
SMPTypeCategory[STARS_NN_vcmpneq_usss] = 14; // Scalar Single-FP Compare - Not-equal (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpnlt_uqss] = 14; // Scalar Single-FP Compare - Not-less-than (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpnle_uqss] = 14; // Scalar Single-FP Compare - Not-less-than-or-equal (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpord_sss] = 14; // Scalar Single-FP Compare - Ordered (signaling)
SMPTypeCategory[STARS_NN_vcmpeq_usss] = 14; // Scalar Single-FP Compare - Equal (unordered, signaling)
SMPTypeCategory[STARS_NN_vcmpnge_uqss] = 14; // Scalar Single-FP Compare - Not-greater-than-or-equal (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpngt_uqss] = 14; // Scalar Single-FP Compare - Not-greater-than (unordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpfalse_osss] = 14; // Scalar Single-FP Compare - False (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmpneq_osss] = 14; // Scalar Single-FP Compare - Not-equal (ordered, signaling)
SMPTypeCategory[STARS_NN_vcmpge_oqss] = 14; // Scalar Single-FP Compare - Greater-than-or-equal (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmpgt_oqss] = 14; // Scalar Single-FP Compare - Greater-than (ordered, non-signaling)
SMPTypeCategory[STARS_NN_vcmptrue_usss] = 14; // Scalar Single-FP Compare - True (unordered, signaling)
// AVX-512 instructions
SMPTypeCategory[STARS_NN_valignd] = 14; // Align Doubleword Vectors
SMPTypeCategory[STARS_NN_valignq] = 14; // Align Quadword Vectors
SMPTypeCategory[STARS_NN_vblendmpd] = 14; // Blend Float64 Vectors Using an OpMask Control
SMPTypeCategory[STARS_NN_vblendmps] = 14; // Blend Float32 Vectors Using an OpMask Control
SMPTypeCategory[STARS_NN_vpblendmb] = 14; // Blend Byte Vectors Using an Opmask Control
SMPTypeCategory[STARS_NN_vpblendmw] = 14; // Blend Word Vectors Using an Opmask Control
SMPTypeCategory[STARS_NN_vpblendmd] = 14; // Blend Int32 Vectors Using an OpMask Control
SMPTypeCategory[STARS_NN_vpblendmq] = 14; // Blend Int64 Vectors Using an OpMask Control
SMPTypeCategory[STARS_NN_vbroadcastf32x2] = 14; // Load with Broadcast Floating-Point Data
SMPTypeCategory[STARS_NN_vbroadcastf32x4] = 14; // Load with Broadcast Floating-Point Data
SMPTypeCategory[STARS_NN_vbroadcastf64x2] = 14; // Load with Broadcast Floating-Point Data
SMPTypeCategory[STARS_NN_vbroadcastf32x8] = 14; // Load with Broadcast Floating-Point Data
SMPTypeCategory[STARS_NN_vbroadcastf64x4] = 14; // Load with Broadcast Floating-Point Data
SMPTypeCategory[STARS_NN_vbroadcasti32x2] = 14; // Load Integer and Broadcast
SMPTypeCategory[STARS_NN_vbroadcasti32x4] = 14; // Load Integer and Broadcast
SMPTypeCategory[STARS_NN_vbroadcasti64x2] = 14; // Load Integer and Broadcast
SMPTypeCategory[STARS_NN_vbroadcasti32x8] = 14; // Load Integer and Broadcast
SMPTypeCategory[STARS_NN_vbroadcasti64x4] = 14; // Load Integer and Broadcast
SMPTypeCategory[STARS_NN_vcompresspd] = 14; // Store Sparse Packed Double-Precision Floating-Point Values into Dense Memory
SMPTypeCategory[STARS_NN_vcompressps] = 14; // Store Sparse Packed Single-Precision Floating-Point Values into Dense Memory
SMPTypeCategory[STARS_NN_vcvtpd2qq] = 14; // Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers
SMPTypeCategory[STARS_NN_vcvtpd2udq] = 14; // Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers
SMPTypeCategory[STARS_NN_vcvtpd2uqq] = 14; // Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers
SMPTypeCategory[STARS_NN_vcvtps2udq] = 14; // Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values
SMPTypeCategory[STARS_NN_vcvtps2qq] = 14; // Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values
SMPTypeCategory[STARS_NN_vcvtps2uqq] = 14; // Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values
SMPTypeCategory[STARS_NN_vcvtqq2pd] = 14; // Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vcvtqq2ps] = 14; // Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vcvtsd2usi] = 14; // Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer
SMPTypeCategory[STARS_NN_vcvtss2usi] = 14; // Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer
SMPTypeCategory[STARS_NN_vcvttpd2qq] = 14; // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers
SMPTypeCategory[STARS_NN_vcvttpd2udq] = 14; // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers
SMPTypeCategory[STARS_NN_vcvttpd2uqq] = 14; // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers
SMPTypeCategory[STARS_NN_vcvttps2udq] = 14; // Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values
SMPTypeCategory[STARS_NN_vcvttps2qq] = 14; // Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values
SMPTypeCategory[STARS_NN_vcvttps2uqq] = 14; // Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values
SMPTypeCategory[STARS_NN_vcvttsd2usi] = 14; // Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer
SMPTypeCategory[STARS_NN_vcvttss2usi] = 14; // Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer
SMPTypeCategory[STARS_NN_vcvtudq2pd] = 14; // Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vcvtudq2ps] = 14; // Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vcvtuqq2pd] = 14; // Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vcvtuqq2ps] = 14; // Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vcvtusi2sd] = 14; // Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value
SMPTypeCategory[STARS_NN_vcvtusi2ss] = 14; // Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value
SMPTypeCategory[STARS_NN_vdbpsadbw] = 14; // Double Block Packed Sum-Absolute-Differences (SAD) on Unsigned Bytes
SMPTypeCategory[STARS_NN_vexpandpd] = 14; // Load Sparse Packed Double-Precision Floating-Point Values from Dense Memory
SMPTypeCategory[STARS_NN_vexpandps] = 14; // Load Sparse Packed Single-Precision Floating-Point Values from Dense Memory
SMPTypeCategory[STARS_NN_vextractf32x4] = 14; // Extract Packed Floating-Point Values
SMPTypeCategory[STARS_NN_vextractf64x2] = 14; // Extract Packed Floating-Point Values
SMPTypeCategory[STARS_NN_vextractf32x8] = 14; // Extract Packed Floating-Point Values
SMPTypeCategory[STARS_NN_vextractf64x4] = 14; // Extract Packed Floating-Point Values
SMPTypeCategory[STARS_NN_vextracti32x4] = 14; // Extract packed Integer Values
SMPTypeCategory[STARS_NN_vextracti64x2] = 14; // Extract packed Integer Values
SMPTypeCategory[STARS_NN_vextracti32x8] = 14; // Extract packed Integer Values
SMPTypeCategory[STARS_NN_vextracti64x4] = 14; // Extract packed Integer Values
SMPTypeCategory[STARS_NN_vfixupimmpd] = 14; // Fix Up Special Packed Float64 Values
SMPTypeCategory[STARS_NN_vfixupimmps] = 14; // Fix Up Special Packed Float32 Values
SMPTypeCategory[STARS_NN_vfixupimmsd] = 14; // Fix Up Special Scalar Float64 Value
SMPTypeCategory[STARS_NN_vfixupimmss] = 14; // Fix Up Special Scalar Float32 Value
SMPTypeCategory[STARS_NN_vfpclasspd] = 14; // Tests Types Of a Packed Float64 Values
SMPTypeCategory[STARS_NN_vfpclassps] = 14; // Tests Types Of a Packed Float32 Values
SMPTypeCategory[STARS_NN_vfpclasssd] = 14; // Tests Types Of a Scalar Float64 Values
SMPTypeCategory[STARS_NN_vfpclassss] = 14; // Tests Types Of a Scalar Float32 Values
SMPTypeCategory[STARS_NN_vgetexppd] = 14; // Convert Exponents of Packed DP FP Values to DP FP Values
SMPTypeCategory[STARS_NN_vgetexpps] = 14; // Convert Exponents of Packed SP FP Values to SP FP Values
SMPTypeCategory[STARS_NN_vgetexpsd] = 14; // Convert Exponents of Scalar DP FP Values to DP FP Value
SMPTypeCategory[STARS_NN_vgetexpss] = 14; // Convert Exponents of Scalar SP FP Values to SP FP Value
SMPTypeCategory[STARS_NN_vgetmantpd] = 14; // Extract Float64 Vector of Normalized Mantissas from Float64 Vector
SMPTypeCategory[STARS_NN_vgetmantps] = 14; // Extract Float32 Vector of Normalized Mantissas from Float32 Vector
SMPTypeCategory[STARS_NN_vgetmantsd] = 14; // Extract Float64 of Normalized Mantissas from Float64 Scalar
SMPTypeCategory[STARS_NN_vgetmantss] = 14; // Extract Float32 Vector of Normalized Mantissa from Float32 Vector
SMPTypeCategory[STARS_NN_vinsertf32x4] = 14; // Insert Packed Floating-Point Values
SMPTypeCategory[STARS_NN_vinsertf64x2] = 14; // Insert Packed Floating-Point Values
SMPTypeCategory[STARS_NN_vinsertf32x8] = 14; // Insert Packed Floating-Point Values
SMPTypeCategory[STARS_NN_vinsertf64x4] = 14; // Insert Packed Floating-Point Values
SMPTypeCategory[STARS_NN_vinserti32x4] = 14; // Insert Packed Integer Values
SMPTypeCategory[STARS_NN_vinserti64x2] = 14; // Insert Packed Integer Values
SMPTypeCategory[STARS_NN_vinserti32x8] = 14; // Insert Packed Integer Values
SMPTypeCategory[STARS_NN_vinserti64x4] = 14; // Insert Packed Integer Values
SMPTypeCategory[STARS_NN_vmovdqa32] = 14; // Move Aligned Packed Integer Values
SMPTypeCategory[STARS_NN_vmovdqa64] = 14; // Move Aligned Packed Integer Values
SMPTypeCategory[STARS_NN_vmovdqu8] = 14; // Move Unaligned Packed Integer Values
SMPTypeCategory[STARS_NN_vmovdqu16] = 14; // Move Unaligned Packed Integer Values
SMPTypeCategory[STARS_NN_vmovdqu32] = 14; // Move Unaligned Packed Integer Values
SMPTypeCategory[STARS_NN_vmovdqu64] = 14; // Move Unaligned Packed Integer Values
SMPTypeCategory[STARS_NN_vpabsq] = 14; // Packed Absolute Value
SMPTypeCategory[STARS_NN_vpandd] = 14; // Logical AND
SMPTypeCategory[STARS_NN_vpandq] = 14; // Logical AND
SMPTypeCategory[STARS_NN_vpandnd] = 14; // Logical AND NOT
SMPTypeCategory[STARS_NN_vpandnq] = 14; // Logical AND NOT
SMPTypeCategory[STARS_NN_vpbroadcastmb2q] = 14; // Broadcast Mask to Vector Register
SMPTypeCategory[STARS_NN_vpbroadcastmw2d] = 14; // Broadcast Mask to Vector Register
SMPTypeCategory[STARS_NN_vpcmpb] = 14; // Compare Packed Byte Values Into Mask
SMPTypeCategory[STARS_NN_vpcmpub] = 14; // Compare Packed Byte Values Into Mask
SMPTypeCategory[STARS_NN_vpcmpd] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpud] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpq] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpuq] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpw] = 14; // Compare Packed Word Values Into Mask
SMPTypeCategory[STARS_NN_vpcmpuw] = 14; // Compare Packed Word Values Into Mask
SMPTypeCategory[STARS_NN_vpcompressd] = 14; // Store Sparse Packed Doubleword Integer Values into Dense Memory/Register
SMPTypeCategory[STARS_NN_vpcompressq] = 14; // Store Sparse Packed Quadword Integer Values into Dense Memory/Register
SMPTypeCategory[STARS_NN_vpconflictd] = 14; // Detect Conflicts Within a Vector of Packed Dword Values into Dense Memory/Register
SMPTypeCategory[STARS_NN_vpconflictq] = 14; // Detect Conflicts Within a Vector of Packed Qword Values into Dense Memory/Register
SMPTypeCategory[STARS_NN_vpermb] = 14; // Permute Packed Bytes Elements
SMPTypeCategory[STARS_NN_vpermw] = 14; // Permute Packed Words Elements
SMPTypeCategory[STARS_NN_vpermi2b] = 14; // Full Permute of Bytes From Two Tables Overwriting the Index
SMPTypeCategory[STARS_NN_vpermi2w] = 14; // Full Permute From Two Tables Overwriting the Index
SMPTypeCategory[STARS_NN_vpermi2d] = 14; // Full Permute From Two Tables Overwriting the Index
SMPTypeCategory[STARS_NN_vpermi2q] = 14; // Full Permute From Two Tables Overwriting the Index
SMPTypeCategory[STARS_NN_vpermi2ps] = 14; // Full Permute From Two Tables Overwriting the Index
SMPTypeCategory[STARS_NN_vpermi2pd] = 14; // Full Permute From Two Tables Overwriting the Index
SMPTypeCategory[STARS_NN_vpermt2b] = 14; // Full Permute of Bytes From Two Tables Overwriting a Table
SMPTypeCategory[STARS_NN_vpermt2w] = 14; // Full Permute from Two Tables Overwriting one Table
SMPTypeCategory[STARS_NN_vpermt2d] = 14; // Full Permute from Two Tables Overwriting one Table
SMPTypeCategory[STARS_NN_vpermt2q] = 14; // Full Permute from Two Tables Overwriting one Table
SMPTypeCategory[STARS_NN_vpermt2ps] = 14; // Full Permute from Two Tables Overwriting one Table
SMPTypeCategory[STARS_NN_vpermt2pd] = 14; // Full Permute from Two Tables Overwriting one Table
SMPTypeCategory[STARS_NN_vpexpandd] = 14; // Load Sparse Packed Doubleword Integer Values from Dense Memory/Register
SMPTypeCategory[STARS_NN_vpexpandq] = 14; // Load Sparse Packed Quadword Integer Values from Dense Memory/Register
SMPTypeCategory[STARS_NN_vplzcntd] = 14; // Count the Number of Leading Zero Bits for Packed Dword Values
SMPTypeCategory[STARS_NN_vplzcntq] = 14; // Count the Number of Leading Zero Bits for Packed Qword Values
SMPTypeCategory[STARS_NN_vpmadd52luq] = 14; // Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Qword Accumulators
SMPTypeCategory[STARS_NN_vpmadd52huq] = 14; // Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to 64-bit Accumulators
SMPTypeCategory[STARS_NN_vpmaxsq] = 14; // Maximum of Packed Signed Integers
SMPTypeCategory[STARS_NN_vpmaxuq] = 14; // Maximum of Packed Unsigned Integers
SMPTypeCategory[STARS_NN_vpminsq] = 14; // Minimum of Packed Signed Integers
SMPTypeCategory[STARS_NN_vpminuq] = 14; // Minimum of Packed Unsigned Integers
SMPTypeCategory[STARS_NN_vpmovm2b] = 14; // Convert a Mask Register to a Vector Register
SMPTypeCategory[STARS_NN_vpmovm2w] = 14; // Convert a Mask Register to a Vector Register
SMPTypeCategory[STARS_NN_vpmovm2d] = 14; // Convert a Mask Register to a Vector Register
SMPTypeCategory[STARS_NN_vpmovm2q] = 14; // Convert a Mask Register to a Vector Register
SMPTypeCategory[STARS_NN_vpmovb2m] = 14; // Convert a Vector Register to a Mask
SMPTypeCategory[STARS_NN_vpmovw2m] = 14; // Convert a Vector Register to a Mask
SMPTypeCategory[STARS_NN_vpmovd2m] = 14; // Convert a Vector Register to a Mask
SMPTypeCategory[STARS_NN_vpmovq2m] = 14; // Convert a Vector Register to a Mask
SMPTypeCategory[STARS_NN_vpmovqb] = 14; // Down Convert QWord to Byte
SMPTypeCategory[STARS_NN_vpmovsqb] = 14; // Down Convert QWord to Byte
SMPTypeCategory[STARS_NN_vpmovusqb] = 14; // Down Convert QWord to Byte
SMPTypeCategory[STARS_NN_vpmovqw] = 14; // Down Convert QWord to Word
SMPTypeCategory[STARS_NN_vpmovsqw] = 14; // Down Convert QWord to Word
SMPTypeCategory[STARS_NN_vpmovusqw] = 14; // Down Convert QWord to Word
SMPTypeCategory[STARS_NN_vpmovqd] = 14; // Down Convert QWord to DWord
SMPTypeCategory[STARS_NN_vpmovsqd] = 14; // Down Convert QWord to DWord
SMPTypeCategory[STARS_NN_vpmovusqd] = 14; // Down Convert QWord to DWord
SMPTypeCategory[STARS_NN_vpmovdb] = 14; // Down Convert DWord to Byte
SMPTypeCategory[STARS_NN_vpmovsdb] = 14; // Down Convert DWord to Byte
SMPTypeCategory[STARS_NN_vpmovusdb] = 14; // Down Convert DWord to Byte
SMPTypeCategory[STARS_NN_vpmovdw] = 14; // Down Convert DWord to Word
SMPTypeCategory[STARS_NN_vpmovsdw] = 14; // Down Convert DWord to Word
SMPTypeCategory[STARS_NN_vpmovusdw] = 14; // Down Convert DWord to Word
SMPTypeCategory[STARS_NN_vpmovwb] = 14; // Down Convert Word to Byte
SMPTypeCategory[STARS_NN_vpmovswb] = 14; // Down Convert Word to Byte
SMPTypeCategory[STARS_NN_vpmovuswb] = 14; // Down Convert Word to Byte
SMPTypeCategory[STARS_NN_vpmullq] = 14; // Multiply Packed Integers and Store Low Result
SMPTypeCategory[STARS_NN_vpmultishiftqb] = 14; // Select Packed Unaligned Bytes from Quadword Sources
SMPTypeCategory[STARS_NN_vpord] = 14; // Bitwise Logical Or
SMPTypeCategory[STARS_NN_vporq] = 14; // Bitwise Logical Or
SMPTypeCategory[STARS_NN_vprold] = 14; // Bit Rotate Left
SMPTypeCategory[STARS_NN_vprolvd] = 14; // Bit Rotate Left
SMPTypeCategory[STARS_NN_vprolq] = 14; // Bit Rotate Left
SMPTypeCategory[STARS_NN_vprolvq] = 14; // Bit Rotate Left
SMPTypeCategory[STARS_NN_vprord] = 14; // Bit Rotate Right
SMPTypeCategory[STARS_NN_vprorvd] = 14; // Bit Rotate Right
SMPTypeCategory[STARS_NN_vprorq] = 14; // Bit Rotate Right
SMPTypeCategory[STARS_NN_vprorvq] = 14; // Bit Rotate Right
SMPTypeCategory[STARS_NN_vpscatterdd] = 14; // Scatter Packed Dword with Signed Dword
SMPTypeCategory[STARS_NN_vpscatterdq] = 14; // Scatter Packed Qword with Signed Qword Indices
SMPTypeCategory[STARS_NN_vpscatterqd] = 14; // Scatter Packed Dword with Signed Dword
SMPTypeCategory[STARS_NN_vpscatterqq] = 14; // Scatter Packed Qword with Signed Qword Indices
SMPTypeCategory[STARS_NN_vpsraq] = 14; // Bit Shift Arithmetic Right
SMPTypeCategory[STARS_NN_vpsllvw] = 14; // Variable Bit Shift Left Logical
SMPTypeCategory[STARS_NN_vpsrlvw] = 14; // Variable Bit Shift Right Logical
SMPTypeCategory[STARS_NN_vptestnmb] = 14; // Logical NAND and Set
SMPTypeCategory[STARS_NN_vptestnmw] = 14; // Logical NAND and Set
SMPTypeCategory[STARS_NN_vptestnmd] = 14; // Logical NAND and Set
SMPTypeCategory[STARS_NN_vptestnmq] = 14; // Logical NAND and Set
SMPTypeCategory[STARS_NN_vshuff32x4] = 14; // Shuffle Packed Values at 128-bit Granularity
SMPTypeCategory[STARS_NN_vshuff64x2] = 14; // Shuffle Packed Values at 128-bit Granularity
SMPTypeCategory[STARS_NN_vshufi32x4] = 14; // Shuffle Packed Values at 128-bit Granularity
SMPTypeCategory[STARS_NN_vshufi64x2] = 14; // Shuffle Packed Values at 128-bit Granularity
SMPTypeCategory[STARS_NN_vpternlogd] = 14; // Bitwise Ternary Logic
SMPTypeCategory[STARS_NN_vpternlogq] = 14; // Bitwise Ternary Logic
SMPTypeCategory[STARS_NN_vptestmb] = 14; // Logical AND and Set Mask
SMPTypeCategory[STARS_NN_vptestmw] = 14; // Logical AND and Set Mask
SMPTypeCategory[STARS_NN_vptestmd] = 14; // Logical AND and Set Mask
SMPTypeCategory[STARS_NN_vptestmq] = 14; // Logical AND and Set Mask
SMPTypeCategory[STARS_NN_vpsravw] = 14; // Variable Bit Shift Right Arithmetic
SMPTypeCategory[STARS_NN_vpsravq] = 14; // Variable Bit Shift Right Arithmetic
SMPTypeCategory[STARS_NN_vpxord] = 14; // Exclusive Or
SMPTypeCategory[STARS_NN_vpxorq] = 14; // Exclusive Or
SMPTypeCategory[STARS_NN_vrangepd] = 14; // Range Restriction Calculation For Packed Pairs of Float64 Values
SMPTypeCategory[STARS_NN_vrangeps] = 14; // Range Restriction Calculation For Packed Pairs of Float32 Values
SMPTypeCategory[STARS_NN_vrangesd] = 14; // Range Restriction Calculation From a pair of Scalar Float64 Values
SMPTypeCategory[STARS_NN_vrangess] = 14; // Range Restriction Calculation From a Pair of Scalar Float32 Values
SMPTypeCategory[STARS_NN_vrcp14pd] = 14; // Compute Approximate Reciprocals of Packed Float64 Values
SMPTypeCategory[STARS_NN_vrcp14sd] = 14; // Compute Approximate Reciprocal of Scalar Float64 Value
SMPTypeCategory[STARS_NN_vrcp14ps] = 14; // Compute Approximate Reciprocals of Packed Float32 Values
SMPTypeCategory[STARS_NN_vrcp14ss] = 14; // Compute Approximate Reciprocal of Scalar Float32 Value
SMPTypeCategory[STARS_NN_vreducepd] = 14; // Perform Reduction Transformation on Packed Float64 Values
SMPTypeCategory[STARS_NN_vreducesd] = 14; // Perform a Reduction Transformation on a Scalar Float64 Value
SMPTypeCategory[STARS_NN_vreduceps] = 14; // Perform Reduction Transformation on Packed Float32 Values
SMPTypeCategory[STARS_NN_vreducess] = 14; // Perform a Reduction Transformation on a Scalar Float32 Value
SMPTypeCategory[STARS_NN_vrndscalepd] = 14; // Round Packed Float64 Values To Include A Given Number Of Fraction Bits
SMPTypeCategory[STARS_NN_vrndscalesd] = 14; // Round Scalar Float64 Value To Include A Given Number Of Fraction Bits
SMPTypeCategory[STARS_NN_vrndscaleps] = 14; // Round Packed Float32 Values To Include A Given Number Of Fraction Bits
SMPTypeCategory[STARS_NN_vrndscaless] = 14; // Round Scalar Float32 Value To Include A Given Number Of Fraction Bits
SMPTypeCategory[STARS_NN_vrsqrt14pd] = 14; // Compute Approximate Reciprocals of Square Roots of Packed Float64 Values
SMPTypeCategory[STARS_NN_vrsqrt14sd] = 14; // Compute Approximate Reciprocal of Square Root of Scalar Float64 Value
SMPTypeCategory[STARS_NN_vrsqrt14ps] = 14; // Compute Approximate Reciprocals of Square Roots of Packed Float32 Values
SMPTypeCategory[STARS_NN_vrsqrt14ss] = 14; // Compute Approximate Reciprocal of Square Root of Scalar Float32 Value
SMPTypeCategory[STARS_NN_vscalefpd] = 14; // Scale Packed Float64 Values With Float64 Values
SMPTypeCategory[STARS_NN_vscalefsd] = 14; // Scale Scalar Float64 Values With Float64 Values
SMPTypeCategory[STARS_NN_vscalefps] = 14; // Scale Packed Float32 Values With Float32 Values
SMPTypeCategory[STARS_NN_vscalefss] = 14; // Scale Scalar Float32 Value With Float32 Value
SMPTypeCategory[STARS_NN_vscatterdps] = 14; // Scatter Packed Single, Packed Double with Signed Dword and Qword Indices
SMPTypeCategory[STARS_NN_vscatterdpd] = 14; // Scatter Packed Single, Packed Double with Signed Dword and Qword Indices
SMPTypeCategory[STARS_NN_vscatterqps] = 14; // Scatter Packed Single, Packed Double with Signed Dword and Qword Indices
SMPTypeCategory[STARS_NN_vscatterqpd] = 14; // Scatter Packed Single, Packed Double with Signed Dword and Qword Indices
SMPTypeCategory[STARS_NN_vexp2pd] = 14; // Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error
SMPTypeCategory[STARS_NN_vexp2ps] = 14; // Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error
SMPTypeCategory[STARS_NN_vrcp28pd] = 14; // Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error
SMPTypeCategory[STARS_NN_vrcp28sd] = 14; // Approximation to the Reciprocal of Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error
SMPTypeCategory[STARS_NN_vrcp28ps] = 14; // Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error
SMPTypeCategory[STARS_NN_vrcp28ss] = 14; // Approximation to the Reciprocal of Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error
SMPTypeCategory[STARS_NN_vrsqrt28pd] = 14; // Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error
SMPTypeCategory[STARS_NN_vrsqrt28sd] = 14; // Approximation to the Reciprocal Square Root of Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error
SMPTypeCategory[STARS_NN_vrsqrt28ps] = 14; // Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error
SMPTypeCategory[STARS_NN_vrsqrt28ss] = 14; // Approximation to the Reciprocal Square Root of Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error
SMPTypeCategory[STARS_NN_vgatherpf0dps] = 14; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
SMPTypeCategory[STARS_NN_vgatherpf0qps] = 14; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
SMPTypeCategory[STARS_NN_vgatherpf0dpd] = 14; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
SMPTypeCategory[STARS_NN_vgatherpf0qpd] = 14; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
SMPTypeCategory[STARS_NN_vgatherpf1dps] = 14; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
SMPTypeCategory[STARS_NN_vgatherpf1qps] = 14; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
SMPTypeCategory[STARS_NN_vgatherpf1dpd] = 14; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
SMPTypeCategory[STARS_NN_vgatherpf1qpd] = 14; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
SMPTypeCategory[STARS_NN_vscatterpf0dps] = 14; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
SMPTypeCategory[STARS_NN_vscatterpf0qps] = 14; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
SMPTypeCategory[STARS_NN_vscatterpf0dpd] = 14; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
SMPTypeCategory[STARS_NN_vscatterpf0qpd] = 14; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
SMPTypeCategory[STARS_NN_vscatterpf1dps] = 14; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
SMPTypeCategory[STARS_NN_vscatterpf1qps] = 14; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
SMPTypeCategory[STARS_NN_vscatterpf1dpd] = 14; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
SMPTypeCategory[STARS_NN_vscatterpf1qpd] = 14; // Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
// AVX-512 comparison pseudo-ops
SMPTypeCategory[STARS_NN_vpcmpltd] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpled] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpneqd] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpnltd] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpnled] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpequd] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpltud] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpleud] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpnequd] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpnltud] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpnleud] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpltq] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpleq] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpneqq] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpnltq] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpnleq] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpequq] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpltuq] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpleuq] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpnequq] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpnltuq] = 14; // Compare Packed Integer Values into Mask
SMPTypeCategory[STARS_NN_vpcmpnleuq] = 14; // Compare Packed Integer Values into Mask
// Opmask instructions
SMPTypeCategory[STARS_NN_kaddw] = 14; // ADD Two Masks
SMPTypeCategory[STARS_NN_kaddb] = 14; // ADD Two Masks
SMPTypeCategory[STARS_NN_kaddq] = 14; // ADD Two Masks
SMPTypeCategory[STARS_NN_kaddd] = 14; // ADD Two Masks
SMPTypeCategory[STARS_NN_kandw] = 14; // Bitwise Logical AND Masks
SMPTypeCategory[STARS_NN_kandb] = 14; // Bitwise Logical AND Masks
SMPTypeCategory[STARS_NN_kandq] = 14; // Bitwise Logical AND Masks
SMPTypeCategory[STARS_NN_kandd] = 14; // Bitwise Logical AND Masks
SMPTypeCategory[STARS_NN_kandnw] = 14; // Bitwise Logical AND NOT Masks
SMPTypeCategory[STARS_NN_kandnb] = 14; // Bitwise Logical AND NOT Masks
SMPTypeCategory[STARS_NN_kandnq] = 14; // Bitwise Logical AND NOT Masks
SMPTypeCategory[STARS_NN_kandnd] = 14; // Bitwise Logical AND NOT Masks
SMPTypeCategory[STARS_NN_kmovw] = 14; // Move from and to Mask Registers
SMPTypeCategory[STARS_NN_kmovb] = 14; // Move from and to Mask Registers
SMPTypeCategory[STARS_NN_kmovq] = 14; // Move from and to Mask Registers
SMPTypeCategory[STARS_NN_kmovd] = 14; // Move from and to Mask Registers
SMPTypeCategory[STARS_NN_kunpckbw] = 14; // Unpack for Mask Registers
SMPTypeCategory[STARS_NN_kunpckwd] = 14; // Unpack for Mask Registers
SMPTypeCategory[STARS_NN_kunpckdq] = 14; // Unpack for Mask Registers
SMPTypeCategory[STARS_NN_knotw] = 14; // NOT Mask Register
SMPTypeCategory[STARS_NN_knotb] = 14; // NOT Mask Register
SMPTypeCategory[STARS_NN_knotq] = 14; // NOT Mask Register
SMPTypeCategory[STARS_NN_knotd] = 14; // NOT Mask Register
SMPTypeCategory[STARS_NN_korw] = 14; // Bitwise Logical OR Masks
SMPTypeCategory[STARS_NN_korb] = 14; // Bitwise Logical OR Masks
SMPTypeCategory[STARS_NN_korq] = 14; // Bitwise Logical OR Masks
SMPTypeCategory[STARS_NN_kord] = 14; // Bitwise Logical OR Masks
SMPTypeCategory[STARS_NN_kortestw] = 14; // OR Masks And Set Flags
SMPTypeCategory[STARS_NN_kortestb] = 14; // OR Masks And Set Flags
SMPTypeCategory[STARS_NN_kortestq] = 14; // OR Masks And Set Flags
SMPTypeCategory[STARS_NN_kortestd] = 14; // OR Masks And Set Flags
SMPTypeCategory[STARS_NN_kshiftlw] = 14; // Shift Left Mask Registers
SMPTypeCategory[STARS_NN_kshiftlb] = 14; // Shift Left Mask Registers
SMPTypeCategory[STARS_NN_kshiftlq] = 14; // Shift Left Mask Registers
SMPTypeCategory[STARS_NN_kshiftld] = 14; // Shift Left Mask Registers
SMPTypeCategory[STARS_NN_kshiftrw] = 14; // Shift Right Mask Registers
SMPTypeCategory[STARS_NN_kshiftrb] = 14; // Shift Right Mask Registers
SMPTypeCategory[STARS_NN_kshiftrq] = 14; // Shift Right Mask Registers
SMPTypeCategory[STARS_NN_kshiftrd] = 14; // Shift Right Mask Registers
SMPTypeCategory[STARS_NN_kxnorw] = 14; // Bitwise Logical XNOR Masks
SMPTypeCategory[STARS_NN_kxnorb] = 14; // Bitwise Logical XNOR Masks
SMPTypeCategory[STARS_NN_kxnorq] = 14; // Bitwise Logical XNOR Masks
SMPTypeCategory[STARS_NN_kxnord] = 14; // Bitwise Logical XNOR Masks
SMPTypeCategory[STARS_NN_ktestw] = 14; // Packed Bit Test Masks and Set Flags
SMPTypeCategory[STARS_NN_ktestb] = 14; // Packed Bit Test Masks and Set Flags
SMPTypeCategory[STARS_NN_ktestq] = 14; // Packed Bit Test Masks and Set Flags
SMPTypeCategory[STARS_NN_ktestd] = 14; // Packed Bit Test Masks and Set Flags
SMPTypeCategory[STARS_NN_kxorw] = 14; // Bitwise Logical XOR Masks
SMPTypeCategory[STARS_NN_kxorb] = 14; // Bitwise Logical XOR Masks
SMPTypeCategory[STARS_NN_kxorq] = 14; // Bitwise Logical XOR Masks
SMPTypeCategory[STARS_NN_kxord] = 14; // Bitwise Logical XOR Masks
// SHA Extensions
SMPTypeCategory[STARS_NN_sha1rnds4] = 14; // Perform Four Rounds of SHA1 Operation
SMPTypeCategory[STARS_NN_sha1nexte] = 14; // Calculate SHA1 State Variable E after Four Rounds
SMPTypeCategory[STARS_NN_sha1msg1] = 14; // Perform an Intermediate Calculation for the Next Four SHA1 Message Dwords
SMPTypeCategory[STARS_NN_sha1msg2] = 14; // Perform a Final Calculation for the Next Four SHA1 Message Dwords
SMPTypeCategory[STARS_NN_sha256rnds2] = 14; // Perform Two Rounds of SHA256 Operation
SMPTypeCategory[STARS_NN_sha256msg1] = 14; // Perform an Intermediate Calculation for the Next Four SHA256 Message Dwords
SMPTypeCategory[STARS_NN_sha256msg2] = 14; // Perform a Final Calculation for the Next Four SHA256 Message Dwords
// Intel Software Guard Extensions
SMPTypeCategory[STARS_NN_encls] = 1; // Execute an Enclave System Function of Specified Leaf Number
SMPTypeCategory[STARS_NN_enclu] = 1; // Execute an Enclave User Function of Specified Leaf Number
// AMD XOP
SMPTypeCategory[STARS_NN_vfrczpd] = 14; // Extract Fraction Packed Double-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfrczps] = 14; // Extract Fraction Packed Single-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfrczsd] = 14; // Extract Fraction Scalar Double-Precision Floating-Point
SMPTypeCategory[STARS_NN_vfrczss] = 14; // Extract Fraction Scalar Single-Precision Floating Point
SMPTypeCategory[STARS_NN_vpcmov] = 14; // Vector Conditional Moves
SMPTypeCategory[STARS_NN_vpcomb] = 14; // Compare Vector Signed Bytes
SMPTypeCategory[STARS_NN_vpcomd] = 14; // Compare Vector Signed Doublewords
SMPTypeCategory[STARS_NN_vpcomq] = 14; // Compare Vector Signed Quadwords
SMPTypeCategory[STARS_NN_vpcomub] = 14; // Compare Vector Unsigned Bytes
SMPTypeCategory[STARS_NN_vpcomud] = 14; // Compare Vector Unsigned Doublewords
SMPTypeCategory[STARS_NN_vpcomuq] = 14; // Compare Vector Unsigned Quadwords
SMPTypeCategory[STARS_NN_vpcomuw] = 14; // Compare Vector Unsigned Words
SMPTypeCategory[STARS_NN_vpcomw] = 14; // Compare Vector Signed Words
SMPTypeCategory[STARS_NN_vpermil2pd] = 14; // Permute Two-Source Double-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vpermil2ps] = 14; // Permute Two-Source Single-Precision Floating-Point Values
SMPTypeCategory[STARS_NN_vphaddbd] = 14; // Packed Horizontal Add Signed Byte to Signed Doubleword
SMPTypeCategory[STARS_NN_vphaddbq] = 14; // Packed Horizontal Add Signed Byte to Signed Quadword
SMPTypeCategory[STARS_NN_vphaddbw] = 14; // Packed Horizontal Add Signed Byte to Signed Word
SMPTypeCategory[STARS_NN_vphadddq] = 14; // Packed Horizontal Add Signed Doubleword to Signed Quadword
SMPTypeCategory[STARS_NN_vphaddubd] = 14; // Packed Horizontal Add Unsigned Byte to Doubleword
SMPTypeCategory[STARS_NN_vphaddubq] = 14; // Packed Horizontal Add Unsigned Byte to Quadword
SMPTypeCategory[STARS_NN_vphaddubw] = 14; // Packed Horizontal Add Unsigned Byte to Word
SMPTypeCategory[STARS_NN_vphaddudq] = 14; // Packed Horizontal Add Unsigned Doubleword to Quadword
SMPTypeCategory[STARS_NN_vphadduwd] = 14; // Packed Horizontal Add Unsigned Word to Doubleword
SMPTypeCategory[STARS_NN_vphadduwq] = 14; // Packed Horizontal Add Unsigned Word to Quadword
SMPTypeCategory[STARS_NN_vphaddwd] = 14; // Packed Horizontal Add Signed Word to Signed Doubleword
SMPTypeCategory[STARS_NN_vphaddwq] = 14; // Packed Horizontal Add Signed Word to Signed Quadword
SMPTypeCategory[STARS_NN_vphsubbw] = 14; // Packed Horizontal Subtract Signed Byte to Signed Word
SMPTypeCategory[STARS_NN_vphsubdq] = 14; // Packed Horizontal Subtract Signed Doubleword to Signed Quadword
SMPTypeCategory[STARS_NN_vphsubwd] = 14; // Packed Horizontal Subtract Signed Word to Signed Doubleword
SMPTypeCategory[STARS_NN_vpmacsdd] = 14; // Packed Multiply Accumulate Signed Doubleword to Signed Doubleword
SMPTypeCategory[STARS_NN_vpmacsdqh] = 14; // Packed Multiply Accumulate Signed High Doubleword to Signed Quadword
SMPTypeCategory[STARS_NN_vpmacsdql] = 14; // Packed Multiply Accumulate Signed Low Doubleword to Signed Quadword
SMPTypeCategory[STARS_NN_vpmacssdd] = 14; // Packed Multiply Accumulate Signed Doubleword to Signed Doubleword with Saturation
SMPTypeCategory[STARS_NN_vpmacssdqh] = 14; // Packed Multiply Accumulate Signed High Doubleword to Signed Quadword with Saturation
SMPTypeCategory[STARS_NN_vpmacssdql] = 14; // Packed Multiply Accumulate Signed Low Doubleword to Signed Quadword with Saturation
SMPTypeCategory[STARS_NN_vpmacsswd] = 14; // Packed Multiply Accumulate Signed Word to Signed Doubleword with Saturation
SMPTypeCategory[STARS_NN_vpmacssww] = 14; // Packed Multiply Accumulate Signed Word to Signed Word with Saturation
SMPTypeCategory[STARS_NN_vpmacswd] = 14; // Packed Multiply Accumulate Signed Word to Signed Doubleword
SMPTypeCategory[STARS_NN_vpmacsww] = 14; // Packed Multiply Accumulate Signed Word to Signed Word
SMPTypeCategory[STARS_NN_vpmadcsswd] = 14; // Packed Multiply, Add and Accumulate Signed Word to Signed Doubleword with Saturation
SMPTypeCategory[STARS_NN_vpmadcswd] = 14; // Packed Multiply Add and Accumulate Signed Word to Signed Doubleword
SMPTypeCategory[STARS_NN_vpperm] = 14; // Packed Permute Bytes
SMPTypeCategory[STARS_NN_vprotb] = 14; // Packed Rotate Bytes
SMPTypeCategory[STARS_NN_vprotd] = 14; // Packed Rotate Doublewords
SMPTypeCategory[STARS_NN_vprotq] = 14; // Packed Rotate Quadwords
SMPTypeCategory[STARS_NN_vprotw] = 14; // Packed Rotate Words
SMPTypeCategory[STARS_NN_vpshab] = 14; // Packed Shift Arithmetic Bytes
SMPTypeCategory[STARS_NN_vpshad] = 14; // Packed Shift Arithmetic Doublewords
SMPTypeCategory[STARS_NN_vpshaq] = 14; // Packed Shift Arithmetic Quadwords
SMPTypeCategory[STARS_NN_vpshaw] = 14; // Packed Shift Arithmetic Words
SMPTypeCategory[STARS_NN_vpshlb] = 14; // Packed Shift Logical Bytes
SMPTypeCategory[STARS_NN_vpshld] = 14; // Packed Shift Logical Doublewords
SMPTypeCategory[STARS_NN_vpshlq] = 14; // Packed Shift Logical Quadwords
SMPTypeCategory[STARS_NN_vpshlw] = 14; // Packed Shift Logical Words
// AMP XOP comparison pseudo-ops
SMPTypeCategory[STARS_NN_vpcomltb] = 14; // Compare Vector Signed Bytes
SMPTypeCategory[STARS_NN_vpcomleb] = 14; // Compare Vector Signed Bytes
SMPTypeCategory[STARS_NN_vpcomgtb] = 14; // Compare Vector Signed Bytes
SMPTypeCategory[STARS_NN_vpcomgeb] = 14; // Compare Vector Signed Bytes
SMPTypeCategory[STARS_NN_vpcomeqb] = 14; // Compare Vector Signed Bytes
SMPTypeCategory[STARS_NN_vpcomneqb] = 14; // Compare Vector Signed Bytes
SMPTypeCategory[STARS_NN_vpcomfalseb] = 14; // Compare Vector Signed Bytes
SMPTypeCategory[STARS_NN_vpcomtrueb] = 14; // Compare Vector Signed Bytes
SMPTypeCategory[STARS_NN_vpcomltw] = 14; // Compare Vector Signed Words
SMPTypeCategory[STARS_NN_vpcomlew] = 14; // Compare Vector Signed Words
SMPTypeCategory[STARS_NN_vpcomgtw] = 14; // Compare Vector Signed Words
SMPTypeCategory[STARS_NN_vpcomgew] = 14; // Compare Vector Signed Words
SMPTypeCategory[STARS_NN_vpcomeqw] = 14; // Compare Vector Signed Words
SMPTypeCategory[STARS_NN_vpcomneqw] = 14; // Compare Vector Signed Words
SMPTypeCategory[STARS_NN_vpcomfalsew] = 14; // Compare Vector Signed Words
SMPTypeCategory[STARS_NN_vpcomtruew] = 14; // Compare Vector Signed Words
SMPTypeCategory[STARS_NN_vpcomltd] = 14; // Compare Vector Signed Doublewords
SMPTypeCategory[STARS_NN_vpcomled] = 14; // Compare Vector Signed Doublewords
SMPTypeCategory[STARS_NN_vpcomgtd] = 14; // Compare Vector Signed Doublewords
SMPTypeCategory[STARS_NN_vpcomged] = 14; // Compare Vector Signed Doublewords
SMPTypeCategory[STARS_NN_vpcomeqd] = 14; // Compare Vector Signed Doublewords
SMPTypeCategory[STARS_NN_vpcomneqd] = 14; // Compare Vector Signed Doublewords
SMPTypeCategory[STARS_NN_vpcomfalsed] = 14; // Compare Vector Signed Doublewords
SMPTypeCategory[STARS_NN_vpcomtrued] = 14; // Compare Vector Signed Doublewords
SMPTypeCategory[STARS_NN_vpcomltq] = 14; // Compare Vector Signed Quadwords
SMPTypeCategory[STARS_NN_vpcomleq] = 14; // Compare Vector Signed Quadwords
SMPTypeCategory[STARS_NN_vpcomgtq] = 14; // Compare Vector Signed Quadwords
SMPTypeCategory[STARS_NN_vpcomgeq] = 14; // Compare Vector Signed Quadwords
SMPTypeCategory[STARS_NN_vpcomeqq] = 14; // Compare Vector Signed Quadwords
SMPTypeCategory[STARS_NN_vpcomneqq] = 14; // Compare Vector Signed Quadwords
SMPTypeCategory[STARS_NN_vpcomfalseq] = 14; // Compare Vector Signed Quadwords
SMPTypeCategory[STARS_NN_vpcomtrueq] = 14; // Compare Vector Signed Quadwords
SMPTypeCategory[STARS_NN_vpcomltub] = 14; // Compare Vector Unsigned Bytes
SMPTypeCategory[STARS_NN_vpcomleub] = 14; // Compare Vector Unsigned Bytes
SMPTypeCategory[STARS_NN_vpcomgtub] = 14; // Compare Vector Unsigned Bytes
SMPTypeCategory[STARS_NN_vpcomgeub] = 14; // Compare Vector Unsigned Bytes
SMPTypeCategory[STARS_NN_vpcomequb] = 14; // Compare Vector Unsigned Bytes
SMPTypeCategory[STARS_NN_vpcomnequb] = 14; // Compare Vector Unsigned Bytes
SMPTypeCategory[STARS_NN_vpcomfalseub] = 14; // Compare Vector Unsigned Bytes
SMPTypeCategory[STARS_NN_vpcomtrueub] = 14; // Compare Vector Unsigned Bytes
SMPTypeCategory[STARS_NN_vpcomltuw] = 14; // Compare Vector Unsigned Words
SMPTypeCategory[STARS_NN_vpcomleuw] = 14; // Compare Vector Unsigned Words
SMPTypeCategory[STARS_NN_vpcomgtuw] = 14; // Compare Vector Unsigned Words
SMPTypeCategory[STARS_NN_vpcomgeuw] = 14; // Compare Vector Unsigned Words
SMPTypeCategory[STARS_NN_vpcomequw] = 14; // Compare Vector Unsigned Words
SMPTypeCategory[STARS_NN_vpcomnequw] = 14; // Compare Vector Unsigned Words
SMPTypeCategory[STARS_NN_vpcomfalseuw] = 14; // Compare Vector Unsigned Words
SMPTypeCategory[STARS_NN_vpcomtrueuw] = 14; // Compare Vector Unsigned Words
SMPTypeCategory[STARS_NN_vpcomltud] = 14; // Compare Vector Unsigned Doublewords
SMPTypeCategory[STARS_NN_vpcomleud] = 14; // Compare Vector Unsigned Doublewords
SMPTypeCategory[STARS_NN_vpcomgtud] = 14; // Compare Vector Unsigned Doublewords
SMPTypeCategory[STARS_NN_vpcomgeud] = 14; // Compare Vector Unsigned Doublewords
SMPTypeCategory[STARS_NN_vpcomequd] = 14; // Compare Vector Unsigned Doublewords
SMPTypeCategory[STARS_NN_vpcomnequd] = 14; // Compare Vector Unsigned Doublewords
SMPTypeCategory[STARS_NN_vpcomfalseud] = 14; // Compare Vector Unsigned Doublewords
SMPTypeCategory[STARS_NN_vpcomtrueud] = 14; // Compare Vector Unsigned Doublewords
SMPTypeCategory[STARS_NN_vpcomltuq] = 14; // Compare Vector Unsigned Quadwords
SMPTypeCategory[STARS_NN_vpcomleuq] = 14; // Compare Vector Unsigned Quadwords
SMPTypeCategory[STARS_NN_vpcomgtuq] = 14; // Compare Vector Unsigned Quadwords
SMPTypeCategory[STARS_NN_vpcomgeuq] = 14; // Compare Vector Unsigned Quadwords
SMPTypeCategory[STARS_NN_vpcomequq] = 14; // Compare Vector Unsigned Quadwords
SMPTypeCategory[STARS_NN_vpcomnequq] = 14; // Compare Vector Unsigned Quadwords
SMPTypeCategory[STARS_NN_vpcomfalseuq] = 14; // Compare Vector Unsigned Quadwords
SMPTypeCategory[STARS_NN_vpcomtrueuq] = 14; // Compare Vector Unsigned Quadwords
// AMD Excavator
SMPTypeCategory[STARS_NN_monitorx] = 1; // Setup Monitor Address
SMPTypeCategory[STARS_NN_mwaitx] = 1; // Monitor Wait with Timeout
// AMD Zen
SMPTypeCategory[STARS_NN_clzero] = 16; // Zero out 64 byte cache
// Intel Processor Trace
SMPTypeCategory[STARS_NN_ptwrite] = 16; // Write Data to a Processor Trace Packet
// new Intel AVX-512 instructions (December 2016)
SMPTypeCategory[STARS_NN_v4fmaddps] = 14; // Packed Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
SMPTypeCategory[STARS_NN_v4fnmaddps] = 14; // Packed Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
SMPTypeCategory[STARS_NN_v4fmaddss] = 14; // Scalar Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
SMPTypeCategory[STARS_NN_v4fnmaddss] = 14; // Scalar Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
SMPTypeCategory[STARS_NN_vp4dpwssd] = 14; // Dot Product of Signed Words with Dword Accumulation (4-iterations)
SMPTypeCategory[STARS_NN_vp4dpwssds] = 14; // Dot Product of Signed Words with Dword Accumulation and Saturation (4-iterations)
SMPTypeCategory[STARS_NN_vpopcntd] = 14; // Return the Count of Number of Bits Set to 1 in DWORD
SMPTypeCategory[STARS_NN_vpopcntq] = 14; // Return the Count of Number of Bits Set to 1 in QWORD
// Read Processor ID
SMPTypeCategory[STARS_NN_rdpid] = 2; // Read Processor ID
// Invoke VM function
SMPTypeCategory[STARS_NN_vmfunc] = 1; // Invoke VM function
// Control-flow Enforcement
SMPTypeCategory[STARS_NN_incsspd] = 14; // Increment Shadow Stack Pointer (by 4)
SMPTypeCategory[STARS_NN_incsspq] = 14; // Increment Shadow Stack Pointer (by 8)
SMPTypeCategory[STARS_NN_rdsspd] = 6; // Read (low 32 bits of) Shadow Stack Pointer
SMPTypeCategory[STARS_NN_rdsspq] = 6; // Read Shadow Stack Pointer
SMPTypeCategory[STARS_NN_saveprevssp] = 16; // Save Previous Shadow Stack Pointer
SMPTypeCategory[STARS_NN_rstorssp] = 16; // Restore saved Shadow Stack Pointer
SMPTypeCategory[STARS_NN_wrssd] = 16; // Write (4 bytes) to shadow stack
SMPTypeCategory[STARS_NN_wrssq] = 16; // Write (8 bytes) to shadow stack
SMPTypeCategory[STARS_NN_wrussd] = 16; // Write (4 bytes) to User Shadow Stack
SMPTypeCategory[STARS_NN_wrussq] = 16; // Write (8 bytes) to User Shadow Stack
SMPTypeCategory[STARS_NN_setssbsy] = 1; // Mark Shadow Stack Busy
SMPTypeCategory[STARS_NN_clrssbsy] = 1; // Clear Shadow Stack Busy Flag
SMPTypeCategory[STARS_NN_endbr64] = 1; // Terminate an Indirect Branch in 64-bit Mode
SMPTypeCategory[STARS_NN_endbr32] = 1; // Terminate an Indirect Branch in 32-bit and Compatibility Mode
// Undefined Instruction
SMPTypeCategory[STARS_NN_ud0] = 1; // Undefined Instruction
SMPTypeCategory[STARS_NN_ud1] = 1; // Undefined Instruction
// Enqueue Stores
SMPTypeCategory[STARS_NN_enqcmd] = 1; // Enqueue Command
SMPTypeCategory[STARS_NN_enqcmds] = 1; // Enqueue Command Supervisor
// AMD Zen2
SMPTypeCategory[STARS_NN_mcommit] = 1; // Commit Stores to Memory
SMPTypeCategory[STARS_NN_rdpru] = 8; // Read Processor Register
// Intel Tremont instructions
SMPTypeCategory[STARS_NN_cldemote] = 16; // Cache Line Demote
SMPTypeCategory[STARS_NN_enclv] = 1; // Execute an Enclave VMM Function of Specified Leaf Number
// Direct Stores
SMPTypeCategory[STARS_NN_movdiri] = 14; // Move Doubleword as Direct Store
SMPTypeCategory[STARS_NN_movdir64b] = 14; // Move 64 Bytes as Direct Store
// Intel WAITPKG instructions
SMPTypeCategory[STARS_NN_tpause] = 14; // Timed PAUSE
SMPTypeCategory[STARS_NN_umonitor] = 16; // User Level Set Up Monitor Address
SMPTypeCategory[STARS_NN_umwait] = 14; // User Level Monitor Wait
// Intel Sapphire Rapids instructions
SMPTypeCategory[STARS_NN_serialize] = 1; // Serialize Instruction Execution
// Intel TSX
SMPTypeCategory[STARS_NN_xresldtrk] = 1; // Resume Tracking Load Addresses
SMPTypeCategory[STARS_NN_xsusldtrk] = 1; // Suspend Tracking Load Addresses
// Intel Affine Transformation instructions
SMPTypeCategory[STARS_NN_gf2p8mulb] = 14; // Galois Field Multiply Bytes
SMPTypeCategory[STARS_NN_gf2p8affineqb] = 14; // Computes Affine Transformation
SMPTypeCategory[STARS_NN_gf2p8affineinvqb] = 14; // Computes Inverse Affine Transformation
// VEX versions
SMPTypeCategory[STARS_NN_vgf2p8mulb] = 14; // Galois Field Multiply Bytes
SMPTypeCategory[STARS_NN_vgf2p8affineqb] = 14; // Computes Affine Transformation
SMPTypeCategory[STARS_NN_vgf2p8affineinvqb] = 14; // Computes Inverse Affine Transformation
// Intrinsics for Saving and Restoring the Extended Processor States (64-bits)
SMPTypeCategory[STARS_NN_fxsave64] = 1; // Fast save FP context (64-bits)
SMPTypeCategory[STARS_NN_fxrstor64] = 1; // Fast restore FP context (64-bits)
SMPTypeCategory[STARS_NN_last] = 1;
return;
} // end of STARS_Program_t::InitTypeCategory()