From b7d340e26d8c80b09fc31e0c9bb1d5e9ff1b62c5 Mon Sep 17 00:00:00 2001 From: Jason Hiser <jdhiser@gmail.com> Date: Mon, 1 Apr 2019 18:13:28 -0400 Subject: [PATCH] fixed reg order to match x86 numbering scheme --- include/inc-util/register.hpp | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/include/inc-util/register.hpp b/include/inc-util/register.hpp index a4db21f..edd0404 100644 --- a/include/inc-util/register.hpp +++ b/include/inc-util/register.hpp @@ -33,11 +33,11 @@ namespace IRDB_SDK rn_IP, rn_EIP=rn_IP, rn_RIP=rn_IP, /* x86 general purpose registers */ - rn_EAX, rn_EBX, rn_ECX, rn_EDX, rn_ESI, rn_EDI, rn_EBP, rn_ESP, rn_R8D, rn_R9D, rn_R10D, rn_R11D, rn_R12D, rn_R13D, rn_R14D, rn_R15D, - rn_RAX, rn_RBX, rn_RCX, rn_RDX, rn_RBP, rn_RSP, rn_RSI, rn_RDI, rn_R8, rn_R9 , rn_R10, rn_R11, rn_R12, rn_R13, rn_R14, rn_R15, - rn_AX, rn_BX, rn_CX, rn_DX, rn_BP, rn_SP, rn_SI, rn_DI, rn_R8W, rn_R9W, rn_R10W, rn_R11W, rn_R12W, rn_R13W, rn_R14W, rn_R15W, - rn_AH, rn_BH, rn_CH, rn_DH, rn_SIH, rn_DIH, rn_BPH, rn_SPH, - rn_AL, rn_BL, rn_CL, rn_DL, rn_SIL, rn_DIL, rn_BPL, rn_SPL, rn_R8B, rn_R9B, rn_R10B, rn_R11B, rn_R12B, rn_R13B, rn_R14B, rn_R15B, + rn_EAX, rn_ECX, rn_EBX, rn_EDX, rn_ESI, rn_EDI, rn_EBP, rn_ESP, rn_R8D, rn_R9D, rn_R10D, rn_R11D, rn_R12D, rn_R13D, rn_R14D, rn_R15D, + rn_RAX, rn_RCX, rn_RBX, rn_RDX, rn_RBP, rn_RSP, rn_RSI, rn_RDI, rn_R8, rn_R9 , rn_R10, rn_R11, rn_R12, rn_R13, rn_R14, rn_R15, + rn_AX, rn_CX, rn_BX, rn_DX, rn_BP, rn_SP, rn_SI, rn_DI, rn_R8W, rn_R9W, rn_R10W, rn_R11W, rn_R12W, rn_R13W, rn_R14W, rn_R15W, + rn_AH, rn_CH, rn_BH, rn_DH, rn_SIH, rn_DIH, rn_BPH, rn_SPH, + rn_AL, rn_CL, rn_BL, rn_DL, rn_SIL, rn_DIL, rn_BPL, rn_SPL, rn_R8B, rn_R9B, rn_R10B, rn_R11B, rn_R12B, rn_R13B, rn_R14B, rn_R15B, /* other x86 registers here (e.g., fp, xmm, etc.), eventually */ -- GitLab