From 20b7938bf4ec0c74cfc85873d724e8ae7dc2bb72 Mon Sep 17 00:00:00 2001
From: an7s <an7s@git.zephyr-software.com>
Date: Fri, 23 Mar 2018 14:04:05 +0000
Subject: [PATCH] Add Zmm to Capstone operand class
Former-commit-id: c306dd10714825c1a8a1c9d95f1756005f580dd4
---
libIRDB/include/core/operand_cs.hpp | 1 +
libIRDB/src/core/operand_cs.cpp | 18 ++++++++++++++++++
libIRDB/src/util/params.cpp | 2 +-
3 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/libIRDB/include/core/operand_cs.hpp b/libIRDB/include/core/operand_cs.hpp
index 78c278159..0d4e5e78b 100644
--- a/libIRDB/include/core/operand_cs.hpp
+++ b/libIRDB/include/core/operand_cs.hpp
@@ -26,6 +26,7 @@ class DecodedOperandCapstone_t
bool isFpuRegister() const;
bool isSseRegister() const;
bool isAvxRegister() const;
+ bool isZmmRegister() const;
bool isSpecialRegister() const;
bool isSegmentRegister() const;
uint32_t getRegNumber() const;
diff --git a/libIRDB/src/core/operand_cs.cpp b/libIRDB/src/core/operand_cs.cpp
index 6d824ca66..a7621475d 100644
--- a/libIRDB/src/core/operand_cs.cpp
+++ b/libIRDB/src/core/operand_cs.cpp
@@ -312,6 +312,22 @@ bool DecodedOperandCapstone_t::isAvxRegister() const
return isRegister() && regs.find(op.reg)!=end(regs);
}
+bool DecodedOperandCapstone_t::isZmmRegister() const
+{
+ const auto regs=set<x86_reg>({
+ X86_REG_ZMM0, X86_REG_ZMM1, X86_REG_ZMM2,
+ X86_REG_ZMM3, X86_REG_ZMM4, X86_REG_ZMM5, X86_REG_ZMM6, X86_REG_ZMM7,
+ X86_REG_ZMM8, X86_REG_ZMM9, X86_REG_ZMM10, X86_REG_ZMM11, X86_REG_ZMM12,
+ X86_REG_ZMM13, X86_REG_ZMM14, X86_REG_ZMM15, X86_REG_ZMM16, X86_REG_ZMM17,
+ X86_REG_ZMM18, X86_REG_ZMM19, X86_REG_ZMM20, X86_REG_ZMM21, X86_REG_ZMM22,
+ X86_REG_ZMM23, X86_REG_ZMM24, X86_REG_ZMM25, X86_REG_ZMM26, X86_REG_ZMM27,
+ X86_REG_ZMM28, X86_REG_ZMM29, X86_REG_ZMM30, X86_REG_ZMM31,
+ });
+ const auto the_insn=static_cast<cs_insn*>(my_insn.get());
+ const auto &op = (the_insn->detail->x86.operands[op_num]);
+ return isRegister() && regs.find(op.reg)!=end(regs);
+}
+
bool DecodedOperandCapstone_t::isSpecialRegister() const
{
const auto regs=set<x86_reg>({
@@ -357,6 +373,8 @@ uint32_t DecodedOperandCapstone_t::getRegNumber() const
return op.reg-X86_REG_XMM0;
else if(isAvxRegister())
return op.reg-X86_REG_YMM0;
+ else if(isZmmRegister())
+ return op.reg-X86_REG_ZMM0;
else if(isSegmentRegister())
return to_seg_reg_number(op.reg);
else
diff --git a/libIRDB/src/util/params.cpp b/libIRDB/src/util/params.cpp
index de1f604b9..2d3448949 100644
--- a/libIRDB/src/util/params.cpp
+++ b/libIRDB/src/util/params.cpp
@@ -44,7 +44,7 @@ bool libIRDB::IsParameterWrite(const FileIR_t *firp, Instruction_t* insn, string
{
// if it's a register
// if((d.Argument1.ArgType®ISTER_TYPE)==REGISTER_TYPE)
- if(d.getOperand(0).isRegister())
+ if(d.getOperand(0).isGeneralPurposeRegister())
{
// int regno=(d.Argument1.ArgType)&0xFFFF;
int regno=d.getOperand(0).getRegNumber();
--
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