diff --git a/irdb-libs/libIRDB-core/src/decode_csx86.cpp b/irdb-libs/libIRDB-core/src/decode_csx86.cpp
index 792b42ae76764feafadab26625e66a1159c78136..8fb9aab5e06c81184d9506e3be74eccdb1380b0f 100644
--- a/irdb-libs/libIRDB-core/src/decode_csx86.cpp
+++ b/irdb-libs/libIRDB-core/src/decode_csx86.cpp
@@ -73,13 +73,14 @@ static bool isPartOfGroup(const cs_insn* the_insn, const x86_insn_group the_grp)
 static bool isJmp(cs_insn* the_insn) 
 {
 
-	const auto is_jmp_grp =  isPartOfGroup(the_insn,X86_GRP_JUMP);
-	const auto is_loop = 
+	const auto is_jmp_grp = isPartOfGroup(the_insn,X86_GRP_JUMP);
+	const auto is_ljmp    = the_insn->id == X86_INS_LJMP;
+	const auto is_loop    = 
 		the_insn->id == X86_INS_LOOP   || 
 		the_insn->id == X86_INS_LOOPE  || 
 		the_insn->id == X86_INS_LOOPNE ;
 
-	return is_jmp_grp || is_loop;
+	return is_jmp_grp || is_loop || is_ljmp;
 }
 
 template<class type>
@@ -361,8 +362,10 @@ bool DecodedInstructionCapstoneX86_t::isUnconditionalBranch() const
 bool DecodedInstructionCapstoneX86_t::isConditionalBranch() const
 {
 	if(!valid()) throw std::logic_error(string("Called ")+__FUNCTION__+" on invalid instruction");
-	const auto the_insn=static_cast<cs_insn*>(my_insn.get());
-	return isJmp(the_insn) && getMnemonic()!="jmp";
+	const auto the_insn    = static_cast<cs_insn*>(my_insn.get());
+	const auto mnemonic    = getMnemonic();
+	const auto is_uncond_type = mnemonic=="jmp" || mnemonic == "ljmp";
+	return isJmp(the_insn) && !is_uncond_type;
 }
 
 bool DecodedInstructionCapstoneX86_t::isReturn() const
diff --git a/irdb-libs/libIRDB-core/src/operand_csx86.cpp b/irdb-libs/libIRDB-core/src/operand_csx86.cpp
index ce863a9ef45d60a35f2354a6fc2a5f81e0b65e91..c44c8e4f0aab60a0c2c2db9c2ebe2ab9e3fe4844 100644
--- a/irdb-libs/libIRDB-core/src/operand_csx86.cpp
+++ b/irdb-libs/libIRDB-core/src/operand_csx86.cpp
@@ -34,6 +34,13 @@ static uint32_t to_seg_reg_number(const x86_reg &reg)
 
 static uint32_t to_reg_number(const x86_reg &reg)
 {
+	if(X86_REG_XMM0 <= reg && reg <= X86_REG_XMM31)
+		return reg-X86_REG_XMM0;
+	if(X86_REG_YMM0 <= reg && reg <= X86_REG_YMM31)
+		return reg-X86_REG_YMM0;
+	if(X86_REG_ZMM0 <= reg && reg <= X86_REG_ZMM31)
+		return reg-X86_REG_ZMM0;
+
 	switch(reg)
 	{	
 		case X86_REG_AH: