From b5567de2d82391d948739cb5d6c9459964a26938 Mon Sep 17 00:00:00 2001 From: an7s <an7s@git.zephyr-software.com> Date: Tue, 29 Apr 2014 18:51:24 +0000 Subject: [PATCH] More verbose debug when assert stmts fail Former-commit-id: f0595b5a7a980cff1db74b5dff0b5fcf2e348665 --- libIRDB/src/core/fileir.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/libIRDB/src/core/fileir.cpp b/libIRDB/src/core/fileir.cpp index 595916ff0..947d54002 100644 --- a/libIRDB/src/core/fileir.cpp +++ b/libIRDB/src/core/fileir.cpp @@ -174,6 +174,7 @@ void FileIR_t::AssembleRegistry() assert(reg_val != assembly_registry.end()); Instruction_t *instr = reg_val->first; + disasm.EIP = (UIntPtr)&binary_stream[index]; int instr_len = Disasm(&disasm); string rawBits; @@ -184,6 +185,7 @@ void FileIR_t::AssembleRegistry() } instr->SetDataBits(rawBits); +// cerr << "doing instruction:" << ((Instruction_t*)instr)->getDisassembly() << " comment: " << ((Instruction_t*)instr)->GetComment() << endl; reg_val++; } @@ -475,6 +477,7 @@ void FileIR_t::WriteToDB() // in the IRDB, or have an associated "old" instruction. // without these bits of information, the new instruction can't possibly execute correctly. // and we won't have the information necessary to emit spri. + cerr << "NULL fallthrough: offending instruction:" << ((Instruction_t*)insnp)->getDisassembly() << " comment: " << ((Instruction_t*)insnp)->GetComment() << endl; assert(0); abort(); } @@ -488,6 +491,7 @@ void FileIR_t::WriteToDB() // in the IRDB, or have an associated "old" instruction. // without these bits of information, the new instruction can't possibly execute correctly. // and we won't have the information necessary to emit spri. + cerr << "offending instruction:" << ((Instruction_t*)insnp)->getDisassembly() << " comment: " << ((Instruction_t*)insnp)->GetComment() << endl; assert(0); abort(); } -- GitLab