From c88cf40c1b3058b281551249efb983209b7b70b0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Leon=20Wei=C3=9F?= <leon.weiss@rub.de> Date: Fri, 20 Oct 2023 12:14:43 +0200 Subject: [PATCH] Treat RIZ/EIZ as an invalid register in hasIndexRegister --- irdb-libs/libIRDB-core/src/operand_csx86.cpp | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/irdb-libs/libIRDB-core/src/operand_csx86.cpp b/irdb-libs/libIRDB-core/src/operand_csx86.cpp index 080c6ff41..aa6135c2d 100644 --- a/irdb-libs/libIRDB-core/src/operand_csx86.cpp +++ b/irdb-libs/libIRDB-core/src/operand_csx86.cpp @@ -464,9 +464,14 @@ bool DecodedOperandCapstoneX86_t::hasBaseRegister() const bool DecodedOperandCapstoneX86_t::hasIndexRegister() const { - const auto the_insn=static_cast<cs_insn*>(my_insn.get()); - const auto &op = (the_insn->detail->x86.operands[op_num]); - return isMemory() && op.mem.index!=X86_REG_INVALID; + const auto the_insn=static_cast<cs_insn*>(my_insn.get()); + const auto &op = (the_insn->detail->x86.operands[op_num]); + + const auto index_reg_is_valid = + op.mem.index != X86_REG_INVALID && + op.mem.index != X86_REG_EIZ && + op.mem.index != X86_REG_RIZ; + return isMemory() && index_reg_is_valid; } uint32_t DecodedOperandCapstoneX86_t::getBaseRegister() const -- GitLab