SMPStaticAnalyzer.cpp

StackAlteration[NN_leaved] = 4;              // High Level Procedure Exit        **
StackAlteration[NN_leaveq] = 8;              // High Level Procedure Exit        **
StackAlteration[NN_pop] = 4;                 // Pop a word from the Stack
StackAlteration[NN_popaw] = 14;               // Pop all General Registers
StackAlteration[NN_popa] = 28;                // Pop all General Registers
StackAlteration[NN_popad] = 28;               // Pop all General Registers (use32)
StackAlteration[NN_popaq] = 56;               // Pop all General Registers (use64)
StackAlteration[NN_popfw] = 2;               // Pop Stack into Flags Register         **
StackAlteration[NN_popf] = 4;                // Pop Stack into Flags Register         **
StackAlteration[NN_popfd] = 4;               // Pop Stack into Eflags Register        **
StackAlteration[NN_popfq] = 8;               // Pop Stack into Rflags Register        **
StackAlteration[NN_push] = -4;                // Push Operand onto the Stack
StackAlteration[NN_pushaw] = -14;              // Push all General Registers
StackAlteration[NN_pusha] = -28;               // Push all General Registers
StackAlteration[NN_pushad] = -28;              // Push all General Registers (use32)
StackAlteration[NN_pushaq] = -56;              // Push all General Registers (use64)
StackAlteration[NN_pushfw] = -2;              // Push Flags Register onto the Stack
StackAlteration[NN_pushf] = -4;               // Push Flags Register onto the Stack
StackAlteration[NN_pushfd] = -4;              // Push Flags Register onto the Stack (use32)
StackAlteration[NN_pushfq] = -8;              // Push Flags Register onto the Stack (use64)
StackAlteration[NN_retn] = 4;                // Return Near from Procedure
StackAlteration[NN_retf] = 8;                // Return Far from Procedure
StackAlteration[NN_sub] = 1;                  // Subtraction; check operands for stack pointer

//
//      486 instructions
//


//
//      Pentium instructions
//


//
//      Pentium Pro instructions
//


//
//      FPP instructions
//


//
//      80387 instructions
//

//
//      Instructions added 28.02.96
//

StackAlteration[NN_loadall] = 0;             // Load the entire CPU state from ES:EDI ?? Cannot find in Intel manuals

//
//      MMX instructions
//


//
//      Undocumented Deschutes processor instructions
//

//      Pentium II instructions

StackAlteration[NN_sysenter] = 0;            // Fast Transition to System Call Entry Point
StackAlteration[NN_sysexit] = 0;             // Fast Transition from System Call Entry Point

//      3DNow! instructions


//      Pentium III instructions


// Pentium III Pseudo instructions

// AMD K7 instructions

// Revisit AMD if we port to it.

// Undocumented FP instructions (thanks to norbert.juffa@adm.com)

// Pentium 4 instructions


// AMD syscall/sysret instructions  NOTE: not AMD, found in Intel manual

StackAlteration[NN_syscall] = 0;             // Low latency system call
StackAlteration[NN_sysret] = 0;              // Return from system call

// AMD64 instructions    NOTE: not AMD, found in Intel manual

// New Pentium instructions (SSE3)


// Missing AMD64 instructions  NOTE: also found in Intel manual

// SSE3 instructions

// SSSE3 instructions


// VMX instructions

#if 599 < IDA_SDK_VERSION

// Added with x86-64

// Geode LX 3DNow! extensions

// SSE2 pseudoinstructions


// SSSE4.1 instructions


// SSSE4.2 instructions

// AMD SSE4a instructions

// xsave/xrstor instructions

// Intel Safer Mode Extensions (SMX)

// AMD-V Virtualization ISA Extension

// VMX+ instructions

// Intel Atom instructions

// Intel AES instructions

// Carryless multiplication

#endif // 599 < IDA_SDK_VERSION

StackAlteration[NN_last] = 0;

  return;

} // end InitOptCategory()