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Open Source Software
Zipr Toolchain
Commits
3da58cb1
Commit
3da58cb1
authored
6 years ago
by
Jason Hiser
Browse files
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sdk factorying
parent
8f0df0ed
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No related tags found
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Changes
4
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4 changed files
unpin.cpp
+12
-14
12 additions, 14 deletions
unpin.cpp
unpin.h
+8
-8
8 additions, 8 deletions
unpin.h
unpin_aarch64.cpp
+33
-35
33 additions, 35 deletions
unpin_aarch64.cpp
unpin_x86.cpp
+4
-5
4 additions, 5 deletions
unpin_x86.cpp
with
57 additions
and
62 deletions
unpin.cpp
+
12
−
14
View file @
3da58cb1
...
@@ -29,7 +29,6 @@
...
@@ -29,7 +29,6 @@
**************************************************************************/
**************************************************************************/
#include
<zipr_sdk.h>
#include
<string>
#include
<string>
#include
<algorithm>
#include
<algorithm>
#include
"unpin.h"
#include
"unpin.h"
...
@@ -40,7 +39,6 @@
...
@@ -40,7 +39,6 @@
using
namespace
IRDB_SDK
;
using
namespace
IRDB_SDK
;
using
namespace
std
;
using
namespace
std
;
using
namespace
Zipr_SDK
;
using
namespace
Zipr_SDK
;
using
namespace
ELFIO
;
#define ALLOF(a) begin(a),end(a)
#define ALLOF(a) begin(a),end(a)
...
@@ -78,19 +76,19 @@ bool Unpin_t::should_cfi_pin(Instruction_t* insn)
...
@@ -78,19 +76,19 @@ bool Unpin_t::should_cfi_pin(Instruction_t* insn)
return
m_should_cfi_pin
;
return
m_should_cfi_pin
;
}
}
ZiprOptionsNamespace_t
*
Unpin_t
::
R
egisterOptions
(
ZiprOptionsNamespace_t
*
global
)
ZiprOptionsNamespace_t
*
Unpin_t
::
r
egisterOptions
(
ZiprOptionsNamespace_t
*
global
)
{
{
auto
unpin_ns
=
new
ZiprOptionsNamespace_t
(
"unpin"
);
auto
unpin_ns
=
new
ZiprOptionsNamespace_t
(
"unpin"
);
global
->
A
ddOption
(
&
m_verbose
);
global
->
a
ddOption
(
&
m_verbose
);
m_should_cfi_pin
.
setDescription
(
"Pin CFI instructions."
);
m_should_cfi_pin
.
setDescription
(
"Pin CFI instructions."
);
unpin_ns
->
A
ddOption
(
&
m_should_cfi_pin
);
unpin_ns
->
a
ddOption
(
&
m_should_cfi_pin
);
m_on
.
setDescription
(
"Turn unpin plugin on/off."
);
m_on
.
setDescription
(
"Turn unpin plugin on/off."
);
unpin_ns
->
A
ddOption
(
&
m_on
);
unpin_ns
->
a
ddOption
(
&
m_on
);
m_max_unpins
.
setDescription
(
"Set how many unpins are allowed, useful for debugging."
);
m_max_unpins
.
setDescription
(
"Set how many unpins are allowed, useful for debugging."
);
unpin_ns
->
A
ddOption
(
&
m_max_unpins
);
unpin_ns
->
a
ddOption
(
&
m_max_unpins
);
return
unpin_ns
;
return
unpin_ns
;
}
}
...
@@ -171,21 +169,21 @@ void Unpin_t::DoUnpinForScoops()
...
@@ -171,21 +169,21 @@ void Unpin_t::DoUnpinForScoops()
cout
<<
"# ATTRIBUTE Zipr_Unpinning::scoop_unpin_missed_unpins="
<<
dec
<<
missed_unpins
<<
endl
;
cout
<<
"# ATTRIBUTE Zipr_Unpinning::scoop_unpin_missed_unpins="
<<
dec
<<
missed_unpins
<<
endl
;
}
}
Zipr_SDK
::
ZiprPreference
Unpin_t
::
R
etargetCallback
(
Zipr_SDK
::
ZiprPreference
Unpin_t
::
r
etargetCallback
(
const
RangeAddress_t
&
callback_address
,
const
RangeAddress_t
&
callback_address
,
const
DollopEntry_t
*
callback_entry
,
const
DollopEntry_t
*
callback_entry
,
RangeAddress_t
&
target_address
)
RangeAddress_t
&
target_address
)
{
{
if
(
!
m_on
)
return
Zipr_SDK
::
ZiprPluginInterface_t
::
R
etargetCallback
(
callback_address
,
callback_entry
,
target_address
);
if
(
!
m_on
)
return
Zipr_SDK
::
ZiprPluginInterface_t
::
r
etargetCallback
(
callback_address
,
callback_entry
,
target_address
);
unpins
++
;
// unpinning a call to a scoop.
unpins
++
;
// unpinning a call to a scoop.
if
(
m_max_unpins
!=
-
1
&&
unpins
>=
m_max_unpins
)
if
(
m_max_unpins
!=
-
1
&&
unpins
>=
m_max_unpins
)
return
Zipr_SDK
::
ZiprPluginInterface_t
::
R
etargetCallback
(
callback_address
,
callback_entry
,
target_address
);
return
Zipr_SDK
::
ZiprPluginInterface_t
::
r
etargetCallback
(
callback_address
,
callback_entry
,
target_address
);
auto
&
ms
=*
zo
->
G
etMemorySpace
();
auto
&
ms
=*
zo
->
g
etMemorySpace
();
auto
insn
=
callback_entry
->
Instruction
();
auto
insn
=
callback_entry
->
get
Instruction
();
auto
&
locMap
=*
(
zo
->
G
etLocationMap
());
auto
&
locMap
=*
(
zo
->
g
etLocationMap
());
for
(
auto
reloc
:
insn
->
getRelocations
())
for
(
auto
reloc
:
insn
->
getRelocations
())
{
{
if
(
reloc
->
getType
()
==
string
(
"callback_to_scoop"
))
if
(
reloc
->
getType
()
==
string
(
"callback_to_scoop"
))
...
@@ -261,7 +259,7 @@ void Unpin_t::DoUpdateForScoops()
...
@@ -261,7 +259,7 @@ void Unpin_t::DoUpdateForScoops()
// getWRT returns an BaseObj, but this reloc type expects an instruction
// getWRT returns an BaseObj, but this reloc type expects an instruction
// safe cast and check.
// safe cast and check.
assert
(
insn
);
assert
(
insn
);
Zipr_SDK
::
InstructionLocationMap_t
&
locMap
=*
(
zo
->
G
etLocationMap
());
Zipr_SDK
::
InstructionLocationMap_t
&
locMap
=*
(
zo
->
g
etLocationMap
());
IRDB_SDK
::
VirtualOffset_t
newLoc
=
locMap
[
insn
];
IRDB_SDK
::
VirtualOffset_t
newLoc
=
locMap
[
insn
];
cout
<<
"Unpin::Unpinned data_to_insn_ptr insn ("
<<
hex
<<
insn
->
getBaseID
()
<<
":"
cout
<<
"Unpin::Unpinned data_to_insn_ptr insn ("
<<
hex
<<
insn
->
getBaseID
()
<<
":"
...
...
This diff is collapsed.
Click to expand it.
unpin.h
+
8
−
8
View file @
3da58cb1
...
@@ -32,7 +32,7 @@
...
@@ -32,7 +32,7 @@
#define unpin_h
#define unpin_h
#include
<irdb-core>
#include
<irdb-core>
#include
<zipr
_
sdk
.h
>
#include
<zipr
-
sdk>
class
Unpin_t
:
public
Zipr_SDK
::
ZiprPluginInterface_t
class
Unpin_t
:
public
Zipr_SDK
::
ZiprPluginInterface_t
{
{
...
@@ -46,8 +46,8 @@ class Unpin_t : public Zipr_SDK::ZiprPluginInterface_t
...
@@ -46,8 +46,8 @@ class Unpin_t : public Zipr_SDK::ZiprPluginInterface_t
m_max_unpins
(
"max-unpins"
,
-
1
),
m_max_unpins
(
"max-unpins"
,
-
1
),
unpins
(
0
),
unpins
(
0
),
missed_unpins
(
0
),
missed_unpins
(
0
),
ms
(
*
zo
->
G
etMemorySpace
()),
ms
(
*
zo
->
g
etMemorySpace
()),
locMap
(
*
(
zo
->
G
etLocationMap
())),
locMap
(
*
(
zo
->
g
etLocationMap
())),
firp
(
*
(
zo
->
getFileIR
()))
firp
(
*
(
zo
->
getFileIR
()))
{
}
{
}
...
@@ -55,23 +55,23 @@ class Unpin_t : public Zipr_SDK::ZiprPluginInterface_t
...
@@ -55,23 +55,23 @@ class Unpin_t : public Zipr_SDK::ZiprPluginInterface_t
virtual
~
Unpin_t
()
virtual
~
Unpin_t
()
{
}
{
}
virtual
void
PinningBegin
()
virtual
void
do
PinningBegin
()
override
{
{
if
(
!
m_on
)
return
;
if
(
!
m_on
)
return
;
DoUnpin
();
DoUnpin
();
}
}
virtual
void
CallbackLinkingEnd
()
virtual
void
do
CallbackLinkingEnd
()
override
{
{
if
(
!
m_on
)
return
;
if
(
!
m_on
)
return
;
DoUpdate
();
DoUpdate
();
}
}
virtual
Zipr_SDK
::
ZiprOptionsNamespace_t
*
R
egisterOptions
(
Zipr_SDK
::
ZiprOptionsNamespace_t
*
);
virtual
Zipr_SDK
::
ZiprOptionsNamespace_t
*
r
egisterOptions
(
Zipr_SDK
::
ZiprOptionsNamespace_t
*
)
override
;
Zipr_SDK
::
ZiprPreference
R
etargetCallback
(
Zipr_SDK
::
ZiprPreference
r
etargetCallback
(
const
Zipr_SDK
::
RangeAddress_t
&
callback_address
,
const
Zipr_SDK
::
RangeAddress_t
&
callback_address
,
const
Zipr_SDK
::
DollopEntry_t
*
callback_entry
,
const
Zipr_SDK
::
DollopEntry_t
*
callback_entry
,
Zipr_SDK
::
RangeAddress_t
&
target_address
);
Zipr_SDK
::
RangeAddress_t
&
target_address
)
override
;
protected
:
protected
:
// designed for arch-specific override.
// designed for arch-specific override.
virtual
void
HandleRetAddrReloc
(
IRDB_SDK
::
Instruction_t
*
from_insn
,
IRDB_SDK
::
Relocation_t
*
reloc
)
=
0
;
virtual
void
HandleRetAddrReloc
(
IRDB_SDK
::
Instruction_t
*
from_insn
,
IRDB_SDK
::
Relocation_t
*
reloc
)
=
0
;
...
...
This diff is collapsed.
Click to expand it.
unpin_aarch64.cpp
+
33
−
35
View file @
3da58cb1
...
@@ -29,7 +29,6 @@
...
@@ -29,7 +29,6 @@
**************************************************************************/
**************************************************************************/
#include
<zipr_sdk.h>
#include
<string>
#include
<string>
#include
<algorithm>
#include
<algorithm>
#include
"unpin.h"
#include
"unpin.h"
...
@@ -40,7 +39,6 @@
...
@@ -40,7 +39,6 @@
using
namespace
IRDB_SDK
;
using
namespace
IRDB_SDK
;
using
namespace
std
;
using
namespace
std
;
using
namespace
Zipr_SDK
;
using
namespace
Zipr_SDK
;
using
namespace
ELFIO
;
#define ALLOF(a) begin(a),end(a)
#define ALLOF(a) begin(a),end(a)
...
@@ -139,7 +137,7 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
...
@@ -139,7 +137,7 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
const
auto
clean_new_insn
=
full_insn
&
~
(
mask2
<<
29
)
&
~
(
mask19
<<
5
);
const
auto
clean_new_insn
=
full_insn
&
~
(
mask2
<<
29
)
&
~
(
mask19
<<
5
);
const
auto
new_insn
=
clean_new_insn
|
((
new_immlo2
&
mask2
)
<<
29
)
|
((
new_immhi19
&
mask19
)
<<
5
);
const
auto
new_insn
=
clean_new_insn
|
((
new_immlo2
&
mask2
)
<<
29
)
|
((
new_immhi19
&
mask19
)
<<
5
);
// put the new instruction in the output
// put the new instruction in the output
ms
.
P
lopBytes
(
from_insn_location
,
(
const
char
*
)
&
new_insn
,
insn_bytes_len
);
ms
.
p
lopBytes
(
from_insn_location
,
(
const
char
*
)
&
new_insn
,
insn_bytes_len
);
if
(
m_verbose
)
if
(
m_verbose
)
{
{
cout
<<
"Relocating a adr(p) pcrel relocation with orig_pageno="
<<
hex
cout
<<
"Relocating a adr(p) pcrel relocation with orig_pageno="
<<
hex
...
@@ -168,7 +166,7 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
...
@@ -168,7 +166,7 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
const
auto
tramp_range
=
ms
.
getFreeRange
(
tramp_size
);
const
auto
tramp_range
=
ms
.
getFreeRange
(
tramp_size
);
const
auto
tramp_start
=
tramp_range
.
getStart
();
const
auto
tramp_start
=
tramp_range
.
getStart
();
// don't be too fancy, just reserve 12 bytes.
// don't be too fancy, just reserve 12 bytes.
ms
.
S
plitFreeRange
({
tramp_start
,
tramp_start
+
12
});
ms
.
s
plitFreeRange
({
tramp_start
,
tramp_start
+
12
});
const
auto
FA
=
from_insn_location
;
const
auto
FA
=
from_insn_location
;
...
@@ -190,8 +188,8 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
...
@@ -190,8 +188,8 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
// put an uncond branch at where the adr was.
// put an uncond branch at where the adr was.
// and make it point at L0
// and make it point at L0
ms
.
P
lopBytes
(
FA
,
branch_bytes
.
c_str
(),
4
);
ms
.
p
lopBytes
(
FA
,
branch_bytes
.
c_str
(),
4
);
zo
->
A
pplyPatch
(
FA
,
L0
);
zo
->
a
pplyPatch
(
FA
,
L0
);
// adrp: 1 imm2lo 1 0000 immhi19 Rd
// adrp: 1 imm2lo 1 0000 immhi19 Rd
auto
adrp_bytes
=
string
(
"
\x00\x00\x00\x90
"
,
4
);
auto
adrp_bytes
=
string
(
"
\x00\x00\x00\x90
"
,
4
);
...
@@ -200,7 +198,7 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
...
@@ -200,7 +198,7 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
adrp_word
|=
((
relocd_immlo2
&
mask2
)
<<
29
)
|
((
relocd_immhi19
&
mask19
)
<<
5
);
adrp_word
|=
((
relocd_immlo2
&
mask2
)
<<
29
)
|
((
relocd_immhi19
&
mask19
)
<<
5
);
cout
<<
"Tramp for "
<<
L0
<<
", relocd_immlo2="
<<
relocd_immlo2
cout
<<
"Tramp for "
<<
L0
<<
", relocd_immlo2="
<<
relocd_immlo2
<<
", relocd_immhi19="
<<
relocd_immhi19
<<
endl
;
<<
", relocd_immhi19="
<<
relocd_immhi19
<<
endl
;
ms
.
P
lopBytes
(
L0
,(
char
*
)
&
adrp_word
,
4
);
ms
.
p
lopBytes
(
L0
,(
char
*
)
&
adrp_word
,
4
);
// add64 imm12 = 1001 0001 00 imm12 Rn Rd
// add64 imm12 = 1001 0001 00 imm12 Rn Rd
auto
add_bytes
=
string
(
"
\x00\x00\x00\x91
"
,
4
);
auto
add_bytes
=
string
(
"
\x00\x00\x00\x91
"
,
4
);
...
@@ -208,12 +206,12 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
...
@@ -208,12 +206,12 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
add_word
|=
destreg
<<
0
;
add_word
|=
destreg
<<
0
;
add_word
|=
destreg
<<
5
;
add_word
|=
destreg
<<
5
;
add_word
|=
address_to_generate_page_offset
<<
10
;
add_word
|=
address_to_generate_page_offset
<<
10
;
ms
.
P
lopBytes
(
L1
,(
char
*
)
&
add_word
,
4
);
ms
.
p
lopBytes
(
L1
,(
char
*
)
&
add_word
,
4
);
// put an uncond branch the end of the trampoline
// put an uncond branch the end of the trampoline
// and make it jump at FT
// and make it jump at FT
ms
.
P
lopBytes
(
L2
,
branch_bytes
.
c_str
(),
4
);
ms
.
p
lopBytes
(
L2
,
branch_bytes
.
c_str
(),
4
);
zo
->
A
pplyPatch
(
L2
,
FT
);
zo
->
a
pplyPatch
(
L2
,
FT
);
// should be few enough of these to always print
// should be few enough of these to always print
cout
<<
"Had to trampoline "
<<
disasm
->
getDisassembly
()
<<
"@"
<<
FA
<<
" to "
cout
<<
"Had to trampoline "
<<
disasm
->
getDisassembly
()
<<
"@"
<<
FA
<<
" to "
...
@@ -233,7 +231,7 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
...
@@ -233,7 +231,7 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
const
auto
clean_new_insn
=
full_insn
&
~
(
mask19
<<
5
);
const
auto
clean_new_insn
=
full_insn
&
~
(
mask19
<<
5
);
const
auto
new_insn
=
clean_new_insn
|
((
new_imm19_ext
&
mask19
)
<<
5
);
const
auto
new_insn
=
clean_new_insn
|
((
new_imm19_ext
&
mask19
)
<<
5
);
// put the new instruction in the output
// put the new instruction in the output
ms
.
P
lopBytes
(
from_insn_location
,
(
const
char
*
)
&
new_insn
,
insn_bytes_len
);
ms
.
p
lopBytes
(
from_insn_location
,
(
const
char
*
)
&
new_insn
,
insn_bytes_len
);
if
(
m_verbose
)
if
(
m_verbose
)
{
{
cout
<<
"Relocating a ldr pcrel relocation with orig_addr="
<<
hex
cout
<<
"Relocating a ldr pcrel relocation with orig_addr="
<<
hex
...
@@ -269,7 +267,7 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
...
@@ -269,7 +267,7 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
const
auto
tramp_range
=
ms
.
getFreeRange
(
tramp_size
);
const
auto
tramp_range
=
ms
.
getFreeRange
(
tramp_size
);
const
auto
tramp_start
=
tramp_range
.
getStart
();
const
auto
tramp_start
=
tramp_range
.
getStart
();
// don't be too fancy, just reserve 12 bytes.
// don't be too fancy, just reserve 12 bytes.
ms
.
S
plitFreeRange
({
tramp_start
,
tramp_start
+
12
});
ms
.
s
plitFreeRange
({
tramp_start
,
tramp_start
+
12
});
// and give the bytes some names
// and give the bytes some names
...
@@ -288,15 +286,15 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
...
@@ -288,15 +286,15 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
// put an uncond branch at where the adr was.
// put an uncond branch at where the adr was.
// and make it point at L0
// and make it point at L0
ms
.
P
lopBytes
(
FA
,
branch_bytes
.
c_str
(),
4
);
ms
.
p
lopBytes
(
FA
,
branch_bytes
.
c_str
(),
4
);
zo
->
A
pplyPatch
(
FA
,
L0
);
zo
->
a
pplyPatch
(
FA
,
L0
);
// adrp: 1 imm2lo 1 0000 immhi19 Rd
// adrp: 1 imm2lo 1 0000 immhi19 Rd
auto
adrp_bytes
=
string
(
"
\x00\x00\x00\x90
"
,
4
);
auto
adrp_bytes
=
string
(
"
\x00\x00\x00\x90
"
,
4
);
auto
adrp_word
=*
(
int
*
)
adrp_bytes
.
c_str
();
auto
adrp_word
=*
(
int
*
)
adrp_bytes
.
c_str
();
adrp_word
|=
destreg
<<
0
;
adrp_word
|=
destreg
<<
0
;
adrp_word
|=
((
relocd_immlo2
&
mask2
)
<<
29
)
|
((
relocd_immhi19
&
mask19
)
<<
5
);
adrp_word
|=
((
relocd_immlo2
&
mask2
)
<<
29
)
|
((
relocd_immhi19
&
mask19
)
<<
5
);
ms
.
P
lopBytes
(
L0
,(
char
*
)
&
adrp_word
,
4
);
ms
.
p
lopBytes
(
L0
,(
char
*
)
&
adrp_word
,
4
);
// convert: ldr w/x reg : 0 x1 011 0 00 ---imm19---- Rt5 x1 indicates size (0,1 -> w/x)
// convert: ldr w/x reg : 0 x1 011 0 00 ---imm19---- Rt5 x1 indicates size (0,1 -> w/x)
// to : ldr x/w reg : 1 x1 111 0 01 01 imm12 Rn5 Rt5 x1 indciates size (0,1 -> w/x)
// to : ldr x/w reg : 1 x1 111 0 01 01 imm12 Rn5 Rt5 x1 indciates size (0,1 -> w/x)
...
@@ -309,12 +307,12 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
...
@@ -309,12 +307,12 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
new_ldr_word
|=
destreg
<<
5
;
// Rn
new_ldr_word
|=
destreg
<<
5
;
// Rn
new_ldr_word
|=
scaled_page_offset
<<
10
;
// imm12
new_ldr_word
|=
scaled_page_offset
<<
10
;
// imm12
new_ldr_word
|=
orig_ldr_size_bit
<<
30
;
// x1
new_ldr_word
|=
orig_ldr_size_bit
<<
30
;
// x1
ms
.
P
lopBytes
(
L1
,(
char
*
)
&
new_ldr_word
,
4
);
ms
.
p
lopBytes
(
L1
,(
char
*
)
&
new_ldr_word
,
4
);
// put an uncond branch the end of the trampoline
// put an uncond branch the end of the trampoline
// and make it jump at FT
// and make it jump at FT
ms
.
P
lopBytes
(
L2
,
branch_bytes
.
c_str
(),
4
);
ms
.
p
lopBytes
(
L2
,
branch_bytes
.
c_str
(),
4
);
zo
->
A
pplyPatch
(
L2
,
FT
);
zo
->
a
pplyPatch
(
L2
,
FT
);
// should be few enough of these to always print
// should be few enough of these to always print
cout
<<
"Had to trampoline "
<<
disasm
->
getDisassembly
()
<<
"@"
<<
FA
<<
" to "
cout
<<
"Had to trampoline "
<<
disasm
->
getDisassembly
()
<<
"@"
<<
FA
<<
" to "
...
@@ -343,7 +341,7 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
...
@@ -343,7 +341,7 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
const
auto
tramp_range
=
ms
.
getFreeRange
(
tramp_size
);
const
auto
tramp_range
=
ms
.
getFreeRange
(
tramp_size
);
const
auto
tramp_start
=
tramp_range
.
getStart
();
const
auto
tramp_start
=
tramp_range
.
getStart
();
// don't be too fancy, just reserve 12 bytes.
// don't be too fancy, just reserve 12 bytes.
ms
.
S
plitFreeRange
({
tramp_start
,
tramp_start
+
12
});
ms
.
s
plitFreeRange
({
tramp_start
,
tramp_start
+
12
});
// give the bytes some names
// give the bytes some names
...
@@ -363,20 +361,20 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
...
@@ -363,20 +361,20 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
// put an uncond branch at where the adr was.
// put an uncond branch at where the adr was.
// and make it point at L0
// and make it point at L0
ms
.
P
lopBytes
(
FA
,
branch_bytes
.
c_str
(),
4
);
ms
.
p
lopBytes
(
FA
,
branch_bytes
.
c_str
(),
4
);
zo
->
A
pplyPatch
(
FA
,
L0
);
zo
->
a
pplyPatch
(
FA
,
L0
);
// put save of x0 in place.
// put save of x0 in place.
// diassembly: f81803e0 stur x0, [sp, #-128]
// diassembly: f81803e0 stur x0, [sp, #-128]
const
auto
strx0_bytes
=
string
(
"
\xe0\x03\x18\xf8
"
,
4
);
const
auto
strx0_bytes
=
string
(
"
\xe0\x03\x18\xf8
"
,
4
);
ms
.
P
lopBytes
(
L0
,
strx0_bytes
.
c_str
(),
4
);
ms
.
p
lopBytes
(
L0
,
strx0_bytes
.
c_str
(),
4
);
// adrp: 1 imm2lo 1 0000 immhi19 Rd
// adrp: 1 imm2lo 1 0000 immhi19 Rd
auto
adrp_bytes
=
string
(
"
\x00\x00\x00\x90
"
,
4
);
auto
adrp_bytes
=
string
(
"
\x00\x00\x00\x90
"
,
4
);
auto
adrp_word
=*
(
int
*
)
adrp_bytes
.
c_str
();
auto
adrp_word
=*
(
int
*
)
adrp_bytes
.
c_str
();
// adrp_word|=destreg<<0; ; destreg for this insn is x0.
// adrp_word|=destreg<<0; ; destreg for this insn is x0.
adrp_word
|=
((
relocd_immlo2
&
mask2
)
<<
29
)
|
((
relocd_immhi19
&
mask19
)
<<
5
);
adrp_word
|=
((
relocd_immlo2
&
mask2
)
<<
29
)
|
((
relocd_immhi19
&
mask19
)
<<
5
);
ms
.
P
lopBytes
(
L1
,(
char
*
)
&
adrp_word
,
4
);
ms
.
p
lopBytes
(
L1
,(
char
*
)
&
adrp_word
,
4
);
// convert: ldr s/d/q reg: opc2 01 11 00 imm19 Rt5, opc2 indicate size (00,01,10 -> s/d/q)
// convert: ldr s/d/q reg: opc2 01 11 00 imm19 Rt5, opc2 indicate size (00,01,10 -> s/d/q)
...
@@ -412,18 +410,18 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
...
@@ -412,18 +410,18 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
new_ldr_word
|=
((
address_to_generate_page_offset
/
ldr_size
)
<<
10
);
// imm12
new_ldr_word
|=
((
address_to_generate_page_offset
/
ldr_size
)
<<
10
);
// imm12
new_ldr_word
|=
(
new_ldr_size_bits
<<
30
);
// size2
new_ldr_word
|=
(
new_ldr_size_bits
<<
30
);
// size2
new_ldr_word
|=
(
new_ldr_opc2_bits
<<
22
);
// opc2
new_ldr_word
|=
(
new_ldr_opc2_bits
<<
22
);
// opc2
ms
.
P
lopBytes
(
L2
,(
char
*
)
&
new_ldr_word
,
4
);
ms
.
p
lopBytes
(
L2
,(
char
*
)
&
new_ldr_word
,
4
);
// drop in the restore of x0
// drop in the restore of x0
// disassembly: f85803e0 ldur x0, [sp, #-128]
// disassembly: f85803e0 ldur x0, [sp, #-128]
const
auto
ldrx0_bytes
=
string
(
"
\xe0\x03\x58\xf8
"
,
4
);
const
auto
ldrx0_bytes
=
string
(
"
\xe0\x03\x58\xf8
"
,
4
);
ms
.
P
lopBytes
(
L3
,
ldrx0_bytes
.
c_str
(),
4
);
ms
.
p
lopBytes
(
L3
,
ldrx0_bytes
.
c_str
(),
4
);
// put an uncond branch the end of the trampoline
// put an uncond branch the end of the trampoline
// and make it jump at FT
// and make it jump at FT
ms
.
P
lopBytes
(
L4
,
branch_bytes
.
c_str
(),
4
);
ms
.
p
lopBytes
(
L4
,
branch_bytes
.
c_str
(),
4
);
zo
->
A
pplyPatch
(
L4
,
FT
);
zo
->
a
pplyPatch
(
L4
,
FT
);
// should be few enough of these to always print
// should be few enough of these to always print
cout
<<
"Had to trampoline "
<<
disasm
->
getDisassembly
()
<<
"@"
<<
FA
<<
" to "
cout
<<
"Had to trampoline "
<<
disasm
->
getDisassembly
()
<<
"@"
<<
FA
<<
" to "
...
@@ -447,7 +445,7 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
...
@@ -447,7 +445,7 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
const
auto
clean_new_insn
=
full_insn
&
~
(
mask19
<<
5
);
const
auto
clean_new_insn
=
full_insn
&
~
(
mask19
<<
5
);
const
auto
new_insn
=
clean_new_insn
|
((
new_imm19_ext
&
mask19
)
<<
5
);
const
auto
new_insn
=
clean_new_insn
|
((
new_imm19_ext
&
mask19
)
<<
5
);
// put the new instruction in the output
// put the new instruction in the output
ms
.
P
lopBytes
(
from_insn_location
,
(
const
char
*
)
&
new_insn
,
insn_bytes_len
);
ms
.
p
lopBytes
(
from_insn_location
,
(
const
char
*
)
&
new_insn
,
insn_bytes_len
);
if
(
m_verbose
)
if
(
m_verbose
)
{
{
cout
<<
"Relocating a ldrsw pcrel relocation with orig_addr="
<<
hex
cout
<<
"Relocating a ldrsw pcrel relocation with orig_addr="
<<
hex
...
@@ -475,7 +473,7 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
...
@@ -475,7 +473,7 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
const
auto
tramp_range
=
ms
.
getFreeRange
(
tramp_size
);
const
auto
tramp_range
=
ms
.
getFreeRange
(
tramp_size
);
const
auto
tramp_start
=
tramp_range
.
getStart
();
const
auto
tramp_start
=
tramp_range
.
getStart
();
// don't be too fancy, just reserve 12 bytes.
// don't be too fancy, just reserve 12 bytes.
ms
.
S
plitFreeRange
({
tramp_start
,
tramp_start
+
12
});
ms
.
s
plitFreeRange
({
tramp_start
,
tramp_start
+
12
});
const
auto
FA
=
from_insn_location
;
const
auto
FA
=
from_insn_location
;
...
@@ -496,15 +494,15 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
...
@@ -496,15 +494,15 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
// put an uncond branch at where the adr was.
// put an uncond branch at where the adr was.
// and make it point at L0
// and make it point at L0
ms
.
P
lopBytes
(
FA
,
branch_bytes
.
c_str
(),
4
);
ms
.
p
lopBytes
(
FA
,
branch_bytes
.
c_str
(),
4
);
zo
->
A
pplyPatch
(
FA
,
L0
);
zo
->
a
pplyPatch
(
FA
,
L0
);
// adrp: 1 imm2lo 1 0000 immhi19 Rd
// adrp: 1 imm2lo 1 0000 immhi19 Rd
auto
adrp_bytes
=
string
(
"
\x00\x00\x00\x90
"
,
4
);
auto
adrp_bytes
=
string
(
"
\x00\x00\x00\x90
"
,
4
);
auto
adrp_word
=*
(
int
*
)
adrp_bytes
.
c_str
();
auto
adrp_word
=*
(
int
*
)
adrp_bytes
.
c_str
();
adrp_word
|=
destreg
<<
0
;
adrp_word
|=
destreg
<<
0
;
adrp_word
|=
((
relocd_immlo2
&
mask2
)
<<
29
)
|
((
relocd_immhi19
&
mask19
)
<<
5
);
adrp_word
|=
((
relocd_immlo2
&
mask2
)
<<
29
)
|
((
relocd_immhi19
&
mask19
)
<<
5
);
ms
.
P
lopBytes
(
L0
,(
char
*
)
&
adrp_word
,
4
);
ms
.
p
lopBytes
(
L0
,(
char
*
)
&
adrp_word
,
4
);
// convert: ldrsw x reg : 1001 1000 ---imm19--- Rt
// convert: ldrsw x reg : 1001 1000 ---imm19--- Rt
// to : ldrsw x reg : 1011 1001 10 imm12 Rn Rt
// to : ldrsw x reg : 1011 1001 10 imm12 Rn Rt
...
@@ -515,12 +513,12 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
...
@@ -515,12 +513,12 @@ void UnpinAarch64_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* re
new_ldr_word
|=
destreg
<<
0
;
// Rt
new_ldr_word
|=
destreg
<<
0
;
// Rt
new_ldr_word
|=
destreg
<<
5
;
// Rn
new_ldr_word
|=
destreg
<<
5
;
// Rn
new_ldr_word
|=
scaled_page_offset
<<
10
;
// imm12
new_ldr_word
|=
scaled_page_offset
<<
10
;
// imm12
ms
.
P
lopBytes
(
L1
,(
char
*
)
&
new_ldr_word
,
4
);
ms
.
p
lopBytes
(
L1
,(
char
*
)
&
new_ldr_word
,
4
);
// put an uncond branch the end of the trampoline
// put an uncond branch the end of the trampoline
// and make it jump at FT
// and make it jump at FT
ms
.
P
lopBytes
(
L2
,
branch_bytes
.
c_str
(),
4
);
ms
.
p
lopBytes
(
L2
,
branch_bytes
.
c_str
(),
4
);
zo
->
A
pplyPatch
(
L2
,
FT
);
zo
->
a
pplyPatch
(
L2
,
FT
);
// should be few enough of these to always print
// should be few enough of these to always print
cout
<<
"Had to trampoline "
<<
disasm
->
getDisassembly
()
<<
"@"
<<
FA
<<
" to "
cout
<<
"Had to trampoline "
<<
disasm
->
getDisassembly
()
<<
"@"
<<
FA
<<
" to "
...
...
This diff is collapsed.
Click to expand it.
unpin_x86.cpp
+
4
−
5
View file @
3da58cb1
...
@@ -29,7 +29,6 @@
...
@@ -29,7 +29,6 @@
**************************************************************************/
**************************************************************************/
#include
<zipr_sdk.h>
#include
<string>
#include
<string>
#include
<algorithm>
#include
<algorithm>
#include
"unpin.h"
#include
"unpin.h"
...
@@ -40,7 +39,6 @@
...
@@ -40,7 +39,6 @@
using
namespace
IRDB_SDK
;
using
namespace
IRDB_SDK
;
using
namespace
std
;
using
namespace
std
;
using
namespace
Zipr_SDK
;
using
namespace
Zipr_SDK
;
using
namespace
ELFIO
;
#define ALLOF(a) begin(a),end(a)
#define ALLOF(a) begin(a),end(a)
...
@@ -61,7 +59,8 @@ void UnpinX86_t::HandleRetAddrReloc(Instruction_t* from_insn, Relocation_t* relo
...
@@ -61,7 +59,8 @@ void UnpinX86_t::HandleRetAddrReloc(Instruction_t* from_insn, Relocation_t* relo
auto
from_insn_location
=
locMap
[
from_insn
];
auto
from_insn_location
=
locMap
[
from_insn
];
// 32-bit code and main executables just push a full 32-bit addr.
// 32-bit code and main executables just push a full 32-bit addr.
if
(
zo
->
getELFIO
()
->
get_type
()
==
ET_EXEC
)
// if(zo->getELFIO()->get_type()==ET_EXEC)
if
(
zo
->
getFileIR
()
->
getArchitecture
()
->
getFileType
()
==
adftELFEXE
)
{
{
// not handled in push64_relocs which is disabled for shared objects.
// not handled in push64_relocs which is disabled for shared objects.
// expecting a 32-bit push, length=5
// expecting a 32-bit push, length=5
...
@@ -139,7 +138,7 @@ void UnpinX86_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* reloc)
...
@@ -139,7 +138,7 @@ void UnpinX86_t::HandlePcrelReloc(Instruction_t* from_insn, Relocation_t* reloc)
const
auto
new_disp
=
(
int
)(
rel_addr1
+
to_addr
-
from_insn
->
getDataBits
().
size
()
-
from_insn_location
);
const
auto
new_disp
=
(
int
)(
rel_addr1
+
to_addr
-
from_insn
->
getDataBits
().
size
()
-
from_insn_location
);
const
auto
newbits
=
from_insn
->
getDataBits
().
replace
(
disp_offset
,
disp_size
,
(
char
*
)
&
new_disp
,
disp_size
);
const
auto
newbits
=
from_insn
->
getDataBits
().
replace
(
disp_offset
,
disp_size
,
(
char
*
)
&
new_disp
,
disp_size
);
from_insn
->
setDataBits
(
newbits
);
from_insn
->
setDataBits
(
newbits
);
ms
.
P
lopBytes
(
from_insn_location
,
newbits
.
c_str
(),
newbits
.
size
());
ms
.
p
lopBytes
(
from_insn_location
,
newbits
.
c_str
(),
newbits
.
size
());
const
auto
disasm2
=
DecodedInstruction_t
::
factory
(
from_insn
);
const
auto
disasm2
=
DecodedInstruction_t
::
factory
(
from_insn
);
cout
<<
"unpin:pcrel:new_disp="
<<
hex
<<
new_disp
<<
endl
;
cout
<<
"unpin:pcrel:new_disp="
<<
hex
<<
new_disp
<<
endl
;
cout
<<
"unpin:pcrel:new_insn_addr="
<<
hex
<<
from_insn_location
<<
endl
;
cout
<<
"unpin:pcrel:new_insn_addr="
<<
hex
<<
from_insn_location
<<
endl
;
...
@@ -237,7 +236,7 @@ void UnpinX86_t::HandleCallbackReloc(Instruction_t* from_insn, Relocation_t* rel
...
@@ -237,7 +236,7 @@ void UnpinX86_t::HandleCallbackReloc(Instruction_t* from_insn, Relocation_t* rel
*/
*/
at
=
call_addr
+
1
;
at
=
call_addr
+
1
;
at
=
call_addr
+
from_insn
->
getDataBits
().
length
();
at
=
call_addr
+
from_insn
->
getDataBits
().
length
();
ms
.
P
lopBytes
(
at
,
bytes
,
sizeof
(
bytes
));
ms
.
p
lopBytes
(
at
,
bytes
,
sizeof
(
bytes
));
/*
/*
* Turn off the following flags so that this
* Turn off the following flags so that this
...
...
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