added fallthrough for uncond branchs/rets for mips due to delay slotting

irdb-libs/ir_builders/fill_in_cfg.cpp

@@ -68,7 +68,9 @@ void PopulateCFG::populate_instruction_map
 void PopulateCFG::set_fallthrough
 	(
 	InstructionMap_t &insnMap,
-	DecodedInstruction_t *disasm, Instruction_t *insn, FileIR_t *firp
+	DecodedInstruction_t *disasm, 
+	Instruction_t *insn, 
+	FileIR_t *firp
 	)
 {
 	assert(disasm);
@@ -77,14 +79,20 @@ void PopulateCFG::set_fallthrough
 	if(insn->getFallthrough())
 		return;
 	
-	// check for branches with targets 
-	if(
-		(disasm->isUnconditionalBranch() ) ||	// it is a unconditional branch 
-		(disasm->isReturn())			// or a return
-	  )
+	const auto is_mips = firp->getArchitecture()->getMachineType() == admtMips32;	 
+	// always set fallthrough for mips
+	// other platforms can end fallthroughs ofr uncond branches and returns
+	if(!is_mips) 
 	{
-		// this is a branch with no fallthrough instruction
-		return;
+		// check for branches with targets 
+		if(
+			(disasm->isUnconditionalBranch() ) ||	// it is a unconditional branch 
+			(disasm->isReturn())			// or a return
+		  )
+		{
+			// this is a branch with no fallthrough instruction
+			return;
+		}
 	}
 
 	/* get the address of the next instrution */
@@ -127,17 +135,14 @@ void PopulateCFG::set_delay_slots
 	if(!is_mips)
 		return;
 
-	for(auto &insn : firp->getInstructions())
+	// using df=DecodedInstruction_t::factory;
+	const auto d=DecodedInstruction_t::factory(insn);
+	if(d->isBranch())
 	{
-		// using df=DecodedInstruction_t::factory;
-		const auto d=DecodedInstruction_t::factory(insn);
-		if(d->isBranch())
-		{
-			const auto branch_addr     = insn->getAddress();
-			const auto delay_slot_insn = insnMap[ {branch_addr->getFileID(), branch_addr->getVirtualOffset() + 4}];
-			assert(delay_slot_insn);
-			(void)firp->addNewRelocation(insn,0,"delay_slot1", delay_slot_insn, 0);
-		}
+		const auto branch_addr     = insn->getAddress();
+		const auto delay_slot_insn = insnMap[ {branch_addr->getFileID(), branch_addr->getVirtualOffset() + 4}];
+		assert(delay_slot_insn);
+		(void)firp->addNewRelocation(insn,0,"delay_slot1", delay_slot_insn, 0);
 	}
 
 }