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  • 13-keystone-should-return-an-error-when-assembling-instruction
  • 19-need-ubuntu22-support
  • 21-job-failed-248429
  • SRL-Windows
  • SRL_kernelModules
  • ZS-91-opensrc-zipr
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  • add_arm32_eh
  • ais-release-sept-2019
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  • cfar_phase1_final_release
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  • Release-2-26-2021
  • cfar-phase3-final
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  • CfarJuly2018Eval
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26 results
Created with Raphaël 2.2.023Dec2019929Nov28212017151129Oct281411126Sep2417161514926Aug251711105428Jul27222012Jun965424May76229Apr27262421171126Mar232015125432127Feb282726252425242221201817141110129Jan16128329Dec28262218171613986528Nov2622212014231Oct2414128765330Sep29252221191514109230Aug292625241513129328Jul221716151027Jun26252422181716141315May29Apr16Jan17Dec16141097543228Oct252416932120Sep191817161714131265416Aug1592130Jul29232218171211109865314Jun130May292823222019171516976223Apr22151098432129Mar2827212019181513121110987642128Feb2725242322Update gap-filling algorithm in zipr-be to skip R-X segmentsUpdate thanos to properly output start time.Merge branch 'rida_speedup' into 'master'Improve symbol parsing speed for rida.rida_speeduprida_speedupMerge branch 'zipr_speedup' into 'master'Update free-range management to keep free ranges sorted by size and address.Fixed test for table load instruction for x86-64 switch tables.Added icx-specific switch dispatch where table entries are negated.Found switch pattern for x86-64 and documented, still need to implement.Handle bug with loopne/2-byte jcc with no targetspeed enhancements in zipr, build keystone with Release by default.gt_evalgt_evalMerge branch 'unpin_x86pic64_switch_tables' into 'master'Work through issues discovered in GT benchmark suite.Update find-in-function method to be more vague about the leas it finds when precise-switch-statement finding is impossibleAdd code to avoid assert when switch table has spilled reg. Needs more work, thoughFixed issue with FII finding wrong cmpZipr/FII failure-to-tranform fixesDeal with buffer underflow while processing EH frames with restore-stateSome code cleanups, and added ability to remove instructions from IRDeal with prefixes on jmp/jcc/call instructions that might change the insn length, fix syntax for x86Deal with prefixes on jmp/jcc/call instructions that might change the insn length, fix syntax for armDeal with prefixes on jmp/jcc/call instructions that might change the insn length.submodMerge branch 'unpined-alignment-fix' into 'master'Deal with fallthroughs to unpinned IBTAsAdded detail about setting up with IDA pro.Changed to get_address() <= Not sure is this is supposed to be get_offsetSRL_kernelModulesSRL_kernelModulesBad meWork in progressExtended compatcheck for Kernel ModulesMerge branch 'speedup-mg' into 'master'SRL-WindowsSRL-WindowsImprovements to move-globals speed, code cleanupsFixed code cleanup issues that somehow didn't make the last commit.Add sizer feature to align pinsFix scons clean issue with keystoneRevert "Fixed pin-alignment code to force a pin alignment."Fixed pin-alignment code to force a pin alignment.Update to support more that udata4 in type-table encodingUpdate to run clang-12 binaries if installed.Merge branch 'master' of git.zephyr-software.com:opensrc/zipr
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