SMPStaticAnalyzer.cpp

OptCategory[NN_shufpd] = 1;              // Shuffle Packed Double-Precision Floating-Point Values
OptCategory[NN_sqrtpd] = 1;              // Compute Square Roots of Packed Double-Precision Floating-Point Values
OptCategory[NN_sqrtsd] = 1;              // Compute Square Rootof Scalar Double-Precision Floating-Point Value
OptCategory[NN_subpd] = 1;               // Subtract Packed Double-Precision Floating-Point Values
OptCategory[NN_subsd] = 1;               // Subtract Scalar Double-Precision Floating-Point Values
OptCategory[NN_ucomisd] = 1;             // Unordered Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
OptCategory[NN_unpckhpd] = 1;            // Unpack and Interleave High Packed Double-Precision Floating-Point Values
OptCategory[NN_unpcklpd] = 1;            // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
OptCategory[NN_xorpd] = 1;               // Bitwise Logical OR of Double-Precision Floating-Point Values


// AMD syscall/sysret instructions  NOTE: not AMD, found in Intel manual

OptCategory[NN_syscall] = 1;             // Low latency system call
OptCategory[NN_sysret] = 1;              // Return from system call

// AMD64 instructions    NOTE: not AMD, found in Intel manual

OptCategory[NN_swapgs] = 1;              // Exchange GS base with KernelGSBase MSR

// New Pentium instructions (SSE3)

OptCategory[NN_movddup] = 9;             // Move One Double-FP and Duplicate
OptCategory[NN_movshdup] = 9;            // Move Packed Single-FP High and Duplicate
OptCategory[NN_movsldup] = 9;            // Move Packed Single-FP Low and Duplicate

// Missing AMD64 instructions  NOTE: also found in Intel manual

OptCategory[NN_movsxd] = 2;              // Move with Sign-Extend Doubleword
OptCategory[NN_cmpxchg16b] = 0;          // Compare and Exchange 16 Bytes

// SSE3 instructions

OptCategory[NN_addsubpd] = 1;            // Add /Sub packed DP FP numbers
OptCategory[NN_addsubps] = 1;            // Add /Sub packed SP FP numbers
OptCategory[NN_haddpd] = 1;              // Add horizontally packed DP FP numbers
OptCategory[NN_haddps] = 1;              // Add horizontally packed SP FP numbers
OptCategory[NN_hsubpd] = 1;              // Sub horizontally packed DP FP numbers
OptCategory[NN_hsubps] = 1;              // Sub horizontally packed SP FP numbers
OptCategory[NN_monitor] = 1;             // Set up a linear address range to be monitored by hardware
OptCategory[NN_mwait] = 1;               // Wait until write-back store performed within the range specified by the MONITOR instruction
OptCategory[NN_fisttp] = 2;              // Store ST in intXX (chop) and pop
OptCategory[NN_lddqu] = 0;               // Load unaligned integer 128-bit

// SSSE3 instructions

OptCategory[NN_psignb] = 1;              // Packed SIGN Byte
OptCategory[NN_psignw] = 1;              // Packed SIGN Word
OptCategory[NN_psignd] = 1;              // Packed SIGN Doubleword
OptCategory[NN_pshufb] = 1;              // Packed Shuffle Bytes
OptCategory[NN_pmulhrsw] = 1;            // Packed Multiply High with Round and Scale
OptCategory[NN_pmaddubsw] = 1;           // Multiply and Add Packed Signed and Unsigned Bytes
OptCategory[NN_phsubsw] = 1;             // Packed Horizontal Subtract and Saturate
OptCategory[NN_phaddsw] = 1;             // Packed Horizontal Add and Saturate
OptCategory[NN_phaddw] = 1;              // Packed Horizontal Add Word
OptCategory[NN_phaddd] = 1;              // Packed Horizontal Add Doubleword
OptCategory[NN_phsubw] = 1;              // Packed Horizontal Subtract Word
OptCategory[NN_phsubd] = 1;              // Packed Horizontal Subtract Doubleword
OptCategory[NN_palignr] = 1;             // Packed Align Right
OptCategory[NN_pabsb] = 1;               // Packed Absolute Value Byte
OptCategory[NN_pabsw] = 1;               // Packed Absolute Value Word
OptCategory[NN_pabsd] = 1;               // Packed Absolute Value Doubleword

// VMX instructions

OptCategory[NN_vmcall] = 1;              // Call to VM Monitor
OptCategory[NN_vmclear] = 0;             // Clear Virtual Machine Control Structure
OptCategory[NN_vmlaunch] = 1;            // Launch Virtual Machine
OptCategory[NN_vmresume] = 1;            // Resume Virtual Machine
OptCategory[NN_vmptrld] = 6;             // Load Pointer to Virtual Machine Control Structure
OptCategory[NN_vmptrst] = 0;             // Store Pointer to Virtual Machine Control Structure
OptCategory[NN_vmread] = 0;              // Read Field from Virtual Machine Control Structure
OptCategory[NN_vmwrite] = 0;             // Write Field from Virtual Machine Control Structure
OptCategory[NN_vmxoff] = 1;              // Leave VMX Operation
OptCategory[NN_vmxon] = 1;               // Enter VMX Operation

OptCategory[NN_last] = 1;

  return;

} // end InitOptCategory()