Temp fix: to deal with FII creating overlapping switch table scoops
resulting from imprecision in ICX-created programs.

Todo:  Update FII to not create overlapping scoops.

Only gap-fill for original-style scoops (that is, pure-data).  R/X
scoops are added for switch tables, but may overlap because the
switch detector may make multiple guesses at ground truth.  The gap
filling algorithm wasn't expecting this, so skip these scoops as
they shouldn't result in gap-filling anyhow.

Found bug resulting from hidden static variable in ctime() function.

Improve symbol parsing speed for rida.

See merge request !18

Update free-range management to keep free ranges sorted by size and address.

See merge request !17

This was needed because sorting by address ended up being _very_ slow to
find free spaces in large programs.  E.g., if 100,000 1-byte free
ranges were created (and, likely unusable), placing every instruction
after this point will need to search thouse 100,000 free ranges.

Was previously asserting isRegister() or isMemory(), but could also be
isConstant().

Work through issues discovered in GT benchmark suite.

See merge request !16

* Update 68-sled code to be keystone friendly
* Corrected spelling of getInstruction.  removed extraneous assert.
* Disable should-pin-immediately because it interfers with sleds.
* Remove assert from fix-calls about odd prefixing, just dont fix the call.  More of an issue with FII doing disassembly
* Update switch->code discovery path to only happen if switch table is in text segment
* fixed FII to do what the last commit said -- only disassembly when TABLE is in text.  also patched zipr to handle xbegin gracefully.
* Disable verbose setting
* Create lots of dbs instead of just a few

Update find-in-function method to be more vague about the leas it finds when precise-switch-statement finding is impossible

Issue was related to intermediate set of the compare register.
Leveraged backup_until's stopif argument to stop backup until sooner.

Note: as indicated in code comment, single register/register move
is common and could be used to improve accuracy.

1) FII was finding the wrong cmp for switch tables.
Removed the blind cmp and forced the cmp to use the proper
register or not find a cmp.  Also changed the limit for a table
size when no cmp is found from 2^32 to 255.

2) Fixed an issue with zipr dollop layout where the size
to layout 1 instruction + a trampoline was bigger than laying
out two+ full dollops (because both dollops were short), but
the dollops are disallowed from being coalesced.  The worst-size
detector needed to account for non-coalescable dollops.

Deal with prefixes on jmp/jcc/call instructions that might change the insn length, fix syntax for x86

Deal with prefixes on jmp/jcc/call instructions that might change the insn length, fix syntax for arm

Deal with fallthroughs to unpinned IBTAs

See merge request !15

Previously, dollop coalescing would allow unpinned IBTAs disobey
the IBTA alignment restrictions.  To deal with alignment,
the dollop coalescing was disallowed if an unpin to attempt to coalesce
is in a different function than the code that the unpin would would be
coalesced to.

Move-globals speedup

See merge request !14

New feature allows sizer to specify the alignment of unpinned
instructions (i.e., instructions with a pin, but no pin address).

Feature applies only to instructions that are _not_ the fallthrough
of other instructions (e.g., function pointers)

Also, code cleanups (removing commented-out code, spacing, tabbing)

This reverts commit ed60f36d.

May need to revisit this because pin-alignment needs to be
a function of the dollop manager, instead of the hacky method it is now.