STARSProgram.cpp

	SMPDefsFlags[STARS_NN_repe] = false;                // Repeat String Operation while ZF=1
	SMPDefsFlags[STARS_NN_repne] = false;               // Repeat String Operation while ZF=0
	SMPDefsFlags[STARS_NN_retn] = false;                // Return Near from Procedure
	SMPDefsFlags[STARS_NN_retf] = false;                // Return Far from Procedure
	SMPDefsFlags[STARS_NN_sahf] = true;                 // Store AH into flags
	SMPDefsFlags[STARS_NN_shl] = true;                  // Shift Logical Left
	SMPDefsFlags[STARS_NN_shr] = true;                  // Shift Logical Right
	SMPDefsFlags[STARS_NN_seta] = false;                // Set Byte if Above (CF=0 & ZF=0)
	SMPDefsFlags[STARS_NN_setae] = false;               // Set Byte if Above or Equal (CF=0)
	SMPDefsFlags[STARS_NN_setb] = false;                // Set Byte if Below (CF=1)
	SMPDefsFlags[STARS_NN_setbe] = false;               // Set Byte if Below or Equal (CF=1 | ZF=1)
	SMPDefsFlags[STARS_NN_setc] = false;                // Set Byte if Carry (CF=1)
	SMPDefsFlags[STARS_NN_sete] = false;                // Set Byte if Equal (ZF=1)
	SMPDefsFlags[STARS_NN_setg] = false;                // Set Byte if Greater (ZF=0 & SF=OF)
	SMPDefsFlags[STARS_NN_setge] = false;               // Set Byte if Greater or Equal (SF=OF)
	SMPDefsFlags[STARS_NN_setl] = false;                // Set Byte if Less (SF!=OF)
	SMPDefsFlags[STARS_NN_setle] = false;               // Set Byte if Less or Equal (ZF=1 | SF!=OF)
	SMPDefsFlags[STARS_NN_setna] = false;               // Set Byte if Not Above (CF=1 | ZF=1)
	SMPDefsFlags[STARS_NN_setnae] = false;              // Set Byte if Not Above or Equal (CF=1)
	SMPDefsFlags[STARS_NN_setnb] = false;               // Set Byte if Not Below (CF=0)
	SMPDefsFlags[STARS_NN_setnbe] = false;              // Set Byte if Not Below or Equal (CF=0 & ZF=0)
	SMPDefsFlags[STARS_NN_setnc] = false;               // Set Byte if Not Carry (CF=0)
	SMPDefsFlags[STARS_NN_setne] = false;               // Set Byte if Not Equal (ZF=0)
	SMPDefsFlags[STARS_NN_setng] = false;               // Set Byte if Not Greater (ZF=1 | SF!=OF)
	SMPDefsFlags[STARS_NN_setnge] = false;              // Set Byte if Not Greater or Equal (SF!=OF)
	SMPDefsFlags[STARS_NN_setnl] = false;               // Set Byte if Not Less (SF=OF)
	SMPDefsFlags[STARS_NN_setnle] = false;              // Set Byte if Not Less or Equal (ZF=0 & SF=OF)
	SMPDefsFlags[STARS_NN_setno] = false;               // Set Byte if Not Overflow (OF=0)
	SMPDefsFlags[STARS_NN_setnp] = false;               // Set Byte if Not Parity (PF=0)
	SMPDefsFlags[STARS_NN_setns] = false;               // Set Byte if Not Sign (SF=0)
	SMPDefsFlags[STARS_NN_setnz] = false;               // Set Byte if Not Zero (ZF=0)
	SMPDefsFlags[STARS_NN_seto] = false;                // Set Byte if Overflow (OF=1)
	SMPDefsFlags[STARS_NN_setp] = false;                // Set Byte if Parity (PF=1)
	SMPDefsFlags[STARS_NN_setpe] = false;               // Set Byte if Parity Even (PF=1)
	SMPDefsFlags[STARS_NN_setpo] = false;               // Set Byte if Parity Odd  (PF=0)
	SMPDefsFlags[STARS_NN_sets] = false;                // Set Byte if Sign (SF=1)
	SMPDefsFlags[STARS_NN_setz] = false;                // Set Byte if Zero (ZF=1)
	SMPDefsFlags[STARS_NN_sgdt] = false;                // Store Global Descriptor Table Register
	SMPDefsFlags[STARS_NN_sidt] = false;                // Store Interrupt Descriptor Table Register
	SMPDefsFlags[STARS_NN_sldt] = false;                // Store Local Descriptor Table Register
	SMPDefsFlags[STARS_NN_str] = false;                 // Store Task Register
	SMPDefsFlags[STARS_NN_wait] = false;                // Wait until BUSY# Pin is Inactive (HIGH)
	SMPDefsFlags[STARS_NN_xchg] = false;                // Exchange Register/Memory with Register
	SMPDefsFlags[STARS_NN_xlat] = false;                // Table Lookup Translation

	//
	//      486 instructions
	//

	SMPDefsFlags[STARS_NN_bswap] = false;               // Swap bytes in register
	SMPDefsFlags[STARS_NN_invd] = false;                // Invalidate Data Cache
	SMPDefsFlags[STARS_NN_wbinvd] = false;              // Invalidate Data Cache (write changes)
	SMPDefsFlags[STARS_NN_invlpg] = false;              // Invalidate TLB entry

	//
	//      Pentium instructions
	//

	SMPDefsFlags[STARS_NN_rdmsr] = false;               // Read Machine Status Register
	SMPDefsFlags[STARS_NN_wrmsr] = false;               // Write Machine Status Register
	SMPDefsFlags[STARS_NN_cpuid] = false;               // Get CPU ID
	SMPDefsFlags[STARS_NN_rdtsc] = false;               // Read Time Stamp Counter

	//
	//      Pentium Pro instructions
	//

	SMPDefsFlags[STARS_NN_cmova] = false;               // Move if Above (CF=0 & ZF=0)
	SMPDefsFlags[STARS_NN_cmovb] = false;               // Move if Below (CF=1)
	SMPDefsFlags[STARS_NN_cmovbe] = false;              // Move if Below or Equal (CF=1 | ZF=1)
	SMPDefsFlags[STARS_NN_cmovg] = false;               // Move if Greater (ZF=0 & SF=OF)
	SMPDefsFlags[STARS_NN_cmovge] = false;              // Move if Greater or Equal (SF=OF)
	SMPDefsFlags[STARS_NN_cmovl] = false;               // Move if Less (SF!=OF)
	SMPDefsFlags[STARS_NN_cmovle] = false;              // Move if Less or Equal (ZF=1 | SF!=OF)
	SMPDefsFlags[STARS_NN_cmovnb] = false;              // Move if Not Below (CF=0)
	SMPDefsFlags[STARS_NN_cmovno] = false;              // Move if Not Overflow (OF=0)
	SMPDefsFlags[STARS_NN_cmovnp] = false;              // Move if Not Parity (PF=0)
	SMPDefsFlags[STARS_NN_cmovns] = false;              // Move if Not Sign (SF=0)
	SMPDefsFlags[STARS_NN_cmovnz] = false;              // Move if Not Zero (ZF=0)
	SMPDefsFlags[STARS_NN_cmovo] = false;               // Move if Overflow (OF=1)
	SMPDefsFlags[STARS_NN_cmovp] = false;               // Move if Parity (PF=1)
	SMPDefsFlags[STARS_NN_cmovs] = false;               // Move if Sign (SF=1)
	SMPDefsFlags[STARS_NN_cmovz] = false;               // Move if Zero (ZF=1)
	SMPDefsFlags[STARS_NN_fcmovb] = false;              // Floating Move if Below          
	SMPDefsFlags[STARS_NN_fcmove] = false;              // Floating Move if Equal          
	SMPDefsFlags[STARS_NN_fcmovbe] = false;             // Floating Move if Below or Equal 
	SMPDefsFlags[STARS_NN_fcmovu] = false;              // Floating Move if Unordered      
	SMPDefsFlags[STARS_NN_fcmovnb] = false;             // Floating Move if Not Below      
	SMPDefsFlags[STARS_NN_fcmovne] = false;             // Floating Move if Not Equal      
	SMPDefsFlags[STARS_NN_fcmovnbe] = false;            // Floating Move if Not Below or Equal
	SMPDefsFlags[STARS_NN_fcmovnu] = false;             // Floating Move if Not Unordered     
	SMPDefsFlags[STARS_NN_rdpmc] = false;               // Read Performance Monitor Counter

	//
	//      FPP instructions
	//

	SMPDefsFlags[STARS_NN_fld] = false;                 // Load Real              
	SMPDefsFlags[STARS_NN_fst] = false;                 // Store Real            
	SMPDefsFlags[STARS_NN_fstp] = false;                // Store Real and Pop   
	SMPDefsFlags[STARS_NN_fxch] = false;                // Exchange Registers
	SMPDefsFlags[STARS_NN_fild] = false;                // Load Integer           
	SMPDefsFlags[STARS_NN_fist] = false;                // Store Integer
	SMPDefsFlags[STARS_NN_fistp] = false;               // Store Integer and Pop
	SMPDefsFlags[STARS_NN_fbld] = false;                // Load BCD
	SMPDefsFlags[STARS_NN_fbstp] = false;               // Store BCD and Pop
	SMPDefsFlags[STARS_NN_fadd] = false;                // Add Real
	SMPDefsFlags[STARS_NN_faddp] = false;               // Add Real and Pop
	SMPDefsFlags[STARS_NN_fiadd] = false;               // Add Integer
	SMPDefsFlags[STARS_NN_fsub] = false;                // Subtract Real
	SMPDefsFlags[STARS_NN_fsubp] = false;               // Subtract Real and Pop
	SMPDefsFlags[STARS_NN_fisub] = false;               // Subtract Integer
	SMPDefsFlags[STARS_NN_fsubr] = false;               // Subtract Real Reversed
	SMPDefsFlags[STARS_NN_fsubrp] = false;              // Subtract Real Reversed and Pop
	SMPDefsFlags[STARS_NN_fisubr] = false;              // Subtract Integer Reversed
	SMPDefsFlags[STARS_NN_fmul] = false;                // Multiply Real
	SMPDefsFlags[STARS_NN_fmulp] = false;               // Multiply Real and Pop
	SMPDefsFlags[STARS_NN_fimul] = false;               // Multiply Integer
	SMPDefsFlags[STARS_NN_fdiv] = false;                // Divide Real
	SMPDefsFlags[STARS_NN_fdivp] = false;               // Divide Real and Pop
	SMPDefsFlags[STARS_NN_fidiv] = false;               // Divide Integer
	SMPDefsFlags[STARS_NN_fdivr] = false;               // Divide Real Reversed
	SMPDefsFlags[STARS_NN_fdivrp] = false;              // Divide Real Reversed and Pop
	SMPDefsFlags[STARS_NN_fidivr] = false;              // Divide Integer Reversed
	SMPDefsFlags[STARS_NN_fsqrt] = false;               // Square Root
	SMPDefsFlags[STARS_NN_fscale] = false;              // Scale:  st(0) <- st(0) * 2^st(1)
	SMPDefsFlags[STARS_NN_fprem] = false;               // Partial Remainder
	SMPDefsFlags[STARS_NN_frndint] = false;             // Round to Integer
	SMPDefsFlags[STARS_NN_fxtract] = false;             // Extract exponent and significand
	SMPDefsFlags[STARS_NN_fabs] = false;                // Absolute value
	SMPDefsFlags[STARS_NN_fchs] = false;                // Change Sign
	SMPDefsFlags[STARS_NN_ficom] = false;               // Compare Integer
	SMPDefsFlags[STARS_NN_ficomp] = false;              // Compare Integer and Pop
	SMPDefsFlags[STARS_NN_ftst] = false;                // Test
	SMPDefsFlags[STARS_NN_fxam] = false;                // Examine
	SMPDefsFlags[STARS_NN_fptan] = false;               // Partial tangent
	SMPDefsFlags[STARS_NN_fpatan] = false;              // Partial arctangent
	SMPDefsFlags[STARS_NN_f2xm1] = false;               // 2^x - 1
	SMPDefsFlags[STARS_NN_fyl2x] = false;               // Y * lg2(X)
	SMPDefsFlags[STARS_NN_fyl2xp1] = false;             // Y * lg2(X+1)
	SMPDefsFlags[STARS_NN_fldz] = false;                // Load +0.0
	SMPDefsFlags[STARS_NN_fld1] = false;                // Load +1.0
	SMPDefsFlags[STARS_NN_fldpi] = false;               // Load PI=3.14...
	SMPDefsFlags[STARS_NN_fldl2t] = false;              // Load lg2(10)
	SMPDefsFlags[STARS_NN_fldl2e] = false;              // Load lg2(e)
	SMPDefsFlags[STARS_NN_fldlg2] = false;              // Load lg10(2)
	SMPDefsFlags[STARS_NN_fldln2] = false;              // Load ln(2)
	SMPDefsFlags[STARS_NN_finit] = false;               // Initialize Processor
	SMPDefsFlags[STARS_NN_fninit] = false;              // Initialize Processor (no wait)
	SMPDefsFlags[STARS_NN_fsetpm] = false;              // Set Protected Mode
	SMPDefsFlags[STARS_NN_fldcw] = false;               // Load Control Word
	SMPDefsFlags[STARS_NN_fstcw] = false;               // Store Control Word
	SMPDefsFlags[STARS_NN_fnstcw] = false;              // Store Control Word (no wait)
	SMPDefsFlags[STARS_NN_fstsw] = false;               // Store Status Word to memory or AX
	SMPDefsFlags[STARS_NN_fnstsw] = false;              // Store Status Word (no wait) to memory or AX
	SMPDefsFlags[STARS_NN_fclex] = false;               // Clear Exceptions
	SMPDefsFlags[STARS_NN_fnclex] = false;              // Clear Exceptions (no wait)
	SMPDefsFlags[STARS_NN_fstenv] = false;              // Store Environment
	SMPDefsFlags[STARS_NN_fnstenv] = false;             // Store Environment (no wait)
	SMPDefsFlags[STARS_NN_fldenv] = false;              // Load Environment
	SMPDefsFlags[STARS_NN_fsave] = false;               // Save State
	SMPDefsFlags[STARS_NN_fnsave] = false;              // Save State (no wait)
	SMPDefsFlags[STARS_NN_frstor] = false;              // Restore State      
	SMPDefsFlags[STARS_NN_fincstp] = false;             // Increment Stack Pointer
	SMPDefsFlags[STARS_NN_fdecstp] = false;             // Decrement Stack Pointer
	SMPDefsFlags[STARS_NN_ffree] = false;               // Free Register
	SMPDefsFlags[STARS_NN_fnop] = false;                // No Operation
	SMPDefsFlags[STARS_NN_feni] = false;                // (8087 only)
	SMPDefsFlags[STARS_NN_fneni] = false;               // (no wait) (8087 only)
	SMPDefsFlags[STARS_NN_fdisi] = false;               // (8087 only)
	SMPDefsFlags[STARS_NN_fndisi] = false;              // (no wait) (8087 only)

	//
	//      80387 instructions
	//

	SMPDefsFlags[STARS_NN_fprem1] = false;              // Partial Remainder ( < half )
	SMPDefsFlags[STARS_NN_fsincos] = false;             // t<-cos(st); st<-sin(st); push t
	SMPDefsFlags[STARS_NN_fsin] = false;                // Sine
	SMPDefsFlags[STARS_NN_fcos] = false;                // Cosine
	SMPDefsFlags[STARS_NN_fucom] = false;               // Compare Unordered Real
	SMPDefsFlags[STARS_NN_fucomp] = false;              // Compare Unordered Real and Pop
	SMPDefsFlags[STARS_NN_fucompp] = false;             // Compare Unordered Real and Pop Twice

	//
	//      Instructions added 28.02.96
	//

	SMPDefsFlags[STARS_NN_svdc] = false;                // Save Register and Descriptor
	SMPDefsFlags[STARS_NN_rsdc] = false;                // Restore Register and Descriptor
	SMPDefsFlags[STARS_NN_svldt] = false;               // Save LDTR and Descriptor
	SMPDefsFlags[STARS_NN_rsldt] = false;               // Restore LDTR and Descriptor
	SMPDefsFlags[STARS_NN_svts] = false;                // Save TR and Descriptor
	SMPDefsFlags[STARS_NN_rsts] = false;                // Restore TR and Descriptor
	SMPDefsFlags[STARS_NN_icebp] = false;               // ICE Break Point

	//
	//      MMX instructions
	//

	SMPDefsFlags[STARS_NN_emms] = false;                // Empty MMX state
	SMPDefsFlags[STARS_NN_movd] = false;                // Move 32 bits
	SMPDefsFlags[STARS_NN_movq] = false;                // Move 64 bits
	SMPDefsFlags[STARS_NN_packsswb] = false;            // Pack with Signed Saturation (Word->Byte)
	SMPDefsFlags[STARS_NN_packssdw] = false;            // Pack with Signed Saturation (Dword->Word)
	SMPDefsFlags[STARS_NN_packuswb] = false;            // Pack with Unsigned Saturation (Word->Byte)
	SMPDefsFlags[STARS_NN_paddb] = false;               // Packed Add Byte
	SMPDefsFlags[STARS_NN_paddw] = false;               // Packed Add Word
	SMPDefsFlags[STARS_NN_paddd] = false;               // Packed Add Dword
	SMPDefsFlags[STARS_NN_paddsb] = false;              // Packed Add with Saturation (Byte)
	SMPDefsFlags[STARS_NN_paddsw] = false;              // Packed Add with Saturation (Word)
	SMPDefsFlags[STARS_NN_paddusb] = false;             // Packed Add Unsigned with Saturation (Byte)
	SMPDefsFlags[STARS_NN_paddusw] = false;             // Packed Add Unsigned with Saturation (Word)
	SMPDefsFlags[STARS_NN_pand] = false;                // Bitwise Logical And
	SMPDefsFlags[STARS_NN_pandn] = false;               // Bitwise Logical And Not
	SMPDefsFlags[STARS_NN_pcmpeqb] = false;             // Packed Compare for Equal (Byte)
	SMPDefsFlags[STARS_NN_pcmpeqw] = false;             // Packed Compare for Equal (Word)
	SMPDefsFlags[STARS_NN_pcmpeqd] = false;             // Packed Compare for Equal (Dword)
	SMPDefsFlags[STARS_NN_pcmpgtb] = false;             // Packed Compare for Greater Than (Byte)
	SMPDefsFlags[STARS_NN_pcmpgtw] = false;             // Packed Compare for Greater Than (Word)
	SMPDefsFlags[STARS_NN_pcmpgtd] = false;             // Packed Compare for Greater Than (Dword)
	SMPDefsFlags[STARS_NN_pmaddwd] = false;             // Packed Multiply and Add
	SMPDefsFlags[STARS_NN_pmulhw] = false;              // Packed Multiply High
	SMPDefsFlags[STARS_NN_pmullw] = false;              // Packed Multiply Low
	SMPDefsFlags[STARS_NN_por] = false;                 // Bitwise Logical Or
	SMPDefsFlags[STARS_NN_psllw] = false;               // Packed Shift Left Logical (Word)
	SMPDefsFlags[STARS_NN_pslld] = false;               // Packed Shift Left Logical (Dword)
	SMPDefsFlags[STARS_NN_psllq] = false;               // Packed Shift Left Logical (Qword)
	SMPDefsFlags[STARS_NN_psraw] = false;               // Packed Shift Right Arithmetic (Word)
	SMPDefsFlags[STARS_NN_psrad] = false;               // Packed Shift Right Arithmetic (Dword)
	SMPDefsFlags[STARS_NN_psrlw] = false;               // Packed Shift Right Logical (Word)
	SMPDefsFlags[STARS_NN_psrld] = false;               // Packed Shift Right Logical (Dword)
	SMPDefsFlags[STARS_NN_psrlq] = false;               // Packed Shift Right Logical (Qword)
	SMPDefsFlags[STARS_NN_psubb] = false;               // Packed Subtract Byte
	SMPDefsFlags[STARS_NN_psubw] = false;               // Packed Subtract Word
	SMPDefsFlags[STARS_NN_psubd] = false;               // Packed Subtract Dword
	SMPDefsFlags[STARS_NN_psubsb] = false;              // Packed Subtract with Saturation (Byte)
	SMPDefsFlags[STARS_NN_psubsw] = false;              // Packed Subtract with Saturation (Word)
	SMPDefsFlags[STARS_NN_psubusb] = false;             // Packed Subtract Unsigned with Saturation (Byte)
	SMPDefsFlags[STARS_NN_psubusw] = false;             // Packed Subtract Unsigned with Saturation (Word)
	SMPDefsFlags[STARS_NN_punpckhbw] = false;           // Unpack High Packed Data (Byte->Word)
	SMPDefsFlags[STARS_NN_punpckhwd] = false;           // Unpack High Packed Data (Word->Dword)
	SMPDefsFlags[STARS_NN_punpckhdq] = false;           // Unpack High Packed Data (Dword->Qword)
	SMPDefsFlags[STARS_NN_punpcklbw] = false;           // Unpack Low Packed Data (Byte->Word)
	SMPDefsFlags[STARS_NN_punpcklwd] = false;           // Unpack Low Packed Data (Word->Dword)
	SMPDefsFlags[STARS_NN_punpckldq] = false;           // Unpack Low Packed Data (Dword->Qword)
	SMPDefsFlags[STARS_NN_pxor] = false;                // Bitwise Logical Exclusive Or

	//
	//      Undocumented Deschutes processor instructions
	//

	SMPDefsFlags[STARS_NN_fxsave] = false;              // Fast save FP context        
	SMPDefsFlags[STARS_NN_fxrstor] = false;             // Fast restore FP context     

	//      Pentium II instructions

	SMPDefsFlags[STARS_NN_sysexit] = false;             // Fast Transition from System Call Entry Point

	//      3DNow! instructions

	SMPDefsFlags[STARS_NN_pavgusb] = false;             // Packed 8-bit Unsigned Integer Averaging
	SMPDefsFlags[STARS_NN_pfadd] = false;               // Packed Floating-Point Addition
	SMPDefsFlags[STARS_NN_pfsub] = false;               // Packed Floating-Point Subtraction
	SMPDefsFlags[STARS_NN_pfsubr] = false;              // Packed Floating-Point Reverse Subtraction
	SMPDefsFlags[STARS_NN_pfacc] = false;               // Packed Floating-Point Accumulate
	SMPDefsFlags[STARS_NN_pfcmpge] = false;             // Packed Floating-Point Comparison, Greater or Equal
	SMPDefsFlags[STARS_NN_pfcmpgt] = false;             // Packed Floating-Point Comparison, Greater
	SMPDefsFlags[STARS_NN_pfcmpeq] = false;             // Packed Floating-Point Comparison, Equal
	SMPDefsFlags[STARS_NN_pfmin] = false;               // Packed Floating-Point Minimum
	SMPDefsFlags[STARS_NN_pfmax] = false;               // Packed Floating-Point Maximum
	SMPDefsFlags[STARS_NN_pi2fd] = false;               // Packed 32-bit Integer to Floating-Point
	SMPDefsFlags[STARS_NN_pf2id] = false;               // Packed Floating-Point to 32-bit Integer
	SMPDefsFlags[STARS_NN_pfrcp] = false;               // Packed Floating-Point Reciprocal Approximation
	SMPDefsFlags[STARS_NN_pfrsqrt] = false;             // Packed Floating-Point Reciprocal Square Root Approximation
	SMPDefsFlags[STARS_NN_pfmul] = false;               // Packed Floating-Point Multiplication
	SMPDefsFlags[STARS_NN_pfrcpit1] = false;            // Packed Floating-Point Reciprocal First Iteration Step
	SMPDefsFlags[STARS_NN_pfrsqit1] = false;            // Packed Floating-Point Reciprocal Square Root First Iteration Step
	SMPDefsFlags[STARS_NN_pfrcpit2] = false;            // Packed Floating-Point Reciprocal Second Iteration Step
	SMPDefsFlags[STARS_NN_pmulhrw] = false;             // Packed Floating-Point 16-bit Integer Multiply with rounding
	SMPDefsFlags[STARS_NN_femms] = false;               // Faster entry/exit of the MMX or floating-point state
	SMPDefsFlags[STARS_NN_prefetch] = false;            // Prefetch at least a 32-byte line into L1 data cache
	SMPDefsFlags[STARS_NN_prefetchw] = false;           // Prefetch processor cache line into L1 data cache (mark as modified)


	//      Pentium III instructions

	SMPDefsFlags[STARS_NN_addps] = false;               // Packed Single-FP Add
	SMPDefsFlags[STARS_NN_addss] = false;               // Scalar Single-FP Add
	SMPDefsFlags[STARS_NN_andnps] = false;              // Bitwise Logical And Not for Single-FP
	SMPDefsFlags[STARS_NN_andps] = false;               // Bitwise Logical And for Single-FP
	SMPDefsFlags[STARS_NN_cmpps] = false;               // Packed Single-FP Compare
	SMPDefsFlags[STARS_NN_cmpss] = false;               // Scalar Single-FP Compare
	SMPDefsFlags[STARS_NN_cvtpi2ps] = false;            // Packed signed INT32 to Packed Single-FP conversion
	SMPDefsFlags[STARS_NN_cvtps2pi] = false;            // Packed Single-FP to Packed INT32 conversion
	SMPDefsFlags[STARS_NN_cvtsi2ss] = false;            // Scalar signed INT32 to Single-FP conversion
	SMPDefsFlags[STARS_NN_cvtss2si] = false;            // Scalar Single-FP to signed INT32 conversion
	SMPDefsFlags[STARS_NN_cvttps2pi] = false;           // Packed Single-FP to Packed INT32 conversion (truncate)
	SMPDefsFlags[STARS_NN_cvttss2si] = false;           // Scalar Single-FP to signed INT32 conversion (truncate)
	SMPDefsFlags[STARS_NN_divps] = false;               // Packed Single-FP Divide
	SMPDefsFlags[STARS_NN_divss] = false;               // Scalar Single-FP Divide
	SMPDefsFlags[STARS_NN_ldmxcsr] = false;             // Load Streaming SIMD Extensions Technology Control/Status Register
	SMPDefsFlags[STARS_NN_maxps] = false;               // Packed Single-FP Maximum
	SMPDefsFlags[STARS_NN_maxss] = false;               // Scalar Single-FP Maximum
	SMPDefsFlags[STARS_NN_minps] = false;               // Packed Single-FP Minimum
	SMPDefsFlags[STARS_NN_minss] = false;               // Scalar Single-FP Minimum
	SMPDefsFlags[STARS_NN_movaps] = false;              // Move Aligned Four Packed Single-FP  
	SMPDefsFlags[STARS_NN_movhlps] = false;             // Move High to Low Packed Single-FP
	SMPDefsFlags[STARS_NN_movhps] = false;              // Move High Packed Single-FP
	SMPDefsFlags[STARS_NN_movlhps] = false;             // Move Low to High Packed Single-FP
	SMPDefsFlags[STARS_NN_movlps] = false;              // Move Low Packed Single-FP
	SMPDefsFlags[STARS_NN_movmskps] = false;            // Move Mask to Register
	SMPDefsFlags[STARS_NN_movss] = false;               // Move Scalar Single-FP
	SMPDefsFlags[STARS_NN_movups] = false;              // Move Unaligned Four Packed Single-FP
	SMPDefsFlags[STARS_NN_mulps] = false;               // Packed Single-FP Multiply
	SMPDefsFlags[STARS_NN_mulss] = false;               // Scalar Single-FP Multiply
	SMPDefsFlags[STARS_NN_orps] = false;                // Bitwise Logical OR for Single-FP Data
	SMPDefsFlags[STARS_NN_rcpps] = false;               // Packed Single-FP Reciprocal
	SMPDefsFlags[STARS_NN_rcpss] = false;               // Scalar Single-FP Reciprocal
	SMPDefsFlags[STARS_NN_rsqrtps] = false;             // Packed Single-FP Square Root Reciprocal
	SMPDefsFlags[STARS_NN_rsqrtss] = false;             // Scalar Single-FP Square Root Reciprocal
	SMPDefsFlags[STARS_NN_shufps] = false;              // Shuffle Single-FP
	SMPDefsFlags[STARS_NN_sqrtps] = false;              // Packed Single-FP Square Root
	SMPDefsFlags[STARS_NN_sqrtss] = false;              // Scalar Single-FP Square Root
	SMPDefsFlags[STARS_NN_stmxcsr] = false;             // Store Streaming SIMD Extensions Technology Control/Status Register 
	SMPDefsFlags[STARS_NN_subps] = false;               // Packed Single-FP Subtract
	SMPDefsFlags[STARS_NN_subss] = false;               // Scalar Single-FP Subtract
	SMPDefsFlags[STARS_NN_unpckhps] = false;            // Unpack High Packed Single-FP Data
	SMPDefsFlags[STARS_NN_unpcklps] = false;            // Unpack Low Packed Single-FP Data
	SMPDefsFlags[STARS_NN_xorps] = false;               // Bitwise Logical XOR for Single-FP Data
	SMPDefsFlags[STARS_NN_pavgb] = false;               // Packed Average (Byte)
	SMPDefsFlags[STARS_NN_pavgw] = false;               // Packed Average (Word)
	SMPDefsFlags[STARS_NN_pextrw] = false;              // Extract Word
	SMPDefsFlags[STARS_NN_pinsrw] = false;              // Insert Word
	SMPDefsFlags[STARS_NN_pmaxsw] = false;              // Packed Signed Integer Word Maximum
	SMPDefsFlags[STARS_NN_pmaxub] = false;              // Packed Unsigned Integer Byte Maximum
	SMPDefsFlags[STARS_NN_pminsw] = false;              // Packed Signed Integer Word Minimum
	SMPDefsFlags[STARS_NN_pminub] = false;              // Packed Unsigned Integer Byte Minimum
	SMPDefsFlags[STARS_NN_pmovmskb] = false;            // Move Byte Mask to Integer
	SMPDefsFlags[STARS_NN_pmulhuw] = false;             // Packed Multiply High Unsigned
	SMPDefsFlags[STARS_NN_psadbw] = false;              // Packed Sum of Absolute Differences
	SMPDefsFlags[STARS_NN_pshufw] = false;              // Packed Shuffle Word
	SMPDefsFlags[STARS_NN_maskmovq] = false;            // Byte Mask write  
	SMPDefsFlags[STARS_NN_movntps] = false;             // Move Aligned Four Packed Single-FP Non Temporal
	SMPDefsFlags[STARS_NN_movntq] = false;              // Move 64 Bits Non Temporal   
	SMPDefsFlags[STARS_NN_prefetcht0] = false;          // Prefetch to all cache levels
	SMPDefsFlags[STARS_NN_prefetcht1] = false;          // Prefetch to all cache levels
	SMPDefsFlags[STARS_NN_prefetcht2] = false;          // Prefetch to L2 cache
	SMPDefsFlags[STARS_NN_prefetchnta] = false;         // Prefetch to L1 cache
	SMPDefsFlags[STARS_NN_sfence] = false;              // Store Fence

	// Pentium III Pseudo instructions

	SMPDefsFlags[STARS_NN_cmpeqps] = false;             // Packed Single-FP Compare EQ
	SMPDefsFlags[STARS_NN_cmpltps] = false;             // Packed Single-FP Compare LT
	SMPDefsFlags[STARS_NN_cmpleps] = false;             // Packed Single-FP Compare LE
	SMPDefsFlags[STARS_NN_cmpunordps] = false;          // Packed Single-FP Compare UNORD
	SMPDefsFlags[STARS_NN_cmpneqps] = false;            // Packed Single-FP Compare NOT EQ
	SMPDefsFlags[STARS_NN_cmpnltps] = false;            // Packed Single-FP Compare NOT LT
	SMPDefsFlags[STARS_NN_cmpnleps] = false;            // Packed Single-FP Compare NOT LE
	SMPDefsFlags[STARS_NN_cmpordps] = false;            // Packed Single-FP Compare ORDERED
	SMPDefsFlags[STARS_NN_cmpeqss] = false;             // Scalar Single-FP Compare EQ
	SMPDefsFlags[STARS_NN_cmpltss] = false;             // Scalar Single-FP Compare LT
	SMPDefsFlags[STARS_NN_cmpless] = false;             // Scalar Single-FP Compare LE
	SMPDefsFlags[STARS_NN_cmpunordss] = false;          // Scalar Single-FP Compare UNORD
	SMPDefsFlags[STARS_NN_cmpneqss] = false;            // Scalar Single-FP Compare NOT EQ
	SMPDefsFlags[STARS_NN_cmpnltss] = false;            // Scalar Single-FP Compare NOT LT
	SMPDefsFlags[STARS_NN_cmpnless] = false;            // Scalar Single-FP Compare NOT LE
	SMPDefsFlags[STARS_NN_cmpordss] = false;            // Scalar Single-FP Compare ORDERED

	// AMD K7 instructions

	// Revisit AMD if we port to it.
	SMPDefsFlags[STARS_NN_pf2iw] = false;               // Packed Floating-Point to Integer with Sign Extend
	SMPDefsFlags[STARS_NN_pfnacc] = false;              // Packed Floating-Point Negative Accumulate
	SMPDefsFlags[STARS_NN_pfpnacc] = false;             // Packed Floating-Point Mixed Positive-Negative Accumulate
	SMPDefsFlags[STARS_NN_pi2fw] = false;               // Packed 16-bit Integer to Floating-Point
	SMPDefsFlags[STARS_NN_pswapd] = false;              // Packed Swap Double Word

	// Undocumented FP instructions (thanks to norbert.juffa@adm.com)

	SMPDefsFlags[STARS_NN_fstp1] = false;               // Alias of Store Real and Pop
	SMPDefsFlags[STARS_NN_fxch4] = false;               // Alias of Exchange Registers
	SMPDefsFlags[STARS_NN_ffreep] = false;              // Free Register and Pop
	SMPDefsFlags[STARS_NN_fxch7] = false;               // Alias of Exchange Registers
	SMPDefsFlags[STARS_NN_fstp8] = false;               // Alias of Store Real and Pop
	SMPDefsFlags[STARS_NN_fstp9] = false;               // Alias of Store Real and Pop

	// Pentium 4 instructions

	SMPDefsFlags[STARS_NN_addpd] = false;               // Add Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_addsd] = false;               // Add Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_andnpd] = false;              // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_andpd] = false;               // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_clflush] = false;             // Flush Cache Line
	SMPDefsFlags[STARS_NN_cmppd] = false;               // Compare Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_cmpsd] = false;               // Compare Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_cvtdq2pd] = false;            // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_cvtdq2ps] = false;            // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_cvtpd2dq] = false;            // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
	SMPDefsFlags[STARS_NN_cvtpd2pi] = false;            // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
	SMPDefsFlags[STARS_NN_cvtpd2ps] = false;            // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_cvtpi2pd] = false;            // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_cvtps2dq] = false;            // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
	SMPDefsFlags[STARS_NN_cvtps2pd] = false;            // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_cvtsd2si] = false;            // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
	SMPDefsFlags[STARS_NN_cvtsd2ss] = false;            // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
	SMPDefsFlags[STARS_NN_cvtsi2sd] = false;            // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
	SMPDefsFlags[STARS_NN_cvtss2sd] = false;            // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
	SMPDefsFlags[STARS_NN_cvttpd2dq] = false;           // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
	SMPDefsFlags[STARS_NN_cvttpd2pi] = false;           // Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
	SMPDefsFlags[STARS_NN_cvttps2dq] = false;           // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
	SMPDefsFlags[STARS_NN_cvttsd2si] = false;           // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
	SMPDefsFlags[STARS_NN_divpd] = false;               // Divide Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_divsd] = false;               // Divide Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_lfence] = false;              // Load Fence
	SMPDefsFlags[STARS_NN_maskmovdqu] = false;          // Store Selected Bytes of Double Quadword 
	SMPDefsFlags[STARS_NN_maxpd] = false;               // Return Maximum Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_maxsd] = false;               // Return Maximum Scalar Double-Precision Floating-Point Value
	SMPDefsFlags[STARS_NN_mfence] = false;              // Memory Fence
	SMPDefsFlags[STARS_NN_minpd] = false;               // Return Minimum Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_minsd] = false;               // Return Minimum Scalar Double-Precision Floating-Point Value
	SMPDefsFlags[STARS_NN_movapd] = false;              // Move Aligned Packed Double-Precision Floating-Point Values 
	SMPDefsFlags[STARS_NN_movdq2q] = false;             // Move Quadword from XMM to MMX Register
	SMPDefsFlags[STARS_NN_movdqa] = false;              // Move Aligned Double Quadword  
	SMPDefsFlags[STARS_NN_movdqu] = false;              // Move Unaligned Double Quadword  
	SMPDefsFlags[STARS_NN_movhpd] = false;              // Move High Packed Double-Precision Floating-Point Values 
	SMPDefsFlags[STARS_NN_movlpd] = false;              // Move Low Packed Double-Precision Floating-Point Values 
	SMPDefsFlags[STARS_NN_movmskpd] = false;            // Extract Packed Double-Precision Floating-Point Sign Mask
	SMPDefsFlags[STARS_NN_movntdq] = false;             // Store Double Quadword Using Non-Temporal Hint
	SMPDefsFlags[STARS_NN_movnti] = false;              // Store Doubleword Using Non-Temporal Hint
	SMPDefsFlags[STARS_NN_movntpd] = false;             // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
	SMPDefsFlags[STARS_NN_movq2dq] = false;             // Move Quadword from MMX to XMM Register
	SMPDefsFlags[STARS_NN_movsd] = false;               // Move Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_movupd] = false;              // Move Unaligned Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_mulpd] = false;               // Multiply Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_mulsd] = false;               // Multiply Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_orpd] = false;                // Bitwise Logical OR of Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_paddq] = false;               // Add Packed Quadword Integers
	SMPDefsFlags[STARS_NN_pause] = false;               // Spin Loop Hint
	SMPDefsFlags[STARS_NN_pmuludq] = false;             // Multiply Packed Unsigned Doubleword Integers
	SMPDefsFlags[STARS_NN_pshufd] = false;              // Shuffle Packed Doublewords
	SMPDefsFlags[STARS_NN_pshufhw] = false;             // Shuffle Packed High Words
	SMPDefsFlags[STARS_NN_pshuflw] = false;             // Shuffle Packed Low Words
	SMPDefsFlags[STARS_NN_pslldq] = false;              // Shift Double Quadword Left Logical
	SMPDefsFlags[STARS_NN_psrldq] = false;              // Shift Double Quadword Right Logical
	SMPDefsFlags[STARS_NN_psubq] = false;               // Subtract Packed Quadword Integers
	SMPDefsFlags[STARS_NN_punpckhqdq] = false;          // Unpack High Data
	SMPDefsFlags[STARS_NN_punpcklqdq] = false;          // Unpack Low Data
	SMPDefsFlags[STARS_NN_shufpd] = false;              // Shuffle Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_sqrtpd] = false;              // Compute Square Roots of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_sqrtsd] = false;              // Compute Square Rootof Scalar Double-Precision Floating-Point Value
	SMPDefsFlags[STARS_NN_subpd] = false;               // Subtract Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_subsd] = false;               // Subtract Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_unpckhpd] = false;            // Unpack and Interleave High Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_unpcklpd] = false;            // Unpack and Interleave Low Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_xorpd] = false;               // Bitwise Logical OR of Double-Precision Floating-Point Values


	// AMD syscall/sysret instructions  NOTE: not AMD, found in Intel manual


	// AMD64 instructions    NOTE: not AMD, found in Intel manual

	SMPDefsFlags[STARS_NN_swapgs] = false;              // Exchange GS base with KernelGSBase MSR

	// New Pentium instructions (SSE3)

	SMPDefsFlags[STARS_NN_movddup] = false;             // Move One Double-FP and Duplicate
	SMPDefsFlags[STARS_NN_movshdup] = false;            // Move Packed Single-FP High and Duplicate
	SMPDefsFlags[STARS_NN_movsldup] = false;            // Move Packed Single-FP Low and Duplicate

	// Missing AMD64 instructions  NOTE: also found in Intel manual

	SMPDefsFlags[STARS_NN_movsxd] = false;              // Move with Sign-Extend Doubleword

	// SSE3 instructions

	SMPDefsFlags[STARS_NN_addsubpd] = false;            // Add /Sub packed DP FP numbers
	SMPDefsFlags[STARS_NN_addsubps] = false;            // Add /Sub packed SP FP numbers
	SMPDefsFlags[STARS_NN_haddpd] = false;              // Add horizontally packed DP FP numbers
	SMPDefsFlags[STARS_NN_haddps] = false;              // Add horizontally packed SP FP numbers
	SMPDefsFlags[STARS_NN_hsubpd] = false;              // Sub horizontally packed DP FP numbers
	SMPDefsFlags[STARS_NN_hsubps] = false;              // Sub horizontally packed SP FP numbers
	SMPDefsFlags[STARS_NN_monitor] = false;             // Set up a linear address range to be monitored by hardware
	SMPDefsFlags[STARS_NN_mwait] = false;               // Wait until write-back store performed within the range specified by the MONITOR instruction
	SMPDefsFlags[STARS_NN_fisttp] = false;              // Store ST in intXX (chop) and pop
	SMPDefsFlags[STARS_NN_lddqu] = false;               // Load unaligned integer 128-bit

	// SSSE3 instructions

	SMPDefsFlags[STARS_NN_psignb] = false;              // Packed SIGN Byte
	SMPDefsFlags[STARS_NN_psignw] = false;              // Packed SIGN Word
	SMPDefsFlags[STARS_NN_psignd] = false;              // Packed SIGN Doubleword
	SMPDefsFlags[STARS_NN_pshufb] = false;              // Packed Shuffle Bytes
	SMPDefsFlags[STARS_NN_pmulhrsw] = false;            // Packed Multiply High with Round and Scale
	SMPDefsFlags[STARS_NN_pmaddubsw] = false;           // Multiply and Add Packed Signed and Unsigned Bytes
	SMPDefsFlags[STARS_NN_phsubsw] = false;             // Packed Horizontal Subtract and Saturate
	SMPDefsFlags[STARS_NN_phaddsw] = false;             // Packed Horizontal Add and Saturate
	SMPDefsFlags[STARS_NN_phaddw] = false;              // Packed Horizontal Add Word
	SMPDefsFlags[STARS_NN_phaddd] = false;              // Packed Horizontal Add Doubleword
	SMPDefsFlags[STARS_NN_phsubw] = false;              // Packed Horizontal Subtract Word
	SMPDefsFlags[STARS_NN_phsubd] = false;              // Packed Horizontal Subtract Doubleword
	SMPDefsFlags[STARS_NN_palignr] = false;             // Packed Align Right
	SMPDefsFlags[STARS_NN_pabsb] = false;               // Packed Absolute Value Byte
	SMPDefsFlags[STARS_NN_pabsw] = false;               // Packed Absolute Value Word
	SMPDefsFlags[STARS_NN_pabsd] = false;               // Packed Absolute Value Doubleword

	// VMX instructions


	SMPDefsFlags[STARS_NN_ud2] = false;                 // Undefined Instruction

	// Added with x86-64

	SMPDefsFlags[STARS_NN_rdtscp] = false;              // Read Time-Stamp Counter and Processor ID

	// Geode LX 3DNow! extensions

	SMPDefsFlags[STARS_NN_pfrcpv] = false;              // Reciprocal Approximation for a Pair of 32-bit Floats
	SMPDefsFlags[STARS_NN_pfrsqrtv] = false;            // Reciprocal Square Root Approximation for a Pair of 32-bit Floats

	// SSE2 pseudoinstructions

	SMPDefsFlags[STARS_NN_cmpeqpd] = false;             // Packed Double-FP Compare EQ
	SMPDefsFlags[STARS_NN_cmpltpd] = false;             // Packed Double-FP Compare LT
	SMPDefsFlags[STARS_NN_cmplepd] = false;             // Packed Double-FP Compare LE
	SMPDefsFlags[STARS_NN_cmpunordpd] = false;          // Packed Double-FP Compare UNORD
	SMPDefsFlags[STARS_NN_cmpneqpd] = false;            // Packed Double-FP Compare NOT EQ
	SMPDefsFlags[STARS_NN_cmpnltpd] = false;            // Packed Double-FP Compare NOT LT
	SMPDefsFlags[STARS_NN_cmpnlepd] = false;            // Packed Double-FP Compare NOT LE
	SMPDefsFlags[STARS_NN_cmpordpd] = false;            // Packed Double-FP Compare ORDERED
	SMPDefsFlags[STARS_NN_cmpeqsd] = false;             // Scalar Double-FP Compare EQ
	SMPDefsFlags[STARS_NN_cmpltsd] = false;             // Scalar Double-FP Compare LT
	SMPDefsFlags[STARS_NN_cmplesd] = false;             // Scalar Double-FP Compare LE
	SMPDefsFlags[STARS_NN_cmpunordsd] = false;          // Scalar Double-FP Compare UNORD
	SMPDefsFlags[STARS_NN_cmpneqsd] = false;            // Scalar Double-FP Compare NOT EQ
	SMPDefsFlags[STARS_NN_cmpnltsd] = false;            // Scalar Double-FP Compare NOT LT
	SMPDefsFlags[STARS_NN_cmpnlesd] = false;            // Scalar Double-FP Compare NOT LE
	SMPDefsFlags[STARS_NN_cmpordsd] = false;            // Scalar Double-FP Compare ORDERED

	// SSSE4.1 instructions

	SMPDefsFlags[STARS_NN_blendpd] = false;              // Blend Packed Double Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_blendps] = false;              // Blend Packed Single Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_blendvpd] = false;             // Variable Blend Packed Double Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_blendvps] = false;             // Variable Blend Packed Single Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_dppd] = false;                 // Dot Product of Packed Double Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_dpps] = false;                 // Dot Product of Packed Single Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_extractps] = 2;            // Extract Packed Single Precision Floating-Point Value
	SMPDefsFlags[STARS_NN_insertps] = false;             // Insert Packed Single Precision Floating-Point Value
	SMPDefsFlags[STARS_NN_movntdqa] = false;             // Load Double Quadword Non-Temporal Aligned Hint
	SMPDefsFlags[STARS_NN_mpsadbw] = false;              // Compute Multiple Packed Sums of Absolute Difference
	SMPDefsFlags[STARS_NN_packusdw] = false;             // Pack with Unsigned Saturation
	SMPDefsFlags[STARS_NN_pblendvb] = false;             // Variable Blend Packed Bytes
	SMPDefsFlags[STARS_NN_pblendw] = false;              // Blend Packed Words
	SMPDefsFlags[STARS_NN_pcmpeqq] = false;              // Compare Packed Qword Data for Equal
	SMPDefsFlags[STARS_NN_pextrb] = false;               // Extract Byte
	SMPDefsFlags[STARS_NN_pextrd] = false;               // Extract Dword
	SMPDefsFlags[STARS_NN_pextrq] = false;               // Extract Qword
	SMPDefsFlags[STARS_NN_phminposuw] = false;           // Packed Horizontal Word Minimum
	SMPDefsFlags[STARS_NN_pinsrb] = false;               // Insert Byte
	SMPDefsFlags[STARS_NN_pinsrd] = false;               // Insert Dword
	SMPDefsFlags[STARS_NN_pinsrq] = false;               // Insert Qword
	SMPDefsFlags[STARS_NN_pmaxsb] = false;               // Maximum of Packed Signed Byte Integers
	SMPDefsFlags[STARS_NN_pmaxsd] = false;               // Maximum of Packed Signed Dword Integers
	SMPDefsFlags[STARS_NN_pmaxud] = false;               // Maximum of Packed Unsigned Dword Integers
	SMPDefsFlags[STARS_NN_pmaxuw] = false;               // Maximum of Packed Word Integers
	SMPDefsFlags[STARS_NN_pminsb] = false;               // Minimum of Packed Signed Byte Integers
	SMPDefsFlags[STARS_NN_pminsd] = false;               // Minimum of Packed Signed Dword Integers
	SMPDefsFlags[STARS_NN_pminud] = false;               // Minimum of Packed Unsigned Dword Integers
	SMPDefsFlags[STARS_NN_pminuw] = false;               // Minimum of Packed Word Integers
	SMPDefsFlags[STARS_NN_pmovsxbw] = false;             // Packed Move with Sign Extend
	SMPDefsFlags[STARS_NN_pmovsxbd] = false;             // Packed Move with Sign Extend
	SMPDefsFlags[STARS_NN_pmovsxbq] = false;             // Packed Move with Sign Extend
	SMPDefsFlags[STARS_NN_pmovsxwd] = false;             // Packed Move with Sign Extend
	SMPDefsFlags[STARS_NN_pmovsxwq] = false;             // Packed Move with Sign Extend
	SMPDefsFlags[STARS_NN_pmovsxdq] = false;             // Packed Move with Sign Extend
	SMPDefsFlags[STARS_NN_pmovzxbw] = false;             // Packed Move with Zero Extend
	SMPDefsFlags[STARS_NN_pmovzxbd] = false;             // Packed Move with Zero Extend
	SMPDefsFlags[STARS_NN_pmovzxbq] = false;             // Packed Move with Zero Extend
	SMPDefsFlags[STARS_NN_pmovzxwd] = false;             // Packed Move with Zero Extend
	SMPDefsFlags[STARS_NN_pmovzxwq] = false;             // Packed Move with Zero Extend
	SMPDefsFlags[STARS_NN_pmovzxdq] = false;             // Packed Move with Zero Extend
	SMPDefsFlags[STARS_NN_pmuldq] = false;               // Multiply Packed Signed Dword Integers
	SMPDefsFlags[STARS_NN_pmulld] = false;               // Multiply Packed Signed Dword Integers and Store Low Result
	SMPDefsFlags[STARS_NN_roundpd] = false;              // Round Packed Double Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_roundps] = false;              // Round Packed Single Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_roundsd] = false;              // Round Scalar Double Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_roundss] = false;              // Round Scalar Single Precision Floating-Point Values

	// SSSE4.2 instructions
	SMPDefsFlags[STARS_NN_crc32] = false;                // Accumulate CRC32 Value
	SMPDefsFlags[STARS_NN_pcmpgtq] = false;              // Compare Packed Data for Greater Than

	// AMD SSE4a instructions

	SMPDefsFlags[STARS_NN_extrq] = false;                // Extract Field From Register
	SMPDefsFlags[STARS_NN_insertq] = false;              // Insert Field
	SMPDefsFlags[STARS_NN_movntsd] = false;              // Move Non-Temporal Scalar Double-Precision Floating-Point
	SMPDefsFlags[STARS_NN_movntss] = false;              // Move Non-Temporal Scalar Single-Precision Floating-Point

	// xsave/xrstor instructions

	SMPDefsFlags[STARS_NN_xgetbv] = false;               // Get Value of Extended Control Register
	SMPDefsFlags[STARS_NN_xrstor] = false;               // Restore Processor Extended States
	SMPDefsFlags[STARS_NN_xsave] = false;                // Save Processor Extended States
	SMPDefsFlags[STARS_NN_xsetbv] = false;               // Set Value of Extended Control Register

	// Intel Safer Mode Extensions (SMX)

	// AMD-V Virtualization ISA Extension

	SMPDefsFlags[STARS_NN_invlpga] = false;              // Invalidate TLB Entry in a Specified ASID
	SMPDefsFlags[STARS_NN_skinit] = false;               // Secure Init and Jump with Attestation
	SMPDefsFlags[STARS_NN_vmexit] = false;               // Stop Executing Guest, Begin Executing Host
	SMPDefsFlags[STARS_NN_vmload] = false;               // Load State from VMCB
	SMPDefsFlags[STARS_NN_vmmcall] = false;              // Call VMM
	SMPDefsFlags[STARS_NN_vmrun] = false;                // Run Virtual Machine
	SMPDefsFlags[STARS_NN_vmsave] = false;               // Save State to VMCB

	// VMX+ instructions

	SMPDefsFlags[STARS_NN_invept] = false;               // Invalidate Translations Derived from EPT
	SMPDefsFlags[STARS_NN_invvpid] = false;              // Invalidate Translations Based on VPID

	// Intel Atom instructions

	SMPDefsFlags[STARS_NN_movbe] = false;                // Move Data After Swapping Bytes

	// Intel AES instructions

	SMPDefsFlags[STARS_NN_aesenc] = false;                // Perform One Round of an AES Encryption Flow
	SMPDefsFlags[STARS_NN_aesenclast] = false;            // Perform the Last Round of an AES Encryption Flow
	SMPDefsFlags[STARS_NN_aesdec] = false;                // Perform One Round of an AES Decryption Flow
	SMPDefsFlags[STARS_NN_aesdeclast] = false;            // Perform the Last Round of an AES Decryption Flow
	SMPDefsFlags[STARS_NN_aesimc] = false;                // Perform the AES InvMixColumn Transformation
	SMPDefsFlags[STARS_NN_aeskeygenassist] = false;       // AES Round Key Generation Assist

	// Carryless multiplication

	SMPDefsFlags[STARS_NN_pclmulqdq] = false;            // Carry-Less Multiplication Quadword

	// Returns modified by operand size prefixes

	SMPDefsFlags[STARS_NN_retnw] = false;               // Return Near from Procedure (use16)
	SMPDefsFlags[STARS_NN_retnd] = false;               // Return Near from Procedure (use32)
	SMPDefsFlags[STARS_NN_retnq] = false;               // Return Near from Procedure (use64)
	SMPDefsFlags[STARS_NN_retfw] = false;               // Return Far from Procedure (use16)
	SMPDefsFlags[STARS_NN_retfd] = false;               // Return Far from Procedure (use32)
	SMPDefsFlags[STARS_NN_retfq] = false;               // Return Far from Procedure (use64)

	// RDRAND support

	// new GPR instructions

	SMPDefsFlags[STARS_NN_mulx] = false;                 // Unsigned Multiply Without Affecting Flags
	SMPDefsFlags[STARS_NN_pdep] = false;                 // Parallel Bits Deposit
	SMPDefsFlags[STARS_NN_pext] = false;                 // Parallel Bits Extract
	SMPDefsFlags[STARS_NN_rorx] = false;                 // Rotate Right Logical Without Affecting Flags
	SMPDefsFlags[STARS_NN_sarx] = false;                 // Shift Arithmetically Right Without Affecting Flags
	SMPDefsFlags[STARS_NN_shlx] = false;                 // Shift Logically Left Without Affecting Flags
	SMPDefsFlags[STARS_NN_shrx] = false;                 // Shift Logically Right Without Affecting Flags

	SMPDefsFlags[STARS_NN_xsaveopt] = false;             // Save Processor Extended States Optimized
	SMPDefsFlags[STARS_NN_invpcid] = false;             // Invalidate Processor Context ID
	SMPDefsFlags[STARS_NN_rdseed] = false;               // Read Random Seed
	SMPDefsFlags[STARS_NN_rdfsbase] = false;             // Read FS Segment Base
	SMPDefsFlags[STARS_NN_rdgsbase] = false;             // Read GS Segment Base
	SMPDefsFlags[STARS_NN_wrfsbase] = false;             // Write FS Segment Base
	SMPDefsFlags[STARS_NN_wrgsbase] = false;             // Write GS Segment Base

	// new AVX instructions

	SMPDefsFlags[STARS_NN_vaddpd] = false;               // Add Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vaddps] = false;               // Packed Single-FP Add
	SMPDefsFlags[STARS_NN_vaddsd] = false;               // Add Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vaddss] = false;               // Scalar Single-FP Add
	SMPDefsFlags[STARS_NN_vaddsubpd] = false;            // Add /Sub packed DP FP numbers
	SMPDefsFlags[STARS_NN_vaddsubps] = false;            // Add /Sub packed SP FP numbers
	SMPDefsFlags[STARS_NN_vaesdec] = false;              // Perform One Round of an AES Decryption Flow
	SMPDefsFlags[STARS_NN_vaesdeclast] = false;          // Perform the Last Round of an AES Decryption Flow
	SMPDefsFlags[STARS_NN_vaesenc] = false;              // Perform One Round of an AES Encryption Flow
	SMPDefsFlags[STARS_NN_vaesenclast] = false;          // Perform the Last Round of an AES Encryption Flow
	SMPDefsFlags[STARS_NN_vaesimc] = false;              // Perform the AES InvMixColumn Transformation
	SMPDefsFlags[STARS_NN_vaeskeygenassist] = false;     // AES Round Key Generation Assist
	SMPDefsFlags[STARS_NN_vandnpd] = false;              // Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vandnps] = false;              // Bitwise Logical And Not for Single-FP
	SMPDefsFlags[STARS_NN_vandpd] = false;               // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vandps] = false;               // Bitwise Logical And for Single-FP
	SMPDefsFlags[STARS_NN_vblendpd] = false;             // Blend Packed Double Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vblendps] = false;             // Blend Packed Single Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vblendvpd] = false;            // Variable Blend Packed Double Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vblendvps] = false;            // Variable Blend Packed Single Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vbroadcastf128] = false;       // Broadcast 128 Bits of Floating-Point Data
	SMPDefsFlags[STARS_NN_vbroadcasti128] = false;       // Broadcast 128 Bits of Integer Data
	SMPDefsFlags[STARS_NN_vbroadcastsd] = false;         // Broadcast Double-Precision Floating-Point Element
	SMPDefsFlags[STARS_NN_vbroadcastss] = false;         // Broadcast Single-Precision Floating-Point Element
	SMPDefsFlags[STARS_NN_vcmppd] = false;               // Compare Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vcmpps] = false;               // Packed Single-FP Compare
	SMPDefsFlags[STARS_NN_vcmpsd] = false;               // Compare Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vcmpss] = false;               // Scalar Single-FP Compare
	SMPDefsFlags[STARS_NN_vcomisd] = false;              // Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
	SMPDefsFlags[STARS_NN_vcomiss] = false;              // Scalar Ordered Single-FP Compare and Set EFLAGS
	SMPDefsFlags[STARS_NN_vcvtdq2pd] = false;            // Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vcvtdq2ps] = false;            // Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vcvtpd2dq] = false;            // Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
	SMPDefsFlags[STARS_NN_vcvtpd2ps] = false;            // Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vcvtph2ps] = false;            // Convert 16-bit FP Values to Single-Precision FP Values
	SMPDefsFlags[STARS_NN_vcvtps2dq] = false;            // Convert Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
	SMPDefsFlags[STARS_NN_vcvtps2pd] = false;            // Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vcvtps2ph] = false;            // Convert Single-Precision FP value to 16-bit FP value
	SMPDefsFlags[STARS_NN_vcvtsd2si] = false;            // Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
	SMPDefsFlags[STARS_NN_vcvtsd2ss] = false;            // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
	SMPDefsFlags[STARS_NN_vcvtsi2sd] = false;            // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
	SMPDefsFlags[STARS_NN_vcvtsi2ss] = false;            // Scalar signed INT32 to Single-FP conversion
	SMPDefsFlags[STARS_NN_vcvtss2sd] = false;            // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
	SMPDefsFlags[STARS_NN_vcvtss2si] = false;            // Scalar Single-FP to signed INT32 conversion
	SMPDefsFlags[STARS_NN_vcvttpd2dq] = false;           // Convert With Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
	SMPDefsFlags[STARS_NN_vcvttps2dq] = false;           // Convert With Truncation Packed Single-Precision Floating-Point Values to Packed Doubleword Integers
	SMPDefsFlags[STARS_NN_vcvttsd2si] = false;           // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
	SMPDefsFlags[STARS_NN_vcvttss2si] = false;           // Scalar Single-FP to signed INT32 conversion (truncate)
	SMPDefsFlags[STARS_NN_vdivpd] = false;               // Divide Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vdivps] = false;               // Packed Single-FP Divide
	SMPDefsFlags[STARS_NN_vdivsd] = false;               // Divide Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vdivss] = false;               // Scalar Single-FP Divide
	SMPDefsFlags[STARS_NN_vdppd] = false;                // Dot Product of Packed Double Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vdpps] = false;                // Dot Product of Packed Single Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vextractf128] = false;         // Extract Packed Floating-Point Values
	SMPDefsFlags[STARS_NN_vextracti128] = false;         // Extract Packed Integer Values
	SMPDefsFlags[STARS_NN_vextractps] = false;           // Extract Packed Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmadd132pd] = false;          // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmadd132ps] = false;          // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmadd132sd] = false;          // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmadd132ss] = false;          // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmadd213pd] = false;          // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmadd213ps] = false;          // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmadd213sd] = false;          // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmadd213ss] = false;          // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmadd231pd] = false;          // Fused Multiply-Add of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmadd231ps] = false;          // Fused Multiply-Add of Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmadd231sd] = false;          // Fused Multiply-Add of Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmadd231ss] = false;          // Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmaddsub132pd] = false;       // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmaddsub132ps] = false;       // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmaddsub213pd] = false;       // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmaddsub213ps] = false;       // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmaddsub231pd] = false;       // Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmaddsub231ps] = false;       // Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmsub132pd] = false;          // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmsub132ps] = false;          // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmsub132sd] = false;          // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmsub132ss] = false;          // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmsub213pd] = false;          // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmsub213ps] = false;          // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmsub213sd] = false;          // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmsub213ss] = false;          // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmsub231pd] = false;          // Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmsub231ps] = false;          // Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmsub231sd] = false;          // Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmsub231ss] = false;          // Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmsubadd132pd] = false;       // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmsubadd132ps] = false;       // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmsubadd213pd] = false;       // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmsubadd213ps] = false;       // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmsubadd231pd] = false;       // Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfmsubadd231ps] = false;       // Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmadd132pd] = false;         // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmadd132ps] = false;         // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmadd132sd] = false;         // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmadd132ss] = false;         // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmadd213pd] = false;         // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmadd213ps] = false;         // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmadd213sd] = false;         // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmadd213ss] = false;         // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmadd231pd] = false;         // Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmadd231ps] = false;         // Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmadd231sd] = false;         // Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmadd231ss] = false;         // Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmsub132pd] = false;         // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmsub132ps] = false;         // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmsub132sd] = false;         // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmsub132ss] = false;         // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmsub213pd] = false;         // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmsub213ps] = false;         // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmsub213sd] = false;         // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmsub213ss] = false;         // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmsub231pd] = false;         // Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmsub231ps] = false;         // Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmsub231sd] = false;         // Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vfnmsub231ss] = false;         // Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vgatherdps] = false;           // Gather Packed SP FP Values Using Signed Dword Indices
	SMPDefsFlags[STARS_NN_vgatherdpd] = false;           // Gather Packed DP FP Values Using Signed Dword Indices
	SMPDefsFlags[STARS_NN_vgatherqps] = false;           // Gather Packed SP FP Values Using Signed Qword Indices
	SMPDefsFlags[STARS_NN_vgatherqpd] = false;           // Gather Packed DP FP Values Using Signed Qword Indices
	SMPDefsFlags[STARS_NN_vhaddpd] = false;              // Add horizontally packed DP FP numbers
	SMPDefsFlags[STARS_NN_vhaddps] = false;              // Add horizontally packed SP FP numbers
	SMPDefsFlags[STARS_NN_vhsubpd] = false;              // Sub horizontally packed DP FP numbers
	SMPDefsFlags[STARS_NN_vhsubps] = false;              // Sub horizontally packed SP FP numbers
	SMPDefsFlags[STARS_NN_vinsertf128] = false;          // Insert Packed Floating-Point Values
	SMPDefsFlags[STARS_NN_vinserti128] = false;          // Insert Packed Integer Values
	SMPDefsFlags[STARS_NN_vinsertps] = false;            // Insert Packed Single Precision Floating-Point Value
	SMPDefsFlags[STARS_NN_vlddqu] = false;               // Load Unaligned Packed Integer Values
	SMPDefsFlags[STARS_NN_vldmxcsr] = false;             // Load Streaming SIMD Extensions Technology Control/Status Register
	SMPDefsFlags[STARS_NN_vmaskmovdqu] = false;          // Store Selected Bytes of Double Quadword with NT Hint
	SMPDefsFlags[STARS_NN_vmaskmovpd] = false;           // Conditionally Load Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vmaskmovps] = false;           // Conditionally Load Packed Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vmaxpd] = false;               // Return Maximum Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vmaxps] = false;               // Packed Single-FP Maximum
	SMPDefsFlags[STARS_NN_vmaxsd] = false;               // Return Maximum Scalar Double-Precision Floating-Point Value
	SMPDefsFlags[STARS_NN_vmaxss] = false;               // Scalar Single-FP Maximum
	SMPDefsFlags[STARS_NN_vminpd] = false;               // Return Minimum Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vminps] = false;               // Packed Single-FP Minimum
	SMPDefsFlags[STARS_NN_vminsd] = false;               // Return Minimum Scalar Double-Precision Floating-Point Value
	SMPDefsFlags[STARS_NN_vminss] = false;               // Scalar Single-FP Minimum
	SMPDefsFlags[STARS_NN_vmovapd] = false;              // Move Aligned Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vmovaps] = false;              // Move Aligned Four Packed Single-FP
	SMPDefsFlags[STARS_NN_vmovd] = false;                // Move 32 bits
	SMPDefsFlags[STARS_NN_vmovddup] = false;             // Move One Double-FP and Duplicate
	SMPDefsFlags[STARS_NN_vmovdqa] = false;              // Move Aligned Double Quadword
	SMPDefsFlags[STARS_NN_vmovdqu] = false;              // Move Unaligned Double Quadword
	SMPDefsFlags[STARS_NN_vmovhlps] = false;             // Move High to Low Packed Single-FP
	SMPDefsFlags[STARS_NN_vmovhpd] = false;              // Move High Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vmovhps] = false;              // Move High Packed Single-FP
	SMPDefsFlags[STARS_NN_vmovlhps] = false;             // Move Low to High Packed Single-FP
	SMPDefsFlags[STARS_NN_vmovlpd] = false;              // Move Low Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vmovlps] = false;              // Move Low Packed Single-FP
	SMPDefsFlags[STARS_NN_vmovmskpd] = false;            // Extract Packed Double-Precision Floating-Point Sign Mask
	SMPDefsFlags[STARS_NN_vmovmskps] = false;            // Move Mask to Register
	SMPDefsFlags[STARS_NN_vmovntdq] = false;             // Store Double Quadword Using Non-Temporal Hint
	SMPDefsFlags[STARS_NN_vmovntdqa] = false;            // Load Double Quadword Non-Temporal Aligned Hint
	SMPDefsFlags[STARS_NN_vmovntpd] = false;             // Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
	SMPDefsFlags[STARS_NN_vmovntps] = false;             // Move Aligned Four Packed Single-FP Non Temporal
#if (IDA_SDK_VERSION < 700)      // Incredibly, these opcodes were removed in IDA Pro 7.0
	SMPDefsFlags[STARS_NN_vmovntsd] = false;             // Move Non-Temporal Scalar Double-Precision Floating-Point
	SMPDefsFlags[STARS_NN_vmovntss] = false;             // Move Non-Temporal Scalar Single-Precision Floating-Point
#endif
	SMPDefsFlags[STARS_NN_vmovq] = false;                // Move 64 bits
	SMPDefsFlags[STARS_NN_vmovsd] = false;               // Move Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vmovshdup] = false;            // Move Packed Single-FP High and Duplicate
	SMPDefsFlags[STARS_NN_vmovsldup] = false;            // Move Packed Single-FP Low and Duplicate
	SMPDefsFlags[STARS_NN_vmovss] = false;               // Move Scalar Single-FP
	SMPDefsFlags[STARS_NN_vmovupd] = false;              // Move Unaligned Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vmovups] = false;              // Move Unaligned Four Packed Single-FP
	SMPDefsFlags[STARS_NN_vmpsadbw] = false;             // Compute Multiple Packed Sums of Absolute Difference
	SMPDefsFlags[STARS_NN_vmulpd] = false;               // Multiply Packed Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vmulps] = false;               // Packed Single-FP Multiply
	SMPDefsFlags[STARS_NN_vmulsd] = false;               // Multiply Scalar Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vmulss] = false;               // Scalar Single-FP Multiply
	SMPDefsFlags[STARS_NN_vorpd] = false;                // Bitwise Logical OR of Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vorps] = false;                // Bitwise Logical OR for Single-FP Data
	SMPDefsFlags[STARS_NN_vpabsb] = false;               // Packed Absolute Value Byte
	SMPDefsFlags[STARS_NN_vpabsd] = false;               // Packed Absolute Value Doubleword
	SMPDefsFlags[STARS_NN_vpabsw] = false;               // Packed Absolute Value Word
	SMPDefsFlags[STARS_NN_vpackssdw] = false;            // Pack with Signed Saturation (Dword->Word)
	SMPDefsFlags[STARS_NN_vpacksswb] = false;            // Pack with Signed Saturation (Word->Byte)
	SMPDefsFlags[STARS_NN_vpackusdw] = false;            // Pack with Unsigned Saturation
	SMPDefsFlags[STARS_NN_vpackuswb] = false;            // Pack with Unsigned Saturation (Word->Byte)
	SMPDefsFlags[STARS_NN_vpaddb] = false;               // Packed Add Byte
	SMPDefsFlags[STARS_NN_vpaddd] = false;               // Packed Add Dword
	SMPDefsFlags[STARS_NN_vpaddq] = false;               // Add Packed Quadword Integers
	SMPDefsFlags[STARS_NN_vpaddsb] = false;              // Packed Add with Saturation (Byte)
	SMPDefsFlags[STARS_NN_vpaddsw] = false;              // Packed Add with Saturation (Word)
	SMPDefsFlags[STARS_NN_vpaddusb] = false;             // Packed Add Unsigned with Saturation (Byte)
	SMPDefsFlags[STARS_NN_vpaddusw] = false;             // Packed Add Unsigned with Saturation (Word)
	SMPDefsFlags[STARS_NN_vpaddw] = false;               // Packed Add Word
	SMPDefsFlags[STARS_NN_vpalignr] = false;             // Packed Align Right
	SMPDefsFlags[STARS_NN_vpand] = false;                // Bitwise Logical And
	SMPDefsFlags[STARS_NN_vpandn] = false;               // Bitwise Logical And Not
	SMPDefsFlags[STARS_NN_vpavgb] = false;               // Packed Average (Byte)
	SMPDefsFlags[STARS_NN_vpavgw] = false;               // Packed Average (Word)
	SMPDefsFlags[STARS_NN_vpblendd] = false;             // Blend Packed Dwords
	SMPDefsFlags[STARS_NN_vpblendvb] = false;            // Variable Blend Packed Bytes
	SMPDefsFlags[STARS_NN_vpblendw] = false;             // Blend Packed Words
	SMPDefsFlags[STARS_NN_vpbroadcastb] = false;         // Broadcast a Byte Integer
	SMPDefsFlags[STARS_NN_vpbroadcastd] = false;         // Broadcast a Dword Integer
	SMPDefsFlags[STARS_NN_vpbroadcastq] = false;         // Broadcast a Qword Integer
	SMPDefsFlags[STARS_NN_vpbroadcastw] = false;         // Broadcast a Word Integer
	SMPDefsFlags[STARS_NN_vpclmulqdq] = false;           // Carry-Less Multiplication Quadword
	SMPDefsFlags[STARS_NN_vpcmpeqb] = false;             // Packed Compare for Equal (Byte)
	SMPDefsFlags[STARS_NN_vpcmpeqd] = false;             // Packed Compare for Equal (Dword)
	SMPDefsFlags[STARS_NN_vpcmpeqq] = false;             // Compare Packed Qword Data for Equal
	SMPDefsFlags[STARS_NN_vpcmpeqw] = false;             // Packed Compare for Equal (Word)
	SMPDefsFlags[STARS_NN_vpcmpestri] = false;           // Packed Compare Explicit Length Strings, Return Index
	SMPDefsFlags[STARS_NN_vpcmpestrm] = false;           // Packed Compare Explicit Length Strings, Return Mask
	SMPDefsFlags[STARS_NN_vpcmpgtb] = false;             // Packed Compare for Greater Than (Byte)
	SMPDefsFlags[STARS_NN_vpcmpgtd] = false;             // Packed Compare for Greater Than (Dword)
	SMPDefsFlags[STARS_NN_vpcmpgtq] = false;             // Compare Packed Data for Greater Than
	SMPDefsFlags[STARS_NN_vpcmpgtw] = false;             // Packed Compare for Greater Than (Word)
	SMPDefsFlags[STARS_NN_vpcmpistri] = false;           // Packed Compare Implicit Length Strings, Return Index
	SMPDefsFlags[STARS_NN_vpcmpistrm] = false;           // Packed Compare Implicit Length Strings, Return Mask
	SMPDefsFlags[STARS_NN_vperm2f128] = false;           // Permute Floating-Point Values
	SMPDefsFlags[STARS_NN_vperm2i128] = false;           // Permute Integer Values
	SMPDefsFlags[STARS_NN_vpermd] = false;               // Full Doublewords Element Permutation
	SMPDefsFlags[STARS_NN_vpermilpd] = false;            // Permute Double-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vpermilps] = false;            // Permute Single-Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vpermpd] = false;              // Permute Double-Precision Floating-Point Elements
	SMPDefsFlags[STARS_NN_vpermps] = false;              // Permute Single-Precision Floating-Point Elements
	SMPDefsFlags[STARS_NN_vpermq] = false;               // Qwords Element Permutation
	SMPDefsFlags[STARS_NN_vpextrb] = false;              // Extract Byte
	SMPDefsFlags[STARS_NN_vpextrd] = false;              // Extract Dword
	SMPDefsFlags[STARS_NN_vpextrq] = false;              // Extract Qword
	SMPDefsFlags[STARS_NN_vpextrw] = false;              // Extract Word
	SMPDefsFlags[STARS_NN_vpgatherdd] = false;           // Gather Packed Dword Values Using Signed Dword Indices
	SMPDefsFlags[STARS_NN_vpgatherdq] = false;           // Gather Packed Qword Values Using Signed Dword Indices
	SMPDefsFlags[STARS_NN_vpgatherqd] = false;           // Gather Packed Dword Values Using Signed Qword Indices
	SMPDefsFlags[STARS_NN_vpgatherqq] = false;           // Gather Packed Qword Values Using Signed Qword Indices
	SMPDefsFlags[STARS_NN_vphaddd] = false;              // Packed Horizontal Add Doubleword
	SMPDefsFlags[STARS_NN_vphaddsw] = false;          // Packed Horizontal Add and Saturate
	SMPDefsFlags[STARS_NN_vphaddw] = false;           // Packed Horizontal Add Word
	SMPDefsFlags[STARS_NN_vphminposuw] = false;       // Packed Horizontal Word Minimum
	SMPDefsFlags[STARS_NN_vphsubd] = false;           // Packed Horizontal Subtract Doubleword
	SMPDefsFlags[STARS_NN_vphsubsw] = false;          // Packed Horizontal Subtract and Saturate
	SMPDefsFlags[STARS_NN_vphsubw] = false;           // Packed Horizontal Subtract Word
	SMPDefsFlags[STARS_NN_vpinsrb] = false;           // Insert Byte
	SMPDefsFlags[STARS_NN_vpinsrd] = false;           // Insert Dword
	SMPDefsFlags[STARS_NN_vpinsrq] = false;           // Insert Qword
	SMPDefsFlags[STARS_NN_vpinsrw] = false;           // Insert Word
	SMPDefsFlags[STARS_NN_vpmaddubsw] = false;        // Multiply and Add Packed Signed and Unsigned Bytes
	SMPDefsFlags[STARS_NN_vpmaddwd] = false;          // Packed Multiply and Add
	SMPDefsFlags[STARS_NN_vpmaskmovd] = false;        // Conditionally Store Dword Values Using Mask
	SMPDefsFlags[STARS_NN_vpmaskmovq] = false;        // Conditionally Store Qword Values Using Mask
	SMPDefsFlags[STARS_NN_vpmaxsb] = false;           // Maximum of Packed Signed Byte Integers
	SMPDefsFlags[STARS_NN_vpmaxsd] = false;           // Maximum of Packed Signed Dword Integers
	SMPDefsFlags[STARS_NN_vpmaxsw] = false;           // Packed Signed Integer Word Maximum
	SMPDefsFlags[STARS_NN_vpmaxub] = false;           // Packed Unsigned Integer Byte Maximum
	SMPDefsFlags[STARS_NN_vpmaxud] = false;           // Maximum of Packed Unsigned Dword Integers
	SMPDefsFlags[STARS_NN_vpmaxuw] = false;           // Maximum of Packed Word Integers
	SMPDefsFlags[STARS_NN_vpminsb] = false;           // Minimum of Packed Signed Byte Integers
	SMPDefsFlags[STARS_NN_vpminsd] = false;           // Minimum of Packed Signed Dword Integers
	SMPDefsFlags[STARS_NN_vpminsw] = false;           // Packed Signed Integer Word Minimum
	SMPDefsFlags[STARS_NN_vpminub] = false;           // Packed Unsigned Integer Byte Minimum
	SMPDefsFlags[STARS_NN_vpminud] = false;           // Minimum of Packed Unsigned Dword Integers
	SMPDefsFlags[STARS_NN_vpminuw] = false;           // Minimum of Packed Word Integers
	SMPDefsFlags[STARS_NN_vpmovmskb] = false;         // Move Byte Mask to Integer
	SMPDefsFlags[STARS_NN_vpmovsxbd] = false;         // Packed Move with Sign Extend
	SMPDefsFlags[STARS_NN_vpmovsxbq] = false;         // Packed Move with Sign Extend
	SMPDefsFlags[STARS_NN_vpmovsxbw] = false;         // Packed Move with Sign Extend
	SMPDefsFlags[STARS_NN_vpmovsxdq] = false;         // Packed Move with Sign Extend
	SMPDefsFlags[STARS_NN_vpmovsxwd] = false;         // Packed Move with Sign Extend
	SMPDefsFlags[STARS_NN_vpmovsxwq] = false;         // Packed Move with Sign Extend
	SMPDefsFlags[STARS_NN_vpmovzxbd] = false;         // Packed Move with Zero Extend
	SMPDefsFlags[STARS_NN_vpmovzxbq] = false;         // Packed Move with Zero Extend
	SMPDefsFlags[STARS_NN_vpmovzxbw] = false;         // Packed Move with Zero Extend
	SMPDefsFlags[STARS_NN_vpmovzxdq] = false;         // Packed Move with Zero Extend
	SMPDefsFlags[STARS_NN_vpmovzxwd] = false;         // Packed Move with Zero Extend
	SMPDefsFlags[STARS_NN_vpmovzxwq] = false;         // Packed Move with Zero Extend
	SMPDefsFlags[STARS_NN_vpmuldq] = false;           // Multiply Packed Signed Dword Integers
	SMPDefsFlags[STARS_NN_vpmulhrsw] = false;         // Packed Multiply High with Round and Scale
	SMPDefsFlags[STARS_NN_vpmulhuw] = false;          // Packed Multiply High Unsigned
	SMPDefsFlags[STARS_NN_vpmulhw] = false;           // Packed Multiply High
	SMPDefsFlags[STARS_NN_vpmulld] = false;           // Multiply Packed Signed Dword Integers and Store Low Result
	SMPDefsFlags[STARS_NN_vpmullw] = false;           // Packed Multiply Low
	SMPDefsFlags[STARS_NN_vpmuludq] = false;          // Multiply Packed Unsigned Doubleword Integers
	SMPDefsFlags[STARS_NN_vpor] = false;              // Bitwise Logical Or
	SMPDefsFlags[STARS_NN_vpsadbw] = false;           // Packed Sum of Absolute Differences
	SMPDefsFlags[STARS_NN_vpshufb] = false;           // Packed Shuffle Bytes
	SMPDefsFlags[STARS_NN_vpshufd] = false;           // Shuffle Packed Doublewords
	SMPDefsFlags[STARS_NN_vpshufhw] = false;          // Shuffle Packed High Words
	SMPDefsFlags[STARS_NN_vpshuflw] = false;          // Shuffle Packed Low Words
	SMPDefsFlags[STARS_NN_vpsignb] = false;           // Packed SIGN Byte
	SMPDefsFlags[STARS_NN_vpsignd] = false;           // Packed SIGN Doubleword
	SMPDefsFlags[STARS_NN_vpsignw] = false;           // Packed SIGN Word
	SMPDefsFlags[STARS_NN_vpslld] = false;            // Packed Shift Left Logical (Dword)
	SMPDefsFlags[STARS_NN_vpslldq] = false;           // Shift Double Quadword Left Logical
	SMPDefsFlags[STARS_NN_vpsllq] = false;            // Packed Shift Left Logical (Qword)
	SMPDefsFlags[STARS_NN_vpsllvd] = false;           // Variable Bit Shift Left Logical (Dword)
	SMPDefsFlags[STARS_NN_vpsllvq] = false;           // Variable Bit Shift Left Logical (Qword)
	SMPDefsFlags[STARS_NN_vpsllw] = false;            // Packed Shift Left Logical (Word)
	SMPDefsFlags[STARS_NN_vpsrad] = false;            // Packed Shift Right Arithmetic (Dword)
	SMPDefsFlags[STARS_NN_vpsravd] = false;           // Variable Bit Shift Right Arithmetic
	SMPDefsFlags[STARS_NN_vpsraw] = false;            // Packed Shift Right Arithmetic (Word)
	SMPDefsFlags[STARS_NN_vpsrld] = false;            // Packed Shift Right Logical (Dword)
	SMPDefsFlags[STARS_NN_vpsrldq] = false;           // Shift Double Quadword Right Logical (Qword)
	SMPDefsFlags[STARS_NN_vpsrlq] = false;            // Packed Shift Right Logical (Qword)
	SMPDefsFlags[STARS_NN_vpsrlvd] = false;           // Variable Bit Shift Right Logical (Dword)
	SMPDefsFlags[STARS_NN_vpsrlvq] = false;           // Variable Bit Shift Right Logical (Qword)
	SMPDefsFlags[STARS_NN_vpsrlw] = false;            // Packed Shift Right Logical (Word)
	SMPDefsFlags[STARS_NN_vpsubb] = false;            // Packed Subtract Byte
	SMPDefsFlags[STARS_NN_vpsubd] = false;            // Packed Subtract Dword
	SMPDefsFlags[STARS_NN_vpsubq] = false;            // Subtract Packed Quadword Integers
	SMPDefsFlags[STARS_NN_vpsubsb] = false;           // Packed Subtract with Saturation (Byte)
	SMPDefsFlags[STARS_NN_vpsubsw] = false;           // Packed Subtract with Saturation (Word)
	SMPDefsFlags[STARS_NN_vpsubusb] = false;          // Packed Subtract Unsigned with Saturation (Byte)
	SMPDefsFlags[STARS_NN_vpsubusw] = false;          // Packed Subtract Unsigned with Saturation (Word)
	SMPDefsFlags[STARS_NN_vpsubw] = false;            // Packed Subtract Word
	SMPDefsFlags[STARS_NN_vptest] = false;            // Logical Compare
	SMPDefsFlags[STARS_NN_vpunpckhbw] = false;        // Unpack High Packed Data (Byte->Word)
	SMPDefsFlags[STARS_NN_vpunpckhdq] = false;        // Unpack High Packed Data (Dword->Qword)
	SMPDefsFlags[STARS_NN_vpunpckhqdq] = false;       // Unpack High Packed Data (Qword->Xmmword)
	SMPDefsFlags[STARS_NN_vpunpckhwd] = false;        // Unpack High Packed Data (Word->Dword)
	SMPDefsFlags[STARS_NN_vpunpcklbw] = false;        // Unpack Low Packed Data (Byte->Word)
	SMPDefsFlags[STARS_NN_vpunpckldq] = false;        // Unpack Low Packed Data (Dword->Qword)
	SMPDefsFlags[STARS_NN_vpunpcklqdq] = false;       // Unpack Low Packed Data (Qword->Xmmword)
	SMPDefsFlags[STARS_NN_vpunpcklwd] = false;        // Unpack Low Packed Data (Word->Dword)
	SMPDefsFlags[STARS_NN_vpxor] = false;             // Bitwise Logical Exclusive Or
	SMPDefsFlags[STARS_NN_vrcpps] = false;            // Packed Single-FP Reciprocal
	SMPDefsFlags[STARS_NN_vrcpss] = false;            // Scalar Single-FP Reciprocal
	SMPDefsFlags[STARS_NN_vroundpd] = false;          // Round Packed Double Precision Floating-Point Values
	SMPDefsFlags[STARS_NN_vroundps] = false;          // Round Packed Single Precision Floating-Point Values