STARSProgram.cpp

	SMPTypeCategory[STARS_NN_kmovd] = 14;                // Move from and to Mask Registers
	SMPTypeCategory[STARS_NN_kunpckbw] = 14;             // Unpack for Mask Registers
	SMPTypeCategory[STARS_NN_kunpckwd] = 14;             // Unpack for Mask Registers
	SMPTypeCategory[STARS_NN_kunpckdq] = 14;             // Unpack for Mask Registers
	SMPTypeCategory[STARS_NN_knotw] = 14;                // NOT Mask Register
	SMPTypeCategory[STARS_NN_knotb] = 14;                // NOT Mask Register
	SMPTypeCategory[STARS_NN_knotq] = 14;                // NOT Mask Register
	SMPTypeCategory[STARS_NN_knotd] = 14;                // NOT Mask Register
	SMPTypeCategory[STARS_NN_korw] = 14;                 // Bitwise Logical OR Masks
	SMPTypeCategory[STARS_NN_korb] = 14;                 // Bitwise Logical OR Masks
	SMPTypeCategory[STARS_NN_korq] = 14;                 // Bitwise Logical OR Masks
	SMPTypeCategory[STARS_NN_kord] = 14;                 // Bitwise Logical OR Masks
	SMPTypeCategory[STARS_NN_kortestw] = 14;             // OR Masks And Set Flags
	SMPTypeCategory[STARS_NN_kortestb] = 14;             // OR Masks And Set Flags
	SMPTypeCategory[STARS_NN_kortestq] = 14;             // OR Masks And Set Flags
	SMPTypeCategory[STARS_NN_kortestd] = 14;             // OR Masks And Set Flags
	SMPTypeCategory[STARS_NN_kshiftlw] = 14;             // Shift Left Mask Registers
	SMPTypeCategory[STARS_NN_kshiftlb] = 14;             // Shift Left Mask Registers
	SMPTypeCategory[STARS_NN_kshiftlq] = 14;             // Shift Left Mask Registers
	SMPTypeCategory[STARS_NN_kshiftld] = 14;             // Shift Left Mask Registers
	SMPTypeCategory[STARS_NN_kshiftrw] = 14;             // Shift Right Mask Registers
	SMPTypeCategory[STARS_NN_kshiftrb] = 14;             // Shift Right Mask Registers
	SMPTypeCategory[STARS_NN_kshiftrq] = 14;             // Shift Right Mask Registers
	SMPTypeCategory[STARS_NN_kshiftrd] = 14;             // Shift Right Mask Registers
	SMPTypeCategory[STARS_NN_kxnorw] = 14;               // Bitwise Logical XNOR Masks
	SMPTypeCategory[STARS_NN_kxnorb] = 14;               // Bitwise Logical XNOR Masks
	SMPTypeCategory[STARS_NN_kxnorq] = 14;               // Bitwise Logical XNOR Masks
	SMPTypeCategory[STARS_NN_kxnord] = 14;               // Bitwise Logical XNOR Masks
	SMPTypeCategory[STARS_NN_ktestw] = 14;               // Packed Bit Test Masks and Set Flags
	SMPTypeCategory[STARS_NN_ktestb] = 14;               // Packed Bit Test Masks and Set Flags
	SMPTypeCategory[STARS_NN_ktestq] = 14;               // Packed Bit Test Masks and Set Flags
	SMPTypeCategory[STARS_NN_ktestd] = 14;               // Packed Bit Test Masks and Set Flags
	SMPTypeCategory[STARS_NN_kxorw] = 14;                // Bitwise Logical XOR Masks
	SMPTypeCategory[STARS_NN_kxorb] = 14;                // Bitwise Logical XOR Masks
	SMPTypeCategory[STARS_NN_kxorq] = 14;                // Bitwise Logical XOR Masks
	SMPTypeCategory[STARS_NN_kxord] = 14;                // Bitwise Logical XOR Masks

	// SHA Extensions

	SMPTypeCategory[STARS_NN_sha1rnds4] = 14;            // Perform Four Rounds of SHA1 Operation
	SMPTypeCategory[STARS_NN_sha1nexte] = 14;            // Calculate SHA1 State Variable E after Four Rounds
	SMPTypeCategory[STARS_NN_sha1msg1] = 14;             // Perform an Intermediate Calculation for the Next Four SHA1 Message Dwords
	SMPTypeCategory[STARS_NN_sha1msg2] = 14;             // Perform a Final Calculation for the Next Four SHA1 Message Dwords
	SMPTypeCategory[STARS_NN_sha256rnds2] = 14;          // Perform Two Rounds of SHA256 Operation
	SMPTypeCategory[STARS_NN_sha256msg1] = 14;           // Perform an Intermediate Calculation for the Next Four SHA256 Message Dwords
	SMPTypeCategory[STARS_NN_sha256msg2] = 14;           // Perform a Final Calculation for the Next Four SHA256 Message Dwords

	// Intel Software Guard Extensions

	SMPTypeCategory[STARS_NN_encls] = 1;                // Execute an Enclave System Function of Specified Leaf Number
	SMPTypeCategory[STARS_NN_enclu] = 1;                // Execute an Enclave User Function of Specified Leaf Number

	// AMD XOP

	SMPTypeCategory[STARS_NN_vfrczpd] = 14;              // Extract Fraction Packed Double-Precision Floating-Point
	SMPTypeCategory[STARS_NN_vfrczps] = 14;              // Extract Fraction Packed Single-Precision Floating-Point
	SMPTypeCategory[STARS_NN_vfrczsd] = 14;              // Extract Fraction Scalar Double-Precision Floating-Point
	SMPTypeCategory[STARS_NN_vfrczss] = 14;              // Extract Fraction Scalar Single-Precision Floating Point
	SMPTypeCategory[STARS_NN_vpcmov] = 14;               // Vector Conditional Moves
	SMPTypeCategory[STARS_NN_vpcomb] = 14;               // Compare Vector Signed Bytes
	SMPTypeCategory[STARS_NN_vpcomd] = 14;               // Compare Vector Signed Doublewords
	SMPTypeCategory[STARS_NN_vpcomq] = 14;               // Compare Vector Signed Quadwords
	SMPTypeCategory[STARS_NN_vpcomub] = 14;              // Compare Vector Unsigned Bytes
	SMPTypeCategory[STARS_NN_vpcomud] = 14;              // Compare Vector Unsigned Doublewords
	SMPTypeCategory[STARS_NN_vpcomuq] = 14;              // Compare Vector Unsigned Quadwords
	SMPTypeCategory[STARS_NN_vpcomuw] = 14;              // Compare Vector Unsigned Words
	SMPTypeCategory[STARS_NN_vpcomw] = 14;               // Compare Vector Signed Words
	SMPTypeCategory[STARS_NN_vpermil2pd] = 14;           // Permute Two-Source Double-Precision Floating-Point Values
	SMPTypeCategory[STARS_NN_vpermil2ps] = 14;           // Permute Two-Source Single-Precision Floating-Point Values
	SMPTypeCategory[STARS_NN_vphaddbd] = 14;             // Packed Horizontal Add Signed Byte to Signed Doubleword
	SMPTypeCategory[STARS_NN_vphaddbq] = 14;             // Packed Horizontal Add Signed Byte to Signed Quadword
	SMPTypeCategory[STARS_NN_vphaddbw] = 14;             // Packed Horizontal Add Signed Byte to Signed Word
	SMPTypeCategory[STARS_NN_vphadddq] = 14;             // Packed Horizontal Add Signed Doubleword to Signed Quadword
	SMPTypeCategory[STARS_NN_vphaddubd] = 14;            // Packed Horizontal Add Unsigned Byte to Doubleword
	SMPTypeCategory[STARS_NN_vphaddubq] = 14;            // Packed Horizontal Add Unsigned Byte to Quadword
	SMPTypeCategory[STARS_NN_vphaddubw] = 14;            // Packed Horizontal Add Unsigned Byte to Word
	SMPTypeCategory[STARS_NN_vphaddudq] = 14;            // Packed Horizontal Add Unsigned Doubleword to Quadword
	SMPTypeCategory[STARS_NN_vphadduwd] = 14;            // Packed Horizontal Add Unsigned Word to Doubleword
	SMPTypeCategory[STARS_NN_vphadduwq] = 14;            // Packed Horizontal Add Unsigned Word to Quadword
	SMPTypeCategory[STARS_NN_vphaddwd] = 14;             // Packed Horizontal Add Signed Word to Signed Doubleword
	SMPTypeCategory[STARS_NN_vphaddwq] = 14;             // Packed Horizontal Add Signed Word to Signed Quadword
	SMPTypeCategory[STARS_NN_vphsubbw] = 14;             // Packed Horizontal Subtract Signed Byte to Signed Word
	SMPTypeCategory[STARS_NN_vphsubdq] = 14;             // Packed Horizontal Subtract Signed Doubleword to Signed Quadword
	SMPTypeCategory[STARS_NN_vphsubwd] = 14;             // Packed Horizontal Subtract Signed Word to Signed Doubleword
	SMPTypeCategory[STARS_NN_vpmacsdd] = 14;             // Packed Multiply Accumulate Signed Doubleword to Signed Doubleword
	SMPTypeCategory[STARS_NN_vpmacsdqh] = 14;            // Packed Multiply Accumulate Signed High Doubleword to Signed Quadword
	SMPTypeCategory[STARS_NN_vpmacsdql] = 14;            // Packed Multiply Accumulate Signed Low Doubleword to Signed Quadword
	SMPTypeCategory[STARS_NN_vpmacssdd] = 14;            // Packed Multiply Accumulate Signed Doubleword to Signed Doubleword with Saturation
	SMPTypeCategory[STARS_NN_vpmacssdqh] = 14;           // Packed Multiply Accumulate Signed High Doubleword to Signed Quadword with Saturation
	SMPTypeCategory[STARS_NN_vpmacssdql] = 14;           // Packed Multiply Accumulate Signed Low Doubleword to Signed Quadword with Saturation
	SMPTypeCategory[STARS_NN_vpmacsswd] = 14;            // Packed Multiply Accumulate Signed Word to Signed Doubleword with Saturation
	SMPTypeCategory[STARS_NN_vpmacssww] = 14;            // Packed Multiply Accumulate Signed Word to Signed Word with Saturation
	SMPTypeCategory[STARS_NN_vpmacswd] = 14;             // Packed Multiply Accumulate Signed Word to Signed Doubleword
	SMPTypeCategory[STARS_NN_vpmacsww] = 14;             // Packed Multiply Accumulate Signed Word to Signed Word
	SMPTypeCategory[STARS_NN_vpmadcsswd] = 14;           // Packed Multiply, Add and Accumulate Signed Word to Signed Doubleword with Saturation
	SMPTypeCategory[STARS_NN_vpmadcswd] = 14;            // Packed Multiply Add and Accumulate Signed Word to Signed Doubleword
	SMPTypeCategory[STARS_NN_vpperm] = 14;               // Packed Permute Bytes
	SMPTypeCategory[STARS_NN_vprotb] = 14;               // Packed Rotate Bytes
	SMPTypeCategory[STARS_NN_vprotd] = 14;               // Packed Rotate Doublewords
	SMPTypeCategory[STARS_NN_vprotq] = 14;               // Packed Rotate Quadwords
	SMPTypeCategory[STARS_NN_vprotw] = 14;               // Packed Rotate Words
	SMPTypeCategory[STARS_NN_vpshab] = 14;               // Packed Shift Arithmetic Bytes
	SMPTypeCategory[STARS_NN_vpshad] = 14;               // Packed Shift Arithmetic Doublewords
	SMPTypeCategory[STARS_NN_vpshaq] = 14;               // Packed Shift Arithmetic Quadwords
	SMPTypeCategory[STARS_NN_vpshaw] = 14;               // Packed Shift Arithmetic Words
	SMPTypeCategory[STARS_NN_vpshlb] = 14;               // Packed Shift Logical Bytes
	SMPTypeCategory[STARS_NN_vpshld] = 14;               // Packed Shift Logical Doublewords
	SMPTypeCategory[STARS_NN_vpshlq] = 14;               // Packed Shift Logical Quadwords
	SMPTypeCategory[STARS_NN_vpshlw] = 14;               // Packed Shift Logical Words

	// AMP XOP comparison pseudo-ops

	SMPTypeCategory[STARS_NN_vpcomltb] = 14;             // Compare Vector Signed Bytes
	SMPTypeCategory[STARS_NN_vpcomleb] = 14;             // Compare Vector Signed Bytes
	SMPTypeCategory[STARS_NN_vpcomgtb] = 14;             // Compare Vector Signed Bytes
	SMPTypeCategory[STARS_NN_vpcomgeb] = 14;             // Compare Vector Signed Bytes
	SMPTypeCategory[STARS_NN_vpcomeqb] = 14;             // Compare Vector Signed Bytes
	SMPTypeCategory[STARS_NN_vpcomneqb] = 14;            // Compare Vector Signed Bytes
	SMPTypeCategory[STARS_NN_vpcomfalseb] = 14;          // Compare Vector Signed Bytes
	SMPTypeCategory[STARS_NN_vpcomtrueb] = 14;           // Compare Vector Signed Bytes

	SMPTypeCategory[STARS_NN_vpcomltw] = 14;             // Compare Vector Signed Words
	SMPTypeCategory[STARS_NN_vpcomlew] = 14;             // Compare Vector Signed Words
	SMPTypeCategory[STARS_NN_vpcomgtw] = 14;             // Compare Vector Signed Words
	SMPTypeCategory[STARS_NN_vpcomgew] = 14;             // Compare Vector Signed Words
	SMPTypeCategory[STARS_NN_vpcomeqw] = 14;             // Compare Vector Signed Words
	SMPTypeCategory[STARS_NN_vpcomneqw] = 14;            // Compare Vector Signed Words
	SMPTypeCategory[STARS_NN_vpcomfalsew] = 14;          // Compare Vector Signed Words
	SMPTypeCategory[STARS_NN_vpcomtruew] = 14;           // Compare Vector Signed Words

	SMPTypeCategory[STARS_NN_vpcomltd] = 14;             // Compare Vector Signed Doublewords
	SMPTypeCategory[STARS_NN_vpcomled] = 14;             // Compare Vector Signed Doublewords
	SMPTypeCategory[STARS_NN_vpcomgtd] = 14;             // Compare Vector Signed Doublewords
	SMPTypeCategory[STARS_NN_vpcomged] = 14;             // Compare Vector Signed Doublewords
	SMPTypeCategory[STARS_NN_vpcomeqd] = 14;             // Compare Vector Signed Doublewords
	SMPTypeCategory[STARS_NN_vpcomneqd] = 14;            // Compare Vector Signed Doublewords
	SMPTypeCategory[STARS_NN_vpcomfalsed] = 14;          // Compare Vector Signed Doublewords
	SMPTypeCategory[STARS_NN_vpcomtrued] = 14;           // Compare Vector Signed Doublewords

	SMPTypeCategory[STARS_NN_vpcomltq] = 14;             // Compare Vector Signed Quadwords
	SMPTypeCategory[STARS_NN_vpcomleq] = 14;             // Compare Vector Signed Quadwords
	SMPTypeCategory[STARS_NN_vpcomgtq] = 14;             // Compare Vector Signed Quadwords
	SMPTypeCategory[STARS_NN_vpcomgeq] = 14;             // Compare Vector Signed Quadwords
	SMPTypeCategory[STARS_NN_vpcomeqq] = 14;             // Compare Vector Signed Quadwords
	SMPTypeCategory[STARS_NN_vpcomneqq] = 14;            // Compare Vector Signed Quadwords
	SMPTypeCategory[STARS_NN_vpcomfalseq] = 14;          // Compare Vector Signed Quadwords
	SMPTypeCategory[STARS_NN_vpcomtrueq] = 14;           // Compare Vector Signed Quadwords

	SMPTypeCategory[STARS_NN_vpcomltub] = 14;            // Compare Vector Unsigned Bytes
	SMPTypeCategory[STARS_NN_vpcomleub] = 14;            // Compare Vector Unsigned Bytes
	SMPTypeCategory[STARS_NN_vpcomgtub] = 14;            // Compare Vector Unsigned Bytes
	SMPTypeCategory[STARS_NN_vpcomgeub] = 14;            // Compare Vector Unsigned Bytes
	SMPTypeCategory[STARS_NN_vpcomequb] = 14;            // Compare Vector Unsigned Bytes
	SMPTypeCategory[STARS_NN_vpcomnequb] = 14;           // Compare Vector Unsigned Bytes
	SMPTypeCategory[STARS_NN_vpcomfalseub] = 14;         // Compare Vector Unsigned Bytes
	SMPTypeCategory[STARS_NN_vpcomtrueub] = 14;          // Compare Vector Unsigned Bytes

	SMPTypeCategory[STARS_NN_vpcomltuw] = 14;            // Compare Vector Unsigned Words
	SMPTypeCategory[STARS_NN_vpcomleuw] = 14;            // Compare Vector Unsigned Words
	SMPTypeCategory[STARS_NN_vpcomgtuw] = 14;            // Compare Vector Unsigned Words
	SMPTypeCategory[STARS_NN_vpcomgeuw] = 14;            // Compare Vector Unsigned Words
	SMPTypeCategory[STARS_NN_vpcomequw] = 14;            // Compare Vector Unsigned Words
	SMPTypeCategory[STARS_NN_vpcomnequw] = 14;           // Compare Vector Unsigned Words
	SMPTypeCategory[STARS_NN_vpcomfalseuw] = 14;         // Compare Vector Unsigned Words
	SMPTypeCategory[STARS_NN_vpcomtrueuw] = 14;          // Compare Vector Unsigned Words

	SMPTypeCategory[STARS_NN_vpcomltud] = 14;            // Compare Vector Unsigned Doublewords
	SMPTypeCategory[STARS_NN_vpcomleud] = 14;            // Compare Vector Unsigned Doublewords
	SMPTypeCategory[STARS_NN_vpcomgtud] = 14;            // Compare Vector Unsigned Doublewords
	SMPTypeCategory[STARS_NN_vpcomgeud] = 14;            // Compare Vector Unsigned Doublewords
	SMPTypeCategory[STARS_NN_vpcomequd] = 14;            // Compare Vector Unsigned Doublewords
	SMPTypeCategory[STARS_NN_vpcomnequd] = 14;           // Compare Vector Unsigned Doublewords
	SMPTypeCategory[STARS_NN_vpcomfalseud] = 14;         // Compare Vector Unsigned Doublewords
	SMPTypeCategory[STARS_NN_vpcomtrueud] = 14;          // Compare Vector Unsigned Doublewords

	SMPTypeCategory[STARS_NN_vpcomltuq] = 14;            // Compare Vector Unsigned Quadwords
	SMPTypeCategory[STARS_NN_vpcomleuq] = 14;            // Compare Vector Unsigned Quadwords
	SMPTypeCategory[STARS_NN_vpcomgtuq] = 14;            // Compare Vector Unsigned Quadwords
	SMPTypeCategory[STARS_NN_vpcomgeuq] = 14;            // Compare Vector Unsigned Quadwords
	SMPTypeCategory[STARS_NN_vpcomequq] = 14;            // Compare Vector Unsigned Quadwords
	SMPTypeCategory[STARS_NN_vpcomnequq] = 14;           // Compare Vector Unsigned Quadwords
	SMPTypeCategory[STARS_NN_vpcomfalseuq] = 14;         // Compare Vector Unsigned Quadwords
	SMPTypeCategory[STARS_NN_vpcomtrueuq] = 14;          // Compare Vector Unsigned Quadwords

	// AMD Excavator

	SMPTypeCategory[STARS_NN_monitorx] = 1;             // Setup Monitor Address
	SMPTypeCategory[STARS_NN_mwaitx] = 1;               // Monitor Wait with Timeout

	// AMD Zen

	SMPTypeCategory[STARS_NN_clzero] = 16;               // Zero out 64 byte cache

	// Intel Processor Trace

	SMPTypeCategory[STARS_NN_ptwrite] = 16;              // Write Data to a Processor Trace Packet

	// new Intel AVX-512 instructions (December 2016)

	SMPTypeCategory[STARS_NN_v4fmaddps] = 14;            // Packed Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
	SMPTypeCategory[STARS_NN_v4fnmaddps] = 14;           // Packed Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
	SMPTypeCategory[STARS_NN_v4fmaddss] = 14;            // Scalar Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
	SMPTypeCategory[STARS_NN_v4fnmaddss] = 14;           // Scalar Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
	SMPTypeCategory[STARS_NN_vp4dpwssd] = 14;            // Dot Product of Signed Words with Dword Accumulation (4-iterations)
	SMPTypeCategory[STARS_NN_vp4dpwssds] = 14;           // Dot Product of Signed Words with Dword Accumulation and Saturation (4-iterations)
	SMPTypeCategory[STARS_NN_vpopcntd] = 14;             // Return the Count of Number of Bits Set to 1 in DWORD
	SMPTypeCategory[STARS_NN_vpopcntq] = 14;             // Return the Count of Number of Bits Set to 1 in QWORD

	// Read Processor ID

	SMPTypeCategory[STARS_NN_rdpid] = 2;                // Read Processor ID

	// Invoke VM function

	SMPTypeCategory[STARS_NN_vmfunc] = 1;               // Invoke VM function

	// Control-flow Enforcement

	SMPTypeCategory[STARS_NN_incsspd] = 14;              // Increment Shadow Stack Pointer (by 4)
	SMPTypeCategory[STARS_NN_incsspq] = 14;              // Increment Shadow Stack Pointer (by 8)
	SMPTypeCategory[STARS_NN_rdsspd] = 6;               // Read (low 32 bits of) Shadow Stack Pointer
	SMPTypeCategory[STARS_NN_rdsspq] = 6;               // Read Shadow Stack Pointer
	SMPTypeCategory[STARS_NN_saveprevssp] = 16;          // Save Previous Shadow Stack Pointer
	SMPTypeCategory[STARS_NN_rstorssp] = 16;             // Restore saved Shadow Stack Pointer
	SMPTypeCategory[STARS_NN_wrssd] = 16;                // Write (4 bytes) to shadow stack
	SMPTypeCategory[STARS_NN_wrssq] = 16;                // Write (8 bytes) to shadow stack
	SMPTypeCategory[STARS_NN_wrussd] = 16;               // Write (4 bytes) to User Shadow Stack
	SMPTypeCategory[STARS_NN_wrussq] = 16;               // Write (8 bytes) to User Shadow Stack
	SMPTypeCategory[STARS_NN_setssbsy] = 1;             // Mark Shadow Stack Busy
	SMPTypeCategory[STARS_NN_clrssbsy] = 1;             // Clear Shadow Stack Busy Flag
	SMPTypeCategory[STARS_NN_endbr64] = 1;              // Terminate an Indirect Branch in 64-bit Mode
	SMPTypeCategory[STARS_NN_endbr32] = 1;              // Terminate an Indirect Branch in 32-bit and Compatibility Mode

	// Undefined Instruction

	SMPTypeCategory[STARS_NN_ud0] = 1;                 // Undefined Instruction
	SMPTypeCategory[STARS_NN_ud1] = 1;                 // Undefined Instruction

	// Enqueue Stores

	SMPTypeCategory[STARS_NN_enqcmd] = 1;              // Enqueue Command
	SMPTypeCategory[STARS_NN_enqcmds] = 1;             // Enqueue Command Supervisor

	// AMD Zen2

	SMPTypeCategory[STARS_NN_mcommit] = 1;             // Commit Stores to Memory
	SMPTypeCategory[STARS_NN_rdpru] = 8;               // Read Processor Register

	// Intel Tremont instructions

	SMPTypeCategory[STARS_NN_cldemote] = 16;            // Cache Line Demote
	SMPTypeCategory[STARS_NN_enclv] = 1;               // Execute an Enclave VMM Function of Specified Leaf Number

	// Direct Stores

	SMPTypeCategory[STARS_NN_movdiri] = 14;             // Move Doubleword as Direct Store
	SMPTypeCategory[STARS_NN_movdir64b] = 14;           // Move 64 Bytes as Direct Store

	// Intel WAITPKG instructions

	SMPTypeCategory[STARS_NN_tpause] = 14;              // Timed PAUSE
	SMPTypeCategory[STARS_NN_umonitor] = 16;            // User Level Set Up Monitor Address
	SMPTypeCategory[STARS_NN_umwait] = 14;              // User Level Monitor Wait

	// Intel Sapphire Rapids instructions

	SMPTypeCategory[STARS_NN_serialize] = 1;           // Serialize Instruction Execution

	// Intel TSX

	SMPTypeCategory[STARS_NN_xresldtrk] = 1;           // Resume Tracking Load Addresses
	SMPTypeCategory[STARS_NN_xsusldtrk] = 1;           // Suspend Tracking Load Addresses

	// Intel Affine Transformation instructions

	SMPTypeCategory[STARS_NN_gf2p8mulb] = 14;           // Galois Field Multiply Bytes
	SMPTypeCategory[STARS_NN_gf2p8affineqb] = 14;       // Computes Affine Transformation
	SMPTypeCategory[STARS_NN_gf2p8affineinvqb] = 14;    // Computes Inverse Affine Transformation

	// VEX versions
	SMPTypeCategory[STARS_NN_vgf2p8mulb] = 14;          // Galois Field Multiply Bytes
	SMPTypeCategory[STARS_NN_vgf2p8affineqb] = 14;      // Computes Affine Transformation
	SMPTypeCategory[STARS_NN_vgf2p8affineinvqb] = 14;   // Computes Inverse Affine Transformation

	// Intrinsics for Saving and Restoring the Extended Processor States (64-bits)

	SMPTypeCategory[STARS_NN_fxsave64] = 1;            // Fast save FP context (64-bits)
	SMPTypeCategory[STARS_NN_fxrstor64] = 1;           // Fast restore FP context (64-bits)

	SMPTypeCategory[STARS_NN_last] = 1;

	return;

} // end of STARS_Program_t::InitTypeCategory()